US20110037165A1 - Semiconductor Device and Method of Mounting Semiconductor Die to Heat Spreader on Temporary Carrier and Forming Polymer Layer and Conductive Layer Over the Die - Google Patents

Abstract

A semiconductor device is made by forming a heat spreader over a temporary carrier. A semiconductor die is mounted to the heat spreader. A first polymer layer is formed over the semiconductor die and heat spreader. A first conductive layer is formed over the first polymer layer. The first conductive layer is connected to the heat spreader and contact pads on the semiconductor die. A second polymer layer is formed over the first conductive layer. A second conductive layer is formed over the second polymer layer. The second conductive layer is electrically connected to the first conductive layer. Bumps are formed through a solder masking layer on the second conductive layer. The temporary carrier is removed. The heat spreader dissipates heat from the semiconductor die and provides shielding from inter-device interference. The heat spreader is grounded through the first and second conductive layers.

Description

FIELD OF THE INVENTION
• The present invention relates in general to semiconductor devices and, more particularly, to a semiconductor device and method of mounting a semiconductor die to a heat spreader on a temporary carrier and forming polymer layers and conductive layers over the die.
BACKGROUND OF THE INVENTION
• Semiconductor devices are commonly found in modern electronic products. Semiconductor devices vary in the number and density of electrical components. Discrete semiconductor devices generally contain one type of electrical component, e.g., light emitting diode (LED), small signal transistor, resistor, capacitor, inductor, and power metal oxide semiconductor field effect transistor (MOSFET). Integrated semiconductor devices typically contain hundreds to millions of electrical components. Examples of integrated semiconductor devices include microcontrollers, microprocessors, charged-coupled devices (CCDs), solar cells, and digital micro-mirror devices (DMDs).
• Semiconductor devices perform a wide range of functions such as high-speed calculations, transmitting and receiving electromagnetic signals, controlling electronic devices, transforming sunlight to electricity, and creating visual projections for television displays. Semiconductor devices are found in the fields of entertainment, communications, power conversion, networks, computers, and consumer products. Semiconductor devices are also found in military applications, aviation, automotive, industrial controllers, and office equipment.
• Semiconductor devices exploit the electrical properties of semiconductor materials. The atomic structure of semiconductor material allows its electrical conductivity to be manipulated by the application of an electric field or base current or through the process of doping. Doping introduces impurities into the semiconductor material to manipulate and control the conductivity of the semiconductor device.
• A semiconductor device contains active and passive electrical structures. Active structures, including bipolar and field effect transistors, control the flow of electrical current. By varying levels of doping and application of an electric field or base current, the transistor either promotes or restricts the flow of electrical current. Passive structures, including resistors, capacitors, and inductors, create a relationship between voltage and current necessary to perform a variety of electrical functions. The passive and active structures are electrically connected to form circuits, which enable the semiconductor device to perform high-speed calculations and other useful functions.
• Semiconductor devices are generally manufactured using two complex manufacturing processes, i.e., front-end manufacturing, and back-end manufacturing, each involving potentially hundreds of steps. Front-end manufacturing involves the formation of a plurality of die on the surface of a semiconductor wafer. Each die is typically identical and contains circuits formed by electrically connecting active and passive components. Back-end manufacturing involves singulating individual die from the finished wafer and packaging the die to provide structural support and environmental isolation.
• One goal of semiconductor manufacturing is to produce smaller semiconductor devices. Smaller devices typically consume less power, have higher performance, and can be produced more efficiently. In addition, smaller semiconductor devices have a smaller footprint, which is desirable for smaller end products. A smaller die size may be achieved by improvements in the front-end process resulting in die with smaller, higher density active and passive components. Back-end processes may result in semiconductor device packages with a smaller footprint by improvements in electrical interconnection and packaging materials.
• In fan-out wafer level chip scale packages (FO-WLCSP), semiconductor die are stacked and vertically interconnected within the package. In high frequency applications, the semiconductor die emit or are susceptible to radiation, electromagnetic interference (EMI), radio frequency interference (RFI), harmonic effects, and other inter-device interference, which reduces the electrical performance of the device. In addition, the high frequency semiconductor die generate considerable thermal energy which must be adequately dissipated.
SUMMARY OF THE INVENTION
• A need exists to dissipate thermal energy and shield against inter-device interference in a FO-WLCSP. Accordingly, in one embodiment, the present invention is a method of making a semiconductor device comprising the steps of providing a temporary carrier, forming a heat spreader over the temporary carrier, mounting a semiconductor die to the heat spreader, forming a first insulating layer over the semiconductor die and heat spreader, and forming a first conductive layer over the first insulating layer. The first conductive layer is connected to the heat spreader and contact pads on the semiconductor die. The method further includes the steps of forming a second insulating layer over the first conductive layer, and forming a second conductive layer over the second insulating layer. The second conductive layer is electrically connected to the first conductive layer. The temporary carrier is removed.
• In another embodiment, the present invention is a method of making a semiconductor device comprising the steps of providing a temporary carrier, forming a heat spreader over the temporary carrier, mounting a semiconductor die to the heat spreader, forming a first insulating layer over the semiconductor die and heat spreader, and forming a first conductive layer over the first insulating layer. The first conductive layer is connected to the heat spreader and contact pads on the semiconductor die. The temporary carrier is removed.
• In another embodiment, the present invention is a method of making a semiconductor device comprising the steps of providing a heat spreader, mounting a backside of a semiconductor die to the heat spreader, forming a first insulating layer over an active side of the semiconductor die and heat spreader, and forming a first conductive layer over the first insulating layer. The first conductive layer is connected to the heat spreader and contact pads on the semiconductor die.
• In another embodiment, the present invention is a semiconductor device comprising a heat spreader and semiconductor die having a backside mounted to the heat spreader. A first insulating layer is formed over an active side of the semiconductor die and heat spreader. A first conductive layer is formed over the first insulating layer. The first conductive layer is connected to the heat spreader and contact pads on the semiconductor die.
BRIEF DESCRIPTION OF THE DRAWINGS
• FIG. 1 illustrates a PCB with different types of packages mounted to its surface;
• FIGS. 2a-2cillustrate further detail of the representative semiconductor packages mounted to the PCB;
• FIGS. 3a-3killustrate a process of mounting semiconductor die to a heat spreader on a temporary carrier and forming polymer layers and conductive layers over the die; and
• FIG. 4 illustrates the semiconductor die mounted to the heat spreader with polymer layers and conductive layers formed over and around the die.
DETAILED DESCRIPTION OF THE DRAWINGS
• The present invention is described in one or more embodiments in the following description with reference to the figures, in which like numerals represent the same or similar elements. While the invention is described in terms of the best mode for achieving the invention's objectives, it will be appreciated by those skilled in the art that it is intended to cover alternatives, modifications, and equivalents as may be included within the spirit and scope of the invention as defined by the appended claims and their equivalents as supported by the following disclosure and drawings.
• Semiconductor devices are generally manufactured using two complex manufacturing processes: front-end manufacturing and back-end manufacturing. Front-end manufacturing involves the formation of a plurality of die on the surface of a semiconductor wafer. Each die on the wafer contains active and passive electrical components, which are electrically connected to form functional electrical circuits. Active electrical components, such as transistors and diodes, have the ability to control the flow of electrical current. Passive electrical components, such as capacitors, inductors, resistors, and transformers, create a relationship between voltage and current necessary to perform electrical circuit functions.
• Passive and active components are formed over the surface of the semiconductor wafer by a series of process steps including doping, deposition, photolithography, etching, and planarization. Doping introduces impurities into the semiconductor material by techniques such as ion implantation or thermal diffusion. The doping process modifies the electrical conductivity of semiconductor material in active devices, transforming the semiconductor material into an insulator, conductor, or dynamically changing the semiconductor material conductivity in response to an electric field or base current. Transistors contain regions of varying types and degrees of doping arranged as necessary to enable the transistor to promote or restrict the flow of electrical current upon the application of the electric field or base current.
• Active and passive components are formed by layers of materials with different electrical properties. The layers can be formed by a variety of deposition techniques determined in part by the type of material being deposited. For example, thin film deposition may involve chemical vapor deposition (CVD), physical vapor deposition (PVD), electrolytic plating, and electroless plating processes. Each layer is generally patterned to form portions of active components, passive components, or electrical connections between components.
• The layers can be patterned using photolithography, which involves the deposition of light sensitive material, e.g., photoresist, over the layer to be patterned. A pattern is transferred from a photomask to the photoresist using light. The portion of the photoresist pattern subjected to light is removed using a solvent, exposing portions of the underlying layer to be patterned. The remainder of the photoresist is removed, leaving behind a patterned layer. Alternatively, some types of materials are patterned by directly depositing the material into the areas or voids formed by a previous deposition/etch process using techniques such as electroless and electrolytic plating.
• Depositing a thin film of material over an existing pattern can exaggerate the underlying pattern and create a non-uniformly flat surface. A uniformly flat surface is required to produce smaller and more densely packed active and passive components. Planarization can be used to remove material from the surface of the wafer and produce a uniformly flat surface. Planarization involves polishing the surface of the wafer with a polishing pad. An abrasive material and corrosive chemical are added to the surface of the wafer during polishing. The combined mechanical action of the abrasive and corrosive action of the chemical removes any irregular topography, resulting in a uniformly flat surface.
• Back-end manufacturing refers to cutting or singulating the finished wafer into the individual die and then packaging the die for structural support and environmental isolation. To singulate the die, the wafer is scored and broken along non-functional regions of the wafer called saw streets or scribes. The wafer is singulated using a laser cutting tool or saw blade. After singulation, the individual die are mounted to a package substrate that includes pins or contact pads for interconnection with other system components. Contact pads formed over the semiconductor die are then connected to contact pads within the package. The electrical connections can be made with solder bumps, stud bumps, conductive paste, or wirebonds. An encapsulant or other molding material is deposited over the package to provide physical support and electrical isolation. The finished package is then inserted into an electrical system and the functionality of the semiconductor device is made available to the other system components.
• FIG. 1 illustrateselectronic device50 having a chip carrier substrate or printed circuit board (PCB)52 with a plurality of semiconductor packages mounted on its surface.Electronic device50 may have one type of semiconductor package, or multiple types of semiconductor packages, depending on the application. The different types of semiconductor packages are shown inFIG. 1 for purposes of illustration.
• Electronic device50 may be a stand-alone system that uses the semiconductor packages to perform one or more electrical functions. Alternatively,electronic device50 may be a subcomponent of a larger system. For example,electronic device50 may be a graphics card, network interface card, or other signal processing card that can be inserted into a computer. The semiconductor package can include microprocessors, memories, application specific integrated circuits (ASIC), logic circuits, analog circuits, RF circuits, discrete devices, or other semiconductor die or electrical components.
• InFIG. 1,PCB52 provides a general substrate for structural support and electrical interconnect of the semiconductor packages mounted on the PCB. Conductive signal traces54 are formed over a surface or within layers ofPCB52 using evaporation, electrolytic plating, electroless plating, screen printing, or other suitable metal deposition process. Signal traces54 provide for electrical communication between each of the semiconductor packages, mounted components, and other external system components.Traces54 also provide power and ground connections to each of the semiconductor packages.
• In some embodiments, a semiconductor device has two packaging levels. First level packaging is a technique for mechanically and electrically attaching the semiconductor die to an intermediate carrier. Second level packaging involves mechanically and electrically attaching the intermediate carrier to the PCB. In other embodiments, a semiconductor device may only have the first level packaging where the die is mechanically and electrically mounted directly to the PCB.
• For the purpose of illustration, several types of first level packaging, includingwire bond package56 andflip chip58, are shown onPCB52. Additionally, several types of second level packaging, including ball grid array (BGA)60, bump chip carrier (BCC)62, dual in-line package (DIP)64, land grid array (LGA)66, multi-chip module (MCM)68, quad flat non-leaded package (QFN)70, and quadflat package72, are shown mounted onPCB52. Depending upon the system requirements, any combination of semiconductor packages, configured with any combination of first and second level packaging styles, as well as other electronic components, can be connected toPCB52. In some embodiments,electronic device50 includes a single attached semiconductor package, while other embodiments call for multiple interconnected packages. By combining one or more semiconductor packages over a single substrate, manufacturers can incorporate pre-made components into electronic devices and systems. Because the semiconductor packages include sophisticated functionality, electronic devices can be manufactured using cheaper components and a streamlined manufacturing process. The resulting devices are less likely to fail and less expensive to manufacture resulting in a lower cost for consumers.
• FIGS. 2a-2cshow exemplary semiconductor packages.FIG. 2aillustrates further detail ofDIP64 mounted onPCB52. Semiconductor die74 includes an active region containing analog or digital circuits implemented as active devices, passive devices, conductive layers, and dielectric layers formed within the die and are electrically interconnected according to the electrical design of the die. For example, the circuit may include one or more transistors, diodes, inductors, capacitors, resistors, and other circuit elements formed within the active region of semiconductor die74. Contactpads76 are one or more layers of conductive material, such as aluminum (Al), copper (Cu), tin (Sn), nickel (Ni), gold (Au), or silver (Ag), and are electrically connected to the circuit elements formed within semiconductor die74. During assembly ofDIP64, semiconductor die74 is mounted to anintermediate carrier78 using a gold-silicon eutectic layer or adhesive material such as thermal epoxy. The package body includes an insulative packaging material such as polymer or ceramic. Conductor leads80 andwire bonds82 provide electrical interconnect between semiconductor die74 andPCB52.Encapsulant84 is deposited over the package for environmental protection by preventing moisture and particles from entering the package and contaminating die74 or wire bonds82.
• FIG. 2billustrates further detail ofBCC62 mounted onPCB52. Semiconductor die88 is mounted overcarrier90 using an underfill or epoxy-resin adhesive material92.Wire bonds94 provide first level packing interconnect betweencontact pads96 and98. Molding compound orencapsulant100 is deposited over semiconductor die88 andwire bonds94 to provide physical support and electrical isolation for the device. Contactpads102 are formed over a surface ofPCB52 using a suitable metal deposition process such as electrolytic plating or electroless plating to prevent oxidation. Contactpads102 are electrically connected to one or more conductive signal traces54 inPCB52.Bumps104 are formed betweencontact pads98 ofBCC62 andcontact pads102 ofPCB52.
• InFIG. 2c,semiconductor die58 is mounted face down tointermediate carrier106 with a flip chip style first level packaging.Active region108 of semiconductor die58 contains analog or digital circuits implemented as active devices, passive devices, conductive layers, and dielectric layers formed according to the electrical design of the die. For example, the circuit may include one or more transistors, diodes, inductors, capacitors, resistors, and other circuit elements withinactive region108. Semiconductor die58 is electrically and mechanically connected tocarrier106 throughbumps110.
• BGA60 is electrically and mechanically connected toPCB52 with a BGA style second levelpackaging using bumps112. Semiconductor die58 is electrically connected to conductive signal traces54 inPCB52 throughbumps110,signal lines114, and bumps112. A molding compound orencapsulant116 is deposited over semiconductor die58 andcarrier106 to provide physical support and electrical isolation for the device. The flip chip semiconductor device provides a short electrical conduction path from the active devices on semiconductor die58 to conduction tracks onPCB52 in order to reduce signal propagation distance, lower capacitance, and improve overall circuit performance. In another embodiment, the semiconductor die58 can be mechanically and electrically connected directly toPCB52 using flip chip style first level packaging withoutintermediate carrier106.
• FIGS. 3a-3killustrate, in relation toFIGS. 1 and a-2c, a process of mounting semiconductor die to a heat spreader on a temporary carrier and forming polymer layers and conductive layers over the die. InFIG. 3a,semiconductor wafer120 contains a plurality of semiconductor die122 separated by sawstreet124. Each semiconductor die122 contains analog or digital circuits implemented as active devices, passive devices, conductive layers, and dielectric layers formed within the die and electrically interconnected according to the electrical design and function of the die. For example, the circuit may include one or more transistors, diodes, and other circuit elements formed within the active surface of the die to implement analog circuits or digital circuits, such as digital signal processor (DSP), ASIC, memory, or other signal processing circuit. Semiconductor die122 may also contain IPD, such as inductors, capacitors, and resistors, for RF signal processing. A typical RF system requires multiple IPDs in one or more semiconductor packages to perform the necessary electrical functions.
• InFIG. 3b,a wafer-form substrate orcarrier130 contains temporary or sacrificial base material such as silicon, polymer, polymer composite, metal, ceramic, glass, glass epoxy, beryllium oxide, or other suitable low-cost, rigid material or bulk semiconductor material for structural support. In one embodiment,carrier130 is 20.3 centimeters (cm) in diameter.Adhesive tape132 is formed oncarrier130, as shown inFIG. 3c. An array ofconductive heat spreaders134 is disposed onadhesive tape132, as shown inFIGS. 3band3d.Heatspreaders134 can be Al, Cu, or another material with high thermal conductivity to provide heat dissipation. Semiconductor die122 are singulated fromwafer120 and picked and placed ontoheat spreader134 withback surface135 of the die oriented towardheat spreader134 andcontact pads138 andactive surface140 of the die oriented away fromcarrier130. An optional die attach adhesive or thermal interface layer (TIM)136 holds semiconductor die122 in place during the re-array of the die ontoheat spreaders134.
• InFIG. 3e,an insulatinglayer142 is formed over semiconductor die122 andheat spreader134. The insulatinglayer142 can be one or more layers of polyimide, BCB, PBO, polynorbornene, epoxy resin with filler, epoxy acrylate with filler, or other polymer material. The insulatinglayer142 is formed using printing, spin coating, or spray coating. The insulatinglayer142 eliminates the need for a molding process. The insulatinglayer142 is planarized to exposecontact pads138. InFIG. 3f,a plurality ofvias144 are drilled or etched into insulatinglayer142.Vias144 extend down toheat spreader134.
• InFIG. 3g,an electricallyconductive layer146 is formed overinsulating layer142 and intovias144 using a patterning and metal deposition process such as PVD, CVD, sputtering, electrolytic plating, or electroless plating process.Conductive layer146 can be one or more layers of Al, Cu, Sn, Ni, Au, Ag, or other suitable electrically conductive material. One portion ofconductive layer146 is electrically connected to contactpads138 of semiconductor die122; another portion ofconductive layer146 is thermally connected to heatspreader134. Other portions ofconductive layer146 can be electrically common or electrically isolated depending on the design and function of the semiconductor device.
• InFIG. 3h,an insulatinglayer148 is formed overinsulating layer142 andconductive layer146. The insulatinglayer148 can be one or more layers of polyimide, BCB, PBO, polynorbornene, epoxy resin with filler, epoxy acrylate with filler, or other polymer material. The insulatinglayer148 is formed using printing, spin coating, or spray coating. InFIG. 3i,a portion of insulatinglayer148 is removed by drilling or etch development process to form vias150 down toconductive layer146.
• InFIG. 3j,an electricallyconductive layer152 is formed overinsulating layer148 and intovias150 using a patterning and metal deposition process such as PVD, CVD, sputtering, electrolytic plating, or electroless plating process.Conductive layer152 can be one or more layers of Al, Cu, Sn, Ni, Au, Ag, or other suitable electrically conductive material. One portion ofconductive layer152 is electrically connected toconductive layer146. Other portions ofconductive layer152 can be electrically common or electrically isolated depending on the design and function of the semiconductor device.Conductive layers146 and152 use redistribution to transfer signals from a peripheral layout to an area array.
• InFIG. 3k,asolder masking layer154 is formed overconductive layer152 and insulatinglayer148 with openings to exposeconductive layer152 for next level interconnect.
• An electrically conductive bump material is deposited overconductive layer152 using an evaporation, electrolytic plating, electroless plating, ball drop, or screen printing process. The bump material can be Al, Sn, Ni, Au, Ag, Pb, Bi, Cu, solder, and combinations thereof, with an optional flux solution. For example, the bump material can be eutectic Sn/Pb, high-lead solder, or lead-free solder. The bump material is bonded toconductive layer152 using a suitable attachment or bonding process. In one embodiment, the bump material is reflowed by heating the material above its melting point to form spherical balls or bumps156. In some applications, bumps156 are reflowed a second time to improve electrical contact toconductive layer152. The bumps can also be compression bonded toconductive layer152.Bumps156 represent one type of interconnect structure that can be formed overconductive layer152. The interconnect structure can also use bond wires, stud bump, micro bump, or other electrical interconnect.
• Carrier130 andadhesive tape132 are removed by mechanical peel-off, CMP, mechanical grinding, thermal bake, laser scanning, or wet stripping. Semiconductor die122 are singulated into individual units using a saw blade or laser cutting tool.
• FIG. 4 showsWLCSP160 withback surface135 of semiconductor die122 directly mounted toheat spreader134.Heat spreader134 dissipates heat generated by semiconductor die122.Heat spreader134 also blocks or absorbs electromagnetic interference (EMI), radio frequency interference (RFI), and other inter-device interference.Heat spreader134 is grounded throughconductive layers146 and152 tobumps156. Polymer layers142 and148, as formed around and over semiconductor die122, eliminate the need for a molding process.Conductive layers146 and152 provide a short signal path fromcontact pads138 tobumps156 for a higher operating speed and good electrical performance for semiconductor die122.
• While one or more embodiments of the present invention have been illustrated in detail, the skilled artisan will appreciate that modifications and adaptations to those embodiments may be made without departing from the scope of the present invention as set forth in the following claims.

Claims (25)

1. A method of making a semiconductor device, comprising:

providing a temporary carrier;

forming a heat spreader over the temporary carrier;

mounting a semiconductor die to the heat spreader;

forming a first insulating layer over the semiconductor die and heat spreader;

forming a first conductive layer over the first insulating layer, the first conductive layer being connected to the heat spreader and contact pads on the semiconductor die;

forming a second insulating layer over the first conductive layer;

forming a second conductive layer over the second insulating layer, the second conductive layer being electrically connected to the first conductive layer; and

removing the temporary carrier.

2. The method ofclaim 1, further including forming a solder masking layer over the second insulating layer with openings over the second conductive layer.

3. The method ofclaim 2, further including forming bumps through the solder masking layer on the second conductive layer.

4. The method ofclaim 1, wherein the heat spreader is grounded through the first and second conductive layers.

5. The method ofclaim 1, wherein the heat spreader provides shielding from inter-device interference.

6. The method ofclaim 1, wherein the first and second insulating layers include a polymer material.

7. A method of making a semiconductor device, comprising:

providing a carrier;

forming a heat spreader over the carrier;

mounting a semiconductor die to the heat spreader;

forming a first insulating layer over the semiconductor die and heat spreader;

forming a first conductive layer over the first insulating layer, the first conductive layer being connected to the heat spreader and contact pads on the semiconductor die; and

removing the carrier.

8. The method ofclaim 7, further including:

forming a second insulating layer over the first conductive layer; and

forming a second conductive layer over the second insulating layer, the second conductive layer being electrically connected to the first conductive layer.

9. The method ofclaim 8, further including forming a solder masking layer over the second insulating layer with openings over the second conductive layer.

10. The method ofclaim 9, further including forming bumps through the solder masking layer on the second conductive layer.

11. The method ofclaim 7, wherein the heat spreader is grounded through the first conductive layer.

12. The method ofclaim 7, wherein the heat spreader provides shielding from inter-device interference.

13. The method ofclaim 7, further including forming adhesive tape over the carrier prior to forming the heat spreader.

14. The method ofclaim 7, wherein the first insulating layer includes a polymer material.

15. A method of making a semiconductor device, comprising:

providing a heat spreader;

mounting a backside of a semiconductor die to the heat spreader;

forming a first insulating layer over an active side of the semiconductor die and heat spreader; and

forming a first conductive layer over the first insulating layer, the first conductive layer being connected to the heat spreader and contact pads on the semiconductor die.

16. The method ofclaim 15, further including:

forming a second insulating layer over the first conductive layer; and

forming a second conductive layer over the second insulating layer, the second conductive layer being electrically connected to the first conductive layer.

17. The method ofclaim 15, further including forming a solder masking layer over the second insulating layer with openings over the second conductive layer.

18. The method ofclaim 17, further including forming bumps through the solder masking layer on the second conductive layer.

19. The method ofclaim 15, wherein the heat spreader provides shielding from inter-device interference.

20. The method ofclaim 15, wherein the first and second insulating layers include a polymer material.

21. A semiconductor device, comprising:

a heat spreader;

a semiconductor die having a backside mounted to the heat spreader;

a first insulating layer formed over an active side of the semiconductor die and heat spreader; and

a first conductive layer formed over the first insulating layer, the first conductive layer being connected to the heat spreader and contact pads on the semiconductor die.

22. The semiconductor device ofclaim 21, further including:

a second insulating layer formed over the first conductive layer; and

a second conductive layer formed over the second insulating layer, the second conductive layer being electrically connected to the first conductive layer.

23. The semiconductor device ofclaim 22, wherein the heat spreader is grounded through the first and second conductive layers.

24. The semiconductor device ofclaim 21, wherein the heat spreader provides shielding from inter-device interference.

25. The semiconductor device ofclaim 21, wherein the first insulating layer includes a polymer material.

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