US20110031113A1 - Electroplating apparatus - Google Patents

Abstract

Embodiments of the invention contemplate the formation of a low cost solar cell using a novel high speed electroplating method and apparatus to form a metal contact structure having selectively formed metal lines using an electrochemical plating process. The apparatus and methods described herein remove the need to perform one or more high temperature screen printing processes to form conductive features on the surface of a solar cell substrate. The resistance of interconnects formed in a solar cell device greatly affects the efficiency of the solar cell. It is thus desirable to form a solar cell device that has a low resistance connection that is reliable and cost effective. Therefore, one or more embodiments of the invention described herein are adapted to form a low cost and reliable interconnecting layer using an electrochemical plating process containing a common metal, such as copper.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS
• This application is a continuation of co-pending U.S. patent application Ser. No. 11/566,201, filed Dec. 1, 2006, which is herein incorporated by reference.
BACKGROUND OF THE INVENTION
• 1. Field of the Invention
• Embodiments of the present invention generally relate to the fabrication of photovoltaic cells.
• 2. Description of the Related Art
• Solar cells are photovoltaic devices that convert sunlight directly into electrical power. The most common solar cell material is silicon, which is in the form of single or polycrystalline wafers. Because the amortized cost of forming a silicon-based solar cells to generate electricity is higher than the cost of generating electricity using traditional methods, there has been an effort to reduce the cost to form solar cells.
• FIGS. 1A and 1B schematically depicts a standard siliconsolar cell100 fabricated on awafer110. Thewafer110 includes a p-type base region101, an n-type emitter region102, and ap-n junction region103 disposed therebetween. An n-type region, or n-type semiconductor, is formed by doping the semiconductor with certain types of elements (e.g., phosphorus (P), arsenic (As), or antimony (Sb)) in order to increase the number of negative charge carriers, i.e., electrons. Similarly, a p-type region, or p-type semiconductor, is formed by the addition of trivalent atoms to the crystal lattice, resulting in a missing electron from one of the four covalent bonds normal for the silicon lattice. Thus, the dopant atom can accept an electron from a neighboring atom's covalent bond to complete the fourth bond. The dopant atom accepts an electron, causing the loss of half of one bond from the neighboring atom and resulting in the formation of a “hole”.
• When light falls on the solar cell, energy from the incident photons generates electron-hole pairs on both sides of thep-n junction region103. Electrons diffuse across the p-n junction to a lower energy level and holes diffuse in the opposite direction, creating a negative charge on the emitter and a corresponding positive charge builds up in the base. When an electrical circuit is made between the emitter and the base and the p-n junction is exposed to certain wavelengths of light, a current will flow. The electrical current generated by the semiconductor when illuminated flows through contacts disposed on thefrontside120, i.e. the light-receiving side, and thebackside121 of thesolar cell100. The top contact structure, as shown inFIG. 1A, is generally configured as widely-spaced thin metal lines, orfingers104, that supply current to alarger bus bar105. Theback contact106 is generally not constrained to be formed in multiple thin metal lines, since it does not prevent incident light from strikingsolar cell100.Solar cell100 is generally covered with a thin layer of dielectric material, such as Si₃N₄, to act as ananti-reflection coating111, or ARC, to minimize light reflection from the top surface ofsolar cell100.
• In the interest of simplified assembly and higher efficiency of solar cells, a solar cell has been developed, wherein a plurality of holes is formed through the solar cell substrate and serves as vias for interconnection of the top contact structure to a backside conductor by using pins. This solar cell design is referred to as a pin-up module, or PUM. One advantage of the PUM concept is the elimination of the busbars, such asbus bar105 illustrated inFIG. 1A, from covering the light-receiving side of the substrate, thereby increasing efficiency of the cell. Another is that resistive losses are reduced because current produced by the solar cell is collected at holes equally spaced over the substrate rather than requiring some of the connections to extend across the surface of the solar cell. Further, resistive losses experienced by a PUM connected device will not increase as the solar cell surface area increases and, hence, larger solar cells may be manufactured without a loss in efficiency.
• FIG. 1C is a partial schematic cross section of one example of aPUM cell130 showing acontact134. Similar to a standard solar cell, such assolar cell100,PUM cell130 includes a singlecrystal silicon wafer110 with a p-type base region101, an n-type emitter region102, and ap-n junction region103 disposed therebetween.PUM cell130 also includes a plurality of through-holes131, which are formed between the light-receivingsurface132 and thebackside133 ofPUM cell130. The through-holes131 allow the formation ofcontact134 between the light-receivingsurface132 and thebackside133. Disposed in each through-hole131 is acontact134, which includes atop contact structure135 disposed on light-receivingsurface132, abackside contact136 disposed onbackside133, and aninterconnect137, which fills through-hole131 and electrically couplestop contact structure135 andbackside contact136. Ananti-reflective coating107 may also be formed onlight receiving surface132 to minimize reflection of light energy therefrom. Abackside contact139 completes the electrical circuit required forPUM cell130 to produce a current by forming an ohmic contact with p-type base region101 of thesilicon wafer110.
• The fingers104 (FIG. 1B) or contact134 (FIG. 1C) are in contact with the substrate are adapted to form an ohmic connection with doped region (e.g., n-type emitter region102). An ohmic contact is a region on a semiconductor device that has been prepared so that the current-voltage (I-V) curve of the device is linear and symmetric, i.e., there is no high resistance interface between the doped silicon region of the semiconductor device and the metal contact. Low-resistance, stable contacts are critical for the performance of the solar cell and reliability of the circuits formed in the solar cell fabrication process. Hence, after thefingers104, orcontacts134, have been formed on the light-receiving surface and on the backside, an annealing process of suitable temperature and duration is typically performed in order to produce the necessary low resistance metal silicide at the contact/semiconductor interface. A backside contact completes the electrical circuit required for solar cell to produce a current by forming an ohmic contact with p-type base region of the substrate.
• Wider the current carrying metal lines (e.g.,fingers104, contact134) are on the light-receiving surface of the solar cell the lower the resistance losses, but the higher the shadowing losses due to the reduced effective surface area of the light-receiving surface. Therefore, maximizing solar cell efficiency requires balancing these opposing design constraints.FIG. 1D illustrates a plan view of one example of atop contact structure135 for a PUM cell, wherein the finger width and geometry have been optimized to maximize cell efficiency for the cell. In this configuration, atop contact structure135 for a PUM cell is configured as agrid electrode138, which consists of a plurality of variouswidth finger segments135A. The width of aparticular finger segment135A is selected as a function of the current to be carried by thatfinger segment135A. In addition,finger segments135A are configured to branch as necessary to maintain finger spacing as a function of finger width. This minimizes resistance losses as well as shadowing byfinger segments135A.
• Traditionally, the current carrying metal lines, or conductors, are fabricated using a screen printing process in which a silver-containing paste is deposited in a desired pattern on a substrate surface and then annealed. However, there are several issues with this manufacturing method. First, the thin fingers of the conductors, when formed by the screen printing process, may be discontinuous since the fingers formed using a metal paste do not always agglomerate into a continuous interconnecting line during the annealing process. Second, porosity present in the fingers formed during the agglomeration process results in greater resistive losses. Third, electrical shunts may be formed by diffusion of the metal (e.g., silver) from the contact into the p-type base region or on the surface of the substrate backside. Shunts on the substrate backside are caused by poor definition of backside contacts such as waviness, and/or metal residue. Fourth, due to the relatively thin substrate thicknesses commonly used in solar cell applications, such as 200 micrometers and less, the act of screen printing the metal paste on the substrate surface can cause physical damage to the substrate. Lastly, silver-based paste is a relatively expensive material for forming conductive components of a solar cell.
• One issue with the current method of forming metal interconnects using a screen printing process that utilizes a metal particle containing paste is that the process of forming the patterned features requires high temperature post-processing steps to densify the formed features and form a good electrical contact with the substrate surface. Due to the need to perform a high temperature sintering process the formed interconnect lines will have a high extrinsic stress created by the difference in thermal expansion of the substrate material and the metal lines. A high extrinsic stress, or even intrinsic stress, formed in the metal interconnect lines is an issue, since it can cause breakage of the formed metallized features, warping of the thin solar cell substrate, and/or delamination of the metallized features from the surface of the solar cell substrate. The high temperature post processing step can also cause the material in the solar cell device to diffuse into unwanted regions of the device, thus causing device problems, such as an electrical short. High temperature processes also limit the types of materials that can be used to form a solar cell due to the breakdown of certain materials at the high sintering temperatures. Also, screen printing processes also tend to be non-uniform, unreliable and often unrepeatable. Therefore, there is a need to form a low stress interconnect line that forms a strong bond to the surface of the substrate.
• Another approach to forming very thin, robust current carrying metal lines on the surface of a solar cell substrate involves cutting grooves in the surface of the substrate with a laser. The grooves are subsequently filled by an electroless plating method. However the laser-cut grooves are a source of macro- and micro-defects. The laser-cut edge is not well defined, causing waviness on the finger edges, and the heat of the laser introduces defects into the silicon.
• The effectiveness of a solar cell substrate fabrication process is often measured by two related and important factors, which are device yield and the cost of ownership (COO). These factors are important since they directly affect the cost to produce an solar cell device and thus a device manufacturer's competitiveness in the market place. The CoO, while affected by a number of factors, is greatly affected by the system and chamber throughput or simply the number of substrates per hour processed using a desired processing sequence. A process sequence is generally defined as the sequence of device fabrication steps, or process recipe steps, completed in one or more processing chambers that are used to form a solar cell. A process sequence may generally contain various substrate (or wafer) fabrication processing steps. If the substrate throughput is not limited by the time to transfer the solar cell substrates then the longest process recipe step will generally limit the throughput of the processing sequence, increase the CoO and possibly make a desirable processing sequence impractical.
• Therefore, there is a need for a system, a method and an apparatus that can process a substrate so that it can meet the required device performance goals and increase the system throughput and thus reduce the process sequence CoO. There is also a need for a low cost method of forming a contact structure for solar cells that have a low resistivity and clearly defined features.
SUMMARY OF THE INVENTION
• Embodiments of the present invention generally provide a method of forming a solar cell device, comprising positioning a solar cell substrate in a first processing chamber, the solar cell substrate having a first region and a second region that comprise elements that are used to form a solar cell device, forming a first conductive layer on the first region and the second region in the first processing chamber, and forming a second conductive layer on the first conductive layer using an electrochemical plating process, wherein forming the second conductive layer comprises forming a first metal layer on at least a portion of the first conductive region, and forming a second metal layer on at least a portion of the second conductive region.
• Embodiments of the present invention may further provide a method of forming a solar cell device, comprising positioning a solar cell substrate in a first processing chamber, the solar cell substrate having a first region and a second region that comprise elements that are used to form a solar cell device, forming a first conductive layer over a portion of the first region and the second region in the first processing chamber, and forming a second conductive layer over a portion of the first conductive layer using an electrochemical plating process, wherein forming the second conductive layer comprises disposing a masking plate having first surface and a plurality of apertures formed therein over at least a portion of the first conductive layer, wherein the plurality of apertures are in communication with a first surface, contacting the first conductive layer with an electrical contact, and forming the second conductive layer over the first conductive layer by immersing the substrate and an electrode in a first electrolyte and electrically biasing the electrical contact relative to the electrode, wherein the second metal layer is simultaneously formed within the areas exposed by apertures formed in the masking plate.
• Embodiments of the present invention may further provide a method of forming a solar cell device, comprising positioning a solar cell substrate in a first processing chamber, the solar cell substrate having a first region and a second region that comprise elements that are used to form a solar cell device, forming a first conductive layer over a portion of the first region and the second region in the first processing chamber, and forming a second conductive layer over a portion of the first conductive layer using an electrochemical plating process, wherein forming the second conductive layer comprises depositing a masking material over the first conductive layer, forming a plurality of apertures in the masking layer to expose desired regions of the first conductive layer, contacting the first conductive layer with an electrical contact, and forming the second metal layer over the first conductive layer by immersing the substrate and an electrode in a first electrolyte and electrically biasing the electrical contact relative to the electrode.
BRIEF DESCRIPTION OF THE DRAWINGS
• So that the manner in which the above recited features of the present invention can be understood in detail, a more particular description of the invention, briefly summarized above, may be had by reference to embodiments, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only typical embodiments of this invention and are therefore not to be considered limiting of its scope, for the invention may admit to other equally effective embodiments.
• FIG. 1A illustrates an isometric view of prior art solar cell containing a front side metallization interconnect pattern.
• FIG. 1B illustrates a cross-sectional side view of a prior art solar cell shown inFIG. 1A.
• FIG. 1C illustrates a cross-sectional view of a prior art PUM type device.
• FIG. 1D illustrates a plan view of a top contact structure of a PUM cell, wherein the finger width and geometry have been optimized to maximize cell efficiency.
• FIG. 2 illustrates a solar cell process sequence according to one embodiment described herein.
• FIGS. 3A-3F illustrate schematic cross-sectional views of a solar cell during different stages of the process sequence described inFIG. 2.
• FIG. 4A illustrates a side cross-sectional view of an electrochemical processing chamber according to one embodiment described herein.
• FIG. 4B illustrates is an isometric view of various electrochemical processing chamber components according to one embodiment described herein.
• FIG. 4C illustrates is an isometric view of various electrochemical processing chamber components according to one embodiment described herein.
• FIG. 4D illustrates a side cross-sectional view of an electrochemical processing chamber according to one embodiment described herein.
• FIGS. 5A-5F illustrate an isometric view of a substrate having an electrochemically deposited layer formed thereon according to one embodiment described herein.
• FIG. 6 illustrates a graph of the effect of temperature on deposition rate according to one embodiment described herein.
• FIG. 7A illustrates a side cross-sectional view of a batch electrochemical deposition chamber according to one embodiment described herein.
• FIG. 7B illustrates a plan view of a batch electrochemical deposition system according to one embodiment described herein.
• FIG. 7C illustrates an isometric view of a batch electrochemical deposition chamber according to one embodiment described herein.
• FIG. 7D illustrates a side cross-sectional view of a batch electrochemical deposition chamber according to one embodiment described herein.
• FIG. 7E illustrates an isometric view of a head assembly according to one embodiment described herein.
• FIG. 7F illustrates a close-up isometric view of the head assembly illustrated inFIG. 7E according to one embodiment described herein.
• FIG. 7G illustrates a cross-sectional view of a batch electrochemical deposition system according to one embodiment described herein.
• FIG. 7H illustrates an isometric view of a batch electrochemical deposition system according to one embodiment described herein.
• FIG. 7I illustrates a plan view of a batch electrochemical deposition system according to one embodiment described herein.
• FIG. 8 illustrates a solar cell process sequence according to one embodiment described herein.
• FIGS. 9A-9E illustrate schematic cross-sectional views of a solar cell during different stages of the process sequence described inFIG. 8.
• FIG. 10 illustrates a solar cell process sequence according to one embodiment described herein.
• FIGS. 11A-11H illustrate schematic cross-sectional views of a solar cell during different stages of the process sequence described inFIG. 10.
• For clarity, identical reference numerals have been used, where applicable, to designate identical elements that are common between figures. It is contemplated that features of one embodiment may be incorporated in other embodiments without further recitation.
DETAILED DESCRIPTION
• Embodiments of the invention contemplate the formation of a low cost solar cell using a novel high speed electroplating method and apparatus to form a metal contact structure having selectively formed metal lines using an electrochemical plating process. The apparatus and methods described herein remove the need to perform one or more high temperature screen printing processes to form conductive features on the surface of a solar cell substrate. Solar cell substrates that may benefit from the invention include substrates composed of single crystal silicon, multi-crystalline silicon, polycrystalline silicon, germanium (Ge), and gallium arsenide (GaAs), cadmium telluride (CdTe), cadmium sulfide (CdS), copper indium gallium selenide (CIGS), copper indium selenide (CulnSe₂), gallilium indium phosphide (GaInP₂), as well as heterojunction cells, such as GaInP/GaAs/Ge or ZnSe/GaAs/Ge substrates. The solar cell substrates may be formed in a square, rectangular, circular or any other desirable shape.
• The resistance of interconnects formed in a solar cell device greatly affects the efficiency of the solar cell. It is thus desirable to form a solar cell device that has a low resistance connection that is reliable and cost effective. As noted above, silver (Ag) interconnecting lines formed from a silver paste is one of the currently the preferred interconnecting method. However, while silver has a lower resistivity (e.g., 1.59×10⁻⁸ohm-m) than other common metals such as copper (e.g., 1.7×10⁻⁸ohm-m) and aluminum (e.g., 2.82×10⁻⁸ohm-m) it costs orders of magnitude more than these other common metals. Therefore, one or more embodiments of the invention described herein are adapted to form a low cost and reliable interconnecting layer using an electrochemical plating process containing a common metal, such as copper. However, generally the electroplated portions of the interconnecting layer may contain a substantially pure metal or a metal alloy layer containing copper (Cu), silver (Ag), gold (Au), tin (Sn), cobalt (Co), nickel (Ni), zinc (Zn), lead (Pb), palladium (Pd), and/or aluminum (Al). Preferably, the electroplated portion of the interconnect layer contains substantially pure copper or a copper alloy.
• FIG. 2 illustrates a series of method steps200 that are used to form metal contact structures on a solar cell device using the apparatus described herein. The processes described below may be used to form a solar cell having interconnects formed using any conventional device interconnection style or technique. Thus while the embodiments described herein are discussed in conjunction with the formation of a device that has the electrical contacts to the n-type and p-type junctions on opposing sides of the substrate this interconnect configuration is not intended to be limiting as to the scope of the invention, since other device configurations, such as PUM or multilayer buried contact structures (both contacts on one side), may be formed using the apparatus and methods described herein without varying from the basic scope of the invention.
• FIGS. 3A-3E illustrate the various states of a metallizedsubstrate320 after each step of method steps200 has been performed. The method steps200 start withstep202 in which a substrate301 (FIG. 3A) is formed using conventional solar cell and/or semiconductor fabrication techniques. Thesubstrate301 may be formed from single crystal or polycrystalline silicon materials. Examples of these substrate fabrication process are the EFG process (Edge-defined Film-fed Growth) (e.g., U.S. Pat. No. 5,106,763), the RGS (Ribbon Growth on Substrate) process (e.g., U.S. Pat. No. 4,670,096, U.S. Pat. No. 5,298,109, DE 4,105,910 A1) and the SSP ribbon process (Silicon Sheets from Powder) (e.g., U.S. Pat. No. 5,336,335, U.S. Pat. No. 5,496,446, U.S. Pat. No. 6,111,191, and U.S. Pat. No. 6,207,891). In one example an n-type region302 is disposed over thesubstrate301 that has been doped with a p-type dopant. The n-type region302 can be formed using conventional chemical vapor deposition (CVD) process, by driving-in an n-type dopant using a diffusion furnace, or other similar doping or film deposition techniques. The formed p-n junction will form ap-n junction region303. Anarc layer311, or antireflective coating, can be formed on the light-receivingsurface329 using a physical vapor deposition (PVD) or CVD technique. In one case, anaperture312 is formed in thearc layer311 so that a metal line can directly contact the n-type region302. Theapertures312, as shown may formed in thearc layer311 formed using a conventional lithography and wet or dry etching semiconductor processing techniques or by use of conventional laser drilling processes.
• In the next step,step204, as shown inFIG. 3C, aseed layer321 is formed over desired regions of the substrate surface using a conventional selective deposition process, such as an electroless or selective CVD deposition process. An example of electroless deposition process that may be used to grow aseed layer321 on a doped silicon region is further described in the U.S. patent application Ser. No. 11/385,047 [APPM 9916.02], filed Mar. 20, 2006, U.S. patent application Ser. No. 11/385,043 [APPM 9916.04], filed Mar. 20, 2006, and U.S. patent application Ser. No. 11/385,041 [APPM 10659], filed Mar. 20, 2006, which are all incorporated by reference in their entirety. In another embodiment, theseed layer321 may be selectively formed by use of an inkjet, rubber stamping, or any technique for the pattern wise deposition (i.e., printing) of a metal containing liquid or colloidal media on the surface of the substrate. After depositing the metal containing liquid or colloidal media on the surface of the substrate it is generally desirable to subsequently perform a thermal post treatment to remove any solvent and promote adhesion of the metal to the substrate surface. An example of pattern wise deposition process that may be used to form aseed layer321 on a region of a substrate is further described in the U.S. patent application Ser. No. 11/530,003 [APPM 10254], filed Sep. 7, 2006, which is incorporated by reference in its entirety.
• In one embodiment, as shown inFIGS. 3B and 3C, theseed layer321 is formed from ablanket seed layer321A (FIG. 3B), that is deposited over the complete surface of the substrate and then selective regions are removed using conventional masking and etching techniques to form the seed layer321 (FIG. 3C) that has a desired pattern on the surface of the substrate. In general, ablanket seed layer321A may be deposited using a physical vapor deposition (PVD), chemical vapor deposition (CVD), molecular beam epitaxy (MBE), or atomic layer deposition (ALD) process.
• In general, theseed layer321 may contain a pure metal, metal alloy or other conductive material. In one embodiment, theseed layer321 contains one or more metals selected from the group consisting of nickel (Ni), cobalt (Co), titanium (Ti), tantalum (Ta), rhenium (Rh), molybdenum (Mo), tungsten (W), and ruthenium (Ru). It is desirable to select a deposition process and a metal that forms a good electrical contact, or ohmic contact, between the doped silicon region (e.g., n-type region302) and the depositedseed layer321. In one aspect, theseed layer321 is selected so that it acts as a barrier to the diffusion of a metal in the subsequently formedconductor325 during subsequent processing steps. For example, theseed layer321 may contain one or more metals or metal alloys selected from the group consisting of nickel (Ni), cobalt (Co), titanium (Ti), their silicides, titanium tungsten (TiW), titanium nitride (TiN), tantalum (Ta), tantalum nitride (TaN), molybdenum (Mo), tungsten (W), tungsten silicide (WSi), molybdenum silicide (MoSi), and ruthenium (Ru). In one embodiment, the thickness of theseed layer321 may be between about 0.1 micrometers (μm) and about 1 μm.
• In one embodiment, theseed layer321 consists of at least two layers of metal that are used to promote adhesion to the surface of the substrate, act as a diffusion barrier, and/or promote the growth of a subsequently depositedmetal layer322 contained within the conductor325 (FIG. 3D). In one example, theseed layer321 contains a first metal layer that is deposited on the substrate surface(s) and a second metal layer that contains copper. In this configuration the second layer is deposited over the first metal layer so that it can act as a seed on which an electrochemically deposited layer can be formed. In this case the first layer may contain one or more metals or metal alloys selected from the group consisting of nickel (Ni), cobalt (Co), titanium (Ti), titanium nitride (TiN), titanium tungsten (TiW), tantalum (Ta), tantalum nitride (TaN), molybdenum (Mo), tungsten (W), and ruthenium (Ru) that is deposited using an electroless deposition process, a conventional physical vapor deposition (PVD) process or a conventional chemical vapor deposition (CVD) process, and a second copper containing layer may be a substantially pure layer or an alloy that contains one or more metals selected from the group consisting of cobalt (Co), tin (Sn), silver (Ag), gold (Au), aluminum (Al), and nickel (Ni). In one embodiment, the second layer may be deposited using an electroless deposition process, a conventional physical vapor deposition (PVD) process or a conventional chemical vapor deposition (CVD) process.
Metal Fill/Metal Layer Formation Process(es)
• Referring toFIGS. 2,3D and4A, instep206 theconductor325 elements are electrochemically deposited over desired regions of theseed layer321 using amasking plate410 that containsapertures413 that preferentially allow the electrochemically deposited material to form therein. In this process step, theseed layer321 is cathodically biased relative to an electrode220 using a power supply250, which causes the ions in an electrolyte to form ametal layer322 on the exposed areas of theseed layer321 created within theapertures413. In one embodiment, the light-receiving side of the solar cell may have a metal pattern similar to the pattern shown inFIG. 1D, which is discussed above.
• FIGS. 4A-4D are cross-sectional views that illustrate various embodiments of a single substrate typeelectrochemical plating cell400 that may be used to electrochemically deposit a metal layer on theseed layer321 duringstep206. WhileFIGS. 4A-4D illustrate the substrate in a face-down configuration (e.g.,seed layer321 is facing down) this configuration is not intended to be limiting as to the scope of the invention, since theelectrochemical plating cell400 can be in any desirable orientation, such as face-up, vertically oriented or oriented at some desired angle relative to the horizontal without varying from the scope of the invention.
• Generally, theelectrochemical plating cell400 generally contains ahead assembly405, anelectrode420, apower supply450 and aplating cell430. Thehead assembly405 may contain athrust plate414 and amasking plate410 that is adapted to hold a metallizedsubstrate320 in a position relative to theelectrode420 during the electrochemical deposition. In one aspect, anactuator415 is used to urge thethrust plate414 andmetallized substrate320 againstelectrical contacts412 so that an electrical connection can be formed between aseed layer321 formed on the surface of the metallizedsubstrate320 and thepower supply450 through thelead451. It should be noted that in some embodiments of the invention, amasking plate410 need not used. In this case, a masking material can be used to allow a metal to be selectively formed on desired regions of the substrate surface. A typical masking material may be a photoresist material that is patterned by conventional techniques.
• In one embodiment, as shown inFIG. 4A, theelectrical contacts412 are formed on a surface of themasking plate410. In another embodiment, theelectrical contacts412 may be formed from separate and discrete conductive contacts (not shown), such as conventional conductive clips or conductive pins, that are nested within a recess formed in themasking plate410 when the metallized substrate is being urged against the maskingplate410. The electrical contacts (e.g., contacts412) may be formed from a metal, such as platinum, gold, or nickel, or another conductive material, such as graphite, copper Cu, phosphorous doped copper (CuP), and platinum coated titanium (Pt/Ti). The maskingplate410 is generally made of a dielectric material that has a plurality ofapertures413 formed therein that allow the electrolyte “A” to contact exposed regions on the substrate surface (e.g., exposed region404). This configuration thus allows the preferential formation of an electrochemically deposited metal layer in the exposedregions404 on the processing surface of the substrate when a cathodic bias of a sufficient magnitude is applied to theseed layer321. In one embodiment, the maskingplate410 is made of glass, a plastic material, and/or a ceramic material that contains a plurality ofapertures413 that are formed in themasking plate410 using conventional machining operations, such as laser cutting, milling, water-jet cutting, drilling, electro-discharge machining (EDM), wet etch, plasma etch, or stamping processes. In one embodiment, the maskingplate410 may be formed from SiO₂, polyimide, quartz, or other ceramic, plastic, glass, or polymeric material, for example. In one embodiment, the surface of themasking plate410 that is in contact with the processing surface of the substrate contains a compliant material that is adapted to compensate for surface topography on the substrate surface and/or more actively prevent plating of on these covered surfaces. Complaint materials may include polymeric materials (e.g., rubber materials) and polymeric materials that will not be chemically attacked by the electrolyte. The compliant materials may be soft enough to take-up variations in the topography of the substrate surface.
• The platingcell430 generally contains acell body431 and anelectrode420. Thecell body431 comprises aplating region435 and anelectrolyte collection region436 that contains an electrolyte (e.g., item “A”) that is used to electrochemically deposit the metal layer on the substrate surface. In one aspect, theelectrode420 is positioned in the lower portion of theplating region435 and rests on, or is supported by, thefeatures434 formed in thecell body431. In general, it is desirable to increase the surface area of the anode so that high current densities can applied to theelectrode420 relative to theseed layer321 to increase the plating rate. It is believed that reducing the current density by increasing the surface area of the anode is useful to reduce metal particle formation in the electrolyte that are often created when plating at high current densities using a consumable electrode. The metal particles are likely formed due to the high concentration of the metal ions near the anode surface during the high current density plating process. The reduction of particles will reduce the number of plating defects found in the formed electroplated layer, thus reducing the substrate scrap and improving the CoO of the electrochemical deposition process. In one embodiment, as shown inFIGS. 4A-4D, theelectrode420 is formed in a high-aspect-ratio configuration, which maximizes the surface of theelectrode420 to reduce the current density during the deposition process. In this configuration, theelectrode420 may be formed in spiral shape to maximize the surface area ofelectrode420. Theelectrode420 may have a plurality of holes, slots, or other features (e.g., item #421) that allow fluid to pass therethrough and increase the surface area of the electrode. In one aspect, the surface area of theelectrode420 is greater than about 2 to 10 times of the surface area of the cathode, or area of the metal is plated on the substrate surface. However, a spiral shape is not intended to be limiting as to the scope of the invention, since any high surface area shape could be used herein, for example a wire mesh structure. Theelectrode420 can be formed so that it has a desired shape, such as square, rectangular, circular or oval. Theelectrode420 may be formed from material that is consumable (e.g., copper) during the electroplating reaction, but is more preferably formed from a non-consumable material. A non-consumable electrode may be made of a conductive material that is not etched during the formation themetal layer332, such as titanium coated copper, platinum coated copper, platinum coated titanium, or ruthenium coated titanium. In another embodiment, the plating apparatus, chamber and plating cell may also utilize a conveyor type design that continuously plate a number of substrates at one time, for example, between 25 and 1000 substrates. The substrates in any of the processes described herein may be oriented in a horizontal, vertical or angled orientation relative to the horizontal duringstep206.
• In an effort to achieve high plating rates and achieve desirable plated film properties, it is often desirable to increase the concentration metal ions near the cathode (e.g.,seed layer321 surface) by reducing the diffusion boundary layer or by increasing the metal ion concentration in electrolyte bath. It should be noted that the diffusion boundary layer is strongly related to the hydrodynamic boundary layer. If the metal ion concentration is too low and/or the diffusion boundary layer is too large at a desired plating rate the limiting current (i_L) will be reached. The diffusion limited plating process created when the limiting current is reached, prevents the increase in plating rate by the application of more power (e.g., voltage) to the cathode (e.g., metallized substrate surface). When the limiting current is reached a poor quality low density film is produced due to the dendritic type film growth that occurs due to the mass transport limited process. In general the hydrodynamic and diffusion boundary layers can be improved from a static flow case by directing a flow of the electrolyte to the metallized substrate surface during plating. In operation it is thus desirable to pump an electrolyte “A” from theelectrolyte collection region436 and then past theapertures413 formed in themasking plate410 to improve the diffusion boundary layer.
• Referring toFIG. 4A, thepump440 may be adapted to deliver the electrolyte from thecollection region436 across theelectrode420 and exposedregion404 and then over aweir432 separating theplating region435 and then back into theelectrolyte collection region436. Referring toFIG. 4D, in one embodiment, thepump440 is adapted to deliver the electrolyte in a tangential path across the metallizedsubstrate320 from anozzle437. In this configuration thepump440 is adapted to move the electrolyte from thecollection region436 and then across the exposedregion404 and then over aweir432 separating theplating region435 and then back into theelectrolyte collection region436. The fluid motion created by thepump440 in either configuration allows the replenishment of the electrolyte components at the exposedregion404 that is exposed at one end of theapertures413. In one embodiment, to reduce the diffusion boundary layer it is desirable to rotate and/or move the metallizedsubstrate320 andhead assembly405 relative to theelectrode420 duringstep206 by use of theactuator415.
• Moreover, it may be further desirable to reduce the diffusion boundary layer and hydrodynamic boundary layer at the metallized substrate surface (cathode) by use of a mechanical actuator or other similar device. In one embodiment, theelectrochemical plating cell400 also contains adiffusion plate481 that is adapted to agitate the fluid near the metallized substrate surface. In one embodiment, thediffusion plate481 is adapted to be move during the plating process by use ofcoupling shaft483 and anactuator482. The movingdiffusion plate481 imparts motion to the electrolyte near the metallized substrate surface, which will reduce the diffusion boundary layer. In one aspect, thediffusion plate481 contains a plurality protrusions485 (e.g., bumps, vanes) on the surface of thediffusion plate481 to improve the fluid motion across the metallized substrate surface as thediffusion plate481 is rotated. In cases where thediffusion plate481 is rotated it may be desirable to use a circular shaped diffusion plate481 (FIG. 4C) rather than the rectangular shape shown inFIG. 4B. In one embodiment, theactuator482 is adapted to impart a vibrational motion to thediffuser plate481 to help improve the diffusion boundary layer at the surface of the metallized substrate. Thediffusion plate481 may have a plurality ofholes484 or pores that can be used to control and direct the flow of electrolyte towards the metallized substrate surface. In one embodiment, thediffusion plate481 is formed from a porous plastic or porous ceramic material.
• In one embodiment, the fluid motion is achieved by the delivery of the electrolyte through a plurality of fluid jets that are oriented towards the metallized substrate surface, such as two or more of the nozzles (e.g.,nozzle437 inFIG. 4D; only asingle nozzle437 is shown). In another embodiment, fluid motion is provided by the use of gas jets that deliver a gas into the solution that creates fluid movement due to the vertical motion of the injected gas bubbles due to the buoyancy of the gas in the electrolyte.
• Referring toFIG. 4D, in one embodiment, adosing system460 may be used in conjunction with thesystem controller251 to control the concentration of the various chemicals found in the electrolyte over time. Thedosing system460 generally includes one or more fluid delivery sources (e.g.,reference numerals461,462), achemical analysis system465 and awaste delivery system464. Thewaste delivery system464 is adapted to remove a portion of the electrolyte from the platingcell430 and deliver it to awaste collection system463. Thefluid sources461,462 are generally configured to deliver one or more of the chemicals to the electrolyte in theplating cell430. In one embodiment, thefluid source461 is adapted to deliver a powder (e.g., copper oxide powder) or metal ion containing solution (e.g., copper sulfate) to the electrolyte to replenish the metal ion concentration plated out duringstep206 or step208 when an inert anode is used. In one embodiment, thefluid sources461,462 are adapted to deliver one or more of the chemicals found in the electrolyte that are discussed in conjunction withsteps206 or208. Thechemical analysis system465 may be an organic (e.g., Raman spectroscopy, CVS) and/or an inorganic chemical analyzer that are used to measure the properties and concentrations of the chemicals in the electrolyte solution at a desired time. Therefore, by use of thesystem controller251, thefluid sources461,462, thewaste delivery system464, and thechemical analyzer465, which can feed back the measured results to thesystem controller251, the chemical concentrations in the electrolyte can be controlled as a function of time. In some example, thedosing system460 may be used to perform a conventional “feed and bleed” type chemicals replenishment system.
• Referring toFIGS. 4A and 4D, in one embodiment, anauxiliary electrode454 is placed in a desirable position within the platingcell430 to shape the electric field during the plating process and thus optimize the deposition uniformity of the depositedmetal layer322. At high plating rates the electric field, which is created between thebiased seed layer321 relative to theelectrode420, may have significant non-uniformities due to the non-optimal geometric and fluid dynamic characteristics of the plating cell that can be compensated for by use of theauxiliary electrode454. In one embodiment, as shown inFIGS. 4A and 4D, anauxiliary electrode454 is positioned within platingregion435 below thediffuser plate481. In another embodiment, theauxiliary electrode454 is disposed within theelectrolyte collection region436 and thus is in electrical communication with theplating region435 through the electrolyte flowing over theweir432. In some cases it may be desirable to place theauxiliary electrode454 above thediffuser plate481 and closer to the substrate surface. Theauxiliary electrode454 can be separately biased using asecond power supply453 that is controlled by thesystem controller251. An example of an exemplary auxiliary electrode design is further described in the commonly assigned U.S. patent application Ser. No. 11/362,432, filed Feb. 24, 2006, which is herein incorporated by reference.
• FIG. 4B illustrates an exploded isometric view of thehead assembly405, metallizedsubstrate320,diffusion plate481 andelectrode420 portion of theelectrochemical plating cell400. While the metallizedsubstrate320 and platingcell430 components illustrated inFIG. 4B have a square shape, this configuration is not intended to limiting to scope of the invention. When in use the metallizedsubstrate320 is placed in contact with the maskingplate410 so that features426 (FIG. 5A) can be formed on the exposed regions of the patterned features425 of theseed layer321 through the apertures (e.g., apertures413A,413B) formed in themasking plate410. The patterned features425 are metallized regions of theseed layer321 that have been deposited or formed in a desired pattern on thesurface429 of the metallizedsubstrate320. It should be noted that theapertures413 formed in themasking plate410 may be formed in any desirable shape and/or pattern. In one embodiment, theapertures413 formed in themasking plate410 may be a rectangular or a circular feature that is between about 100 μm and about 240 μm in size. In another embodiment, the apertures formed in themasking plate410 may be a pattern features, for example grid lines or interdigitated grid lines that are between about 100 μm and about 240 μm wide and have a length that extends across the substrate surface, such as between about 100 μm and the length of the substrate in length. In one embodiment, the total exposed area on the surface of the substrate, which is the sum of all of the cross-sectional areas of all of theapertures413 at the contactingsurface418 of themasking plate410, is between about 0.5% and about 100% of the surface area of the surface of the substrate that is in contact with the maskingplate410. In one embodiment, the total exposed area of the apertures that are in contact with the non-light-receiving surface, or backside, of the substrate is greater than about 70% of the surface area of the non-light-receiving surface of the substrate. In one embodiment, the total exposed area of the apertures that are in contact with the light-receiving surface of the substrate is less than about 30% of the surface area of the light-receiving surface of the substrate. Preferably, the total exposed area of the apertures that are in contact with the light-receiving surface of the substrate is less than about 10%. In general, the maskingplate410 must be thicker than the maximum electrochemical deposition thickness to allow the masking plate to be separated from the substrate after the deposition process has been performed. Typically, the masking plate may be between about 100 μm and about 1 cm thick.
• FIG. 4C is an exploded isometric view of thehead assembly405, metallizedsubstrate320,diffusion plate481 andelectrode420 portion of theelectrochemical plating cell400 according to another embodiment of the invention.FIG. 4C is similar toFIG. 4B except that the metallizedsubstrate320 and platingcell430 components have a circular shape. This configuration may be useful where the metallizedsubstrate320 has a circular shape and/or it is desirable to rotate one or more of the components, such as thehead assembly405, metallizedsubstrate320,diffusion plate481 and/orelectrode420.
• FIGS. 5A and 5D are isometric views of a square and acircular metallized substrate320 that contains a plurality offeatures426 formed on certain regions of the patterned features425 afterstep206 has been performed. Referring toFIGS. 5 and 6A, in one example a group ofcircular apertures413A and slot shapedapertures413B formed in themasking plate410 are aligned to the patterned features425 of theseed layer321 so that features426 having a desirable shape and thickness “t” (FIGS. 5A and 5D) can be preferentially formed thereon. Thefeatures426 are formed by cathodically biasing the patterned features425 using thepower supply450 and the contact(s)452 so that themetal layer322 can be grown to a desired thickness. The thickness “t” of thefeatures426 that form theconductor325 may be between about 20 μm and about 40 μm on the non-light-receiving side of the substrate and between about 1 μm to about 5 μm on the light-receiving surface of the substrate, which is hard to accomplish using conventional electroless, PVD and CVD techniques at an acceptable substrate throughput and/or desirable deposition thickness uniformity. Further, for high power solar cell applications theconductor325 thickness on the non-light-receiving side of the substrate may be between about 40 and about 70 μm, and on the light receiving side of the substrate the thickness may be between about 1 and about 20 μm thick.
• FIGS. 5B and 5E are isometric views of a square and acircular metallized substrate320 that contains a plurality offeatures426 formed on ablanket seed layer321A formed after performingstep206 of the method steps200. In this case, a group offeatures426 formed on selected areas of theblanket film321A that have a shape defined by the apertures (e.g., apertures413A,413B) and a thickness “t” set by the deposition rate and deposition time of electrochemical deposition process performed instep206. Thefeatures426 may be formed on desirable regions of theblanket film321A by aligning themasking plate410 to the metallizedsubstrate320.
• FIGS. 5C and 5F are isometric views of a metallizedsubstrate320 that contains only the plurality offeatures426 formed on thesurface429 of the metallizedsubstrate320 after an optional metal layer removal step is performed. The optional metal layer removal step generally entails performing a conventional wet or dry etching step to remove any unwanted and/or excess metal on thesurface429 of the substrate, such as unused portions of theblanket seed layer321A (FIG. 5B or5E) or unused portions of the patterned features425 (FIG. 5A or5D). Conventional wet etching steps may use an acid or basic solution that is adapted to remove the unwanted and/or excess metal on thesurface429.
• Thesystem controller251 is adapted to control the various components used to complete the electrochemical process performed in theelectrochemical plating cell400. Thesystem controller251 is generally designed to facilitate the control and automation of the overall process chamber and typically includes a central processing unit (CPU) (not shown), memory (not shown), and support circuits (or I/O) (not shown). The CPU may be one of any form of computer processors that are used in industrial settings for controlling various system functions, chamber processes and support hardware (e.g., detectors, robots, motors, gas sources hardware, etc.) and monitor the electrochemical plating cell processes (e.g., electrolyte temperature, power supply variables, chamber process time, I/O signals, etc.). The memory is connected to the CPU, and may be one or more of a readily available memory, such as random access memory (RAM), read only memory (ROM), floppy disk, hard disk, or any other form of digital storage, local or remote. Software instructions and data can be coded and stored within the memory for instructing the CPU. The support circuits are also connected to the CPU for supporting the processor in a conventional manner. The support circuits may include cache, power supplies, clock circuits, input/output circuitry, subsystems, and the like. A program (or computer instructions) readable by thesystem controller251 determines which tasks are performable on a substrate. Preferably, the program is software readable by thesystem controller251 that includes code to perform tasks relating to monitoring and execution of the electrochemical process recipe tasks and various chamber process recipe steps.
• In one embodiment ofstep206, one or more direct current (DC) and/or pulse plating waveforms are delivered to theseed layer321 during the electrochemical deposition process to form themetal layer322 that has desirable electrical and mechanical properties. The applied bias may have a waveform that is DC and/or a series of pulses that may have a varying height, shape and duration to form theconductor325. In one embodiment, a first waveform is applied to theseed layer321 by use of a power supply250 to cause some electrochemical activity at the surface of the seed layer. In this case, while the bias applied to the seed layer need not always be cathodic, the time average of the energy delivered by the application of the first waveform is cathodic and thus will deposit a metal on the surface of theseed layer321. In another embodiment, it may be desirable to have a time average that is anodic (i.e., dissolution of material) to clean the surface of the seed layer prior to performing the subsequent filling process steps. The concentration gradients of metal ions, additives or suppressors in the electrolyte “A” (FIGS. 4A and 4D) in the proximity of theconductor325 are affected by the polarity, sequencing, and durations of bias delivered to the surface of the substrate. For example, it is believed that the duration of a deposition pulse during a pulse plating type process controls the deposition on the sidewall of the feature, while the dissolution pulse creates additional metal ions and thus, a concentration gradient of these ions, around the feature. An example of a pulse plating process that may be used to form a metal feature on the substrate surface is further described in the co-pending U.S. patent application Ser. No. 11/552,497 [APPM 11227], filed Oct. 24, 2006 and entitled “Pulse Plating of a Low Stress Film on A Solar Cell Substrate”, which is herein incorporated by reference in its entirety. However, it is desirable to reduce or eliminate the use of anodic pulses in an effort to increase the deposition rate and thus substrate throughput through the plating cell and CoO of the system.
• In an effort to improve metallized substrate throughput in theelectrochemical plating cell400 by increasing the deposition rate of one or more of the electrochemically deposited layers (e.g.,metal layer322, interfacial layer323 (discussed below)) it is desirable to adjust and control the temperature of the electrolyte during the deposition process. In one embodiment, the temperature of the electrolyte is controlled within a range of about 18° C. and about 85° C., and preferably between about 30° C. and about 70° C. to maximize the plating rate. It should be noted that evaporation losses becomes an larger issue as the temperature of the electrolyte is increased, since if not monitored and controlled will cause precipitation of one or more components in the electrolyte bath, which can generate particles and affect the deposited film quality and composition.FIG. 6 illustrates a graph of the effect of temperature on maximum current density for two different electrolyte chemistries described in Example 1 and Example 2, shown below. In this example it is desirable to run the copper fluoroborate (Cu(BF₄)₂) bath a temperatures greater than about 30° C. to improve the deposition rate by about 3 to 7 times from a typical electrolyte bath that is run at a temperature around room temperature.
Electrolyte Solution
• In general, it is desirable to form aconductor325 that is defect free, has a low stress that can be rapidly deposited on the substrate surface. The electrochemical process performed in theelectrochemical plating cell400 utilizes an electrolyte solution containing a metal ion source and an acid solution. In some cases one or more additives, such as an accelerator, a suppressor, a leveler, a surfactant, a brightener, or combinations thereof may be added to the electrolyte solution to help control the stress, grain size and uniformity of the electrochemically deposited metal layer(s). However, additives generally make the control of the electrochemical process more complex and make the cost of the consumables generated during the electrochemical plating process to increase, since they are generally consumed or breakdown during the electrochemical process. In one embodiment, to increase the planarization power, the electrolyte can optionally contain an inorganic acid, (e.g., sulfuric acid, phosphoric acid or pyrophosphoric acid), various inorganic supporting salts, and other additives that may be used to improve the quality of plated surfaces (e.g., oxidizers, surfactants, brighteners, etc.). In general it is desirable to increase the metal ion concentration in the electrolyte to improve the electrochemical characteristics of the plating bath, such as improving the diffusion boundary layer and limiting current characteristics of the cell when high plating rates are used to electrochemically deposited a metal layer.
• In one example, the metal ion source within the electrolyte solution used instep206 inFIG. 2 is a copper ion source. In one embodiment, the concentration of copper ions in the electrolyte may range from about 0.1 M to about 1.1M, preferably from about 0.4 M to about 0.9 M. Useful copper sources include copper sulfate (CuSO₄), copper chloride (CuCl₂), copper acetate (Cu(CO₂CH₃)₂), copper pyrophosphate (Cu₂P₂O₇), copper fluoroborate (Cu(BF₄)₂), derivatives thereof, hydrates thereof or combinations thereof. The electrolyte composition can also be based on the alkaline copper plating baths (e.g., cyanide, glycerin, ammonia, etc) as well.
Example 1
• In one example, the electrolyte is an aqueous solution that contains between about 200 and 250 g/l of copper sulfate pentahydrate (CuSO₄.5(H₂O)), between about 40 and about 70 g/l of sulfuric acid (H₂SO₄), and about 0.04 g/l of hydrochloric acid (HCl). In some cases it is desirable to add a low cost pH adjusting agent, such as potassium hydroxide (KOH) or sodium hydroxide (NaOH) to form an inexpensive electrolyte that has a desirable pH to reduce the cost of ownership required to form a metal contact structure for a solar cell. In some cases it is desirable to use tetramethylammonium hydroxide (TMAH) to adjust the pH. Could go to high copper concentration with organic complexing agent to solution, such as MSA. In one aspect, a low acid chemistry is used to complete the high speed deposition process. An example of some exemplary copper plating chemistries that may be used for high speed plating is further described in commonly assigned U.S. Pat. Nos. 6,113,771, 6,610,191, 6,350,366, 6,436,267, and 6,544,399, which are all incorporated by reference in their entirety.
Example 2
• In another example, the electrolyte is an aqueous solution that contains between about 220 and 250 g/l of copper fluoroborate (Cu(BF₄)₂), between about 2 and about 15 g/l of tetrafluoroboric acid (HBF₄), and about 15 and about 16 g/l of boric acid (H₃BO₃). In some cases it is desirable to add a pH adjusting agent, such as potassium hydroxide (KOH), or sodium hydroxide (NaOH) to form an inexpensive electrolyte that has a desirable pH to reduce the cost of ownership required to form a metal contact structure for a solar cell. In some cases it is desirable to use tetramethylammonium hydroxide (TMAH) to adjust the pH.
Example 3
• In yet another example, the electrolyte is an aqueous solution that contains between about 60 and about 90 g/l of copper sulfate pentahydrate (CuSO₄.5(H₂O)), between about 300 and about 330 g/l of potassium pyrophosphate (K₄P₂O₇), and about 10 to about 35 g/l of 5-sulfosalicylic acid dehydrate sodium salt (C₇H₅O₆SNa.2H₂O). In some cases it is desirable to add a pH adjusting agent, such as potassium hydroxide (KOH), or sodium hydroxide (NaOH) to form an inexpensive electrolyte that has a desirable pH to reduce the cost of ownership required to form a metal contact structure for a solar cell. In some cases it is desirable to use tetramethylammonium hydroxide (TMAH) to adjust the pH.
Example 4
• In yet another example, the electrolyte is an aqueous solution that contains between about 30 and about 50 g/l of copper sulfate pentahydrate (CuSO₄.5(H₂O)), and between about 120 and about 180 g/l of sodium pyrophosphate decahydrate (Na₄P₂O₇.10(H₂O)). In some cases it is desirable to add a pH adjusting agent, such as potassium hydroxide (KOH), or sodium hydroxide (NaOH) to form an inexpensive electrolyte that has a desirable pH to reduce the cost of ownership required to form a metal contact structure for a solar cell. In some cases it is desirable to use tetramethylammonium hydroxide (TMAH) to adjust the pH.
• In one embodiment, it may be desirable to add a second metal ion to the primary metal ion containing electrolyte bath (e.g., copper ion containing bath) that will plate out or be incorporated in the growing electrochemically deposited layer or on the grain boundaries of the electrochemically deposited layer. The formation of a metal layer that contains a percentage of a second element can be useful to reduce the intrinsic stress of the formed layer and/or improve its electrical and electromigration properties. In one example, it is desirable to add an amount of a silver (Ag), nickel (Ni), zinc (Zn), or tin (Sn) metal ion source to a copper plating bath to form a copper alloy that has between about 1% and about 4% of the second metal in the deposited layer.
• In one example, the metal ion source within the electrolyte solution used instep206 inFIG. 2 is a silver, tin, zinc or nickel ion source. In one embodiment, the concentration of silver, tin, zinc or nickel ions in the electrolyte may range from about 0.1 M to about 0.4M. Useful nickel sources include nickel sulfate, nickel chloride, nickel acetate, nickel phosphate, derivatives thereof, hydrates thereof or combinations thereof.
Contact Interface Layer in a Single Substrate Electrochemical Plating Cell
• Referring toFIGS. 2 and 3E, instep208 an optionalcontact interface layer323 is deposited over the surface of themetal layer322 formed duringstep206. Thecontact interface layer323 can be formed using an electrochemical deposition process, an electroless deposition process, a CVD deposition process, or other comparable deposition processes to form a good ohmic contact between the formedconductors325 and an external interconnection bus (not shown) that is adapted to connect one or more solar cells together. In one embodiment, thecontact interface layer323 is formed from a metal that is different from the metal contained in themetal layer322. In this configuration thecontact interface layer323 may be formed from a pure metal or metal alloy that contains metals, such as tin (Sn), silver (Ag), gold (Au), copper (Cu) or lead (Pb). In one embodiment, the thickness of thecontact interface layer323 may be between about 3 μm and about 7 μm. Forming acontact interface layer323 having a thickness greater than 3 μm is generally hard to accomplish using conventional electroless, PVD and CVD techniques at an acceptable substrate throughput and/or desirable deposition thickness uniformity.
• In one embodiment, thecontact interface layer323 is formed by use of an electrochemical process. In some cases it is desirable to performstep208 in the same electrochemical plating cell asstep206 was performed. In this configuration, theseed layer321 andmetal layer322 are cathodically biased relative to an electrode (e.g.,electrode420 inFIG. 4A) using a power supply that causes the ions in an contact interface layer electrolyte, which is brought into contact with theseed layer321,metal layer322 and the electrode, to plate thecontact interface layer323 on the surface of theseed layer321 and/ormetal layer322. In the case where thecontact interface layer323 is formed in the sameelectrochemical plating cell400 as themetal layer322 and thecontact interface layer323 contains one or more different elements than themetal layer322 the electrolyte used to form the metal layer will need to be discarded and replaced with the new contact interface layer electrolyte to form thecontact interface layer323.
Contact Interface Layer Electrolyte Solution
• In one embodiment, thecontact interface layer323 contains tin (Sn) and is deposited by use of an electrochemical deposition process. The concentration of tin ions in the contact interface layer electrolyte may range from about 0.1 M to about 1.1M. Useful tin sources include tin sulfate (SnSO₄), tin chloride (SnCl₂), and tin fluoroborate (Sn(BF₄)₂), derivatives thereof, hydrates thereof or combinations thereof. In another embodiment, to increase the planarization power, the electrolyte can optionally contain an inorganic acid, (e.g., sulfuric acid, phosphoric acid or pyrophosphoric acid), various inorganic supporting salts, and other additives that may be used to improve the quality of plated surfaces (e.g., oxidizers, surfactants, brighteners, etc.). The electrolyte composition can also be based on the alkaline tin plating baths (e.g., glycerin, ammonia, etc) as well. The electrolyte may also contain methane-sulfonic acid (MSA).
• In one example, the electrolyte is an aqueous solution that contains between about 200 and 250 g/l of tin sulfate pentahydrate (SnSO₄.5(H₂O)), between about 40 and 70 g/l of sulfuric acid (H₂SO₄), and about 0.04 g/l of hydrochloric acid (HCl). In some cases it is desirable to add one or more organic additives (e.g., levelers, accelerators, suppressors) to promote uniform growth of the deposited layer. In some cases it is desirable to add a low cost pH adjusting agent, such as potassium hydroxide (KOH) or sodium hydroxide (NaOH) to form an inexpensive electrolyte that has a desirable pH to reduce the cost of ownership required to form a metal contact structure for a solar cell. In some cases it is desirable to use tetramethylammonium hydroxide (TMAH) to adjust the pH.
Multiple Metallization Steps
• The embodiments discussed above in conjunction withFIGS. 2-5 can be used to form one or more of theconductors325 on a surface of the substrate. While it is generally desirable to form all of the various contact structures used to form a solar cell device at one time, this is sometimes not possible due to various processing constraints. In some cases two metallization processes are required, for example, to form a front side contact, as shown inFIGS. 3A-3E, and a second metallization process to form a second contact on a different region of the metallizedsubstrate320, such as abackside contact330 shown inFIG. 3E.
• As shown inFIG. 3F, the second metallization step can be used to form thebackside contact330 that is adapted to connect to an active region (e.g., p-type region inFIG. 3A) of the solar cell device. In this example,seed layer331 can be formed using the process steps described above in conjunction withstep204 or other similar techniques. Next, ametal layer332 and aninterconnect layer333 may be formed using the process steps described above in conjunction with steps206-208 andFIGS. 2,3D-3E and4. Preferably, the total exposed area of theapertures413 in the masking plate410 (FIGS. 4A-4D) used to form the backside contact on the substrate surface is between about 70% and about 99% of the surface area of the backside surface of the substrate.
Batch Processing Apparatus
• In an effort to further increase the substrate throughput through the solar cell plating apparatus, groups of the metallizedsubstrates320 may be plated at once in a batch type plating operation.FIG. 7A illustrates is a side cross-sectional view of abatch plating apparatus701 that contains three platingcells710 that are each adapted to plate one or more metal layers on a metallized substrate surface using the process steps described above (e.g., steps206-208). WhileFIG. 7A illustrates abatch plating apparatus701 that contains three horizontally oriented platingcells710, this configuration is not intended to be limiting as to the number plating cells that may be used to perform a batch type plating process or the angular orientation of the plating cells relative to each other or to the horizontal. In one aspect, two or more plating cells may be used to perform a batch plating process where two or more substrates are plated at once. In another aspect, the substrates are oriented vertically in the batch plating apparatus during the plating process.
• Referring toFIG. 7A, in one embodiment, the batch plating process is performed by immersing two ormore plating cells710 in aplating tank751 and then biasing each of the metallized substrates relative to one or more electrodes. As shown inFIG. 7A, each of theplating cells710 may contain anelectrode420, power supply (e.g., item #s450A-450C) and ahead assembly405 that is adapted to hold and retain the metallizedsubstrate320 during the plating process. However, in one embodiment, theplating cells710 may each contain any of the components described above in conjunction withFIGS. 4A-4D. In each platingcell710 thehead assembly405 may contain athrust plate414 that is used to urge the metallizedsubstrate320 against theelectrical contacts412 and maskingplate410 by use of an actuator (seeFIG. 4B). During operation the metallizedsubstrates320 are loaded into thehead assemblies405 of therespective plating cells710 and then theplating cells710 are immersed in the electrolyte “A” contained in theplating tank751 so that a plating process can be performed. In one embodiment, during a batch plating process theseed layer321 on the surface of each of the metallizedsubstrates320 in each of theplating cells710 are biased relative to theelectrode420 contained in therespective plating cell710 using a power supply. In one aspect, as shown inFIG. 7A, eachelectrode420 in each platingcell710 is biased independently from each other using a power supply, such as power supply250A in the top most plating cell, power supply250B in themiddle plating cell710 and power supply250C in thelower plating cell710. To improve the hydrodynamic and diffusion boundary layers the electrolyte may be delivered to the region between theelectrode420 and the metallizedsubstrate320 using a fluid delivery system441 that contains apump440. In one aspect, it may be desirable to rotate the metallized substrates and/orelectrodes420 during the batch plating process using conventional techniques. WhileFIG. 7A illustrates theplating cells710 in a horizontal orientation this configuration is not intended to be limiting, since theplating cells710 could oriented vertically or at any angle relative to the horizontal without varying from the scope of the invention.
• FIG. 7B illustrates a plan view of abatch plating system750 that contains an array of thebatch plating apparatuses701 illustrated inFIG. 7A. In this configuration, an array of platingcells710 in each of thebatch plating apparatuses701 are immersed with an electrolyte retained in theplating tank751 so thatsteps206 or208 can be performed. In one embodiment, an array of platingcells710 in each of thebatch plating apparatuses701 are distributed around aspraying device752 that is adapted to deliver a flow of electrolyte to a region between theelectrode420 andsubstrate320 contained within each of theplating cells710. Thespraying device752 may connected to a pump (not shown) that is adapted to recirculate the electrolyte through theplating cells710.FIG. 7I illustrates a plan view of abatch plating system750 that contains an array of thebatch plating apparatuses701 illustrated inFIG. 7A that are adapted to process circular type substrates.
• FIG. 7C illustrates an isometric view of another embodiment of a batch plating system, hereafterbatch plating system760, which is adapted to plate multiple metallized substrates that are arrayed in horizontal orientation and immersed within an tank containing an electrolyte solution. In one embodiment, thehead assembly765 is adapted to retain a plurality of substrates in a desirable position relative to anelectrode420. In this configuration each of the metallizedsubstrates320 may be separately biased relative to theelectrode420 using one of thededicated power supplies450A-450C. In one embodiment, one or more masking plates (not shown) may be positioned against the surface of the substrates retained in thehead assembly765 to allow for a preferential deposition of desired regions on each of the substrates. In one aspect, theelectrode420 may be formed from a plurality of electrodes that can be separately biased relative to a metallizedsubstrate320. While the metallized substrates inFIG. 7C, are circular in shape this configuration is not intended to limiting as to the scope of invention described herein.
• In another embodiment, the plating apparatus, chamber and plating cell may also utilize a conveyor type design that continuously plate a number of substrates at one time, for example, between 25 and 1000 substrates. The substrates in any of the processes described herein may be oriented in a horizontal, vertical or angled orientation relative to the horizontal duringstep206.
• FIGS. 7D-7F illustrate one embodiment of abatch plating chamber780 that is adapted to plate both sides of multiple metallizedsubstrates320 that are immersed within anelectrolyte tank770. Thebatch plating chamber780 may be adapted to sequentially plate each side of multiple metallizedsubstrates320, or plate both sides of multiple metallizedsubstrates320 at the same time.FIG. 7D illustrates a side cross-sectional view of abatch plating chamber780 that is adapted to deposit a metal layer on the surface of the metallizedsubstrates320 usingsteps206 and/or208, discussed above. Thebatch plating chamber780 generally contains ahead assembly776, one or more electrodes (e.g.,reference numerals771,772), anelectrolyte tank770, and one or more power supplies (e.g.,reference numerals775A,775B) that are adapted to form one ormore conductors325 on a surface of the metallizedsubstrate320. WhileFIG. 7D illustrates abatch plating chamber780 that contains a plurality of vertically oriented metallized substrates, this configuration is not intended to be limiting as to the scope of the invention. In another aspect, the substrates are oriented horizontally in the batch plating apparatus during the plating process.
• FIG. 7D illustrates an isometric view of thehead assembly776 that contains a plurality ofcell assemblies782 that are adapted to retain and preferentially form theconductors325 on one or more surfaces of the plurality of metallizedsubstrates320 using an electrochemical plating process. In one embodiment, thecell assemblies782 contain at least onemasking plate assembly779, anactuator777, and asupport frame781 that are adapted to hold and make electrical contact to a conductive layer (e.g., seed layer321) formed on one or more sides of the metallizedsubstrates320. While thehead assembly776, illustrated inFIG. 7E, contains 20cell assemblies782 this configuration is not intended to be limiting to the scope of the invention, since the head assembly766 could contain two ormore cell assemblies782 without varying from the scope of the invention described herein. In one example, thecell assembly782 contains between about 2 and about 1000 metallized substrates at one time.
• In one embodiment, the maskingplate assemblies779 may contain a plurality of masking plates410 (FIG. 4A) that are held together by a supporting structure (not shown) that allows each of the maskingplates410 to contact a surface of a metallized substrate so thatapertures413 and contacts412 (FIG. 4A) contained therein can be used to preferentially form theconductors325 on a surface of each of the metallizedsubstrates320. In another embodiment, the maskingplate assemblies779 is a plate, or multiple plates, that are adapted to contact multiple metallizedsubstrates320 at one time so thatapertures413 formed therein can be used to preferentially form theconductors325 on the surface of each of the metallizedsubstrates320.
• FIG. 7F illustrates a close-up partial section view of onecell assembly782 that can be used to form a metal layer on thefeature425 through anaperture413 formed in the maskingplate assembly779. In one embodiment, the contacts412 (FIG. 4A) are electrically connected to portions of thesupport frame781 so that a bias can be applied to each of the contacts in each of thecell assemblies782 relative to one of the one ormore electrodes771,772 by use of a single electrical connection to a single power supply. In another embodiment, discrete electrical connections (not shown for clarity) provided through the maskingplate assembly779 orsupport frame781 to each of one or more of thecontacts412 in each of thecell assemblies782 so that each of the one or more of thecontacts412 can be separately biased relative to one of the one ormore electrodes771,772 by use of different power supplies.
• Referring toFIG. 7D, theelectrolyte tank770 generally contains acell body783 and one ormore electrodes771,772. Thecell body783 comprises aplating region784 and anelectrolyte collection region785 that contains an electrolyte (e.g., item “A”) that is used to electrochemically deposit the metal layer on a conductive region formed on the substrate surface. In one aspect, theelectrode771,772 are positioned vertically in theplating region784 and are supported by one or more of the walls of thecell body783. In general, it is desirable to increase the surface area of the anode so that high current densities can applied to theelectrodes771,772 relative to the conductive regions (e.g.,seed layer321 inFIG. 4A) to increase the plating rate. An example of a high surface area electrode that may be used here is discussed above in conjunction with theelectrode420. Theelectrodes771,772 can be formed so that they have a desired shape, such as square, rectangular, circular or oval. Theelectrodes771,772 may be formed from material that is consumable (e.g., copper) during the electroplating reaction, but is more preferably formed from a non-consumable material.
• In operation, a metallizedsubstrate320 is positioned in each of thecell assemblies782 within thehead assembly776 so that electrical contacts (e.g.,reference numerals412 inFIGS. 4A-4D), found in eachcell assembly782, can be placed in contact with one or more conductive regions on the metallized substrate surface. In one embodiment, the metallizedsubstrates320 are positioned on thesupport frame781 within eachcell assembly782 and then are clamped to thesupport frame781 by use of the actuator777 (e.g., air cylinder) contained in thehead assembly776 so that the maskingplate assembly779 andcontacts412 can contact the substrate surface. In another embodiment, the metallized substrates are placed between opposing maskingplate assemblies779 and then clamped together by use of theactuator777. After the electrical connection between the contacts and the conductive regions has been made thehead assembly776 is immersed into the electrolyte contained in theelectrolyte tank770 so that a metal layer (e.g., reference numeral322) can be formed on the conductive regions by biasing them relative to the one ormore electrodes771,772 using one or more of thepower supplies755A,775B.
• Referring toFIG. 7D, theelectrolyte tank770 may also contain apump778 may be adapted to deliver the electrolyte from theelectrolyte collection region785 to the surface of the metallized substrates contained in thehead assembly776. In one embodiment, thepump778 is adapted to deliver electrolyte to a gap formed between thehead assembly776 and theelectrodes771,772 and then over aweir786 and into theelectrolyte collection region785. The fluid motion created by thepump778 allows the replenishment of the electrolyte components at the exposed regions of the substrates positioned in thehead assembly776. In one embodiment, to reduce the diffusion boundary layer it is desirable to move the head assembly relative to theelectrodes771,772 during thestep206 by use of anactuator787. In one embodiment, theactuator787 comprises an AC motor, piezoelectric device or other similar mechanical component that can impart motion to thehead assembly776.
• FIG. 7G illustrates a side cross-sectional view of aplating system790 that contains two or morebatch plating cells780 that are positioned near each other so that the substrates positioned in themoveable head assembly776 can be sequentially plated using different electrolytes or different plating parameters. In operation thehead assembly776 can be sequentially positioned in each of thebatch plating cells780 so that metal layers can be electrochemically deposited on the substrate surface by applying a bias to the individual substrates retained in thehead assembly776 relative to theelectrodes771,772 contained in thebatch plating cells780.FIG. 7G illustrates, one embodiment that contains three batch plating cells780A-780C that each contain different electrolytes, such as A₁, A₂, and A₃, respectively. Theactuator787 is a device, such as a conventional robot, gantry crane or similar devices, which can be used to lift and transfer thehead assembly776 between the variousbatch plating cells780.
• In one embodiment, during operation of the plating system790 ahead assembly776 that contains one or moremetallized substrates320 is immersed in the first batch plating cell780A that contains a first electrolyte A₁so that a first metal layer can be formed on the surface of the metallizedsubstrates320. The one or moremetallized substrates320 contained in thehead assembly776 may be plated by biasing conductive features on the substrate surfaces relative to one or more of theelectrodes771A,772A positioned in the electrolyte A₁using one or more of thepower supplies775A₁,775B₁. After depositing a desired amount of material on the surface of the substrates thehead assembly776 is transferred following path B₁to an adjacent second batch plating cell780B so that a second metal layer can be deposited on the surface of the metallized substrates. The metallizedsubstrates320 contained in thehead assembly776 may be plated by biasing conductive features on the substrate surfaces relative to one or more of theelectrodes771B,772B positioned in the electrolyte A₂using one or more of thepower supplies775A₂,775B₂. After depositing a second desired amount of material on the surface of the substrates thehead assembly776 is transferred following path B₂to an adjacent thirdbatch plating cell780C so that a third metal layer can be deposited on the metallized substrate surface. The metallizedsubstrates320 contained in thehead assembly776 may be plated by biasing conductive features on the substrate surfaces relative to one or more of theelectrodes771C,772C positioned in the electrolyte A₃using one or more of thepower supplies775A₃,775B₃. In one embodiment, it may be desirable to rinse the components contained withinhead assembly776, including the metallized substrates, with DI water between plating steps to reduce the “drag-out” contamination of the subsequent electrolytes with electrolytes used in prior processes.
• FIG. 7H illustrates a side partial-sectional view of aplating system795 that contains anelectrolyte tank796 that allows the substrates positioned in ahead assembly776 to be sequentially plated by positioning thehead assembly776 near two ormore electrode assemblies797 positioned in theelectrolyte tank796. In this configuration the substrates contained in thehead assembly776 are positioned within a single electrolyte “A” that is used in conjunction with a two ormore electrode assemblies797 to sequentially plate the substrates using different plating parameters (e.g., local electrolyte flow rate, current density). In operation, the metallizedsubstrates320 positioned in thehead assembly776 can be plated by positioning them near or slowly transferring them past each of theelectrode assemblies797 that are biased relative to the conductive features on the substrate surface. In one aspect, one or more of the plating parameters are varied as thehead assembly776 are positioned neardifferent electrode assemblies797. In one embodiment, both sides of a substrate are plated by electrically biasing afirst electrode797A positioned on one side of the head assembly767 and by electrically biasing asecond electrode797B positioned on the other side of the head assembly767 relative to the conductive features formed on the substrate surface using one or more power supplies (not shown) and thesystem controller251. Theactuator787 is a device, such as a conventional robot, gantry crane or similar devices, that can be used to transfer thehead assembly776 “in” and “out” of theelectrolyte tank796 and near thevarious electrode assemblies797. In this configurationmultiple head assemblies776 can be inserted into theelectrolyte tank796 at one time to allow for a more seemless “assembly line” type process flow through the various different process steps that may be used to form theconductors325 on the surface of the substrates contained in each of thehead assembly776.
• Referring toFIG. 2, in one embodiment, an optional seed layer removal step, or step209, is performed after completingstep208. The seed layer removal step generally entails performing a conventional wet or dry etching step to remove any unwanted and/or excess metal found on the surface of the substrate, such as unused or un-necessary portions of theseed layer321. Conventional wet etching steps may involve immersing the substrate in an acidic or basic solution that is adapted to remove the unwanted and/or excess metal on the surface of the substrate. In one embodiment, a wet etch chemistry that preferentially etches theseed layer321 versus the material in theinterface layer323.
Post Processing Steps
• Referring toFIG. 2, instep210 one or more post processing steps are performed to reduce the stress or improve the properties of the deposited metal layers (e.g.,metal layers321,322,323,331,332,333). The post processing steps that may be performed duringstep210 may be include an anneal step, a clean step, a metrology step or other similar types of processing steps that are commonly performed on after metallizing a surface of the substrate. In one embodiment, an annealing step is performed on the solar cell substrate to reduce or even out the intrinsic stress contained in the formed metal layers. In one aspect, the annealing process is performed at a temperature between about 200 and 450° C. in a low partial pressure of nitrogen environment. In one aspect, an anneal process is used to enhance the electrical contact between the formed metal layers and/or the adhesion of the metal layers to the substrate surface, and silicide formation.
• In one embodiment of the batch plating apparatuses, described above in relation toFIGS. 7A-7C, the electrolyte solution is removed from the plating tank751 (FIGS. 7A and 7B) after processing and then a rinsing process is performed on the metallized substrates contained in each of thebatch plating apparatuses701. The rinsing process may include a DI water rinse and a spin dry step (e.g., rotating the head assembly405) to remove the electrolyte from the surface of the substrate and dry the substrates.
Alternate Deposition Techniques Using a Masking Plate
• FIG. 8 illustrates a series of method steps800 that are used to form metal contact structures on a solar cell device using the apparatus described herein. The processes described below may be used to form a solar cell having interconnects formed using any conventional device interconnection technique. Thus while the embodiments described herein are discussed in conjunction with the formation of a device that has the electrical contacts to the n-type and p-type junctions on opposing sides of the substrate this interconnect configuration is not intended to be limiting as to the scope of the invention, since other device configurations, such as PUM or multilayer buried contact structures (both contacts on one side), may be formed using the apparatus and methods described herein without varying from the basic scope of the invention.
• FIGS. 9A-9E illustrate the various states of a metallizedsubstrate320 after each step of method steps800 has been performed. The method steps800 start withstep802 in which a substrate301 (FIG. 9A) is formed using conventional solar cell and/or semiconductor fabrication techniques. Thesubstrate301 may be formed using the steps described instep202, discussed above. Referring toFIGS. 8 and 9B, in the next step,step804, ablanket seed layer321A is deposited over the surface of thesubstrate301. In general, ablanket seed layer321A may be deposited using a physical vapor deposition (PVD), chemical vapor deposition (CVD), molecular beam epitaxy (MBE), or atomic layer deposition (ALD) process.
• In the next step,step806, the masking plate410 (FIGS. 4A-4D) is used to mask regions of theblanket seed layer321A and preferentially expose regions of theblanket seed layer321A where themetal layer322 of theconductors325 are to be formed. Referring toFIG. 9C, during thestep806 an aperture (i.e.,aperture413 inFIG. 4A-4D) in the masking plate (reference numeral410 inFIGS. 4A-4D) is positioned over a portion of theblanket seed layer321A so that aconductor325 can be formed thereon using of the apparatuses, chemicals and methods discussed in conjunction withstep206 above. In this process step, theblanket seed layer321A is cathodically biased relative to an electrode (reference numeral420 inFIGS. 4A-4D) using a power supply that causes the ions in an electrolyte to form ametal layer322 on the exposed areas of theblanket seed layer321A created within the apertures in the masking plate.
• Referring toFIGS. 8 and 9D, instep808, an optionalcontact interface layer323 is deposited over the surface of themetal layer322 formed duringstep806. Thecontact interface layer323 can be formed using an electrochemical deposition process that utilizes a masking plate (reference numeral410 inFIGS. 4A-4D) to preferentially form aninterface layer323 over themetal layer322 formed instep806. Theinterface layer323 formed instep808 may be formed using the apparatus, chemicals and methods described above in conjunction withstep208.
• Finally, instep810, as shown inFIG. 9E, theblanket seed layer321A is removed from surface of the substrate. The blanket seed layer removal step generally entails performing a conventional wet or dry etching step to remove any unwanted and/or excess metal found on the surface of the substrate, such as unused portions of theblanket seed layer321A. Conventional wet etching steps may involve immersing the substrate in an acidic or basic solution that is adapted to remove the unwanted and/or excess metal on the surface of the substrate. In one embodiment, a wet etch chemistry that preferentially etches theseed layer321A versus the material in theinterface layer323 is used. In one embodiment, a backside metallization process is performed on the metallizedsubstrate320 afterstep810 by use of a process similar to the one discussed above in conjunction theFIG. 3F, described above.
• In an alternate embodiment,step810 is performed prior to performingstep808. In this configuration, after the excessblanket seed layer321A is removed from the surface of the metallizedsubstrate321A, thus leaving themetal layer322 or a good portion thereof, so that theinterface layer323 can be preferentially formed on themetal layer322 using an electroless deposition process, a conventional selective CVD deposition process, electrochemical deposition process, or other comparable deposition processes.
Alternate Deposition Processes
• Conventional methods of forming metallized structures using a conventional screen printing type process are unreliable and expensive. In an effort to improve solar cell metallization processes the following methods may be used to formconductors325 on a surface of the metallizedsubstrate320. The method includes the use of a multistep process to form a desired pattern of metallized features on the substrate surface.FIG. 10 illustrates a series ofmethod steps1000 that can be used to form theconductors325 on a surface of the solar cell substrate.FIGS. 11A-11I illustrate the various states of a metallizedsubstrate320 after each step of method steps1000 has been performed. The method steps1000 start withstep1002 in which a substrate301 (FIG. 11A) is formed using conventional solar cell and/or semiconductor fabrication techniques. Thesubstrate301 may be formed using the steps described instep202, discussed above. In the next step,step1004 as shown inFIGS. 10 and 11B,blanket seed layer321A is deposited over the surface of thesubstrate301. In general, ablanket seed layer321A may be deposited using a physical vapor deposition (PVD), chemical vapor deposition (CVD), molecular beam epitaxy (MBE), or atomic layer deposition (ALD) process.
• In the next step,step1004, as shown inFIG. 11C, amasking layer821 is deposited over theblanket seed layer321A. In general, themasking layer821 is a non-conductive material that can be deposited on a surface of the substrate. In one embodiment, the masking layer is an organic material, such as photoresist, that is deposited on theblanket seed layer321A by use of a conventional spin-coating, CVD or other similar process.
• In the next step,step1006, themasking layer821 is patterned to expose regions of the substrate surface where conductors are to be formed. Referring toFIG. 11D, during thestep1006 anaperture822 is formed in themasking layer821 to expose theblanket seed layer321A by use of conventional photolithography exposure and chemical develop steps, laser ablation, or other methods of preferentially removing regions of a masking layer.
• In one embodiment of the method steps1000,steps1004 and1006 are combined so that a patterned layer is directly formed on the surface of theblanket seed layer321A. In this case themasking layer821 is directly formed in a patterned configuration (i.e., havingapertures822 form therein), similar toFIG. 11D, by use of a screen-printing, ink-jet printing, rubber stamping, or other similar process that deposits a material that cannot be “plated on” on the substrate surface. In one embodiment, themasking layer821 is a non-conductive material, such an organic material. In this configuration themasking layer821 that can directly deposits a patterned masking layer material on the surface of the substrate.
• In the next step,step1008, theconductors325 are formed in theapertures822 by use of an electrochemical plating process. In one embodiment,step1008 uses the processes and chemistries described above in conjunction withstep206. In this process step, theblanket seed layer321A is cathodically biased relative to an electrode (not shown) using a power supply that causes the ions in an electrolyte to form ametal layer322 on the exposed areas of theblanket seed layer321A created within theapertures822. In this configuration themasking plate410 used in steps206-208 is not needed, since themasking layer821 contains a desired pattern that is used to form the depositedconductors325. In one embodiment, the light-receiving side of the solar cell may have a metal pattern similar to the pattern shown inFIG. 1D, which is discussed above.
• Referring toFIG. 11F, in the next step,step1010, the patternedmasking layer821 is removed from surface of theblanket seed layer321A. Themasking layer821 can be removed by use of a liquid solvent, RF plasma oxidation process (e.g., conventional ashing processes), thermal baking processing, or other similar conventional techniques.
• In the next step,step1012, as shown inFIG. 11G, theblanket seed layer321A is removed from surface of the substrate. The blanket seed layer removal step generally entails performing a conventional wet or dry etching step to remove any unwanted and/or excess metal on the surface of the substrate, such as unused portions of theblanket seed layer321A. Conventional wet etching steps may involve immersing the substrate in an acidic or basic solution that is adapted to remove the unwanted and/or excess metal on the surface of the substrate.
• Referring toFIGS. 10 and 11H, instep1014 an optionalcontact interface layer323 is deposited over the surface of themetal layer322 formed duringstep1008. Thecontact interface layer323 can be formed using an electrochemical deposition process, an electroless deposition process, a CVD deposition process, or other comparable deposition processes to form a good ohmic contact between the formedconductors325 and an external interconnection bus (not shown) that is adapted to connect one or more solar cells together.Step1014 may be used to form themetal layer323 using of the chemicals and methods described above in conjunction withstep208. In one embodiment of the method steps1000, thecontact interface layer323 is deposited over the surface of themetal layer322, usingstep1014, prior to removing the patternedmasking layer821 usingstep1012.
• In one embodiment, a backside metallization process is performed on the metallizedsubstrate320 by use of a process similar to the one discussed above in conjunction theFIG. 3F, described above.
• While the foregoing is directed to embodiments of the present invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.

Claims (20)

1. An apparatus for forming a metal layer on a substrate, comprising:

a masking plate having a body, a first surface and a second surface, the masking plate having a plurality of apertures that extend through the body between the first surface and the second surface;

an electrical contact formed on the first surface of the masking plate and in communication with a power supply;

a thrust plate that is adapted to urge a metallized surface of a substrate against the electrical contact and the first surface of the masking plate; and

an electrode that is in electrical communication with the power supply, the power supply configured to electrically bias the electrode relative to the electrical contact.

2. The apparatus ofclaim 1, wherein the masking plate is formed from a material selected from the group consisting of glass, plastic and ceramic.

3. The apparatus ofclaim 2, wherein the electrical contact is formed from a material selected from the group consisting of platinum, gold, nickel, graphite and copper.

4. The apparatus ofclaim 1, wherein the electrode has a spiral shape.

5. The apparatus ofclaim 3, further comprising a diffuser plate that is positioned between the electrode and the metallized surface, wherein the diffuser plate is adapted to rotate relative to the metallized surface of the substrate.

6. The apparatus ofclaim 3, further comprising a diffuser plate that is positioned between the electrode and the metallized surface, wherein the diffuser plate is adapted to move linearly or vibrate relative to the metallized surface of the substrate.

7. An apparatus for forming a metal layer on a solar cell substrate, comprising:

a masking plate comprising a body formed of dielectric material, a first surface and a second surface, the masking plate having a plurality of apertures that extend through the body between the first surface and the second surface;

a plurality of electrical contacts formed on the first surface of the masking plate;

a thrust plate adapted to urge a surface of a substrate against the plurality of electrical contacts and the first surface of the masking plate;

an actuator coupled to the thrust plate; and

an electrode that is in electrical communication with a power supply, wherein the power supply is configured to electrically bias the electrode relative to the plurality of electrical contacts.

8. The apparatus ofclaim 7, wherein the electrode is non-consumable.

9. The apparatus ofclaim 7, wherein the electrode is consumable.

10. The apparatus ofclaim 7, wherein the electrode is formed from a material selected from the group consisting of titanium, platinum, copper and phosphorus.

11. The apparatus ofclaim 8, further comprising a polymeric material disposed at least partially on the first surface of the masking plate.

12. The apparatus ofclaim 11, wherein the plurality of electrical contacts are formed from a material selected from the group consisting of platinum, gold, nickel, graphite and copper.

13. An apparatus for forming a metal layer on a solar cell substrate, comprising:

a masking plate comprising a body, a first surface and a second surface, the masking plate having a plurality of apertures that extend through the body between the first surface and the second surface;

a plurality of electrical contacts at least partially recessed within the first surface of the masking plate;

a thrust plate adapted to urge a surface of a substrate against the plurality of electrical contacts and the first surface of the masking plate; and

a non-consumable electrode electrically coupled to a power supply, wherein the power supply is configured to electrically bias the non-consumable electrode relative to the plurality of electrical contacts.

14. The apparatus ofclaim 13, wherein the masking plate is formed from a material selected from the group consisting of glass, plastic and ceramic.

15. The apparatus ofclaim 14, further comprising a polymeric material disposed at least partially on the first surface of the masking plate.

16. The apparatus ofclaim 15, wherein the plurality of electrical contacts are formed from a material selected from the group consisting of platinum, gold, nickel, graphite or copper.

17. The apparatus ofclaim 16, wherein the electrode is formed from a material selected from a group consisting of titanium, platinum, copper and phosphorus.

18. The apparatus ofclaim 17, wherein the plurality of apertures extending through the body form a pattern of interdigitated grid lines.

19. The apparatus ofclaim 18, wherein the surface area of the electrode is about 2 to about 10 times greater than the cross sectional area of the plurality of apertures.

20. The apparatus ofclaim 19, wherein the electrode has a spiral shape.

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