US20100270458A1 - Liquid electrical interconnect and devices using same - Google Patents

Abstract

Various embodiments include interconnects for semiconductor structures that can include a first conductive structure, a second conductive structure and a non-hardening liquid conductive material in contact with the first and second structure. Other embodiments include semiconductor components and imager devices using the interconnects. Further embodiments include methods of forming a semiconductor structure and focusing methods for an imager device.

Description

FIELD OF THE INVENTION
• This invention pertains to liquid interconnect systems, and methods of forming conductive liquid interconnections between electrical nodes.
BACKGROUND OF THE INVENTION
• In semiconductor manufacture, packaging is the final operation that transforms a semiconductor substrate into a functional semiconductor component. Typically, the semiconductor substrate is in the form of a semiconductor die. Packaging provides protection for the semiconductor substrate, a signal transmission system for the integrated circuits on the semiconductor substrate, and external connection points for the component. In response to the demand for smaller, lighter and thinner consumer products, new semiconductor components and new packaging methods are being developed.
• In fabricating a semiconductor component, it is sometimes necessary to provide interconnects which allow transmission of signals from a circuit side of a semiconductor substrate to the backside of the semiconductor substrate. Interconnects or through wafer interconnects which extend through the semiconductor substrate from the circuit side to the backside are sometimes referred to as through interconnects. Typically, through interconnects comprise metal filled vias formed in the semiconductor substrate, which are configured to electrically connect the integrated circuits on the circuit side to elements on the backside of the semiconductor substrate.
• In the manufacture of a semiconductor component, the semiconductor substrate may be mounted and bonded to a second substrate. Typically, when the two substrates are bonded, they are securely bonded and no movement of the substrates relative to one another is permitted. Further, with a fixed electrical connection between the substrates, such as a solder connection, the electrical connection can fatigue degrading the connection between the substrates. Further, a fixed electrical connection can not accommodate large differences in the coefficients of thermal expansion (CTE) between the substrates.
• A through interconnect that can overcome one or more of these issues and a method of providing the same are desirable.
BRIEF DESCRIPTION OF THE DRAWINGS
• FIG. 1 is a diagram of a semiconductor component in accordance with an embodiment of the invention.
• FIG. 2A is a cross sectional view of the semiconductor component ofFIG. 1 along the line2-2′ at a stage of processing.
• FIG. 2B is a cross sectional view of the semiconductor component ofFIG. 1 along the line2-2′ at another stage of processing.
• FIG. 3 is a flowchart showing a method of fabricating the semiconductor component ofFIG. 1.
• FIG. 4 depicts a plurality of semiconductor components at a stage of processing.
• FIGS. 5A-5C depict imager devices including the semiconductor component ofFIG. 1.
• FIG. 6 is a block diagram of a processor system including any one of the imager devices ofFIGS. 5A-5C.
DETAILED DESCRIPTION OF THE INVENTION
• In the following detailed description, reference is made to the accompanying drawings which form a part hereof, and in which are shown by way of illustration specific embodiments that may be practiced. It should be understood that like reference numbers represent like elements throughout the drawings. These example embodiments are described in sufficient detail to enable those skilled in the art to practice them. It is to be understood that other embodiments may be utilized, and that structural, material, and electrical changes may be made, only some of which are discussed in detail below.
• Referring toFIG. 1, asemiconductor structure100 is illustrated. Thesemiconductor structure100 includes a first substrate13 (FIGS. 2A-2B); and second substrate12 (FIGS. 2A-2B). Thefirst substrate13 is, for example, a semiconductor substrate. Thesecond substrate12 can be, for example, an interposer or mounting substrate or another semiconductor substrate. In thesemiconductor structure100, both thefirst substrate13 and thesecond substrate12 can comprise silicon, or another semiconductor material such as germanium or gallium arsenide. The second substrate can also comprise a semiconductor material or other suitable materials such as glasses or polymers.
• Thefirst substrate13 includes integrated circuits. In the illustrated example, thefirst substrate13 comprises animager die110, having animager device400, including apixel array118.
• The first substrate also includes a plurality ofsubstrate contacts20 in electrical communication with the integrated circuits. Thesubstrate contacts20 can comprise device bond pads, or alternately redistribution contacts (i.e., contacts formed in conjunction with an electrical redistribution layer (RDL)). In addition, thesubstrate contacts20 can comprise a highly-conductive material, such as aluminum or copper. Thesubstrate contacts20 can also comprise stacks of different materials, such as aluminum-nickel-gold, aluminum-nickel-solder, copper-palladium, and aluminum on copper.
• For simplicity, thefirst substrate13 is illustrated with only eightsubstrate contacts20 arranged in an edge array along the opposite peripheral edges of thefirst substrate13. However, in actual practice thefirst substrate13 can include more orfewer substrate contacts20 arranged in a desired configuration, such as a center array, an edge array or an area array. Also, as shown inFIG. 1, thesubstrate contacts20 have a generally square peripheral outline. However, thesubstrate contacts20 can be formed in a pattern having any shape including square, rectangular, circular, triangular and oval. In addition, a size of thesubstrate contacts20 can be selected as required. Further, eachsubstrate contact20 can comprise a generally planar pad as shown, or can have other shapes such as a projection, a bump or a volcano shape.
• Referring toFIGS. 2A-2B, which shows thesubstrates13 and12 separated and then connected as well as the connection betweensubstrates13 and12, for onesemiconductor structure100 thefirst substrate13 has a circuit side orfirst side41, and a back side orsecond side42. Thesubstrate contacts20 can be in electrical communication with internal conductors (not shown) located within thefirst substrate13. In addition, the internal conductors can be in electrical communication with the circuitry fabricated on thefirst substrate13. Further, thefirst substrate13 includes anelectrical insulation layer30 on thecircuit side41. Theinsulation layer30 isolates thecontacts20 from one another and can comprise an electrically insulating material, such as BPSG (borophosphosilicate glass), a polymer (e.g., polyimide, polydimethylsiloxane (PDMS)) or an oxide (SiO₂).
• For some applications, at least some of thesubstrate contacts20 can comprise special purpose contacts. For example, thesubstrate contacts20 can comprise electrically isolated contacts that are not in electrical communication with the integrated circuits on thefirst substrate13.
• As shown inFIGS. 2A-2B, thesemiconductor structure100 also includes a plurality of throughinterconnects29, each of which connects with arespective contact20 onsubstrate13 with acontact22 onsubstrate12 placing thecontacts20,22 in electrical communication with thethrough interconnects29. Each throughinterconnect29 includes a sidewall insulated substrate opening36, such as a via, in thefirst substrate13 aligned with an associatedsubstrate contact20.
• Theopenings36 are partially filled with a liquidconductive material10. The amount of liquidconductive material10 should be sufficient to provide an electrical connection betweencontact20 and contact22 (described below), but should not significantly overflow from opening36 when the first andsecond substrates13,12 are connected (as described in more detail below). In the example illustrated inFIGS. 2A-2B, the liquidconductive material10 has a viscosity such that it remains within opening36 independent of the orientation of thesecond substrate13.
• The liquidconductive material10 can be any non-solid, non-hardening conductive material, for example, a high viscosity putty, caulk, paste or a low viscosity liquid. In the illustrated example, the liquidconductive material10 is a non-hardening material, meaning that the liquidconductive material10 will remain a liquid under the standard processing and operational conditions of thestructure100. The liquidconductive material10 should be a material that does not evaporate over its lifetime, such as a material with a low vapor pressure, e.g., less than 1 mmHg at 20° C. Other characteristics for the liquidconductive material10, such as viscosity, melting, freezing and boiling points can be chosen based on the particular application of thestructure100.
• Examples of materials suitable for the liquidconductive material10 include a non-hardening epoxy or similar material that includes a conductive filler, such as nano scale particles, such that the epoxy is conductive in a liquid state.
• In one example, the liquidconductive material10 is an uncured epoxy that is substantially conductive in the low-viscosity, uncured form. In one example, the conductive epoxy has sufficient conductivity that a 15 mil length sample of the liquid conductive epoxy having cross-sectional dimensions of 50 mil by 2 mil would have a resistance of less than about 1000 ohms along its length while having a viscosity of less than about 1,000,000 cps.
• A suitable epoxy is a silver-containing epoxy sold under the product name 116-37A by Creative Materials, Inc. of Tyngsboro, Mass. If desired, the silver containing epoxy can be mixed with one or more other liquids. In one example the silver-containing epoxy is mixed with a second liquid, which comprises an ionic salt. Preferably, the ionic salt is soluble in at least one of the first and second liquids. The ionic salt can comprise organic salts and/or inorganic salts. The ionic salt can comprise, for example, a lithium salt, such as a lithium imide salt. Suitable lithium salts are, for example, LiAsF₆and LiN(CF₃SO₂)₂.
• The mixing of the second liquid with the epoxy can occur prior to, or after, placement of the epoxy intoopening36. In one example, the final concentration of ionic salt within the epoxy mixture is from about 0.4% (by weight) to about 2% (by weight).
• Suitable liquids for mixing with the silver-containing epoxy include a thinner, which lowers the viscosity of the epoxy. The thinner can be, for example, aliphatic glycidyl ethers and aromatic glycidyl ethers, such as Heloxy 61 and Heloxy 7 by Shell Chemical Company of Houston, Tex.
• The liquidconductive material10 can also be an electrolyte. For example, polypropylene glycol mixed with lithium based salts, such as those used in lithium and lithium ion batteries. Other examples of electrolyte materials suitable for the liquidconductive material10 include polymer electrolytes that use polyethylene oxide (PEO) with salts. The melting point of PEO is 38° C., which can be lowered by the salts or other additives. Further, the viscosity of PEO can be modified by including propylene glycol, if desired.
• In another example, an electrolyte can be used in the epoxy described above to provide conductivity in place of the silver or to enhance conductivity in conjunction with the silver.
• Each throughinterconnect29 also includes aprojection38 on afront side50 of thesecond substrate12 supporting acontact22. Theprojection38 and associatedcontact22 is in mating physical engagement with an associatedsubstrate opening36. Theprojections38 can be vertical pins, such as wirebonded stud bumps, or any other projection. Thesubstrate openings36 in thefirst substrate13 for the throughinterconnects29, and theprojections38 on thesecond substrate12 for the throughinterconnects29, can be formed with mating sizes and shapes using anisotropic etching processes.
• Eachprojection38 includes acontact22 configured for physical and electrical contact with the liquidconductive material10, which, in turn is in contact with an associatedsubstrate13contact20. Thecontacts22 can comprise pads or bumps formed on the top surfaces of theprojections38, or alternately can comprise the upper planar surfaces of the conductive connection23 (described below). In addition, thecontacts22 can comprise metal, solder, or a conductive polymer that provides an electrical connection with theliquid interconnect material10.
• As shown inFIGS. 2A-2B, there areconductive connections23 fromcontact22 ofprojection38 toadditional circuitry54 provided on thesecond substrate12. Eachprojection38 can have one or moreconductive connections23. Theconductive connection23 can comprise an electrically conductive metal, or a conductive polymer, deposited in an electrically insulated via of a selected diameter, or any other conductive structures or interconnects.
• Thefirst substrate13 can also include anelectrical insulation layer31 on theback side42 thereof extending into thesubstrate openings36 of the throughinterconnects29, but not to cover access tocontacts20. Theelectrical insulation layer31 can comprise a single layer of material or thesubstrate openings36 can include one or more different insulation layers from that provided on thesecond side42 of thesubstrate13. In addition, thesecond substrate12 includes anelectrical insulation layer32 on afront side50 thereof, which do not covercontacts22 or54, and anelectrical insulation layer33 on abackside52 thereof. As with theinsulation layer30, the electrical insulation layers31,32 and33 can comprise an electrically insulating material, such as a glass (e.g., borophosphosilicate glass), a polymer (e.g., polyimide, polydimethylsiloxane (PDMS)), or an oxide (e.g., SiO₂) and can serve to isolateelectrical circuitry54. For some applications, one or more of the electrical insulation layers30,31,32 and33 can be omitted.
• While use of the liquidconductive material10 as an interconnect is described in connection with a throughinterconnect29, the liquidconductive material10 can be used with other interconnects and to provide other electrical connections between structures or devices. Use of the liquidconductive material10 is particularly suitable to accommodate large differences in the coefficients of thermal expansion (CTE) between structures connected by the liquidconductive material10 or where it is desirable to maintain movement between the structures connected by the liquidconductive material10, e.g., betweensubstrates13 and12, such as to buffer one or the other of the structures from vibration or to enable adjustments in the alignment between the structures.
• If desired, additional substrates, such as a third substrate414 (FIG. 5C) can be included. Suchmulti-substrate semiconductor structures100 can be used in the fabrication of imager modules in which case thethird substrate414 can be transparent or partially transparent substrate and include one or more lenses16 (FIG. 5C). A transparent substrate can comprise glass, silicon or a composite material (silicon on glass). In addition, for uses in imager modules, thefirst substrate13 can comprise a full thickness semiconductor substrate or a thinned semiconductor substrate.
• If thesemiconductor structure100 is used for an imager apparatus440 (FIGS. 5A-5C), the first substrate13 (FIGS. 2A-2B) can comprises an imager die110 (FIG. 1), having animager device400, including apixel array118. Thesecond substrate12 can comprise a passive element having no active semiconductor devices. In an alternate example, thesecond substrate12 can include active semiconductor devices. Thesemiconductor structure100 may also be designed for other applications besides an imager apparatus. Thus, thefirst substrate13 can comprise another type of semiconductor die having integrated circuits constructed in a desired electrical configuration using active semiconductor devices. For example, thefirst substrate13 can comprise a high speed digital logic device, such as a dynamic random access memory (DRAM), a static random access memory (SRAM), a flash memory, a microprocessor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a MEMS type device (e.g., accelerometer, microphone, speaker, electro mechanical device), a solar cell or any other electrical component or system.
• Referring toFIG. 3, a method of forming asemiconductor structure100 is described. While the steps301-306 shown inFIG. 3 are shown in an exemplary order, it should be understood that the order of the steps301-306 can be changed and additional steps not described can be conducted before, during and after the steps301-306 shown inFIG. 3.
• Instep301, the first andsecond substrates13,12 are fabricated and provided for assembly. The first andsecond substrates13,12 and the devices and electrical structures thereon, can be formed by known methods. As shown instep302, theopenings36 formed insubstrate13 are partially filled with the liquidconductive material10. If an additional substrate is to be included insemiconductor structure100, such a substrate would also be fabricated and provided instep301.
• Following fabrication of thefirst substrate13 andsecond substrate12, an aligningstep303 is performed. As shown inFIG. 2A, during the aligningstep303 the first andsecond substrates13,12 are aligned, such that theprojections38 on thesecond substrate12 are aligned with the liquidconductive material10 filledopenings36 on thefirst substrate13.
• In connection step304 (FIG. 2B), the first andsecond substrates13,12 are moved together such that thecontacts22 on theprojections38 are placed in physical contact with the liquidconductive material10.
• If an additional substrate is to be included insemiconductor structure100, such a substrate could be aligned and connected according to known methods either before or after the aligning and connectingsteps303,304.
• If desired, a plurality offirst substrates13 can be aligned with a commonsecond substrate12 and thesecond substrate12 is cut around thefirst substrates13 in asingulation step305. Thesingulating step305 can be performed using a dicing saw or other singulation method, such as cutting with a laser or a water jet, or by etching with a suitable wet or dry etchant.FIG. 4 depicts in top view a plurality ofsemiconductor components100 in which a plurality offirst substrates13 are connected with a commonsecond substrate12, prior to asingulation step305. As shown inFIG. 4, thesemiconductor structure100 when singulated aroundsubstrate13 can have a generally rectangular chip scale outline. Alternately, thesemiconductor structure100 and thefirst substrate13 can have any shape, such as square or triangular, and can also have a circular or oval shape.
• AlthoughFIG. 4 shows a plurality of separatefirst substrates13 connected to acommon substrate12, it should be understood that the plurality offirst substrates13 can also be part of a common substrate that is connected withsecond substrate12.Substrates13 and12 can be formed on respective semiconductor wafers. In this case,semiconductor structures100 are formed by singulation through bothsubstrates13,12.
• Optionally, an adjustingstep306 can be performed to move one or both of the first andsecond substrates13,12 with respect to one another or with respect to another structure, such as lens structure16 (described below). As the first andsecond substrates13,12 are not fixedly bonded and are connected by the liquidconductive material10, the first and second substrates are moveable to some extent with respect to one another as depicted byarrows202 inFIG. 2B before and after thesingulation step305. According, the adjustingstep306 can be conducted at any time, including during operation of an electronic device or system including thesemiconductor structure100, e.g., an imager device400 (FIGS. 5A-5C). Movement of the first andsecond substrates13,12 can be accomplished by adevice505 as described below in connection withFIGS. 5A-5C.
• In one example, where thesemiconductor structure100 includes animager device400 having apixel array118 onsubstrate13, this movement can be used to focus an image on a pixel of theimager device400 by enabling movement of the first and/orsecond substrates13,12 toward and away from one another. Thus, the adjustingstep306 can also be a focusing step. Such movement can also accommodate extreme differences in the coefficients of thermal expansion (CTE) between the first andsecond substrates13,12. Further, the liquidconductive material10 allows onesubstrate13,12 to float with respect to theother substrate13,12, buffering it from vibration.
• FIGS. 5A-5C depictimager apparatuses440 constructed using thesemiconductor structure100 where an imager device400 (FIG. 1) is formed onsubstrate13. In theFIG. 5A example, alens structure16, which may include one or more lenses for focusing an image onpixel array118, is located adjacent thefirst substrate13. Aspacer416 may be provided betweenlens structure16 andsubstrate13. Alternatively, thelens structure16 could be located adjacent thesecond substrate12, as shown inFIG. 5B for backside imaging of thepixel array118. Aspacer416 may be providedlens structure16 andsubstrate12. As another alternative shown inFIG. 5C, thesemiconductor structure100 can also include athird substrate414 havinglens structure16, which is directly coupled tosubstrate12.
• During the adjusting step306 (FIG. 3), one of the first andsecond substrates13,12 is moved with respect to the other and with respect tolens structure16 as shown byarrows202. If desired, onesubstrate13,12 can be maintained in a fixed alignment withlens structure16, e.g., byspacer416. In such a case, only onesubstrate13,12 is moved, for example, thesubstrate13,12 that is not in a fixed alignment withlens structure16. Moving one or more of the first andsecond substrates13,12 can require less power than moving the moremassive lens structure16.
• The movement can be made by adevice505 that is located internally (FIG. 5A) or externally (FIG. 5B) to theapparatus440. As another alternative shown inFIG. 5C, thedevice505 can be located on the first orsecond substrates13,12. In theFIG. 5C example, thedevice505 is located on thefirst substrate13, which includes the imager device400 (FIG. 1). Thedevice505 can also be included on thesecond substrate12. Where thedevice505 is located on the first orsecond substrate13,12, thedevice505 can be a micro-electromechanical system (MEMS) device.
• FIG. 6 illustrates a processor system as part of a digital still orvideo camera system500 employing animager apparatus440 as illustrated in any ofFIGS. 5A-5C, which include asemiconductor structure100. The processing system includes a processor555 (shown as a CPU) which implements system,e.g. camera500, functions. Theprocessor555 is coupled with other elements of the system, includingrandom access memory520,removable memory525 such as a flash or disc memory, one or more input/output devices510 for entering data or displaying data and/or images andimager device400 throughbus515 which may be one or more busses or bridges linking the processor system components. Acamera lens535 allows an image or images of an object being viewed to pass to the pixel array118 (FIG. 1) ofimager apparatus440 when a “shutter release”/“record”button540 is depressed.
• Thecamera system500 is only one example of a processing system having digital circuits that could include image sensor devices. Without being limiting, such a system could also include a computer system, cell phone system, scanner, machine vision system, vehicle navigation system, video phone, surveillance system, auto focus system, star tracker system, motion detection system, image stabilization system, and other image processing systems.
• While disclosed embodiments have been described in detail, it should be readily understood that the invention is not limited to the disclosed embodiments. Rather the disclosed embodiments can be modified to incorporate any number of variations, alterations, substitutions or equivalent arrangements not heretofore described.

Claims (34)

1. An interconnect for a semiconductor structure, the interconnect comprising:

a first conductive structure;

a second conductive structure; and

a liquid conductive material in contact with the first and second structure, the liquid conductive material remaining a liquid during manufacture of the semiconductor device.

2. The interconnect ofclaim 1, wherein the liquid conductive material is an epoxy comprising a conductive filler.

3. The interconnect ofclaim 2, wherein the epoxy further comprises an electrolyte.

4. The interconnect ofclaim 2, wherein the epoxy further comprises a thinner.

5. The interconnect ofclaim 1, wherein the liquid conductive material is an electrolyte.

6. The interconnect ofclaim 5, wherein the electrolyte comprises a polymer.

7. The interconnect ofclaim 5, wherein the electrolyte comprises polypropylene glycol and lithium based salts.

8. The interconnect ofclaim 5, wherein the electrolyte comprises polyethylene oxide and salts.

9. The interconnect ofclaim 8, wherein the electrolyte further comprises propylene glycol.

10. The interconnect ofclaim 1, wherein the liquid conductive material has a viscosity of less than about 100,000 cps.

11. A semiconductor structure comprising:

a first substrate comprising:

at least one opening, and

a first conductive contact within the at least one opening;

a second substrate comprising:

at least one projection,

at least one second conductive contact integrated with the at least one projection;

wherein the at least one opening is in mating physical alignment with the at least one projection; and

a liquid conductive material within the at least one opening, the liquid conductive material remaining a liquid during manufacture of the semiconductor structure and providing an electrical connection between the first conductive contact and the at least one second conductive contact.

12. The semiconductor component ofclaim 11, wherein at least one of the first substrate and second substrate comprise active semiconductor devices.

13. The semiconductor component ofclaim 12, wherein the active semiconductor devices comprise an imager device comprising a pixel array.

14. The semiconductor component ofclaim 13, further comprising a third substrate, the third substrate being at least partially transparent and comprising at least one lens for focusing an image on the pixel array.

15. The semiconductor component ofclaim 14, wherein at least one of the first substrate and second substrate are moveable with respect to the third substrate during operation of the device.

16. The semiconductor component ofclaim 11, wherein the first conductive contact and the at least one second conductive contact form a through interconnect.

17. The semiconductor component ofclaim 11, wherein the at least one projection is a vertical pin.

18. The semiconductor component ofclaim 11, wherein the first substrate and second substrate are part of an electronic device and wherein the first substrate and second substrate are moveable with respect to one another during operation of the device.

19. The semiconductor component ofclaim 11, further comprising a device for moving at least one of the first substrate and second substrate.

20. The semiconductor component ofclaim 19, wherein the device comprises a MEMS device.

21. A method of forming a semiconductor component, the method comprising:

providing a first substrate, the first substrate comprising: at least one opening, and a first conductive contact within the at least one opening;

at least partially filling the at least one opening with a liquid conductive material, the liquid conductive material remaining a liquid during the formation of the semiconductor component; and

engaging the first substrate with a second substrate, the second substrate comprising: at least one projection extending into the opening of the first substrate, and, at least one second conductive contact provided on the at least one projection engaging with the liquid conductive material.

22. The method ofclaim 21, further comprising:

aligning the first substrate and second substrate such that the at least one opening is aligned with the at least one projection; and

placing the at least one opening is in mating physical engagement with the at least one projection such that the liquid conductive material is in contact with the first conductive contact and the at least one second conductive contact.

23. The method ofclaim 21, further comprising subsequent to the act of placing, moving at least one of the first substrate and second substrate with respect to the other.

24. The method ofclaim 23, wherein the act of moving comprises moving the first substrate away from or toward the second substrate.

25. The method ofclaim 23, wherein the act of moving comprises operating a movement device to move at least one of the first substrate and second substrate with respect to the other.

26. The method ofclaim 23, further comprising providing at least one lens, wherein the first substrate further comprises a pixel array and wherein the act of moving comprises moving the first substrate with respect to the at least one lens.

27. An imager device comprising:

a semiconductor structure comprising:

a first substrate comprising a pixel array,

a second substrate electrically connected to the first substrate by a liquid conductive material;

at least one lens for focusing an image on the pixel array.

28. The imager device ofclaim 27, wherein the device for moving at least the first substrate is located on one of the first substrate and second substrate.

29. The imager device ofclaim 27, further comprising a third substrate, wherein the at least one lens is located on the third substrate.

30. The imager device ofclaim 27, wherein the first substrate further comprises:

at least one opening, and

a first conductive contact within the at least one opening;

31. The imager device ofclaim 30, wherein the non-hardening liquid conductive material is within the at least one opening.

32. The imager device ofclaim 31, wherein the second substrate comprises:

at least one projection extending into the opening of the first substrate, and,

at least one second conductive contact provided on the at least one projection and engaging with the non-hardening liquid conductive material.

33. A method of focusing an image on a pixel array of an imager device, the method comprising:

providing a semiconductor structure comprising:

first substrate comprising a pixel array,

a second substrate electrically connected to the first substrate by a liquid conductive material to allow relative movement between the first substrate and second substrate;

arranging at least one lens to focus an image on the pixel array; and

operating a device to move the first substrate relative to the at least one lens.

34. The method ofclaim 33, wherein the moving the at least one first substrate comprises moving the first substrate during operation of the imager device.

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