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US20100180163A1 - Method and device for switching between agents - Google Patents

Method and device for switching between agents
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Publication number
US20100180163A1
US20100180163A1US12/539,554US53955409AUS2010180163A1US 20100180163 A1US20100180163 A1US 20100180163A1US 53955409 AUS53955409 AUS 53955409AUS 2010180163 A1US2010180163 A1US 2010180163A1
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Prior art keywords
message
agent
error
erroneous
initiator
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Abandoned
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US12/539,554
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César Douady
Philippe Boucard
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Qualcomm Technologies Inc
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Individual
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First worldwide family litigation filedlitigationCriticalhttps://patents.darts-ip.com/?family=34814555&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=US20100180163(A1)"Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by IndividualfiledCriticalIndividual
Priority to US12/539,554priorityCriticalpatent/US20100180163A1/en
Assigned to ARTERISreassignmentARTERISASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).Assignors: BOUCARD, PHILIPPE, DOUADY, CESAR
Publication of US20100180163A1publicationCriticalpatent/US20100180163A1/en
Assigned to QUALCOMM TECHNOLOGIES, INC.reassignmentQUALCOMM TECHNOLOGIES, INC.ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).Assignors: ARTERIS, SAS
Assigned to QUALCOMM TECHNOLOGIES INC.reassignmentQUALCOMM TECHNOLOGIES INC.ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).Assignors: Arteris SAS
Abandonedlegal-statusCriticalCurrent

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Abstract

In some embodiments, a system for communication between agents in a point-to-point interconnection system includes at least one initiator agent capable of dispatching at least one message destined for at least one determined receiver agent; at least one intermediate agent capable of forwarding at least one message to at least one determined receiver agent; at least one receiver agent capable of receiving at least one message originating from an initiator agent via at least one intermediate agent; and means of error detection and means of erroneous message marking. In some embodiments, a receiver agent includes means for formulating an error message and means for sending the error message to the initiator agent so as to warn the said initiator agent of the presence of an error.

Description

Claims (11)

1. A method of communication between agents in an interconnection system comprising at least three elements, the method comprising:
sending a message destined for a determined receiver agent by a message initiator agent over a point-to-point interconnection network;
detecting an error and, if an error is actually detected, the said message is marked as being erroneous, wherein the error detection is performed by an intermediate agent of the point-to-point interconnection network; and
forwarding the message to the said determined receiver agent if the said forwarding is possible and, if the said message is marked as being erroneous, the receiver agent formulates an error message and sends it to the initiator agent so as to warn the said initiator agent of the presence of an error, wherein if the message cannot be forwarded to the said determined receiver agent from the said initiator agent, then the message is marked as being erroneous and forwarded to another receiver agent linked to the said interconnection network.
8. A system for communication between agents in a point-to-point interconnection system, comprising at least three elements, the system comprising:
at least one initiator agent capable of dispatching at least one message destined for at least one determined receiver agent, at least one intermediate agent capable of forwarding at least one message to at least one determined receiver agent, at least one receiver agent capable of receiving at least one message originating from said at least one initiator agent via said at least one intermediate agent, means of error detection and means of erroneous message marking, the receiver agent comprising means for formulating an error message and means for sending the error message to the initiator agent so as to warn the said initiator agent of the presence of an error, wherein at least one intermediate agent includes means of error detection and means of erroneous message marking, wherein at least one intermediate agent includes means for forwarding an erroneous marked message to another receiver agent linked to the interconnection network, the said forwarding means being active if the message may not be forwarded to the said determined receiver agent from the said initiator agent.
US12/539,5542004-03-022009-08-11Method and device for switching between agentsAbandonedUS20100180163A1 (en)

Priority Applications (1)

Application NumberPriority DateFiling DateTitle
US12/539,554US20100180163A1 (en)2004-03-022009-08-11Method and device for switching between agents

Applications Claiming Priority (4)

Application NumberPriority DateFiling DateTitle
FR0402149AFR2867338B1 (en)2004-03-022004-03-02 METHOD AND DEVICE FOR SWITCHING BETWEEN AGENTS
FR04021492004-03-02
US11/054,179US7574629B2 (en)2004-03-022005-02-09Method and device for switching between agents
US12/539,554US20100180163A1 (en)2004-03-022009-08-11Method and device for switching between agents

Related Parent Applications (1)

Application NumberTitlePriority DateFiling Date
US11/054,179ContinuationUS7574629B2 (en)2004-03-022005-02-09Method and device for switching between agents

Publications (1)

Publication NumberPublication Date
US20100180163A1true US20100180163A1 (en)2010-07-15

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ID=34814555

Family Applications (2)

Application NumberTitlePriority DateFiling Date
US11/054,179Active2026-10-22US7574629B2 (en)2004-03-022005-02-09Method and device for switching between agents
US12/539,554AbandonedUS20100180163A1 (en)2004-03-022009-08-11Method and device for switching between agents

Family Applications Before (1)

Application NumberTitlePriority DateFiling Date
US11/054,179Active2026-10-22US7574629B2 (en)2004-03-022005-02-09Method and device for switching between agents

Country Status (5)

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US (2)US7574629B2 (en)
EP (1)EP1575222B1 (en)
AT (1)ATE411676T1 (en)
DE (1)DE602004017122D1 (en)
FR (1)FR2867338B1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
US20120054559A1 (en)*2010-08-242012-03-01Davide RussoMethods and systems for computer-aided identification of technical phenomena

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
FR2858895B1 (en)2003-08-132006-05-05Arteris METHOD AND DEVICE FOR MANAGING PRIORITY WHEN TRANSMITTING A MESSAGE
US8407433B2 (en)2007-06-252013-03-26Sonics, Inc.Interconnect implementing internal controls
US9087036B1 (en)2004-08-122015-07-21Sonics, Inc.Methods and apparatuses for time annotated transaction level modeling
FR2890766B1 (en)*2005-09-122007-11-30Arteris Sa SYSTEM AND METHOD FOR ASYNCHRONOUS CIRCUIT COMMUNICATION BETWEEN SYNCHRONOUS SUB-CIRCUITS
FR2899413B1 (en)*2006-03-312008-08-08Arteris Sa MESSAGE SWITCHING SYSTEM
FR2900017B1 (en)*2006-04-122008-10-31Arteris Sa EXTERNAL CHIP FUNCTIONAL BLOCK INTERCONNECTION SYSTEM PROVIDED WITH A SINGLE COMMUNICATION PARAMETRABLE PROTOCOL
FR2901437B1 (en)*2006-05-162008-08-08Arteris Sa METHOD FOR MAKING A SYNCHRONIZATION CIRCUIT OF ASYNCHRONOUSLY EXCHANGED DATA BETWEEN TWO SYNCHRONOUS BLOCKS, AND SYNCHRONIZATION CIRCUIT PRODUCED BY SUCH A METHOD
FR2902957B1 (en)*2006-06-232008-09-12Arteris Sa SYSTEM AND METHOD FOR MANAGING MESSAGES TRANSMITTED IN AN INTERCONNECTION NETWORK
FR2904445B1 (en)*2006-07-262008-10-10Arteris Sa SYSTEM FOR MANAGING MESSAGES TRANSMITTED IN A CHIP INTERCONNECTION NETWORK
US8868397B2 (en)*2006-11-202014-10-21Sonics, Inc.Transaction co-validation across abstraction layers
US8675371B2 (en)2009-08-072014-03-18Advanced Processor Architectures, LlcDistributed computing
US9645603B1 (en)2013-09-122017-05-09Advanced Processor Architectures, LlcSystem clock distribution in a distributed computing environment
US9429983B1 (en)2013-09-122016-08-30Advanced Processor Architectures, LlcSystem clock distribution in a distributed computing environment
US11042211B2 (en)2009-08-072021-06-22Advanced Processor Architectures, LlcSerially connected computing nodes in a distributed computing system
CN101840328B (en)2010-04-152014-05-07华为技术有限公司Data processing method, system and related equipment
US8972995B2 (en)2010-08-062015-03-03Sonics, Inc.Apparatus and methods to concurrently perform per-thread as well as per-tag memory access scheduling within a thread and across two or more threads
US8514889B2 (en)2011-08-262013-08-20Sonics, Inc.Use of common data format to facilitate link width conversion in a router with flexible link widths
US11231769B2 (en)2017-03-062022-01-25Facebook Technologies, LlcSequencer-based protocol adapter
CN111630471A (en)2017-03-062020-09-04脸谱科技有限责任公司Operating point controller for circuit area in integrated circuit

Citations (12)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
US5361267A (en)*1992-04-241994-11-01Digital Equipment CorporationScheme for error handling in a computer system
US5651002A (en)*1995-07-121997-07-223Com CorporationInternetworking device with enhanced packet header translation and memory
US5974028A (en)*1997-02-241999-10-26At&T Corp.System and method for improving transport protocol performance in communication networks having lossy links
US6031818A (en)*1997-03-192000-02-29Lucent Technologies Inc.Error correction system for packet switching networks
US6198735B1 (en)*1999-05-202001-03-06Motorola, Inc.Method for retransmitting a data packet in a packet network
US6400720B1 (en)*1999-06-212002-06-04General Instrument CorporationMethod for transporting variable length and fixed length packets in a standard digital transmission frame
US20020085582A1 (en)*2000-12-282002-07-04Lg Electronics Inc.System and method for processing multimedia packets for a network
US20020196785A1 (en)*2001-06-252002-12-26Connor Patrick L.Control of processing order for received network packets
US20040017820A1 (en)*2002-07-292004-01-29Garinger Ned D.On chip network
US20050240829A1 (en)*2004-04-062005-10-27Safford Kevin DLockstep error signaling
US20070198897A1 (en)*2002-03-222007-08-23Schroeder Jacob JMethod and apparatus to perform error control
US20080034267A1 (en)*2006-08-072008-02-07Broadcom CorporationSwitch with error checking and correcting

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
US6721309B1 (en)1999-05-182004-04-13AlcatelMethod and apparatus for maintaining packet order integrity in parallel switching engine
EP1729445B1 (en)*2000-08-232009-05-06Sony Deutschland GmbHMethod for remotely controlling a device
US6850542B2 (en)*2000-11-142005-02-01Broadcom CorporationLinked network switch configuration

Patent Citations (12)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
US5361267A (en)*1992-04-241994-11-01Digital Equipment CorporationScheme for error handling in a computer system
US5651002A (en)*1995-07-121997-07-223Com CorporationInternetworking device with enhanced packet header translation and memory
US5974028A (en)*1997-02-241999-10-26At&T Corp.System and method for improving transport protocol performance in communication networks having lossy links
US6031818A (en)*1997-03-192000-02-29Lucent Technologies Inc.Error correction system for packet switching networks
US6198735B1 (en)*1999-05-202001-03-06Motorola, Inc.Method for retransmitting a data packet in a packet network
US6400720B1 (en)*1999-06-212002-06-04General Instrument CorporationMethod for transporting variable length and fixed length packets in a standard digital transmission frame
US20020085582A1 (en)*2000-12-282002-07-04Lg Electronics Inc.System and method for processing multimedia packets for a network
US20020196785A1 (en)*2001-06-252002-12-26Connor Patrick L.Control of processing order for received network packets
US20070198897A1 (en)*2002-03-222007-08-23Schroeder Jacob JMethod and apparatus to perform error control
US20040017820A1 (en)*2002-07-292004-01-29Garinger Ned D.On chip network
US20050240829A1 (en)*2004-04-062005-10-27Safford Kevin DLockstep error signaling
US20080034267A1 (en)*2006-08-072008-02-07Broadcom CorporationSwitch with error checking and correcting

Cited By (2)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
US20120054559A1 (en)*2010-08-242012-03-01Davide RussoMethods and systems for computer-aided identification of technical phenomena
US8943371B2 (en)*2010-08-242015-01-27Bigflo SrlMethods and systems for computer-aided identification of technical phenomena

Also Published As

Publication numberPublication date
US20050210325A1 (en)2005-09-22
EP1575222B1 (en)2008-10-15
FR2867338B1 (en)2007-08-10
ATE411676T1 (en)2008-10-15
US7574629B2 (en)2009-08-11
EP1575222A1 (en)2005-09-14
DE602004017122D1 (en)2008-11-27
FR2867338A1 (en)2005-09-09

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ASAssignment

Owner name:ARTERIS, FRANCE

Free format text:ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:DOUADY, CESAR;BOUCARD, PHILIPPE;REEL/FRAME:023130/0059

Effective date:20041025

STCBInformation on status: application discontinuation

Free format text:ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION

ASAssignment

Owner name:QUALCOMM TECHNOLOGIES, INC., CALIFORNIA

Free format text:ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:ARTERIS, SAS;REEL/FRAME:031437/0901

Effective date:20131011

ASAssignment

Owner name:QUALCOMM TECHNOLOGIES INC., CALIFORNIA

Free format text:ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:ARTERIS SAS;REEL/FRAME:033406/0941

Effective date:20131011


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