US20080310461A1 - System and method for transmitting and distributing audio or video data over a network system having multiple receivers - Google Patents

Abstract

A system for transmitting and distributing audio or video information. The system includes a multi-channel input module and multiple receivers arranged along at least one chain of high speed serial data links where each receiver can tap into a common set of digital channels generated by a transmitter. Each receiver can create its own user adjustable mix based on one or more signals from the common set of digital channels.

Description

CROSS REFERENCE TO RELATED APPLICATIONS
• This application claims priority to provisional patent application No. 60/349,114, entitled “Soniqnet, a Protocol for Transmitting Digital Audio and Video Data and Product Implementations Utilizing the Soniqnet Protocol,” filed Jan. 16, 2002, and non-provisional patent application Ser. No. 10/342,066, entitled “System and Method for Transmitting and Distributing Audio or Video Data over a Network System Having Multiple Receivers,” filed Jan. 14, 2003, each of which is incorporated herein by reference in its entirety.
BACKGROUND OF INVENTION
• The invention relates generally to digital audio and video data transmission, and in particular, to transmitting multiple channels of digital audio and video data over serial data links.
• In today's technologically demanding society, there is a growing need to transmit and receive electronic data more efficiently. To that end, several means of transmitting and receiving electronic data currently exist. A packet-switched network system or circuit-switched network system, for instance, provides some of the most common methods of transmitting and receiving electronic data. It should be noted, however, that transmission errors may exist in any kind of data transmission. A packet-switched network, for instance, can be affected by transmission errors such as loss of packets.
• Transmission errors can severely hinder the efficiency of data transmission. Consider, for instance, a situation where a data packet is lost during data transmission. This is a relatively frequent problem encountered in packet switched networks. In such a case, the problem may be more complex than it may seem initially. When a data packet is lost during transmission, not only the data in the packet is affected, but also the data in other packets transmitted during the same transmission is affected. This is because data packets are, generally transmitted in an organized sequence and that loss of one packet may affect the sequence of data transmission for the entire sequence of packets. As a result, a transmission error causing loss of one packet may further render all subsequent packets out of order and therefore useless.
• To combat this kind of situation, several means of detecting, correcting or combination of both have been introduced. For instance, one of the most common methods of reducing transmission errors is to add certain control data bits, such as check sum bits or parity bits, in data packets during data transmission. It should be noted that, however, while this method of adding control data bits can help minimize transmission errors, it may not be desirable in all situations. For example, although a parity bit scheme could be used to detect certain transmission errors, it may not be able to detect errors in which an even number of bits in the same data unit are changed due to electrical noise.
• Furthermore, these error detection and/or correction methods provide the same level of protection to the entire length of data, without assigning any particular importance to a particular section of data which may represent a critical part of the data. As a result, data packets using some of the known transmission error detection and/or correction methods are unnecessarily bulky, thereby reducing the rate of transmission. Some network systems, therefore, use the type of communication medium that allows greater bandwidth, such as fiber optics, rather than using the traditional metal cables. However, one of the disadvantages of fiber optics is that they are very expensive to install and maintain. Furthermore, fiber optics are very fragile, and as such, are difficult to split. Thus, use of fiber optics, in many situations, can be uneconomical.
• A packet-switched system may be used for transmitting and receiving audio or video data in real-time. In such a situation, any transmission error can cause significant impact on the audio or video receiver, and may result in a transmission delay. The delay can cause severe impact on the quality of the output audio or video data. This is significant since many devices today rely on real-time communication of data. An audio mixer, for example, is a device that typically relies on real-time communication of data. An audio mixer allows multiple audio sources (i.e., input data channels) to be individually controlled and added together (hence the name “mixer”) to produce one or more audio outputs suitable for broadcast to many users. Audio mixers rare used today in a variety of applications providing many functions, including, among others, transmitting, receiving, recording, enhancing, and presenting audio data. Any data transmission problems, such as loss or delay of data packets, may result in the reduced functionality of the audio mixer.
• Thus, there exists a need for a system and method of transmitting and receiving data efficiently, reliably, and economically. In particular, there exists a need for a system and method of transmitting and receiving digital audio and video data. There, exists a further need for a system and method of enhancing the functionalities of devices that transmit and receive digital audio and video data. There exists yet a further need for a system and method of providing an error-tolerant system that allows transmission of real-time, high quality, multi-channel audio and video data as well as generic digital data over any serial data link.
SUMMARY OF THE INVENTION
• The present invention is directed to a data transmission and distribution system that includes a series of payloads, where each of the payloads is formed from bits of audio or video information and where different levels of protection are applied to different sets of bits in each payload. The system divides the bits associated with each payload into high priority bits, and low priority bits and forms a group of check bits for each payload by applying an error correction algorithm to the high priority bits in the payload. The system also forms each payload from a first set of the high priority bits, the check bits, the low priority bits and a redundant set of the high priority bits and the check bits and transmits the payloads formed from the first set of the high priority bits, the check bits, the low priority bits and the redundant set of the high priority bits and the check bits.
• The present invention is also directed to a data transmission and distribution system that includes a transmitter and a receiver. The transmitter transmits a count value associated with a data clock of the transmitter to the receiver over an asynchronous link as part of an information payload that also includes audio or video information. The data clock is synchronously recreated at the receiver using only a system clock associated with the receiver and the transmitted count value.
• The present invention is also directed to a data transmission and distribution system that includes a series of payloads. Each of the payloads is formed from samples of audio or video information. The system interleaves the audio or video samples in each payload where no two consecutive samples are lost upon a loss of an entire frame of the interleaved samples.
• The present invention is also directed to a system for transmitting and distributing audio or video information. The system includes a plurality of input modules arranged in series along at least one chain of high speed serial data links that end with a master module. Each input module receives mixing instructions addressed to that module and then passes a signal mixed in accordance with the instructions to the next input module in the chain where no human perceptible delay is introduced into the mixed signal as it moves through the chain.
• In one embodiment, the system includes a plurality of control surfaces for simultaneously controlling system parameters associated with each of the input modules and output busses. One or more of the control surfaces are physically separated in location from the input, output and master modules.
• In one embodiment, the system includes a digitally remote controlled microphone preamp controlled from a control surface that is physically separated from the preamp, the input, output and master modules. The control data is sent from the control surface to adjust the microphone preamp's gain at an input module.
• In one embodiment, the system includes a protocol that automatically enumerates each audio channel of at least one of the input modules in a manner that assigns the each audio'channel of the at least one input module to a given channel regardless of the order in which the input modules are connected along the chain.
• In one embodiment, the system includes a one or more output modules. Each input module in the chain has a defined delay that is used to maintain a final mix in a time aligned format.
• The present invention is also directed to a system for transmitting and distributing audio or video information. The system includes a multi-channel input module and multiple receivers arranged along at least one chain of high speed serial data links where each receiver can tap into a common set of digital channels generated by a transmitter. Each receiver can create its own user adjustable mix based on one or more signals from the common set of digital channels.
• In one embodiment, each receiver can output one or more signals from the common set of digital channels.
• In one embodiment, each receiver employs a digitally controlled analog master audio gain control that automatically adjusts itself to keep an overall output volume constant when an individual channel's volume is raised to its maximum digital level. The system automatically lowers the digital volume levels of all other channels and raises the master gain, thereby effectively raising the volume of the channel that is at its maximum digital level thus allowing greater dynamic range control of the digital mix.
BRIEF DESCRIPTION OF THE DRAWINGS
• FIG. 1 is a block diagram showing one embodiment of a data transmission system, in accordance with the present invention.
• FIG. 2 is a diagram showing a detailed representation of the payload, in accordance with the present invention.
• FIG. 3 is a diagram showing a detailed representation of one 24-bit sample used in the payload, in accordance with the present invention.
• FIG. 4 is a diagram showing detailed representation of low priority bits used in the payload, in accordance with the present invention.
• FIG. 5 is a block diagram showing a data transmission and data clock recreation system, in accordance with the present invention.
• FIG. 6 is a diagram showing one embodiment of a data mixing and distribution system, in accordance with the present invention.
• FIG. 7 is a block diagram showing an expanded view of the transmitter inFIG. 6, in accordance with the present invention.
• FIG. 8 is a block diagram showing an expanded view of the receiver inFIG. 6, in accordance with the present invention.
• FIG. 9 is a block diagram showing another embodiment of a data mixing and distribution system, in accordance with the present invention.
• FIG. 10 is a block diagram showing an expanded view of the master module inFIG. 9, in accordance with the present invention.
• FIG. 11 is a block diagram showing an expanded view of the input module inFIG. 9, in accordance with the present invention.
• FIG. 12 is a block diagram showing an expanded view of the receiver inFIG. 9, in accordance with the present invention.
• FIG. 13 is a block diagram showing an expanded view of the control surface inFIG. 9, in accordance with the present invention.
• FIG. 14 is a diagram showing yet another embodiment of data mixing and distribution system, in accordance with the present invention.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
• For purposes of the present invention, each of the terms set forth below shall be defined in accordance with the corresponding definitions set forth below:
• “Application-Specific. Integrated Circuit” or “ASIC” shall mean a microchip designed for a special application, such as a particular kind of transmission protocol.
• “Bit Clock” shall mean a clock signal that tracks the bits of audio data coming out of the A/D (analog to digital) or going into the D/A (digital to analog) converters.
• “Center Section” shall mean a section of data that contains the lower bits of the audio sample data.
• “Channel” shall mean a separate line of audio data, where each channel represents a stream of audio data.
• “Critical data” shall mean the data that cannot be lost without having to interpolate missing data on the receiver.
• “Cyclic Redundancy Check” or “CRC” shall mean a checksum that is calculated on a stream of data to provide a security check that the data arrived at the receiver without error. CRC-32 means that the checksum algorithm is calculated out to 32 bits.
• “Error Correction Code” or “ECC” shall mean appended data that is being read or transmitted to allow for error checking and correcting on the fly. See FEC.
• “Ethernet L/R Count” or “ELR Count” shall mean the number of Ethernet clocks per payload (defined by a fixed number of L/R clocks), as counted on the transmitter and sent to the receiver.
• “Ethernet Clock” shall mean the clock signal that drives the data across the Ethernet.
• “Forward Error Correction” “FEC” shall mean a method where data can be encoded with extra “check” bits prior to transmission. At the receiver, the check bits provide a way of not only detecting bit errors, but correcting them as well, avoiding retransmission (which would not be acceptable for audio or video streaming applications). See ECC.
• “Frame” shall mean a package of data that is recognized by the hardware interfacing with the outside world. Data sent using Ethernet drivers must be framed following the Ethernet protocol. The application-specific data contained within the frame is independent of the Ethernet standard.
• “Idle” shall mean the time between frames that the line has no activity.
• “Left/Right Clock” or “L/R Clock” shall mean the clock signal that tracks the start of each new sample.
• “Medium Access Control” or “MAC” shall mean the layer of hardware that resides above the Physical Layer. At this layer, data packets are encoded and decoded.
• “Master Clock” shall mean the clock signal that drives the A/D's and D/A's.
• “Payload” shall mean a collection of frames that contains the encoded data that is sent over the CAT-5 wire.
• “Phased Lock Loop” or “PLL” shall mean a section of hardware that can be used to smooth out irregularities in a clock signal, such as a “jitter filter,” or it can be used as a frequency multiplier.
• “Physical Layer” or “PHY Layer” or “PHY” shall mean the lowest hardware layer where the data meets the wire. This layer conveys the bit stream, including electrical impulse, light or radio signal, through the network at the electrical and mechanical level.
• “Preamble” shall mean a series of eight. (8) specific bytes, dictated by the Ethernet standard and recognized by the hardware, that indicate the start of a frame.
• “Priority Section” shall mean a section of data that contains the higher bits of the audio or video, sample data. The data in this section is critical and warrants the highest protection in the system.
• “Redundant Section” shall mean a section of data that contains a copy of the Priority Section. It is provided as a backup of the data in the event that some or all of the data in the Priority Section is lost.
• “Sample” shall mean an item of data that represents voltage level of an analog voltage waveform at a given point in time.
• “Sample Rate” shall mean the number of samples of an analog signal that are taken per second to represent the event digitally.
System Overview
• In accordance with the present invention, a novel system and method for facilitating data transmission and distribution, and in particular, transmission and distribution of audio data and/or video data, is provided. The system and method of the present invention can be implemented in a variety of system configurations, including without limitation, a multiplexer system that combines multiple signals, including analog or digital or combination thereof, received from multiple input sources for transmission over a single line or medium.
• It should be noted that while much of the description herein regarding the systems and methods of the present invention pertains to data transmission and distribution of audio data, the systems and methods, in accordance with the present invention, are equally applicable to transmission and distribution of video data and other generic data; including without limitation, control data.
• One embodiment of the present invention relating to data transmission usingdata transmission system100 is illustrated inFIG. 1. It should be noted that the configuration ofdata transmission system100 represents one embodiment that is used to carry out the inventive concepts of the present invention, and, as such, there are multiple variations thereof within the scope and spirit of the present invention.
• As shown,system100 includestransmitter105 coupled toreceiver107.Transmitter105 receives data from one ormore channels110 and transmit it overlink120 toreceiver107. In accordance with the present invention,transmitter105 uses data packets to transmit data. As described below, the data packets used insystem100 follow a data transmission protocol (“DTP”), which provides efficient data transmission while maintaining a high level of data integrity. More specifically, upon receiving data fromchannels110,transmitter105 packetizes (or constructs) the received data into one or more packets using the DTP and transmits the packets toreceiver107 overlink120. Once received, the packets are de-packetized into (or reassembled into) the data using the DTP atreceiver107.
• It should be noted that, as described below, the DTP allows data transmission over a serial data link.System100, therefore, includes link120 comprising Category-5 (or Cat-5) cable, along withstandard Ethernet 100 Mbit PHY hardware. This configuration oflink120 comprising Cat-5 cable and thestandard Ethernet 100 Mbit PHY hardware allows a 100 Mb serial data transmission rate betweentransmitter105 andreceiver107. Furthermore, the configuration allows over 48 channels (i.e., audio channels)110 to fit ontotransmitter105.
• In accordance with the present invention, link120 may comprise other types of communication medium, including without limitation, CAT-5 10-baseT, CAT-5 100-baseT, 1 gigabit Ethernet, 100 gigabit Ethernet, other versions of Ethernet, infra-red, RF, wired, wireless, optical, or laser link.
Data Transmission Protocol (DTP)
• As mentioned above, using the DTP,transmitter105 receives data from one ormore input channels110, packetizes the data, and transmits the packetized data toreceiver107. It should be noted that, in accordance with the present invention, the DIP has bi-directional capability and supports transmission and distribution of multiple types of data, such as audio data, video data, and other generic data, including control data. Some examples of data protocols supported are Musical Instrument Digital Interface (MIDI), USITT DMX512/1990 (DMX), mouse, keyboard, and proprietary system control data. In one aspect, the DTP is a protocol for multiplexing many channels of data—i.e., the DTP is used to receive data from multiple sources, packetize the data, transmit the packetized data over a serial data link, and de-packetize and reconstruct the source data.
• In accordance with the present invention, as described further below, the DTP provides, among other things, a variable bit protection scheme, error detection and correction scheme, and data smoothing technique scheme. These schemes provided by the DTP facilitate efficient and effective data transmission and distribution while maintaining data integrity. In particular, the DTP allows a scalable data transmission and distribution (e.g., the number of data channels and the quality of data channels can be scaled) to suit a particular system configuration having a particular transmission link bandwidth.
• It should be noted that a data packet, which follows the DTP, in accordance with the present invention, includes the payload that can be configured to best suit the given configuration of a given data transmission and/or distribution system. More specifically, the DTP provides, among other things, a payload structure that yields less delay time, more channels, and a higher sample rate, all of which may be required to suit the need of the given system configuration. In particular, the payload structure of the DTP is designed to withstand a noise burst, which can destroy over half of the payload, without having to interpolate a missed sample.
• FIG. 2 shows the structure ofpayload200 included in a data packet that follows the DTP to transmit data over a serial data link. Note that the embodiment ofpayload200 as, shown inFIG. 2 relates to receiving, packetizing, transmitting, and distributing48 input channels of 24-bit audio data over Category-5 cable usingstandard Ethernet 100 Mbit PHY hardware. This configuration results in a 100 Mb serial data transmission rate.
• It should be noted that the embodiment ofpayload200 as shown inFIG. 2 represents one embodiment that is used to carry out the inventive concepts of the present invention, and, as such, there are multiple variations thereof within the scope and spirit of the present invention. For instance, while much of the description herein relates to transmission and/or distribution of audio databits using payload200, it should be noted thatpayload200 is equally applicable to other types of data, such as video data and other generic data including control data. Furthermore, the DTP provides for, as noted, adjusting of channel count, channel quality, and channel type (audio data, video data, and/or control data), based on the available link bandwidth and desired system robustness (error immunity) for a given system's architecture and purpose. Accordingly, in other embodiments,payload200 is used to receive more than (or alternatively, less than) 48 channels of data.
• In accordance with the present invention,payload200 is designed to provide varying levels of protection on different sets of bits inpayload200. As described below, by “bit-splitting” audio data into several sets of varying priorities, the most important bits can be protected with an FEC algorithm and redundancy, the moderately important bits protected with redundancy alone, and the least important bits protected by that what is inherent within the transmission medium's physical layer. Using this variable bit protection scheme,payload200 facilitates a robust data transmission and distribution within the time allotted while maintaining data integrity.
• As shown inFIG. 2,payload200 comprises three sections: priority section210,center section220, andredundant section230.Redundant section230 is an exact copy of priority section210. The priority section210 contains all of the critical data ofpayload200. As noted, the “critical data” is the data that cannot be lost without having to interpolate missing data on the receiver. The ELR count, which is used to generate the L/R Clock on a receiver, for example, is contained in priority section210.
• Priority section210 comprises twenty frames240 (i.e., Frame Nos. 1-20). Note that eachframe240 in priority section210 includespreamble250,audio data252, reserveddata254, and CRC-32checksum256. Also note that, for the purposes of completeness,idle time258 is included at the end of eachframe240.
• Audio data252 includes, as described below, high priority bits of data required to deliver proper audio information.Preamble250 comprises 8 bytes of preamble data that are defined by the Ethernet standard. The preamble data includes a sequence of bytes that the PHY Layer needs to see in order to recognize the start offrame240. At the end offrame240, the line must go idle for 960 ns, a period of time which is equivalent to 12 bytes. This period allows the PHY Layer to reset and begin searching for the next preamble.
• Note that a 32-bit CRC value is included in CRC-32checksum256 of eachframe240. The 32 bit CRC serves as a first line of protection against data transmission errors. If the CRC forframe240 is good, for instance, it is assumed thatframe240 is valid and no further error detection or data recovery needs to occur.
• As noted, the DTP is a protocol for handling multiple channels of incoming data.Reserved data254 includes a reserved space for accommodating additional or future data. In one embodiment, the ELR count resides inreserved data254. In another embodiment, MIDI files use reserveddata254 during data transmission and/or distribution.
• As noted, redundant,section230 ofpayload200 contains an exact copy of the frames that appear in priority section210. Thus,redundant section230 comprises twenty frames240 (i.e., Frame Nos. 23-42). Like that of priority section210, eachframe240 inredundant section230 includespreamble250,audio data252, reserveddata254, CRC-32checksum256, andidle time258.
• It should be noted that, in accordance with the present invention, including a duplicate copy of priority section210 inpayload200 provides a protection against two types of common errors: a burst error that can wipe out the entire set of frames in priority section210 and a single bit error inpreamble250 that could cause aframe240 to be dropped by the PHY Layer. These types of data transmission errors can be greatly minimized by includingredundant section240 in addition topriority section240 inpayload200. For instance, after receiving packetized data,receiver107 has several options if an error is detected. The first approach for error detection and recovery would be, as noted, to check the CRC (i.e., 32-bit CRC checksum256) of priority frames240. If the CRC is; good, thepriority frame240 can be used. On the other hand, if the CRC is bad, the respectiveredundant frame240 can be checked. If the redundant CRC is good, the respectiveredundant frame240 can be used.
• As shown inFIG. 2,payload200 further comprisescenter section220, which includes two (2) frames (i.e., Frame Nos. 21 and 22). Like that of priority section210 andredundant section230, eachframe240″ incenter section220″ includespreamble250,audio data252″, reserveddata254″, CRC-32checksum256″, andidle time258.″
• A method of bit-splitting sample data into multiple sections inpayload200, in accordance with the present invention, is described herein. As noted, while the embodiment ofpayload200 shown inFIG. 2 relates to 48-channels of input, the discussion that follows herein uses 1-channel for purposes of simplicity. Similarly, it should be noted that a total of 100 samples are used in the embodiment ofpayload200 shown inFIG. 2. Thus, eachframe240 of priority section210 includes five samples, resulting in the total of 100 samples per priority section210 (or five samples per frame times twenty frames). Likewise, the same number of samples exist inredundant section230 since it is an exact copy of priority section210. In accordance with the present invention, it should be noted that the number of samples perpayload200 could be modified. That is, the number of samples could be changed to another figure—e.g., 96 samples perpayload200. If 96 samples are used, for instance, priority section210 would include 16 frames with 6 samples perframe240.
• As noted, each sample comprises 24-bit data. For bit-splitting purposes, each 24-bit sample is designated as having 11 bits of high priority data required to deliver proper audio information (to a receiver or other receiving unit) and 13 low priority data that adds dynamic range and definition. From the eleven bits in the high priority data, 9 bits are considered critical. Accordingly, these twenty-four bits can be divided into three sets of varying audio priorities—i.e., a first set having bits1-9 that are high priority and critical, a second set having bits10-11 that are high priority but non-critical, and a third set having bits12-24 that are not high priority. These 24 bits can be treated differently based on the significance attached to each set of bits.
• FIG. 3 is a detailed representation of one 24-bit sample data310. In particular,FIG. 3 illustrates a scheme of splitting bits ofsample data310 into multiple sets of priorities. As shown, from 24-bit sample data310, the first eleven bits are designated as high priority bits312. Further, from the bits in high priority bits312, the first nine bits are designated ascritical bits314 and the remaining two bits are designated as high priority,non-critical bits316. The remaining 13 bits in sample data310 (i.e., bits12-24) are designated aslow priority bits320.
• From each twenty-four bit sample, only the bits in high priority bits312 (i.e., bits1-11) are placed in priority section210. The remaining bits of sample data310 (i.e., the bits12-24 in low priority bits320) are placed incenter section220. It should be noted that the bits in high priority bits312, by being placed in priority section210, are transmitted twice—once in priority section210 and then again inredundant section230. Note that, from the eleven bits from high priority bits312, only the bits from critical bits314 (i.e., the bits1-9) are given extra data protection (i.e., by encoding with an FEC algorithm). The remaining bits from high priority bits312 (i.e., the bits in high priority, non-critical bits316) are not encoded.
• After the high priority bits (i.e., bits1-11) of each sample are bit-split and placed into priority section210, the remaining 13 bits of low priority bits (i.e., bits12-24) of each sample are destined for center frames240″ in center section220 (i.e., Frames 21 and 22). Theselow priority bits320 are “sample split” intoFrame21 andFrame22 incenter section220 so in the event that one offrames240″ is lost, only half of the samples will degrade to 11 bits of dynamic range.
• FIG. 4 shows a detailed representation of howlow priority bits320 of each sample are sample-split into Frames Nos. 21 and 22 incenters section220. As shown, thelow priority bits320 from samples 1-50 are placed in Frame No. 21 ofcenter section220. Similarly, thelow priority bits320 from samples 51-100 are placed in Frame No. 22 ofcenter section220. Accordingly, each of the two frames (i.e., Frames 21 and 22) incenter section220 contains the 13 bits oflow priority bits320 for 50 samples.
• Accordingly, in accordance with the present invention, after receiving and packetizing data from all 48-channels, eachframe240 of priority section210 comprises eight bytes inpreamble250, four hundred twenty (420) bytes of 11-bit high priority audio data and FEC bits inaudio data252, four bytes of checksum in CRC-32checksum256, and twelve bytes of time inidle time258. Additionally, as noted, eachframe240 may also contain bytes inreserved data254.
• Likewise, in eachframe240 ofredundant section230, there are eight bytes inpreamble250, four hundred twenty (420) bytes of 11-bit high priority audio data and FEC bits inaudio data252′, four bytes of checksum in CRC-32checksum256′, and twelve bytes of time inidle time258′. Also, eachframe240′ may also contain bytes inreserved data254′.
• In addition, eachframe240″ ofcenter section220 includes eight bytes inpreamble250,″ four bytes of check sum in CRC-32checksum256″, twelve bytes of time inidle time258,″ and thirty-nine hundred bytes (3900) (or 13 bits of lowpriority bits times 50 samples times 48 channels divided by 8 bits per byte) of low priority audio data are placed inaudio data252.″
• In accordance with the present invention, it should be noted that, one of the advantages achieved by placing lowerpriority data bits320 incenter section220 is to provide a length of time between priority section210 and the subsequentredundant section230.Center section220 serves as a buffer to provide a cushion between the two copies of the high priority data bits312. Under this scheme,payload200 can lose either priority section210 orredundant section230 and still be able to provide 24-bit audio data. Similarly,payload200 can lose either priority section210 orredundant section230 as well ascenter section220 and still provide an 11-bit audio data sample. The placement ofcenter section220 between priority section210 andredundant section230 containing high priority data bits312 minimizes the chance that a long noise burst would corrupt data from both priority section210 andredundant section230.
• Furthermore, as noted, by further splittingcenter section220 into two frames (i.e., Frames 21 and 22), the risk of an error burst causing the entire payload to drop to 11-bit resolution is minimized. While any error to centersection220 results in a loss of dynamics from 24 to 11 bits, this loss would only last for 1 ms if the error burst was limited to only one of the two center frames240″. In accordance with the present invention, it should be noted that the bits inlow priority bits320 could also be split by channel instead of by sample number. Under this configuration (e.g., splitting the bits inlow priority bits320 by channel), the loss of resolution would go to 11 bits for the entire 2 ms payload time, but only half of the channels (i.e., 24 channels) would be affected.
• Based on the foregoing, it should be apparent that there are several reasons for bit-splitting and sample-splitting audio data bit samples into multiple sections. First, by bit-splitting sample data310, only the bits in high priority bits312 are stored in priority section210, thereby increasing the rate of data transmission while minimizing data transmission errors. Second, as described further below, the bits in critical data bits314 (i.e., the first 9 bits in high priority bits312) can be encoded with a forward error correction scheme that allowsreceiver107 to detect and correct errors upon receiving the data. Furthermore, as described below, in accordance with the present invention, the method of including multiple samples inpayload200 facilitates interleaving of the samples, whereby no two consecutive samples are lost upon a loss of an entire frame of the interleaved samples. In fact, consecutive samples are guaranteed to be at least 4 frames apart.
• In any event and in accordance with the present invention, in one embodiment, the bits incritical bits314 of each sample are encoded with an FEC algorithm. Being the most critical audio data, these bits incritical bits314 are encoded to allow recovery on the receiving side in the event that a bit is lost during transfer. Due to the nature of the FEC algorithm, 18 bits of raw data are required to perform the encoding. For that reason, in accordance with the present invention, the error encoding will take place on two samples.
• In one embodiment, a 24/18 Hamming Code is used. This algorithm will take 18 bits of input data (i.e., the first 9 bits of 2 samples), and encode them with 6 check bits. The resulting output is a 24 bit stream of error encoded data. The 24/18 FEC algorithm will detect up to 2 bit errors within the 24-bit packet. It will be able to detect and correct 1 bit error within the 24-bit packet.
• As noted, the structure or format ofpayload200 shown inFIG. 2 represents one embodiment that is used to carry out the inventive concepts of the present invention, and that there are multiple variations thereof. Accordingly,payload200 can be easily modified based on a particular system configuration. The size ofpayload200, for example, can be increased to provide more error protection, if needed. While increasing the size ofpayload200 may require more processing time and memory,larger payload200 allows greater protection of critical data that can be retransmitted many times with full error detection and correction encoding.
• Note that not only the size ofpayload200 can be adjusted, but also the format of the data withinpayload200 can be adjusted to provide various degrees of protection of the data. While much of the description herein pertains totransmitter105 receiving 48 channel, 24-bit digital audio data, it should be noted thattransmitter105 can be adjusted to provide a greater protection over fewer channels. The channel count could be reduced, fore example, from 48 to 16. The extra bandwidth withinpayload200 could be used to provide redundant protection of more data bits within each sample. Likewise, in one embodiment,payload200 can be formatted to offer an 8-bit audio data delivery system over 144 channels.
Data Interleaving
• As noted, the method of including multiple samples inpayload200 facilitates interleaving of the samples. In accordance with the present invention, by interleaving the samples, no two consecutive samples are lost upon a loss of an entire frame of the interleaved samples during data transmission. This is so since, the system and method of interleaving data samples using the DTP ensures that consecutive samples are at least 4 frames apart from one another.
• If an error burst takes out oneframe240 of data in priority section210, a copy (i.e.,frame240′) of thisframe240 is available inredundant section230 within thesame payload200. However, there may be a situation where more protection is needed during data transmission. For instance, if an error burst was long enough to corrupt the entire priority section210 and a second error burst destroyed oneframe240′ withinredundant section230, then the entire five audio samples across all 48 channels in theframe240 would be lost.
• Normally, losing 5 samples within an audio data stream would be irrecoverable. However, by interleaving the samples across the entire priority section210, aframe240 can be lost in its entirety and the worst that can happen is that there would be 5 places on each channel within the 2 mS audio data stream where a single sample would need to be interpolated.
• In accordance with the present invention, using a proper interleaving scheme, consecutive audio samples can be spread out to the point that a noise burst could destroy4 consecutive frames of data and no two consecutive audio samples would be lost. These missing (nonconsecutive) audio samples may then be more accurately reconstructed with interpolation.
• Table 1 below shows an exemplary embodiment of the sample interleaving scheme, in accordance with the present invention, that will result in the maximum transmission time between consecutive audio samples. As shown below, each frame contains 5 samples (A-E). There are 20 frames in the priority section. Samples are numbered 1-100.

• 	TABLE 1
  	Frame # Sample A Sample B Sample C SampleD Sample E

  	1 03 23 43 63 83 2 07 27 47 67 87 3 11 31 51 71 91 4 15
  	35 55 75 95 5 19 39 59 79 99 6 01 21 41 61 81 7 05 25
  	45 65 85 8 09 29 49 69 89 9 13 33 53 73 93 10 17 37 57
  	77 97 11 04 24 44 64 84 12 08 28 48 68 88 13 12 32 52
  	72 92 14 16 36 56 76 96 15 20 40 60 80 100 16 02 22 42
  	62 82 17 06 26 46 66 86 18 10 30 50 70 90 19 14 34
  	54 74 94 20 18 38 58 78 98.

• In general and in accordance with the present invention, the exemplary embodiment of the sample interleaving scheme shown in Table 1 above can be established using the following algorithm. For a given payload of x frames per priority section and y samples per frame:

• 	SAMPLES_PER_FRAME=y;
  	FRAMES_PER_SECTION=x;
  	FRAME_SAMPLE_BIAS=INT(SAMPLES_PER_FRAME/2);
  	At initial startup, variables are initialized as follows:
  	Frame=0;
  	Frame_Sample=0;
  	Dest_Frame_Start=SAMPLES_PER_FRAME−
  	FRAME_SAMPLE_BIAS;
  	Dest_Sample=Dest_Frame_Start;

• Note that a buffer exists Dest_Buffer, which is pointed to by Dest_Buffer_Ptr. SAMPLE_SIZE is processor-dependent and is used for calculating the location of the new sample in the destination buffer. It represents the number of memory locations required to represent the sample. The algorithm runs as each sample is being loaded in the priority section of the payload.

• /* Calculate destination buffer pointer based on Destination Sample number.
  */Dest_Buffer_Ptr=Dest_Buffer_Start+((Dest_Sample−1)*SAMPLE_SIZE)
  Copy the incoming sample to the destination buffer at the location pointed to by Dest_Buffer_Ptr.
  /* Calculate Next Destination Sample Number */
  Frame=Frame+1
  If (Frame<FRAMES_PER_SECTION)
  If (Frame_Sample<(SAMPLES_PER_FRAME−1)
  Frame_Sample=Frame_Sample+1
  Dest_Sample=Dest_Sample+FRAMES_PER_SECTION
  Else
  /* Calculate new Dest_Frame_Start */
  Dest_Frame_Start=Dest Frame Start−FRAME_SAMPLE_BIAS
  If(Dest_Frame_Start<=0)
  Dest_Frame_Start=Dest_Frame_Start+SAMPLES_PER_FRAME
  Endif
  Dest_Sample=Dest_Frame_Start
  Endif
  Else /* Last frame in transmission, payload interleaving complete */
  Frame=0
  Frame_Sample=0
  Dest_Frame_Start=SAMPLES_PER_FRAME−FRAME_SAMPLE_BIAS
  Dest_Sample=Dest_Frame_Start
  Endif

• Using the sample interleaving algorithm illustrated above, the risk of losing two consecutive samples can be greatly minimized. It should be noted, however, that the algorithm described above illustrates an exemplary algorithm, and, as such, there are multiple variations of algorithms that can be used with the present invention and within the scope and spirit of the present invention. For instance, it should be noted that while the system and method of sample interleaving, including the algorithm shown above, relate to the samples in priority section210 andredundant section230, the system and method of sample interleaving, in accordance with the present invention, are equally applicable to the samples incenter section220. That is, the system and method of the present invention can be used to interleave not only the high priority bits in priority section210 (and redundant section230), but also the low priority bits incenter section220.
Data Clock Recreation
• In accordance with the present invention, a system and method is provided for transmitting data over an asynchronous link that provides a synchronous recreation of the transmitters data clock at a receiver. In one aspect, the system and method of the present invention can be used to recreate (or regenerate) the transmitter's data clock in the receiver with nothing more than the Ethernet clock (or any system clock—i.e., a transmission clock—that is recovered by the receiver for a non-Ethernet system).
• FIG. 5 shows data transmission and dataclock recreation system500, in accordance with the present invention. As shown,transmitter510 is coupled toreceiver550 overlink505. In accordance with one aspect of the present invention, link505 comprises any asynchronous link, including without limitation, a transformer, optical, or RF isolated data connection.
• It should be noted that the embodiment ofsystem500 ofFIG. 5 represents one embodiment that is used to carry out the inventive concepts of the present invention, and, as such, there are multiple variations thereof within the scope and spirit of the present invention. For instance, while much of the description herein relates to transmitting and recreating an audio data clock,system500 of the present invention can be used to transmit and recreate a video clock.
• As shown,transmitter510 comprises, among other things,count generator520,data packetizer530, andEthernet PHY540.Count generator520 receives signals fromaudio data clock512 andEthernet clock514 and generates count values522. Note thatEthernet clock514 drivesEthernet PHY540 and thataudio data clock512 drives A/D's (not shown here). It should be noted thataudio data clock512 andEthernet clock514 are asynchronous.
• Audio data clock512 represents a clock that is synchronized with data (i.e., audio data526) going intotransmitter510.Audio data clock512 may comprise any clock, including without limitation, a L/R clock, bit clock, or master clock, that is associated with the data (i.e., audio data526) from which all other data timing signals (i.e., count value522) can be generated. In the embodiment ofsystem500 shown inFIG. 5, audio data clock comprises the L/R clock.
• To generatecount values522,count generator520 compares and counts the number ofasynchronous Ethernet clocks514 per eachaudio data clock512. More specifically,count generator520 re-clocksaudio data clock512 withEthernet clock514. Doing so creates re-clockedaudio data clock572. It should be noted that, in accordance with the present invention, re-clockedaudio data clock572 is edge-synchronous withEthernet clock514 and comprises the same asynchronous frequency as the originalaudio data clock512. In other words, re-clockedaudio data clock572 representsaudio data clock512 with jitter. Thereafter,count generator520 counts the number ofEthernet clock514 cycles peraudio clock512 cycle and transmits the resultingcount value522 todata packetizer530.
• As shown,data packetizer530 receives thecount value522, along withgeneric data524 andaudio data526. Note thataudio data526 enterstransmitter510 through an A/D converter (not shown) and is digitized.Data packetizer530 packetizes thecount value522,generic data524, andaudio data526 into a payload. Accordingly, the payload now contains thecount value522 that will be used to generate the L/R Clock for that payload. In other words, thecount value522 is transferred toreceiver550 via the payload.
• Thepacketized payloads535 are then sent toEthernet PHY540. As noted, theEthernet PHY540 is the lowest hardware layer where data meets the wire. This layer conveys the bit stream including electrical impulse, light or radio signal, through the network at the electrical and mechanical level. Thepacketized data535 is transmitted toreceiver550 vialink505.
• Upon receiving thepacketized data535,receiver550 synchronizes itslocal Ethernet clock562 to thepacketized data535. In other words,Ethernet clock514 fromtransmitter510 andEthernet clock562 fromreceiver550 are synchronized and locked with one another. Upon synchronization, receiver Ethernet PHY, which includesPHY receiver555 andrecovery unit560, recovers and transmits theEthernet data564 andEthernet clock562 todata de-packetizer565. After receiving theEthernet data564 andEthernet clock562, data de-packetizer565 separates thecount value522, generic data,524, andaudio data526.
• Thereafter, data de-packetizer565 sends thecount value522 to audiodata clock generator570, which, as shown, uses thecount value522 and Ethernet clock562 (from recovery unit560) to create the re-clockedaudio data clock572. It should be noted that the re-clockedaudio data clock572 is recreated (or regenerated) to represent the originalaudio data clock512 by changing edges based on thecount value522. In other words, re-clocked,audio data clock572 is edge-synchronized with the recoveredEthernet clock562, and, as such, represents an accurate representation of the originalaudio data clock512, but with jitter.
• PLL, circuit580 receivesaudio data clock572 and removes the jitter. That is, using re-clockedaudio data clock572, PLL circuit580 provides jitter free data clock582 and a higherfrequency master clock584. By using the jitter free audio data clock582 andmaster clock584, all other data timing signals can be reproduced. In other words, the jitter free audio data clock582 can be used to createmaster clock584 for driving D/A's (not shown) inreceiver550. It should be noted that, therefore, jitter free audio data, clock582 andmaster clock584 are synchronous with theaudio data526 transmitted fromdata de-packetizer565.
• As noted, while much of the description herein relates to transmitting and recreating audio data clock,system500 of the present invention can be used transmit and recreate video data clock and that there are other variations of recreating the data clock thereof that incorporate the inventive concept of the present invention and are within the scope and spirit of the present invention.
Personal Mixing and Distribution System
• In accordance with the present invention,FIG. 6 shows one embodiment of personal mixing anddistribution system600 that can be used to transmit and distribute data over multiple receivers. It should be noted thatsystem600 represents one embodiment that is used to carry out the inventive concepts of the present invention, and, as such, there are multiple variations thereof within the scope and spirit of the present invention. For instance, whileFIG. 6 shows only fourreceivers650, the number ofreceivers650 can be, in accordance with present invention, easily increased or decreased depending on the system configuration. Likewise, the number ofinput channels610 can be easily increased or decreased depending on the system configuration.
• As shown inFIG. 6, in accordance with the present invention,transmitter605 takes one or moreaudio data channels610 and packetizes the data. It should be noted thattransmitter605 can receive over 48 high-quality digitalaudio channels610, makingsystem600 suitable for multichannel professional audio, solutions. The packetized data is transmitted toreceivers650 overlink620. It should be noted that while the embodiment ofsystem600, as shown inFIG. 6, follows the DTP,system600, in accordance with the present invention, can follow other protocols, including without limitation, traditional Ethernet.
• In accordance with the present invention, link620 comprises a high speed, serial data transmission link. The embodiment ofsystem600, as shown inFIG. 6, includes link620 comprising Category-5 cable in conjunction withstandard Ethernet 100 Mbit PHY hardware. This configuration provides a 100 Mb serial data transmission rate. It should be noted that, however, in accordance with the present invention, link620, may include any one or more of Cat-5/PHY in a 10 Mbit or 1000 Mbit form, IR, Wireless (e.g., 802.11 link), or laser.
• It should be noted that, insystem600,transmitter605 is connected to a group ofreceivers650 vialink620 in a daisy-chain configuration. As described below, using the D′FP in a daisy-chained configuration, eachreceiver650 can provide dynamic and intelligent scaling functions to itsoutput channels695. In particular, eachreceiver650 can monitor the error counts in real-time as it receives data. More specifically,receivers650 can receive the data, analyze the payload for the priority information (e.g., channel count, audio fidelity, error tolerance, etc.), and then feed back control data totransmitter605, instructingtransmitter605 to dynamically scale the payload to provide the best payload format to achieve the desired results in the given environment. Alternatively or additionally,receivers650 may simply feed back the raw error count information, leaving the analysis and subsequent scaling decision algorithm totransmitter605.
• In accordance with the present invention, as long astransmitter605 provides a format identifier with the packet,receivers650 can be grouped so that onereceiver650 can receive a specific set ofchannels610 at one quality level, while anotherreceiver650 gets another quality level of audio data over a different set ofchannels610. With this flexibility,system600 can be adapted to a variety of environments and/or applications. For instance, in accordance with the present invention, eachreceiver650 can craft a unique mix of audio data that does not affect the mix of theother receivers650 and can be controlled by separate users.
• In particular, under the configuration ofsystem600, eachreceiver650 can read the data transmitted fromtransmitter605 and then immediately pass the data toadditional receivers650. In other words, this configuration allows eachreceiver650 to “tap” off the packetized data transmitted from transmitter605 (or from other receivers650) and read thespecific channels610 as desired. Also, two ormore receivers650 can receive the data transmission and de-packetize (or reconstruct) the data simultaneously. Thereafter, eachreceiver650 can mix the data to suit the respective local listening environment serviced by one ormore output channels695. Alternatively or additionally, in one embodiment, eachreceiver650 can tap into a common set of digital channels generated bytransmitter605 and, thereafter, eachreceiver650 can output one or more signals from the common set of digital channels.
• It should be noted that, in accordance with the present invention,system600 allows eachreceiver650 to employ a standard analog master gain control. Alternatively or additionally,system600 allows eachreceiver650 to employoutput circuit677, which, in one embodiment, comprises a digitally controlled analog master audio gain control that can be used to provide an auto-gain adjustment system. This means that, eachreceiver650 can provide intelligent functionalities.
• For instance, at eachreceiver650, as the volume of aspecific channel610 is increased to the point of near clipping, thatchannel610 can be effectively limited while other remainingchannels610 are reduced in volume, maintaining the desired relative level between all of thechannels610. To assure that the user (at output channels695) perceives the change as an increase in the desired channel, the digitally controlled post D/A's master volume is then increased accordingly by the digitally controlled analog masteraudio gain control677.
• In other words,system600 allows eachreceiver650 to automatically adjust itself to keep an overall output volume constant when anindividual channel610's volume is raised to its maximum digital level. Thereafter,system600 automatically lowers the digital volume levels of allother channels610 and raises the master gain, thereby effectively raising the volume of thechannel610 that is at its maximum digital level thus allowing greater dynamic range control of the digital mix.
• In accordance with the present invention,FIG. 7 shows an expanded view oftransmitter605 ofFIG. 6. As shown, audio data enterstransmitter605 through one ormore channels610. Thereafter, the data is digitized using one or more A/D converters612. The digitized data is transmitted totransmitter ASIC616 over aserial bus614. In accordance with the present invention,bus614 comprises Inter-IC Sound (I2S), which typically handles audio data separately from clock signals. It should be noted that optionalserial data622,word clock624, and/orvideo sync626 can also drivetransmitter ASIC616.
• Thereafter,transmitter ASIC616 packetizes the digitized data. During this process,transmitter ASIC616 converts digitized audio data into data packets. Note thattransmitter ASIC616 interfaces totransmitter Ethernet PHY632 through a standardEthernet MII interface630. Accordingly, the packetized data is passed, fromtransmitter ASIC616 totransmitter connector634 through Ethernet MII interface,630 andtransmitter Ethernet PHY632. In accordance with the present invention,transmitter connector634 comprises, an RJ-45 Category-5 approved connector. It should be noted, as described below, there is apower supply circuit910 supplying power totransmitter605.
• In accordance with the present invention,FIG. 8 shows an expanded view of areceiver650 shown inFIG. 6. As shown, the data entersreceiver650 throughreceiver connector652. Liketransmitter connector634,receiver connector652 comprises an RJ-45 Category-5 approved connector. Note thattransmitter Ethernet PHY654 interfaces withreceiver ASIC660 through a standardEthernet MII interface630.
• It should be noted that, in accordance with the present invention, the transmission (of data) is immediately repeated, with virtually no delay, totransmitter Ethernet PHY632′ and totransmitter connector634. The repeated transmission is destined toadditional receivers650.
• In any event and in accordance with the present invention, after receiving the transmission,receiver ASIC660 de-packetizes (or reconstructs) the data. During this time,receiver ASIC660 performs an error detection and correction (EDAC) process, following the DTP. Following the EDAC process,receiver ASIC660 presents individual12S audio signals662,serial data664, and word clock outputs668.
• It should be noted that in the embodiment ofreceiver650, as shown inFIG. 8,receiver ASIC660 performs digital mixing of forty-eight audio channels withmixer670. Thereafter,receiver ASIC660 presents asingle I2S output672 to a stereo D/A converter675 and the optional digitally controlled analog master audio gain control atoutput circuit677. As noted, the final output is transmitted to one ormore output channels695.
• It should also be noted that, in one embodiment,mixer670 is large enough to accommodate more audio channels (i.e., up to the number of channels in the input stream). As shown further inFIG. 8, in accordance with the present invention,receiver650 includesmicroprocessor680,volume rotary encoder682, panrotary encoder684,buttons686, andLEDs688.Receiver650 also includes apower supply circuit910 supplying power toreceiver650.
Data Distribution and Mixing System
• In accordance with the present invention, a novel system and method of using the DEEP to transmit and distribute audio or video data over a network having multiple modules is provided. In particular, a novel system and method of using serial data links to communicate with functional mixing blocks, such as input modules, master modules, receivers, mixers, and/or controls surfaces is provided.
• FIG. 9 illustrates data distribution andmixing system900 that uses the DTP to, among other things, receive, transmit distribute, and mix audio or video data. It should be noted that the configuration ofsystem900 represents one embodiment that is used to carry out the inventive concepts of the present inventions and, as such, there are multiple variations thereof within the scope and spirit of the present invention.
• As described, audio mixers, in general, have all input and output connectors in one physical package and in relatively close proximity to one another. Also, audio mixers typically have their control elements integrated into the same physical package as their input and output connections, and, as such, all control is performed from a central location. Therefore, input signals are carried from their origin to the mixer over a relatively long distance using analog or digital cables. Similarly, output signals from the mixer are carried to their destinations over a relatively long distance using analog or digital cables. As a result, an audio mixer system may comprise a complex set up, including many cables that are costly and prone to damage.
• In accordance with the present invention, data distribution andmixing system900 can be used in such a situation to communicate with functional mixing blocks over a serial data link. In particular,system900 comprises multiple control surfaces that can control all or part ofsystem900 simultaneously or separately from different physical locations.
• As shown inFIG. 9, data distribution andmixing system900 includesmaster module905,input modules930, andreceivers950.Input modules930 are linked to one another in a daisy-chained configuration and operatively coupled tomaster module905 vialink920. Similarly,receivers950 are linked to one another in a daisy-chained configuration and operatively coupled tomaster module905 vialink920. In accordance with the present invention, link920 comprises a high speed, asynchronous serial link, such as a CAT-5 10-baseT, CAT-5 100-baseT, 1 gigabit Ethernet, 100 gigabit Ethernet, other versions of Ethernet, infra-red, RF, wired, wireless, optical, or laser link.
• In accordance with the present invention, the functions ofmaster module905, which acts as a mixer, can be controlled remotely byprimary control surface915 and/orsecondary control surface915′. Alternatively or additionally, the functions can be controlled wirelessly bywireless control surface915″. Note thatprimary control surface915,secondary control surface915′, andwireless control surface915″ are sometimes collectively referred to as control surfaces915. The link betweenmaster module905 andcontrol surfaces915 can provide audio as well as control data, thereby allowing remote effects units to be local to controlsurfaces915. It should be noted that, in accordance with the present invention,different control surfaces915,915′, and915″ can use different transmission media, with different bandwidth to connect tomaster module905. It should also be noted that any number of thecontrol surfaces915 can be added tomaster module905.
• As described in more detail below, in accordance with the present invention,master module905 gathers all of the control information fromcontrol surfaces915. Thereafter,master module905 initiates the mixing process by adding any input signals created inmaster module905 to mix busses dictated by the control data gathered fromcontrol surfaces915.
• A detailed illustration ofmaster module905 ofsystem900, distributing and mixing audio data is shown inFIG. 10. It should be noted that the embodiment ofmaster module905, as shown, is an exemplary embodiment, and, as such, there are multiple variations thereof within the scope and spirit of the present invention. For instance, while the discussion herein relates to audio data,master module905 can be used to distribute and mix other types of data, including without limitation, video data.
• As noted,master module905 gathers all of the control information fromcontrol surfaces915. Accordingly, as shown inFIG. 10,master module905 gathers the control data (and audio data if necessary) fromcontrol surfaces915 viainputs907. As shown,inputs907 are communicatively coupled toconnectors924.Multiple inputs907 are provided to support simultaneous connections to controlsurfaces915.
• Once received, the data are sent todata de-packetizers911, which de-packetize and separate the control data and audio data. The control data are merged incontrol data merger913. In accordance with the present invention, data de-packetizers911 may also drive D/A circuits914 to provide additional analog outputs without using busses on asynchronousserial data link920. The output from D/A circuits914 is provided to local audio outputs917.
• Note thatmaster module905 starts the mixing process by mixing any local input signals916 tomaster module905 and any audio data fromcontrol surfaces915 that is destined to mix busses, in digitalaudio mixing block918. Also note that, in one embodiment,input circuit919 comprises a digitally remote controlled microphone preamp. In accordance with the present invention, the digitally remote controlled microphone preamp can be controlled remotely from any one ofcontrol surfaces915,915′,915″ such that control data is sent from any one ofcontrol surfaces915,915′,915″ to adjust the microphone preamp's gain atmaster module905.
• In any event and in accordance with the present invention, note that digitalaudio mixing block918 also provides equalization (EQ) and effects. Thereafter,master module905 takes this mixed audio and control information and packetizes them indata packetizer922 for transmission (over link920) viaoutput driver circuit923. It should be noted that link920 carries actual mixing bus information as well as control data throughsystem900. In one embodiment,output driver circuit923 is communicatively coupled toconnector924, which couples to thefirst input module930 insystem900.
• Referring again toFIG. 9, note that the output from data packetizer922 ofmaster module905 is connected to thefirst input module930. As shown, thefirst input module930 is also designated asinput module930′. Using the daisy-chained topology, the output from data packetizer922 is conveyed toother input modules930 in the chain until it reaches thelast input module930, which is also designated asinput module930″.
• Last input module930″ then sends the data tomaster module905 overlink920 viadata input circuit925. As shown,data input circuit925 is communicatively coupled toconnector924. The data is then split and sent tooutput circuit926 communicatively coupled toreceivers950 and/or control surfaces915. The other part of the split data is sent to de-packetizer927, which splits the data into audio data and control data and drives digitalaudio mixing block928. It should be noted that, in accordance with the present invention, the data is split to make localaudio outputs917 onmaster module905. Accordingly, digitalaudio mixing block928 mixes, adds EQ and effects, and drives D/A929 to provide analog audio outputs to local audio outputs917.
• It should be noted, in accordance with the present invention,connectors924 comprise any link, including without limitation, a transformer, optical, or RF isolated data connection.
• Recall that the output from data packetizer922 (in master module905) is sent overlink920 tofirst input module930′. This data is conveyed to all inputmodules930 and eventually reacheslast input module930″.Last input module930″ then conveys the data back tomaster module905 atdata input circuit925.
• FIG. 11 shows a detailed illustration ofinput module930, ofsystem900, distributing and mixing audio data, in accordance with the present invention. It should be noted that a control bus independently addresses each of input,modules930 insystem900. The control bus, in accordance with the present invention, includes information for varying a gain, frequency, or effects associated with an input channel, output bus, or a mix.
• Further, eachinput module930 processes its own input signals. Some of the processes thatinput module930 performs include, without limitation, an A/D conversion, equalization, effects, and time alignment delay. After processinginput module930 adds the signals to the busses carried ondata link920.
• As shown inFIG. 11, input data entersinput module930 viaconnector924 at module receiver932. It should be noted that input data is coming from eithermaster module905 or precedinginput module930. Data is then de-packetized by data de-packetizer934 where data is split into mixbus audio data941 andcontrol data942. It should be noted that localaudio signals935enter input module930 atinput circuit936 and are digitized.
• Note that, in one embodiment,input circuit936 comprises a digitally remote controlled microphone preamp. In accordance with the present invention, the digitally remote controlled microphone preamp can be controlled remotely from any one ofcontrol surfaces915,915′,915″ such that control data is sent from any one ofcontrol surfaces915,915′,915″ to adjust the microphone preamp's gain atinput module930.
• In any event and in accordance with the present invention, the digitized local audio signals935 are delayed by the necessary sample amount in sample buffer/delay generator938. Note that the amount of delay is determined by the position ofinput module930 in the input module loop (i.e., daisy-chain), as shown inFIG. 9. This is done to time align the mixed audio output with sample level accuracy. That is, because mix busses are built in time, a specific delay is associated with eachinput module930. In other words, eachinput module930 has a defined delay that is used to maintain a final mix in a time aligned format.
• For instance, in one embodiment ofsystem900 that comprises sixinput modules930 where eachinput module930 takes one audio sample period to process its input signals onto the mix busses,first input module930′ would mix onto the busses its current sample, thesecond input module930 would mix onto the busses one sample previous to its current sample (from memory), the next input module would mix onto the busses two samples previous to its current sample (from memory), and so on, untillast input module930″ (i.e., sixth) would mix onto the busses five samples previous to its current sample (i.e.input module930″ would require memory to store five samples of audio data).
• In any event and in accordance with the present invention, digitalaudio mixing block940 mixes and provides EQ and effects to the digitized and delayed localaudio signals935 percontrol data instructions942. That is, the output from digitalaudio mixing block940 represents updated digital audio busses with local audio mixed in per thecontrol data942. The output of digitalaudio mixing block940 is then packetized by data packetizer943 and transmitted tonext input module930 by output driver944.Output data946 is then sent to subsequent (or following)input module930 in the chain.
• In accordance with the present invention,input module930 must de-packetize input data coming intoinput module930 and split intoaudio data941 andcontrol data942, followed by digitally mixingaudio data941 and its local audio signals935 into the mixer busses percontrol942 that governsinput module930's inputs. Also,input module930 must preserve allcontrol data942 and re-packetize the digital audio data (i.e.935 and941) andcontrol data942 for retransmission to thenext input module930 where the entire process, as described, repeats.
• Referring again toFIG. 9, it should be noted that, in accordance with the present invention, any number ofreceivers950 can be connected tomaster module905 and provide independent mixes of the system audio busses. Using this configuration, an infinite amount of mixes can be provided. It should be noted that the configuration ofFIG. 9 allows eachinput module930 to receive mixing instructions addressed to thatmodule930 and then passes a signal mixed in with the instructions tonext input module930. In accordance with the present invention, this process can be done while no human perceptible delay is introduced into the mixed signal as it moves throughlink920.
• FIG. 12 shows a detailed view ofreceiver950 ofsystem900 shown inFIG. 9, in accordance with the present invention. As shown, data entersreceiver950 throughreceiver connector1252 and is passed toreceiver PHY1254.Receiver connector1252 comprises an RJ-45 Category-5 approved connector.Receiver950 receives the requisite system data via the input data fromreceiver connector1252. It should be noted that the transmission (of data) is immediately repeated, with virtually no delay, to Ethernet PHY1232 and toother receiver connector1234 to provide daisy chained data toother receivers950 by buffering it and re-clocking it inASIC1260 via Ethernet MII interface1230.
• After receiving the transmission,receiver ASIC1260 de-packetizes (or reconstructs) the data. After de-packetizing the data,receiver ASIC1260 sends separateaudio I2S signals1262 anddata signals1264 to other components such as D/A converters, digital signal processors, and/or microprocessors (not shown).
• Additionally,receiver ASIC1260 performs digital mixing of audio channels (forty-eight channels are shown in the embodiment) withmixer1270. Digitalaudio mixer block1270 mixes the audio channels into a stereo pair, converts the mixed signals to an I2S signal inconverter1272, and outputs through D/A1275 and analogconnections output circuit1277. The output is transmitted via one ormore output channels1295. Note thatmixer1270, also adds EQ and effects and is controlled by themicroprocessor1280, which also controlsindicators1288 and reacts torotary encoders1282,potentiometers1284, and switches1286.
• Referring again toFIG. 9, recall that data distribution andmixing system900 includes a plurality ofcontrol surfaces915, each of which can be used to control the functions ofmaster module905.FIG. 13 shows, in accordance with the present invention, a detailed representation of one embodiment ofcontrol surface915.
• Note that, in accordance with the present invention,microprocessor1380 is coupled to multiple input and/or output devices. These devices are used to, among other things, communicate with users. For instance, a user can enter input tomicroprocessor1380 by usingrotary encoders1382,potentiometers1384, and/or switches1385.Microprocessor1380 can provide to the user the system status information by usingindicators1388 and/ordisplay1389.
• In accordance with the present invention, control data is output frommicroprocessor1380 per the control settings. The control data is sent todata packetizer1320, which merges and packetizes the control data with anylocal audio1310 coming in from A/D1312 and transmits the packetized data tomaster module905 viaoutput circuit1322.
• Note that data frommaster module905 enterscontrol surface915 atinput circuit1330. Thereafter,data de-packetizer1332 separates the control data and audio data and sends the control data tomicroprocessor1380. This allowsdisplay1389 to be synchronized with changes made by other control surfaces915 (or other system components, such as input modules930). Furthermore,data de-packetizer1332 sends the audio data toaudio channel selector1334, which selects and sends digital audio tooutput circuit1338 for local audio outputs1340. D/A converter1336, which can be used to convert signal, is placed betweenaudio channel selector1334 andoutput circuit1338. Note thataudio outputs1340 can drive the local EQs and effects units.
• It should be noted that, each audio channel can have many different parameters, such as EQ (frequency, boost/cut, or Q), gain, FX (reverb type, reverb time, reverb density, or delay). In accordance, with the present invention,microprocessor1380 keeps track of the parameters that controlsurface915 can change. For instance, note that in a system havingmultiple control surfaces915, not all control surfaces need to control all parameters. In such a situation, it may be desirable to control only a subset of the parameters on some or all of control surfaces915. Thus, it may be desirable to makecontrol surfaces915 control exclusive parameters for controlling their own respective local space.
• As noted, the configuration ofsystem900 represents one embodiment that is used to carry out the inventive concepts of the present invention, and, as such, there are multiple variations thereof within the scope and spirit of the present invention. For instance, one embodiment ofsystem900 uses the DTP comprising a protocol that will automatically enumerate each audio channel ofinput module930 in a manner that assigns each audio channel ofinput module930 to a given mixer channel regardless of the order in whichinput modules930 are connected along the chain.
Isolated Grounding and Data Loopback Scheme
• In accordance with the present invention, a data transmission and distribution system having multiple receivers is provided, whereby each receiver can repeat data signals that are in Ethernet format. Additionally, a system where each receiver includes an isolated power supply is provided.
• In accordance with the present invention,FIG. 14shows transmitter1405 communicatively coupled toreceivers1450 vialink1420.Transmitter1405 andreceivers1450 inFIG. 14 are shown in an exemplary embodiment to illustrate the inventive concepts of the present invention, and there are multiple variations thereof within the scope and spirit of the present invention.
• For instance, inFIG. 14, eithertransmitter1405 orreceiver1450 can be replaced withtransmitter105,transmitter510,transmitter605,master module905,input module930,control surface915,receiver950,receiver550,receiver650, orreceiver107. Also, it should be noted that while the embodiment shown inFIG. 14 relates to data signals in Ethernet format, other embodiments oftransmitters1405 andreceiver1450 can be used with any ground isolated data link.
• In accordance with the present invention,transmitter1405 andreceivers1450 can receive, transmit, and distribute data signals that a resin Ethernet format, and such signals are repeated alongreceivers1450 using a daisy-chained topology. This is accomplished byfirst keeping link1420 isolated with a transformer, optical or RF isolation, and then by implementing a ground isolated floatingpower supply1415. This combination allows the ground reference ofreceiver1450 to float to the ground potential ofexternal amp1422 andspeaker1424.
• It should be noted that providing isolated grounding is very useful since, in a typical audio and/or video distribution system, ground loops can cause audio hum or visual artifacts. By providing isolated grounding toreceivers1450 that are chained together in a daisy-chain, eachreceiver1450 can eliminate audio hum and/or visual artifacts.
• As noted, the present invention provides the system for each receiver in a chain to repeat data signals that are in Ethernet format. In accordance with the present invention, this is accomplished by wrapping the data (received fromtransmitter1405 or receiver1450) to anoutput driver1434. More specifically, the output data from transmitter1405 (or receiver1450) is transmitted to inputreceiver1430 and then todata loop buffer1432. The data is then sent tooutput driver1434.
• Note that this configuration requiresdata loop buffer1432 to account for the asynchronous nature of the recovered transmitter Ethernet clock and the receiver Ethernet clock. Also note that, using this configuration as shown inFIG. 14, a daisy-chained system can be implemented using the Ethernet topology. As known, Ethernet only follows either star topology or bus topology. This is very useful since, in the configuration ofFIG. 14, eachreceiver1450 can act as a repeater while following the Ethernet topology. As a result,receivers1450 can have a maximum distance of over several hundred feet between one another.
• While much of the description herein regarding the systems and methods of the present invention pertains to audio data, the systems and methods, in accordance with the present invention, are equally applicable to any other types of data, such as video data and generic data, including control data.
• Likewise, while much of the description herein regarding the systems and methods of the present invention pertains to a physical Ethernet serial data link, the systems and methods, in accordance with the present invention, are equally applicable to any other types of data links, including without limitation, optical, RF, and copper links.
• It will be appreciated by those skilled in the art that changes could be made to the embodiments described above without departing from the broad inventive, concept thereof. It is understood, therefore, that this invention is not limited to the particular embodiments disclosed, but is intended to cover modifications within the spirit and scope of the present invention as defined in the appended claims.

Claims (10)

1. A system for transmitting and distributing audio or video information, the system comprising:

a multi-channel input module; and

a plurality of receivers,

wherein the multi-channel input module and the plurality of receivers are arranged along at least one chain of serial data links,

wherein each receiver is configured to tap into a common set of digital channels generated by a transmitter, and

wherein each receiver creates its own user adjustable mix based only on one or more signals from the common set of digital channels.

2. The system ofclaim 1, wherein the signals include data signals that are in Ethernet format and are repeated along the receivers in a daisy-chained topology.

3. The system ofclaim 1, wherein each receiver includes a power supply with an isolated ground.

4. A method for transmitting and distributing audio or video information using a multi-channel input module and a plurality of receivers arranged along at least one chain of serial data links, the method comprising:

tapping into, at each receiver, a common set of digital channels generated by a transmitter; and

creating, at each receiver, a user adjustable mix based only on one or more signals from the common set of digital channels.

5. A system for transmitting and distributing audio or video information, comprising:

a multi-channel input module; and

a plurality of receivers,

wherein the multi-channel input module and the plurality of receivers are arranged in a daisy-chained topology using a plurality of serial data links,

wherein each receiver is configured to tap into a common set of digital channels generated by a transmitter, and

wherein each receiver is configured to create a user adjustable mix based only on one or more signals from the common set of digital channels.

6. The system ofclaim 5, wherein the signals include data signals that are in Ethernet format.

7. The system ofclaim 5, wherein each receiver includes a power supply with an isolated ground.

8. A system for transmitting, and distributing audio or video information, comprising:

a multi-channel input module; and

a plurality of receivers,

wherein the multi-channel input module and the plurality of receivers are arranged in a star topology using a plurality of serial data links,

wherein each receiver is configured to tap into a common set of digital channels generated by a transmitter, and

wherein each receiver is configured to create a user adjustable mix based only on one or more signals from the common set of digital channels.

9. The system ofclaim 8, wherein the signals include data signals that are in Ethernet format.

10. The system ofclaim 8, wherein each receiver includes a power supply with an isolated ground.

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