BACKGROUND OF THE INVENTION 1. Field of the Invention
The present invention relates to a capacitor structure, and more particularly, to a capacitor structure with high capacitance and high matching.
2. Description of the Prior Art
Capacitor, device for storing charges, is normally adopted in various ICs e.g. RFIC and analog circuit. Basically, a capacitor structure includes two parallel electrode plates and an insulator disposed in between the electrode plates. With reference toFIG. 1,FIG. 1 is a schematic diagram of a conventional flat plate capacitor structure. As shown inFIG. 1, theflat plate capacitor10 includes asubstrate12, afirst electrode plate14 disposed on thesubstrate12, a capacitordielectric layer16 disposed on thefirst electrode plate14, and asecond electrode plate18 disposed on the capacitordielectric layer16.
However, thefirst electrode plate14, the capacitordielectric layer16, and thesecond electrode plate18 are stacked up horizontally, and therefore the increase of overlapping region will result in reduction of integration.
U.S. Pat. No. 5,583,359 discloses an interdigitated capacitor structure. With reference toFIG. 2 andFIG. 3,FIG. 2 is an oblique schematic diagram of a conventional interdigitatedcapacitor structure30, andFIG. 3 is a cross-sectional view of the interdigitatedcapacitor structure30 along a tangent line III-III. As shown inFIG. 2 andFIG. 3, the interdigitatedcapacitor structure30 includes a first electrode structure and a second electrode structure. The first electrode structure includes a plurality of vertically stacked firstconductive patterns32, and the second electrode structure includes a plurality of secondconductive patterns34. Each firstconductive pattern32 has a first peripheralconductive bar321 and a plurality of firstconductive fingers322, and each secondconductive pattern34 has a second peripheralconductive bar341 and a plurality of secondconductive fingers342. The interdigitatedcapacitor structure30 further includes a capacitor dielectric layer38 (not shown inFIG. 2) disposed in between the firstconductive patterns32 and the secondconductive patterns34, a plurality offirst contact plugs40 disposed in the capacitordielectric layer38 between the first peripheralconductive bars321, and a plurality ofsecond contact plugs42 disposed in the capacitordielectric layer38 between the second peripheralconductive bars341.
As shown inFIG. 2, the firstconductive patterns32 are connected together with thefirst contact plugs40, and the secondconductive patterns34 are connected together with thesecond contact plugs42. Therefore, the firstconductive patterns32, the secondconductive patterns34, and the capacitordielectric layer38 constitute the conventional interdigitatedcapacitor structure30. As shown inFIG. 3, the firstconductive fingers322 are applied with positive voltage, while the secondconductive fingers342 are applied with negative voltage.
In comparison with the flat plate capacitor structure, the conventional interdigitated capacitor structure has higher capacitance. However, the conductive patterns are electrically connected to each other with the contact plugs disposed in the dielectric layer between the peripheral conductive bars, and therefore the capacitance can be improved.
SUMMARY OF THE INVENTION It is therefore one object of the claimed invention to provide a capacitor structure with high capacitance and matching.
According to the claimed invention, a capacitor structure is provided. The capacitor structure includes a first layer conductive pattern, a second layer conductive pattern disposed above the first layer conductive pattern, a dielectric layer sandwiched between the first layer conductive pattern and the second layer conductive pattern, and a plurality of contact plugs disposed in the dielectric layer for electrically connecting the first layer conductive pattern and the second layer conductive pattern. The first layer conductive pattern includes a first closed conductive ring, a plurality of first major conductive bars arranged in parallel and electrically connected to the first closed conductive ring, and a plurality of first minor conductive bars arranged alternately with the first major conductive bars and not electrically connected to the first closed conductive ring. The second layer conductive pattern includes a second closed conductive ring, a plurality of second major conductive bars arranged in parallel and electrically connected to the second closed conductive ring, and a plurality of second minor conductive bars arranged alternately with the second major conductive bars and not electrically connected to the second closed conductive ring. The first major conductive bars are electrically connected to the second minor conductive bars, and the second major conductive bars are electrically connected to the first minor conductive bars.
These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.
BRIEF DESCRIPTION OF THE DRAWINGSFIG. 1 is a schematic diagram of a conventional flat plate capacitor structure.
FIG. 2 is an oblique schematic diagram of a conventional interdigitated capacitor structure.
FIG. 3 is a cross-sectional view of the interdigitated capacitor structure along a tangent line III-III.
FIG. 4 schematically illustrates a layout pattern of a first layer conductive pattern.
FIG. 5 schematically illustrates a layout pattern of a second layer conductive pattern.
FIG. 6 is an oblique schematic diagram of a capacitor structure in accordance with a preferred embodiment.
FIG. 7 is a cross-sectional view of the capacitor structure shown inFIG. 6 along a tangent line VII-VII.
DETAILED DESCRIPTION Please reference toFIG. 4 andFIG. 5.FIG. 4 schematically illustrates a layout pattern of a first layerconductive pattern50, andFIG. 5 schematically illustrates a layout pattern of a second layerconductive pattern60 in accordance with a preferred embodiment of a capacitor structure. It is appreciated that the capacitor structure of the present invention is not limited to a two-layer structure, and can be a multi-layer structure. For a multi-layer structure, the layout pattern of a conductive pattern of an odd layer is identical to the first layerconductive pattern50, and the layout pattern of a conductive pattern of an even layer is identical to the second layerconductive pattern60. As shown inFIG. 4, the first layerconductive pattern50 includes a first closedconductive ring52, a plurality of first majorconductive bars54 arranged in parallel and electrically connected to the first closedconductive ring52, and a plurality of first minorconductive bars56 arranged alternately with the first majorconductive bars54 and not electrically connected to the first closedconductive ring52. As shown inFIG. 5, the second layerconductive pattern60 includes a second closedconductive ring62, a plurality of second majorconductive bars64 arranged in parallel and electrically connected to the second closedconductive ring62, and a plurality of second minorconductive bars66 arranged alternately with the second majorconductive bars64 and not electrically connected to the second closedconductive ring62.
The capacitor structure of the present invention is fabricated by stacking the first layerconductive pattern50 and the second layerconductive pattern60. The first closedconductive ring52, the first majorconductive bars54, and the first minorconductive bars56 are respectively corresponding to the second closedconductive ring62, the second minorconductive bars66, and the second majorconductive bars64. In addition, the capacitor structure further has a dielectric layer (not shown) sandwiched between the first layerconductive pattern50 and the second layerconductive pattern60, and a plurality ofcontact plugs70 formed in between the dielectric layer to electrically connect the first majorconductive bars54 and the second minorconductive bars66, and to connect the second majorconductive bars64 and the first minorconductive bars56 as well. Furthermore, each of the first layerconductive pattern50 and the second layerconductive pattern60 has an I/O port for external connections.
One of the main features of the capacitor structure of the present invention is that each of the closed conductive ring, the major conductive bar, and the minor conductive bar has a symmetric shape, so that the matching of the capacitor structure is improved. As shown inFIG. 4 andFIG. 5, the first closedconductive ring52 and the second closedconductive ring62 are rectangular, and the first majorconductive bar54, the first minorconductive bar56, the second majorconductive bar64, and the second minorconductive bar66 are stripped in this embodiment. However, the present invention is not limited by the above embodiment, and these components can be modified to any symmetric shapes wherever necessary.
Please refer toFIG. 6 andFIG. 7.FIG. 6 is an oblique schematic diagram of a capacitor structure in accordance with a preferred embodiment, andFIG. 7 is a cross-sectional view of the capacitor structure shown inFIG. 6 along a tangent line VII-VII. In this embodiment, a four-layer capacitor structure is illustrated. As shown inFIG. 6 andFIG. 7, the capacitor structure includes a plurality of stacked conductive patterns, where the pattern layouts of the conductive patterns of odd layers (i.e. the first layer and the third layer)80 are identical to the pattern layout of the first layer conductive pattern50 (shown inFIG. 4), and the pattern layouts of the conductive patterns of even layers (i.e. the second layer and the fourth layer)90 are identical to the pattern layout of the second layer conductive pattern60 (shown inFIG. 5). The capacitor structure has adielectric layer100 sandwiched between theconductive patterns80 and90, and a plurality of contact plugs disposed in thedielectric layer100 for connecting theconductive patterns80 and90. Thecontact plugs72 are used to electrically connect the major conductive bars of theconductive pattern80 to the minor conductive bars of theconductive pattern90, and thecontact plugs74 are used to electrically connect the major conductive bars of theconductive pattern90 to the minor conductive bars of theconductive pattern80. It is appreciated that thecontact plugs72 and74 are used to couple theconductive patterns80 and90. Thus the shape, size, and arrangement density of thecontact plugs72 and74 are not limited by the configuration illustrated inFIG. 6 andFIG. 7, and can be modified to obtain an optimal capacitance and matching. In addition, fabrication of the capacitor structure of the present invention can be integrated into the metal interconnection process. In such a case, the conductive pattern can be metal material e.g. aluminum or copper, but the conductive pattern can also be any conductive materials such as polycrystalline silicon. The material of the contact plugs can be tungsten, copper, aluminum, etc. The dielectric layer may be silicon oxide, silicon nitride, silicon oxynitride, or any single or composite dielectric materials.
The capacitor structure has good matching because of the symmetric layout. In addition, the capacitance of the capacitor is contributed by the vertical capacitance between the conductive patterns, the horizontal capacitance between the major conductive bars and the minor conductive bars of each conductive pattern, and the horizontal capacitance between the contact plugs, and therefore the unit capacitance of the capacitor structure can be improved.
Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.