BACKGROUND OF THE INVENTION The present invention relates generally to charge pumps, and more particularly to an improvement which provides substantially reduced output noise compared to prior charge pumps.
On-chip generation of an internal supply voltage at a value greater than the power supply voltage rail VCC has been one approach to providing rail-to-rail operation of an operational amplifier. However, generation of such an internal supply by means of a charge pump circuit has been problematic due to the large amount of output noise (at the charge-pump clock frequency) produced by known charge pumps.
A standard charge pump circuit is a two-phase circuit including two “flying capacitors” and one “reservoir capacitor” which operate to store and maintain the output voltage of the charge pump circuit.FIG. 1A shows a standardcharge pump circuit1, which includes an amplifyingcircuit2 having anoutput3 connected to a control terminal of a controlledcurrent source4. Controlledcurrent source4 produces a current10. The (−) input ofamplifier2 is connected to VCC. The (+) input ofamplifier2 is connected to the (−) terminal of avoltage source circuit11, the (+) terminal of which is connected to aconductor10 which conducts the output signal Vout produced by priorart charge pump1. The upper terminal of controlledcurrent source4 is connected to VCC, and its lower terminal is connected toconductor5. (It should be appreciated thatamplifier2 and controlledcurrent source4 can be implemented in various ways. For example,amplifier2 can be implemented by means of a single P-channel transistor having its gate and source connected to the (−) input and (+input), respectively ofamplifier2, and its drain connected to theoutput3 ofamplifier2. The implementation ofamplifier2 can be simple or moderately complex, depending on how accurate and/or fast it needs to be. Controlledcurrent source4 can be implemented by means of a single P-channel transistor having its source connected to VCC, its gate connected to theoutput3, and its drain connected toconductor5.Voltage source circuit11 can be implemented by means of one or more diode-connected transistors and associated circuitry to achieve a desired voltage drop.)
Charge pump circuit1 includes a first “flying” capacitor C1 having its upper plate connected byconductor8 to one terminal of aswitch9 that controllably connectsconductor8 to either VCC orVout conductor10. The lower plate of capacitor C1 is connected byconductor7 to one terminal of aswitch6 that controllably connectsconductor7 to either ground orconductor5 of controlledcurrent source4.Charge pump circuit1 also includes a second flying capacitor C2 having its upper plate connected byconductor17 to one terminal of aswitch20 that controllably connectsconductor17 to either VCC orVout conductor10. The lower plate of capacitor C2 is connected byconductor16 to one terminal of aswitch15 that controllably connectsconductor16 to either ground orconductor5 of controlledcurrent source4. The lower plates of capacitors C1 and C2 are connected byconductors7 and16 to parasitic capacitors C1p and C2p, respectively. A relatively large “reservoir” or “output” capacitor Cout is connected betweenVout conductor10 and VCC. Aload13 is connected betweenVout conductor10 and ground.
Each of the two flying capacitors has a recharge phase or “phase1” (PH1) for charging a flying capacitor to VCC, and also has a subsequent discharge phase or “phase2” (PH2) for discharging it throughVout conductor10 into reservoir capacitor Cout orload13. Discharge through controlledcurrent source4 is controlled to achieve regulation of Vout.
A drawback of prior art two-phasecharge pump circuit1 is that it has a fast, noise-producing transient process between its above mentioned first and second phases, during which the top plate of one of the flying capacitors is connected to reservoir capacitor Cout at the same time the voltage across the associated parasitic capacitor connected between the bottom plate of that flying capacitor and ground (i.e., the integrated circuit substrate) is still at0 volts. This causes partial charge redistribution from the reservoir capacitor to the parasitic capacitor thereby producing negative voltage spikes onVout conductor10 which constitute a large amount of undesirable noise in the output voltage signal, as illustrated with respect to subsequently describedFIG. 2.
Referring toFIG. 1A and the “Switches6 &9” and “Switches15 &20” waveforms ofFIG. 2,switches6 and9 are closed duringphase1 of flying capacitor C1 to charge it up to VCC, and alternately, preferably with a 50% duty cycle,switches15 and20 are closed to charge C2 up to VCC in such a manner as to effectively maintain Vout at its desired voltage level while supplying whatever current is needed by reservoir capacitor Cout andload13. The value of the desired regulated voltage level is established by the voltage drop acrossvoltage source circuit11. Thus, half of the time each flying capacitor is being recharged by being connected between VCC and ground while the other flying capacitor is being controllably discharged intoVout conductor10 to supply to reservoir capacitor Cout and load13 whatever amount of current is needed maintain a regulated Vout at its desired voltage. The roles of the two flying capacitors are reversed the other half of the time. Aswitch control circuit18 is coupled to control terminals ofswitches6,9,15 and20 to control their operation as described herein.
The configurations ofswitches6,9,15 and20 are illustrated inFIGS. 1A and 1B for the first half (“Interval1”) and the second half (“Interval of2”), respectively, of each cycle of operation ofcharge pump1. Specifically, inFIG. 1A, capacitor C1 is in its phase1 (PHI), withupper switch9 connected to VCC and switch6 connected to ground to recharge capacitor C1, and at the same time capacitor C2 is in its phase2 (PH2), withupper switch20 connected to Vout andlower switch15 connected tocurrent source conductor5 to cause capacitor C2 to be discharged intoVout conductor10. Similarly, inFIG. 1B capacitor C2 is in its phase1 (PH1), withupper switch20 connected to VCC and switch15 connected to ground to ground to recharge capacitor C2, and at the same time capacitor C1 is in its phase2 (PH2), withupper switch9 connected to Vout andlower switch6 connected tocurrent source conductor5 to cause capacitor C1 to be discharged intoVout conductor10.
Thus, as C1 is being recharged while it is connected between VCC and ground, capacitor C2, which has just been charged up to VCC volts, is being discharged intoVout conductor10 by being connected between the output of controlledcurrent source4 andVout conductor10. At the instant when capacitor C2 is connected betweenoutput conductor10 andconductor5, the connection to Vout causes the voltage oftop plate conductor17 of capacitor C2 to equal Vout, and the full charge voltage VCC across capacitor C2 causes the voltage ofbottom plate conductor16 to equal Vout−VCC. Then controlledcurrent source4 begins supplying current10 throughconductor5 tobottom plate conductor16, charging up parasitic capacitor C2p and increasing the voltage ofbottom plate conductor16. This also increases the voltage oftop plate conductor17 of capacitor C2 and causes capacitor C2 to discharge throughtop plate conductor17 intooutput conductor10. Thus, thetop plate conductor17 goes to Vout and thebottom plate conductor16 goes to Vout−VCC volts. As the current10 continues to be supplied tobottom plate conductor16 and increase its voltage,top plate conductor17 remains at Vout, causing capacitor Cout to discharge a current equal to10 intooutput conductor10. More specifically,amplifier2 together with controlledcurrent source4 form a feedback loop which keeps Vout constant (as much as the loop gain allows) and the amount of current10 is determined by the load current required byload13 and reservoir capacitor Cout plus some energy loss in the parasitic capacitive dividers.
Amplifier2 continues to controlcurrent source4 in response to Vout so as to properly regulate Vout, and at the same time,switch control circuit18 operates according to a suitable 50% duty cycle such that just before the voltage onbottom plate conductor16 reaches VCC or just before controlledcurrent source4 saturates,switch control circuit18 reverses the roles of flying capacitors C1 and C2 so a freshly recharged flying capacitor is available to supply the needed current tooutput conductor10.FIG. 1B shows the configuration ofswitches9A and6A and switches20A and15A duringInterval2 immediately after the roles of capacitors C1 and C2 have been reversed.
The connection of either one of the flying capacitors, for example capacitor C1, between Vout andconductor5 causes the above-mentioned noise on Voutconductor10. At the instant when capacitor C1 is connected betweenoutput conductor10 and controlledcurrent source conductor5, a capacitive divider circuit is formed which includes parasitic capacitor C1p parasitic and reservoir capacitor Cout. Therefore, some of the charge of reservoir capacitor Cout is redistributed to parasitic capacitance C1p, in accordance with the ratio between them and parasitic capacitance C1p “discharges” or partially discharges reservoir capacitor Cout. This causes a fast negative-going spike in Vout, which constitutes the noise above mentioned noise.Current source4 then operates to increase Vout from the bottom of that negative-going spike back up to its proper regulated level.
Such negative-going noise spikes occur every time the roles of flying capacitors C1 and C2 are reversed, i.e., the noise occurs at the clock frequency ofcharge pump1, as shown in the Vout waveform ofFIG. 2. The approximate typical amplitude of the negative noise spikes can be calculated from Vout-Vcc (which can be about 1.5-2.0 volts) and the ratio between reservoir capacitor Cout and the parasitic capacitance C1p or C2p. The reservoir capacitance Cout may be 3 to 5 times the capacitance of the flying capacitors, and the capacitance of a flying capacitor can be roughly 4 to 10 times the associated parasitic capacitance. This can typically result in negative noise spikes of roughly 70 millivolts.
Thus, there is an unmet need for an improved charge pump circuit having substantially reduced output noise.
SUMMARY OF THE INVENTION It is an object of the invention to provide an improved charge pump circuit having substantially reduced output noise.
It is another object of the invention to provide an improved charge pump without having to provide a large reservoir capacitor connected to the charge pump output conductor.
Briefly described, and in accordance with one embodiment, the present invention provides a low noise charge pump circuit that includes a first terminal (8) of a first flying capacitor (C1) selectively coupled to a first voltage (VCC) during a first recharging phase and a second terminal (7) of the first flying capacitor (C1) selectively coupled to a second voltage (GND) during the first recharging phase. The second terminal (7) of the first flying capacitor (C1) is coupled to a precharge control circuit (25,27) during a first parasitic capacitance precharging phase that occurs after the first recharging phase to cause the voltage of the first terminal (8) of the first flying capacitor (C1) to have a value that avoids noise lights on the output conductor due to charge redistribution when the first terminal (8) of the first flying capacitor (C1) is coupled to the output conductor (10). The first terminal (8) of the first flying capacitor (C1) is coupled to an output conductor (10) conducting the output voltage (Vout) during a first discharging phase that occurs after the first parasitic capacitance precharging phase. The second terminal (7) of the first flying capacitor (C1) is coupled to a discharge control circuit (2,4) which increases the voltage of the second terminal (7) of the first flying capacitor (C1) during the first discharging phase until the output voltage (Vout) is equal to a regulated value.
In a described embodiment, a three-phase charge pump circuit for producing a low noise output voltage (Vout) on an output conductor (10) includes a first flying capacitor (C1), a first amplifier circuit (2) having an output (3) coupled to control a first current source (4) to produce a first controlled current (10) in a first conductor (5) in response to the output voltage (Vout), a first input coupled to a first supply voltage (VCC), and a second input coupled to the output conductor (10). A second amplifier circuit (25) has an output (26) coupled to control a second current source (27) to produce a second controlled current (I3) in a second conductor (30) in response to a precharge voltage (Vprecharge), a first input coupled to the first supply voltage (VCC), and a second input coupled to receive the precharge voltage (Vprecharge). A first switching circuit (9A) selectively couples a first terminal (8) of the first flying capacitor (C1) to the first supply voltage (VCC) during a first recharging phase and to the output voltage (Vout) during a first discharging phase. A second switching circuit (6A) selectively couples a second terminal (7) of the first flying capacitor (C1) to a second supply voltage (GND) during the first recharging phase and to the first conductor (5) during the first discharging phase. The second switching circuit (6A) couples the second terminal (7) of the first flying capacitor (C1) to the second conductor (30) during a first parasitic capacitance precharging phase that occurs between the first recharging phase and the first discharging phase so as to cause the voltage of the first terminal (8) of the first flying capacitor (C1) to have a value that avoids noise spikes on the output conductor (10) due to charge redistribution when the first terminal (8) of the first flying capacitor (C1) is coupled to the output conductor (10). The three-phase charge pump circuit ofclaim1 may include a reservoir capacitor (Cout) coupled to the output conductor (10).
In the described embodiments, the three-phase charge pump circuit includes a second flying capacitor (C2), a third switching circuit (20A) for selectively coupling a first terminal (17) of the second flying capacitor (C2) to the first supply voltage (VCC) during a second recharging phase and to the output voltage (Vout) during a second discharging phase, a fourth switching circuit (15A) for selectively coupling a second terminal (16) of the second flying capacitor (C2) to the second supply voltage (GND) during the second recharging phase and to the first conductor (5) during the second discharging phase. A fourth switching circuit (20A) couples the second terminal (16) of the second flying capacitor (C2) to the second conductor (30) during a second parasitic capacitance precharging phase that occurs between the second recharging phase and the second discharging phase so as to cause the voltage of the first terminal (17) of the second flying capacitor (C2) to have a value that avoids noise spikes on the output conductor (10) due to charge redistribution when the first terminal (17) of the second flying capacitor (C2) is coupled to the output conductor (10). The three-phase charge pump also includes a third flying capacitor (C3), a fifth switching circuit (36) for selectively coupling a first terminal (34) of the third flying capacitor (C3) to the first supply voltage (VCC) during the third recharging phase and to the output voltage (Vout) during a third discharging phase, a sixth switching circuit (31) for selectively coupling a second terminal (33) of the third flying capacitor (C3) to the second supply voltage (GND) during the third recharging phase and to the first conductor (5) during the third discharging phase. The sixth switching circuit (31) couples the second terminal (33) of the third flying capacitor (C3) to the second conductor (30) during a third parasitic capacitance precharging phase that occurs between the third recharging phase and the third discharging phase so as to cause the voltage of the first terminal (34) of the third flying capacitor (C3) to have a value that avoids noise spikes on the output conductor (10) due to charge redistribution when the first terminal (34) of the third flying capacitor (C3) is coupled to the output conductor (10).
In one described embodiment, the first switching circuit (9A) couples the first terminal (8) of the first flying capacitor (C1) to a third conductor (40) conducting the precharge voltage (Vprecharge) during the first parasitic capacitance precharging phase. In another described embodiment, the first switching circuit (9A) couples the first terminal (8) of the first flying capacitor (C I) to an electrically floating conductor (40 ofFIG. 6) during the first parasitic capacitance precharging phase. The first amplifying circuit (2) includes a voltage source circuit (11) which determines a regulated value of the output voltage (Vout).
In the described embodiments, a first terminal (17) of a second flying capacitor (C2) is coupled to the output conductor (10) during a second discharging phase and a second terminal (16) of the second flying capacitor (C2) coupled to the discharge control circuit (2,4) to increase the voltage of the second terminal (17) of the second flying capacitor (C2) during the second discharging phase until the output voltage (Vout) is equal to the regulated value. A second terminal (33) of a third flying capacitor (C3) is coupled to a precharge control circuit (25,27) during a third parasitic capacitance precharging phase to cause the voltage of the first terminal (34) of the third flying capacitor (C3) to have a value that avoids noise spikes on the output conductor (10) due to charge redistribution when the first terminal (34) of the third flying capacitor (C3) is coupled to the output conductor (10). The first terminal (17) of the second flying capacitor (C2) is coupled to the first voltage (VCC) during a second recharging phase and the second terminal (16) of the second flying capacitor (C2) is selectively coupled to the second voltage (GND) during the second recharging phase. The first terminal (34) of the third flying capacitor (C3) is coupled to the output conductor (10) during the third discharging phase and the second terminal (33) of the third flying capacitor (C3) is coupled to the discharge control circuit (2,4) to increase the voltage of the second terminal (34) of the third flying capacitor (C3) during the third discharging phase until the output voltage (Vout) is equal to the regulated value. The second terminal (16) of the second flying capacitor (C2) is coupled to the precharge control circuit (25,27) during a second parasitic capacitance precharging phase to cause the voltage of the first terminal (17) of the second flying capacitor (C2) to have a value that avoids noise spikes on the output conductor (10) due to charge redistribution when the first terminal (17) of the second flying capacitor (C2) is coupled to the output conductor (10). The first terminal (34) of a third flying capacitor (C3) is selectively coupled to the first voltage (VCC) during a third recharging phase and the second terminal (33) of the third flying capacitor (C3) is coupled to the second voltage (GND) during the third recharging phase.
BRIEF DESCRIPTION OF THE DRAWINGSFIG. 1A is a schematic diagram of a prior art charge pump with its switches in a first configuration.
FIG. 1B is a diagram of the charge pump ofFIG. 1A with its switches in a second configuration.
FIG. 2 is a diagram including several waveforms useful in explaining the operation of the prior art charge pump ofFIG. 1A.
FIG. 3A is a schematic diagram of a charge pump of the present invention with a feed forward implementation of its precharging circuitry, with its switches in a first configuration.
FIG. 3B is a schematic diagram of the charge pump ofFIG. 3A with its switches in a second configuration.
FIG. 3C is a schematic diagram of the charge pump ofFIG. 3A with its switches in a third configuration.
FIG. 4 is a diagram including several waveforms useful in explaining the operation of the charge pump ofFIG. 3A so as to greatly reduce the amount of noise generated onVout conductor10.
FIG. 5 is a schematic diagram illustrating a simplified implementation ofamplifier2 and controlledcurrent source4 ofFIG. 3A.
FIG. 6 is a schematic of a charge pump of the present invention with a feed-forward implementation of its precharging circuitry.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The method and structure of the present invention are utilized to provide a very low noise charge pump circuit. This is accomplished by providing a three-phasecharge pump circuit100 shown inFIG. 3A having three flying capacitors, each having three phases of operation. An additional “phase3” (PH3) of operation of each flying capacitor and associated circuitry occurs between the previously described “phase1” (PH1) and “phase2” (PH2)operations of previously described priorart charge pump1 ofFIG. 1A.
FIG. 3A shows acharge pump circuit100, which includes an amplifyingcircuit2 having anoutput3 connected to a control terminal of a controlledcurrent source4. Controlledcurrent source4 produces a controlled current10, wherein the amount of controlled current10 is determined by load demand of reservoir capacitor Cout and load13 and also by the feedback loop being controlled through operation ofamplifier2. The (−) input ofamplifier2 is connected to VCC. The (+) input ofamplifier2 is connected to the (−) terminal of avoltage source circuit11, the (+) terminal of which is connected to aconductor10 which conducts the output signal Vout produced bycharge pump100. The upper terminal of controlledcurrent source4 is connected to VCC, and its lower terminal is connected toconductor5.Amplifier2 and controlledcurrent source4 can be implemented in various ways, from simple to moderately complex, depending on how accurate and/orfast amplifier2 needs to be. A simple implementation is shown inFIG. 7.
Charge pump circuit100 also includes anadditional amplifying circuit25 having anoutput26 connected to a control terminal of a controlledcurrent source27. Controlledcurrent source27 produces a current13. The (−) input ofamplifier25 is connected to VCC. The (+) input ofamplifier25 is connected to the (−) terminal of avoltage source circuit11A, the (+) terminal of which is connected to aconductor40 which conducts the precharge signal Vprecharge.
Charge pump circuit100 includes a first flying capacitor C1 having its upper plate connected byconductor8 to one terminal of aswitch9A that selectively connectsconductor8 to one of VCC,Vout conductor10, orVprecharge conductor40. The lower plate of flying capacitor C1 is connected byconductor7 to one terminal of aswitch6A that selectively connectsconductor7 to one of ground,conductor5 of controlledcurrent source4, orconductor30 of controlledcurrent source27.
Charge pump circuit100 also includes a second flying capacitor C2 having its upper plate connected byconductor17 to one terminal of aswitch20A that selectively connectsconductor17 to one of VCC,Vout conductor10, orVprecharge conductor40. The lower plate of flying capacitor C2 is connected by conductor16A to one terminal of aswitch15 that controllably connectsconductor16 to one of ground,conductor5 of controlledcurrent source4, orconductor30 of controlledcurrent source27.
Charge pump circuit100 also includes a third flying capacitor C3 having its upper plate connected byconductor34 to one terminal of aswitch36 that controllably connectsconductor34 to one of VCC,Vout conductor10, orVprecharge conductor40. The lower plate of flying capacitor C3 is connected byconductor33 to one terminal of aswitch31 that controllably connectsconductor33 to one of ground,conductor5 of controlledcurrent source4, orconductor30 of controlledcurrent source27.
It should be appreciated that during the recharge phasesPH1, when the upper plate and lower plate of the flying capacitor are coupled to VCC and ground, respectively, by the upper switches and lower switches, noise injection into the VCC and ground power supply rails can be reduced or minimized by providing current limiting devices between the VCC rail and the upper switch (e.g., switch9A) and/or between the GND rail and the lower switch (e.g., switch6A), because the power supply impedance is never as low as zero.FIG. 3A illustrates such current limitingdevices24 connected between the VCC supply rail and the VCC terminal of each ofupper switches9A,20A, and36, and also illustrates current limitingdevices23 connected between the GND supply rail and the GND terminal of each oflower switches6A,15A, and31. The current limitingdevices23 and24 can be low value resistors or controlled current sources.
The lower plates of flying capacitors C1, C2, and C3 are connected byconductors7,16 and33 to parasitic capacitors C1p, C2p, and C3p, respectively. A relatively large reservoir capacitor Cout can be connected betweenVout conductor10 and VCC. Aload13 is connected betweenVout conductor10 and ground.
It should be understood that in some cases3-phase charge pump100 can operate without a large reservoir capacitance Cout, because of the much smoother, noise-free nature of the output signal Vout being produced onconductor10.
Each of the three flying capacitors C1, C2, and a C3 has a charging “phase1” (PH1) for charging that particular flying capacitor to VCC, followed by a precharging “phase3” (PH3) and a subsequent discharge “phase2” (PH2) for discharging it throughVout conductor10 into reservoir capacitor Cout andload13. During theprecharging phase3, the bottom plate parasitic capacitor of the particular flying capacitor which has just been recharged up to VCC volts then is pre-charged so that the voltage on its top plate is equal to Vout immediately before it is directly connected to Vout.
This substantially eliminates the previously mentioned charge redistribution and the resulting negative-going noise spikes which occur at the output of theprior art2phase charge pump1 ofFIG. 1A. Discharge through controlledcurrent source4 is controlled as previously explained to achieve regulation of Vout. Discharge through controlledcurrent source27 is controlled similarly to achieve proper precharging of parasitic capacitors C1p, C2p, and C3p so as to greatly reduce output noise.
A suitableswitch control circuit18A is coupled to control terminals ofswitches6A,9A,15A,20A,31, and33 to control the operation of the switches in the manner described herein and as illustrated in FIGS.3A-C and in the waveforms ofFIG. 4.
The phase sequence for one full cycle (includingInterval1 followed byInterval2 followed by Interval3) for flying capacitor C1 is PH1-PH3-PH2 is illustrated for capacitor C1 in FIGS.3A-B. Similarly, the phase sequences for the same full cycle for the flying capacitors C2 and C3 are PH2-PH1-PH3 and PH3-PH2-PH1, respectively. These sequences of phases are illustrated for each of flying capacitors C1, C2 and C3 in FIGS.3A-C, and the waveforms ofFIG. 4.
Specifically, forcapacitor C1, switches6A and9A are connected to ground and VCC, respectively, as shown inFIG. 3A to providephase PH1, switches6A and9A are connected to prechargecurrent source conductor30 andVprecharge conductor40, respectively, as shown inFIG. 3B to provide phase PH3, and switches6A and9A are connected tocurrent source conductor5 andVout conductor10, respectively, as shown inFIG. 3C to provide phase PH2. The various arrowheads shown in FIGS.3A-C illustrate the paths of the current flow for each of the three phases PH1-3.
Similarly, for capacitor C2, switches15A and20A are connected tocurrent source conductor5 andVout conductor10, respectively, as shown inFIG. 3A to provide phase PH2, switches15A and20A are connected to ground and VCC, respectively, as shown inFIG. 3B to provide phase PH1, and switches15A and20A are connected to prechargecurrent source conductor30 andVprecharge conductor40, respectively, as shown inFIG. 3C to provide phase PH3.
Finally, for capacitor C3, switches31 and36 are connected to prechargecurrent source conductor30 andVprecharge conductor40, respectively, as shown inFIG. 3A to provide phase PH3, switches31 and36 are connected tocurrent source conductor5 andVout conductor10, respectively, as shown inFIG. 3B to provide phase PH2, and switches31 and36 are connected to ground and VCC, respectively, as shown inFIG. 3C to provide phase PH1.
In order to greatly reduce the noise generated by priorart charge pump1 ofFIG. 1A associated with the parasitic capacitances C1p and C2p as a result of the above described charge redistribution between the reservoir capacitor Cout and the above-mentioned parasitic capacitors, the third flying capacitor C3 and third phase PH3 are provided in the process of operating the flying capacitors C1, C2 and C3.
The third phase PH3 is dedicated to equalizing a top plate potential of each flying capacitor before it is actually connected to Vout and reservoir capacitor Cout. According to the present invention, the particular flying capacitor is not connected to Vout immediately after being precharged to VCC volts. Instead, the additional phase PH3 is provided during which the bottom plate parasitic capacitance of that particular flying capacitor is pre-charged such that the top plate of that particular flying capacitor is equal to Vout before being connected directly to Vout, in such a way as to avoid any appreciable charging or discharging of that flying capacitor. Then there is no redistribution of the charge of reservoir capacitor Cout when the upper plate of a flying capacitor is connected to it, because the charge which otherwise would be redistributed onto the parasitic bottom plate capacitance has already been placed on it by the operation ofamplifier25 andcurrent source27 throughconductor30 and switch6A,15A, or31 without any charging or discharging of the flying capacitor.
The Vout waveform ofFIG. 4 illustrates how the precharging process described above avoids the large negative-going noise signals produced by the prior art charge pumps.
The above described precharging of the parasitic capacitors as illustrated in FIGS.3A-C to eliminate the negative noise spikes of the prior art is accomplished by feedback whereinoperational amplifier27 is the same asoperational amplifier2, charging the bottom plate of C1, C2 or C3, depending on which of the three phases a particular flying capacitor is undergoing, and turnscurrent source27 off when Vprecharge is equal to Vout.
A “feed forward” approach to precharging the parasitic capacitances associated with the lower plates of the flying capacitors to cause the voltages of the upper plates of the flying capacitors to be essentially equal to Vout before directly connecting them to Vout is shown inFIG. 6. InFIG. 6, the (+) input ofoperational amplifier27 is connected by means ofconductor30 and one oflower switches6A,15A or31 to the bottom plate of one of the flying capacitors C1, C2 or C3 (rather than the top plate thereof as in the feedback implementation ofFIG. 3A) to receive a voltage Vprecharge from that bottom plate.Conductor40 is open-circuited, so that the upper plate of a flying capacitor electrically floats during the precharging phases. Vout is known, since it is established by circuit design parameters, and can be equal, to VCC plus, for example, 1 volt. The prechargecircuitry including amplifier25,voltage source11A, and controlledcurrent source27 inFIG. 6 operates to charge up the parasitic capacitance C1p, C2p, or C3p to 1 volt (or other suitable voltage), which causes the top plate of the corresponding flying capacitor to be at precisely VCC+1 volt immediately before the top plate is connected directly to Vout by means of one of the upper switches. The VCC+1 volt value is established byvoltage source11A. For this example, the 1 volt value is the value ofvoltage source11A and the VCC value is the voltage across the flying capacitor. Note that this feed forward technique does not require shunting of a minute amount of current from the top plate of the flying capacitor in order forvoltage source11A to function. This can be significant when maximum efficiency (approaching 90-95% efficiency) and minimum current loss in the charge pump is necessary in that every micrompere of shunted current can be accounted for.
The described embodiments of the three-phase charge pump of the present invention provide greatly reduced output noise compared to the two-phase charge pumps of the prior art. The improvement can reduce the output noise of 3-phase charge pump100 by 1.5 or 2 orders of magnitude, which is quite significant.
FIG. 5 illustrates a very simple implementation ofamplifier2 and controlledcurrent source4 ofFIG. 2A.Amplifier2 can be implemented by means of a single P-channel2A, with its source functioning as the (+) input of the amplifier and its gate functioning as the (−) input of the amplifier. The source oftransistor2A is connected byconductor12 to the gate and a drain of a P-channel diode-connectedtransistor11B, which functions asvoltage source11. The source of diode-connectedtransistor11B is connected toVout conductor10. The drain oftransistor2A is connected to theoutput3 ofamplifier2. Acurrent source22 is connected between the drain oftransistor2A and ground or the negative rail. Ordinarily, the current throughcurrent source22 should be as low as possible because it constitutes an additional load on the charge pump, but the current throughcurrent source22 must be sufficiently large to meet the speed requirements ofamplifier2. (The implementation ofamplifier2 can be simple or somewhat complex, depending on how accurate and/or fast it needs to be.) Controlledcurrent source4 also can be implemented by means of a single P-channel transistor4A having its source connected to VCC, its gate connected toconductor3, and its drain connected toconductor5.
While the invention has been described with reference to several particular embodiments thereof, those skilled in the art will be able to make various modifications to the described embodiments of the invention without departing from its true spirit and scope. It is intended that all elements or steps which are insubstantially different from those recited in the claims but perform substantially the same functions, respectively, in substantially the same way to achieve the same result as what is claimed are within the scope of the invention.