US20060213685A1 - Single or multi-layer printed circuit board with improved edge via design - Google Patents

Abstract

A circuit board includes an electrically conductive sheet having an insulative coating surrounding the conductive sheet, with a surface of the insulative coating around an edge of the conductive sheet having an arcuate or rounded shape. At least one electrical conductor is conformally deposited on at least the rounded insulative coating around the edge of the conductive sheet and defined via photolithographic and metallization techniques. Each electrical conductor on the insulative coating thereon around the edge of the conductive sheet conforms to the arcuate or rounded shape of the insulative coating and, therefore, has an arcuate or rounded shape.

Description

CROSS REFERENCE TO RELATED APPLICATION
• This application is a continuation-in-part of U.S. patent application Ser. No. 10/987,480, filed Nov. 11, 2004, which is incorporated herein by reference, which is a continuation-in-part of U.S. patent application Ser. No. 10/227,768, filed Aug. 26, 2002, now U.S. Pat. No. 6,844,504, which is incorporated herein by reference, which is a continuation-in-part of U.S. patent application Ser. No. 10/184,387, filed Jun. 27, 2002, now U.S. Pat. No. 6,951,707, which is incorporated herein by reference.
BACKGROUND OF THE INVENTION
• Presently, printed circuit boards are fabricated as part of a larger panel. Each printed circuit board can be configured in any shape, although most printed circuit boards in common use are made in rectangular shapes of standard sizes. When fabrication of a printed circuit board is complete, it is cut and separated from the larger panel, mostly by way of a machine cutting or routing process in which a channel is cut around the printed circuit board. In certain designs, the channel around the printed circuit board does not completely encircle the perimeter of the printed circuit board. Rather, tabs are left at several places around the perimeter of the printed circuit board to attach it to the larger panel until the board is singulated from the larger panel by breaking the tabs. Typically, metal planes in the printed circuit board do not extend to its edge where they would be cut by the routing process. In this way, no conductive metal is left exposed on the edges of the printed circuit board.
• The existing methods of cutting printed circuit boards from larger panels are unsatisfactory for high density boards because the limited dimensional stability of the printed circuit boards does not allow registration of one high density pattern to the next on the larger panel. Cut lines made around the periphery of the printed circuit board further weaken the panel material, exasperating misregistration of one pattern to the next.
• Electronic systems assembled onto conventional printed circuit boards rely upon thermal conduction from integrated circuits dissipating heat to the printed circuit board to remove some of the heat from the integrated circuits. For intermediate ranges of heat, up to about 2 watts per chip, conduction to the printed circuit board is sufficient to cool the integrated circuits without the need for bulky and expensive heat sinks. In high performance systems, however, as the density of the system and the percentage of the substrate covered by the integrated circuits increases, the thermal path to the printed circuit board is less efficient. At a point when the density of the system increases sufficiently, the printed circuit board is not effective as a heat sink for the integrated circuits. However, the need for effective thermal conduction from the integrated circuits to the substrate and therefrom to the ambient becomes more important as system density increases. Because of the evolution toward higher system density and larger integrated circuit coverage, means are needed for cooling the substrate in order to maintain the integrated circuits on the substrate at a safe operating temperature.
• In addition to thermal conduction, high performance systems increasingly require low impedance power and ground voltage supplies to run the integrated circuits at high clock speeds. Typically, the AC impedances of power and ground supplies are lowered by the use of low impedance bypass capacitors connected to the power and ground planes. On conventional printed circuit boards, capacitors are connected to power and ground planes through vias which extend through some thickness of the board, increasing the impedance of this contact and degrading performance of the system. As switching speeds increase, the problem of making low impedance connections between bypass capacitors and the power and ground planes becomes more important.
• It would, therefore, be desirable to overcome the above problems and others by providing a printed circuit board having one or more printed circuit board layers each of which has a conductive layer which extends to the edge thereof and which is substantially, but not completely, covered by an insulating material. The edge of the conductive layer not covered by the insulating material can be on the perimeter (or edge) of the printed circuit board layer or on the edge of a tab which is utilized to couple the board to a disposable part of a larger panel that the board is formed from during fabrication. The exposed edge of the conductive layer becomes exposed upon singulating the printed circuit board layer from each tab connected thereto or upon breaking the tab during singulation of the printed circuit board from the disposable part of the larger panel. In one embodiment, the broken end of one or more tabs terminate in a recess in the perimeter of the printed circuit board. In a second embodiment, the broken end of one or more tabs extend outward from the perimeter of the printed circuit board.
• The conductive plane can be formed from metal that can serve the dual purpose of conducting heat away from electrical components disposed on one or both surfaces of the printed circuit board or printed circuit board layer and for providing power or ground to the electrical components. The tab which extends outward from the edge of the second embodiment printed circuit board can be coupled to a mechanical fixture and/or an electrical fixture to provide a path for the flow of heat from the printed circuit board to externally coupled mechanical fixtures and/or to provide electrical power to the electrically conducting layer of the printed circuit board.
• Each printed circuit board layer can include one or more landless through-holes or vias extending all or part of the way therethrough. Each landless through-hole or via is desirably configured to facilitate the deposition of conductive material therein, the patterning and etching of said conductive material and the formation of the through-hole or via without a conductive land on each exposed end thereof.
SUMMARY OF THE INVENTION
• The invention is a circuit board that includes an electrically conductive sheet coated with an insulative coating that forms an insulating top layer covering one surface of the conductive sheet, an insulating bottom layer covering another surface of the conductive sheet and an insulating edge layer covering an edge of the conductive sheet, and a first electrical conductor on one of the top and bottom layers and on at least part of the insulating edge layer. The insulating edge layer and the portion of the first electrical conductor thereon each have an arcuate or rounded outline or shape. The portion of the first electrical conductor on the insulating edge layer is electrically isolated from the edge of the conductive sheet by the insulating edge layer.
• The first electrical conductor can also be on the other layer of the circuit board. The portions of the first electrical conductor on the top and bottom layers of the circuit board are electrically connected by the portion of the first electrical conductor on the insulating edge layer.
• The combination of the portion of the first electrical conductor and the insulating edge layer it overlays can be in a notch defined in the edge of the electrically conductive sheet.
• The circuit board can include a second electrical conductor on the top and bottom layers of the circuit board that are electrically connected by a portion of the second electrical conductor on the insulating edge layer which can be in the notch in electrical isolation from the portion of the first electrical conductor in the notch.
• The insulative coating can be initially electrodeposited and thereafter heated until it flows thereby forming the insulating edge layer having the arcuate or rounded shape.
• The circuit board can further include a copper layer disposed between the electrically conductive sheet and the insulative coating.
• The invention is also a method of forming a circuit board comprising: (a) providing an electrically conductive sheet having top and bottom surfaces and an edge desirably perpendicular thereto; (b) conformally coating the top and bottom surfaces and the edge of the electrically conductive sheet with an insulating material; (c) exposing the conformally coated insulating material to an elevated temperature such that the insulating material at least partially melts and flows around the edge of the electrically conductive sheet whereupon, upon removal of the elevated temperature, the insulating material around the edge of the electrically conductive sheet has an arcuate or rounded shape or outline; and (d) following step (c), forming a first conductor on the insulating material with at least a portion of the first conductor on the insulating material around the edge of the electrically conductive sheet, whereupon said portion of the first conductor has an arcuate or rounded shape or outline.
• The first conductor can also be formed on the insulating material overlaying at least one of the top and bottom surfaces of the electrically conductive sheet.
• The portion of the first conductor and the insulating material it overlays can be in a notch formed in a side of the electrically conductive sheet.
• Step (d) can include forming a second conductor on the insulating material with at least a portion of the second conductor overlaying the insulating material in the notch, whereupon the portion of the second conductor has an arcuate or rounded shape or outline. The portion of the second conductor in the notch can be electrically isolated from said portion of the first conductor in the notch.
• Step (b) can include electrodepositing the insulating material.
• The portion of the first conductor electrically connects other portions of the first conductor on the insulating material overlaying the top and bottom surfaces of the electrically conductive sheet.
• The invention is also a circuit board that comprises an electrically conductive sheet including an insulating edge layer covering an edge of the conductive sheet, and an electrical conductor on the insulating edge layer. The insulating edge layer and the electrical conductor thereon have an arcuate or rounded shape or outline.
• The circuit board can further include the electrical conductor on an insulating top layer overlaying a top surface of the electrically conductive sheet and/or the electrical conductor on an insulating bottom layer overlaying a bottom surface of the electrically conductive sheet.
• The combination of the electrical conductor and the insulating edge layer it overlays can be in a notch in the edge of the conductive sheet.
• The circuit board can further include another electrical conductor on the insulating edge layer in the notch, wherein the electrical conductors on the insulating edge layer in the notch are spaced from each other.
• The circuit board can further include another electrical conductor on the insulating edge layer outside the notch.
• Lastly, the invention is a circuit board that comprises an electrically conductive sheet; an insulative coating surrounding the conductive sheet with a surface of the insulative coating around an edge of the conductive sheet being rounded; and at least one electrical conductor defined on at least the rounded insulative coating around the edge of the conductive sheet via photolithographic and metallization techniques, wherein each electrical conductor on the rounded insulative coating around the edge of the conductive sheet has a rounded surface.
• The edge of the conductive sheet can define a notch therein where at least one electrical conductor formed on at least the rounded insulative coating resides. When two electrical conductors reside in the notch, the two electrical conductors can be electrically isolated from each other in the notch.
BRIEF DESCRIPTION OF THE DRAWINGS
• FIG. 1 is a cutaway perspective view of a printed circuit board layer having a perforate conductive plane surrounded by an insulating material in accordance with the present invention;
• FIG. 2 is a cutaway perspective view of a portion of a printed circuit board layer of the type shown inFIG. 1 including a circuit pattern formed on the outward facing surfaces thereof;
• FIGS. 3 and 4 are plan views of panels having different circuit board layers formed therefrom in accordance with the present invention;
• FIG. 5 is a plan view of the panels shown inFIGS. 3 and 4 laminated together with the circuit board layers thereof in registry;
• FIG. 6 is an isolated plan view of a tab which the panels inFIGS. 3 and 4 utilize to connect their circuit board layers to disposable parts of the panels;
• FIG. 7 is an isolated plan view of the tab shown inFIG. 6 after breaking in response to the application of a breaking force applied thereto;
• FIG. 8 is a view taken along lines VIII-VIII inFIG. 7;
• FIGS. 9 and 10 are plan views of panels including printed circuit board layers in accordance with the present invention;
• FIG. 11 is a plan view of the panels shown inFIGS. 9 and 10 laminated together with the circuit board layers thereof in registry;
• FIG. 12 is a plan view of the laminated printed circuit board layers shown inFIG. 11 singulated from the disposable parts of their respective panels;
• FIG. 13 is a section taken along lines XIII-XIII inFIG. 12;
• FIG. 14 is a plan view of the singulated laminated circuit board layers shown inFIG. 12 with certain tabs thereof coupled to a mounting fixture and with certain tabs thereof coupled to an electrical fixture;
• FIG. 15 is a cross sectional side view of the laminated printed circuit board layers ofFIG. 12 including an optional insulating interlayer disposed therebetween and with an exemplary conductor disposed through the insulating interlayer for electrically connecting circuit patterns on the respective printed circuit board layers;
• FIG. 16 is a plan view of an isolated section of a printed circuit board layer in accordance with the present invention including a landless through-hole (or via) having a single through-hole conductor therein;
• FIG. 17 is a section taken along lines XVII-XVII inFIG. 16;
• FIG. 18 is a plan view of a printed circuit board layer in accordance with the present invention including a landless through-hole (or via) having a plurality of through-hole conductors therein;
• FIG. 19 is a section taken along lines XIX-XIX inFIG. 18;
• FIG. 20 is a plan view of a printed circuit board layer in accordance with the present invention including a circuit pattern having conductive traces, each of which extends around an arcuate or rounded edge of the printed circuit board;
• FIG. 21 is a section taken along lines XXI-XXI inFIG. 20;
• FIG. 22 is a plan view of a printed circuit board layer in accordance with the present invention including a circuit pattern having a plurality of conductive traces around interiors of notches, having arcuate or rounded edges, formed in an edge of the printed circuit board;
• FIG. 20 is a cross-section of a printed circuit board layer in accordance with the present invention having multiple laminated conductive interior layers or sheets; and
• FIG. 21 is a cross-section of a printed circuit board layer in accordance with the invention having a laminated interior stack comprised of a first conductive layer or insulating layer, and a second conductive layer or sheet.
DETAILED DESCRIPTION OF THE INVENTION
• With reference toFIG. 1, a printedcircuit board layer2 includes an electrically conductive sheet orfoil4.Sheet4 can be formed from a copper foil, an iron-nickel alloy, or combinations thereof.Sheet4 can be a perforate sheet as shown inFIG. 1 or can be a solid sheet. It is desirable forsheet4 to have a coefficient of thermal expansion comparable to that of silicon materials from which integrated circuits are typically prepared in order to avoid failure of adhesion joints utilized to adhere the integrated circuit or a packaged integrated circuit (not shown) to printedcircuit board layer2. Describingsheet4 as perforate means thatsheet4 is a mesh sheet having a plurality of through-holes orvias6 spaced at regular intervals.
• An electricallyinsulative coating8 is formed aroundsheet4. Thiscoating8 can be formed aroundsheet4 in any manner known in the art, such as conformal coating. More specifically, coating8 forms an insulatingtop layer10 which covers atop surface12 ofsheet4, an insulatingbottom layer14 which covers abottom surface16 ofsheet4 and an insulatingedge layer18 which covers anedge20 ofsheet4. Whensheet4 is coated withcoating8, an interior surface of each through-hole or via6 is also coated withcoating8. Thus, no portion ofsheet4 is left uncovered bycoating8.
• With reference toFIG. 2 and with continuing reference toFIG. 1, printedcircuit board layer2 formed in the above-described manner can have a conductive pattern formed on the outward facing surface oftop layer10 and/or the outward facing surface ofbottom layer14 by conventional processes. Specifically, utilizing one or more photolithographic techniques and one or more metallization techniques, the conductive pattern can be formed on the outward facing surface oftop layer10 and/or the outward facing surface ofbottom layer14. This conductive pattern can include un-plated through-holes or vias6-1, plated, blind through-holes or vias6-2, and/or plated through-holes or vias6-3. Additional details regarding formation of printedcircuit board layer2 and for forming a conductive pattern, including one or more of the various types of through-holes orvias6, ontop layer10 and/orbottom layer14 can be found in U.S. Pat. No. 6,951,707, dated Oct. 4, 2005, entitled “Process For Creating Vias For Circuit Assemblies” which is assigned to the same Assignee as the present application and which is incorporated herein by reference.
• The preparation of one or more printedcircuit board layers2 in a panel form and the assembly of plural printed circuit board layers to form a multi-layer printed circuit board assembly will now be described.
• With reference toFIG. 3, one or more first printed circuit board (PCB) layers30 are fabricated as part of apanel32. Eachfirst PCB layer30 is surrounded by adisposable part34 ofpanel32. In accordance with the present invention, eachfirst PCB layer30 is coupled todisposable part34 ofpanel32 by one ormore tabs36.
• The general steps to preparepanel32 to the form shown inFIG. 3 will now be described. Initially, a first conductive sheet, likeconductive sheet4, of the size ofpanel32 is provided. This sheet can either be a solid sheet or a perforate sheet depending on the application. Next, cut lines orslots38 are formed in the conductive sheet by pattern etching or by a machine cutting or routing process to define the perimeter of eachfirst PCB layer30 ofpanel32. Theseslots38 are interrupted bytabs36 which hold eachfirst PCB layer30 todisposable part34 during processing.
• Next, an electrically insulative coating, likecoating8, is deposited on the conductivesheet forming panel32 in a manner whereupon the top surface, the bottom surface, and the edges of the electrically conductive sheet associated with eachfirst PCB layer30 that were exposed during the formation ofslots38 are covered thereby. If the conductive sheet is perforate, the electrically insulative coating also covers the interior surface of each through-hole or via. In addition, the top and bottom surfaces and the edges of eachtab36 defined during the formation ofslots38 can also be covered by the electrically insulative coating. The top and bottom surfaces and the edges ofdisposable part34 defined during formation ofslots38 can also be covered with the electrically insulative coating. However, this is not required. Typically, however, all of the edges, surfaces and, if vias are provided, the interior surface of each via of the conductive sheet ofpanel32 are covered by the electrically insulative coating.
• Next, photolithographic processing techniques and metallization techniques known in the art and described in the above-identified United States patent application incorporated herein by reference are utilized to define acircuit pattern40 on one or both of the exposed surfaces of the electrically insulative coating deposited on the portion of the electrically conductive sheet associated with eachfirst PCB layer30.
• If eachfirst PCB layer30 is ready for use aftercircuit pattern40 is formed thereon, eachfirst PCB layer30 can be singulated frompanel32 by applying a breaking force to eachtab36 connecting eachfirst PCB layer30 todisposable part34. However, if desired, one or more additional layers of electrically insulative coating (not shown) and circuit patterns (not shown) can be formed overcircuit pattern40, with the various layers of circuit patterns interconnected in a desired manner utilizing conventional processes. Thereafter, eachfirst PCB layer30 can be singulated frompanel32 by applying a breaking force to eachtab36 connecting eachfirst PCB layer30 todisposable part34. If the breaking force is applied to eachtab36 at the perimeter (or edge) offirst PCB layer30, i.e., at the boundary betweentab36 andfirst PCB layer30, a portion of the edge offirst PCB layer30 where said tab was connected becomes exposed. More specifically, separating eachtab36 fromfirst PCB layer30 at the perimeter thereof exposes a portion of the edge of the conductive sheet offirst PCB layer30 where saidtab36 was previously connected.
• Alternatively, eachfirst PCB layer30 ofpanel32 can be laminated to asecond PCB layer42 of apanel44 shown inFIG. 4.Panel44 includes one or more second PCB layers42 connected to adisposable part46 ofpanel44 bytabs48 defined during formation ofslots50 in the electrically conductive sheet ofpanel44 in the same manner described above in connection with the formation ofslots38 inpanel32.
• An electrically insulative coating is deposited on the conductivesheet forming panel44 in a manner whereupon the top surface, the bottom surface and the edges of electrically conductive sheet associated with eachsecond PCB layer42 that were exposed during the formation ofslots50 are covered thereby. If the conductive sheet is perforate, the electrically insulative coating also covers the interior surface of each through-hole or via. In addition, the top and bottom surfaces and the edges of eachtab48 defined during the formation ofslots50 can also be covered by the electrically insulative coating. The top and bottom surfaces and the edges ofdisposable part46 defined during formation ofslots50 can also be covered with the electrically insulative coating. However, this is not required. Typically, however, all of the edges, surfaces and, if vias are provided, the interior surface of each via of the conductive sheet ofpanel44 are covered by the electrically insulative coating.
• Eachsecond PCB layer42 has acircuit pattern52 formed on one or both of the exposed surfaces of the electrically insulative coating deposited on the portion of the electrically conductive sheet associated with eachsecond PCB layer42. If desired, eachsecond PCB layer42 can include one or more additional layers of electrically insulative coating and circuit patterns formed overcircuit pattern52, with the various layers of circuit patterns interconnected in the desired manner utilizing conventional processes.
• With reference toFIG. 5 and with ongoing reference toFIGS. 3 and 4,panels32 and44 can be laminated together in a manner known in the art, with eachfirst PCB layer30 positioned in registry with a correspondingsecond PCB layer42 to form amulti-layer PCB assembly60. Appropriate techniques known in the art can be utilized to form one or more electrical connections betweencircuit pattern40 andcircuit pattern52. For simplicity of description, the formation of these one or more electrical connections betweencircuit pattern40 andcircuit pattern52 will not be described herein.
• As shown best inFIG. 5,tabs36 ofpanel32 desirably do notoverlay tabs48 ofpanel44 whenpanels32 and44 are laminated together. In this manner, PCB layers30 and42 forming eachmulti-layer PCB assembly60 can be singulated from theirdisposable parts34 and46, respectively, independent of each other. If desired, however, one ormore tabs36 and48 can be in alignment with each other whenpanels32 and44 are laminated.
• Eachsecond PCB layer42 can be singulated frompanel44 by applying a breaking force to eachtab48 connecting eachsecond PCB layer42 todisposable part46. The breaking force applied to eachtab48 can be applied at the perimeter (or edge) of the correspondingsecond PCB layer42, i.e., at the boundary betweentab48 andsecond PCB layer42, thereby exposing a portion of the edge ofsecond PCB layer42 and, more particularly, a portion of the edge of the conductive sheet ofsecond PCB layer42 where saidtab48 was previously connected.
• With reference toFIGS. 6 and 7 and with continuing reference toFIGS. 3-5, alternatively, instead of breaking one ormore tabs36 and48 at the perimeter (or edge) of the correspondingfirst PCB layer30 andsecond PCB layer42, respectively, one or more oftabs36 and48 can be configured to break intermediate the ends thereof to facilitate singulation of the corresponding PCB layers30 and42 from the correspondingdisposable parts34 and46. If desired, the position where eachsuch tab36 and48 is configured to break can be received within a recess of the corresponding PCB layer whereupon, after breakage, no portion of the tab remaining attached to the PCB layer extends outside a perimeter of the PCB layer. Eachsuch tab36 and48 will now be described with respect to anexemplary tab36 ofpanel32. However, it is to be appreciated that eachtab48 ofpanel44 is similar to eachtab36 ofpanel32 and, therefore, the following description ofexemplary tab36 is applicable to eachtab48.
• As shown inFIG. 6,exemplary tab36 extends betweenfirst PCB layer30 anddisposable part34. To facilitate breaking,exemplary tab36 includes a narrowing62, also known as a Charpy notch, along its length. This narrowing62 enablesexemplary tab36 to break at a well-defined position whereuponexemplary tab36 separates into afirst part64 that remains attached tofirst PCB layer30 and asecond part66 that remains attached todisposable part34.
• The ends ofslots38 on opposite sides ofexemplary tab36 define arecess68 within aperimeter70 offirst PCB layer30. For purpose of the present description,perimeter70 offirst PCB layer30 includes theouter edge72 offirst PCB layer30 and theimaginary extension74 ofouter edges72 across eachrecess68. As shown, the narrowing62 of eachtab36 is withinperimeter70 offirst PCB layer30. Hence, whenexemplary tab36 separates intofirst part64 andsecond part66, adistal end76 of eachfirst part64 terminates withinrecess68.
• With reference toFIG. 8 and with continuing reference to all previous Figs., sincefirst PCB layer30 andexemplary tab36 include an electricallyconductive sheet78, likesheet4 inFIG. 1, coated with anelectrically insulative coating80, like coating8 inFIG. 1, breakingexemplary tab36 exposes asmall portion82 of the edge of electricallyconductive sheet78 and the surrounding electricallyinsulative coating80. Since only thedistal end76 offirst part64 ofexemplary tab36 includessmall portion82 of electricallyconductive sheet78 exposed, substantially all of the edge of electricallyconductive sheet78 is covered by electricallyinsulative coating80 and, more particularly, the insulating edge layer of electricallyinsulative coating80. Accordingly, inadvertent electrical contact with the edge of electricallyconductive sheet78 covered with the insulating edge layer of electricallyinsulative coating80 is avoided.
• The electrically conductive sheets offirst PCB layer30 andsecond PCB layer42 can be utilized to conduct heat away from electrical components disposed on one or both surfaces thereof. In addition, the electrically conductive sheets of PCB layers30 and42 of eachmulti-layer PCB assembly60 can be utilized to provide power and ground to electrical components disposed on the outward facing surfaces ofmulti-layer PCB assembly60. This is accomplished by connecting the power lead of each integrated circuit disposed onmulti-layer PCB assembly60 to the conductive sheet of onePCB layer30 and42 and connecting the ground lead of each integrated circuit to the conductive sheet of theother PCB layer30 and42. The conductive sheet of eachPCB layer30 and42 can then be connected to an appropriate one of a power terminal and a ground terminal of an external power supply via thesmall portion82 of the edge of the electrically conductive sheet exposed on thefirst part64 of one ormore tabs36 by suitable fixture means.
• With reference toFIG. 9, afirst PCB layer90 can be fabricated in the same manner asfirst PCB layer30 discussed above in connection withFIG. 3. One ormore tabs92 can extend outward from aperimeter94 offirst PCB layer90 and connect it to adisposable part96 of apanel98 that also includesfirst PCB layer90 andtab92. In a manner similar to PCB layers30 and42 andtabs36 and48, respectively,first PCB layer90 andtabs92 can be formed from an electrically conductive sheet having its top and bottom surfaces and edges coated with an electrically insulative coating. However, the electrically insulative coating can be omitted from one ormore tabs92 or can be removed from one ormore tabs92 after deposit. One or more oftabs92 can each include a mountinghole100 that can be utilized tocouple tab92 to mounting hardware or external electrical circuitry, such as a power supply.
• Acircuit pattern101 can be formed on one or both exposed surfaces offirst PCB layer90 utilizing photolithographic processing techniques and metallization techniques known in the art. Oncefirst PCB layer90 hascircuit pattern101 formed on one or both exposed surfaces thereof,first PCB layer90 and eachtab92 can be singulated frompanel98, especiallydisposable part96, and utilized as is. If desired, however, one or more additional layers of electrically insulative coating and circuit patterns can be formed overcircuit pattern101, with the various layers of circuit patterns interconnected in a desired manner utilizing conventional processes. Thereafter,first PCB layer90 and eachtab92 can be singulated frompanel98.
• With reference toFIGS. 10 and 11, if desired,panel98 can be laminated to apanel106 in a manner known in the art withfirst PCB layer90 laminated in registry with asecond PCB layer102 ofpanel106 to form amulti-layer PCB assembly104, shown best inFIGS. 11-13.Second PCB layer102 is part ofpanel106 that includestabs108 anddisposable part110. One ormore tabs108 can each include a mountinghole112 that can be utilized tocouple tab108 to appropriate mechanical hardware or electrical circuitry. In a manner similar to PCB layers30 and42 andtabs36 and48, respectively,second PCB layer102 andtabs108 can be formed from an electrically conductive sheet coated with an electrically insulative coating. However, the electrically insulative coating can be omitted from eachtab108 or can be removed from eachtab108 after deposit.
• Acircuit pattern114 can be formed on one or both surfaces ofsecond PCB layer102 utilizing photolithographic processing techniques and metalization techniques known in the art. Appropriate techniques known in the art can be utilized to form one or more electrical connections betweencircuit pattern101 andcircuit pattern114.
• With reference toFIG. 12 and with continuing reference toFIG. 11, next, a breaking force can be applied to eachtab92 and108 to singulate first and second PCB layers90 and102 and, hence,multi-layer PCB assembly104, fromdisposable parts96 and110. To facilitate the application of a breaking force to eachtab92 and108,tabs92 and108 can be positioned on first and second PCB layers90 and102 so that they do not overlay each other. As shown, all of eachtab92 and all of eachtab108 remains with first and second PCB layers90 and102, respectively. To this end, a breaking force applied to eachtab92 and eachtab108 causes it to break fromdisposable part96 and110, respectively. To enable eachtab92 and108 to break cleanly fromdisposable parts96 and110, a break or score line can be formed at the boundary of eachtab92 and108 and eachdisposable part96 and110 to weaken the mechanical connection therebetween. A suitable breaking force can be applied to eachtab92 and108 by a mechanical press having a ram with a suitably shaped tip for causing the breaking force to be applied to the tab, especially the score line.
• Alternatively, a breaking force can be applied to eachtab92 and108 at the perimeter (or edge) of first and second PCB layers90 and102, respectively, i.e., at the boundary between eachtab92 and108 and first and second PCB layers90 and102. Upon applying such breaking force, portions of the edges of first and second PCB layers90 and102 wheretabs92 and108, respectively, were connected become exposed. More specifically, separating eachtab92 and108 from first and second PCB layers90 and102, respectively, at the perimeters thereof exposes portions of the edges of the conductive sheets of first and second PCB layers90 and102 where saidtabs92 and108 were previously connected.
• With reference toFIG. 13, and with continuing reference toFIGS. 11 and 12, assuming that the breaking force applied to eachtab92 and eachtab108 causes it to break fromdisposable parts96 and110, respectively, at a suitable time one or moreelectrical components120, such as, without limitation, a packaged integrated circuit, an unpackaged flip-chip integrated circuit, a resistor, a capacitor and/or an inductor, can be coupled to appropriate points ofcircuit pattern101 and/orcircuit pattern114 ofmulti-layer PCB assembly104 in a manner known in the art. Moreover, as shown inFIG. 14, one ormore tabs92 and/or108 can be coupled to a mountingfixture122 or an electrical fixture, such as apower supply124. Since eachtab92 is part of an electricallyconductive sheet130 associated withfirst PCB layer90, and since eachtab108 is part of an electricallyconductive sheet132 associated withsecond PCB layer102, connecting one ormore tabs92 to one terminal ofpower supply124 and connecting one ormore tabs108 to the other terminal ofpower supply124 biases electricallyconductive sheets130 and132 accordingly. The provisioning of electrical power to electricallyconductive sheets130 and132 in this manner simplifies the provisioning of electrical power to each electrical component, e.g.,electrical component120, coupled to one or both outward facing surfaces ofmulti-layer PCB assembly104.
• In addition, other electrical components, such as one ormore capacitors134, can be connected between adjacent pairs oftabs92 and108. The inclusion of one ormore capacitors134 between adjacent pairs oftabs92 and108 reduces the need to install filter capacitors on one or both of the outward facing surfaces ofmulti-layer PCB assembly104 to provide electrical filtering for electrical components disposed thereon.
• Like the distal end ofexemplary tab36, thedistal end136 of eachtab92 and thedistal end137 of eachtab108 includes an exposed edge of electricallyconductive sheet130 and132, respectively. In addition, all or part of the top surface and/or bottom surface of the electricallyconductive sheets130 and132 associated with adjacent pairs oftabs92 and108, respectively, can be exposed in order to facilitate the connection of electronic components, such ascapacitors134, therebetween.
• Multi-layer PCB assembly104 includes one surface of the electrically insulative coating offirst PCB layer90 laminated directly to one surface of the electrically insulative coating ofsecond PCB layer102 as shown inFIG. 13. If desired, however, an insulatinginterlayer140 can be provided between first and second PCB layers90 and102 as shown inFIG. 15. Specifically, one surface offirst PCB layer90 can be laminated to one surface of insulatinginterlayer140 while the other surface of insulatinginterlayer140 can be laminated to one surface ofsecond PCB layer102.
• One ormore conductors142, such as small conductive posts, can protrude through insulatinginterlayer140 for connecting one or more points ofcircuit pattern101 onfirst PCB layer90 to one or more points ofcircuit pattern114 onsecond PCB layer102. Since conductors, such asconductor142, are known in the art, details regarding the use of such conductors will not be described herein.
• While the use of insulatinginterlayer140 has been described in connection with first and second PCB layers90 and102, it is to be appreciated that an insulating interlayer, like insulatinginterlayer140, can also be utilized withmulti-layer PCB assembly60, shown inFIG. 5, in the same manner that insulatinginterlayer140 is used withmulti-layer PCB assembly104, shown inFIG. 15. Specifically, one surface of each instance offirst PCB layer30 can be laminated to a surface of an insulating interlayer, like insulatinginterlayer140, while the other surface of the insulating interlayer can be laminated to one surface of an instance ofsecond PCB layer42 to form an embodiment ofmulti-layer PCB assembly60 that includes the insulating interlayer between first and second PCB layers30 and42.
• InFIGS. 3-5 and9-12, eachPCB layer30,42,90 and102 is illustrated as including one or more conventional plated through-holes (or vias) therethrough. Each such conventional plated through-hole (or via) includes a so-called “land” L therearound on each end thereof that terminates on an exposed surface of the printed circuit board layer (see, e.g.,FIG. 2). The use of land L around each end of a plated through-hole (or via) that terminates on an exposed surface of a printed circuit board layer enables the conductive material in the via to be electrically connected to a conductor, e.g., a conductive trace or line, on the surface of the printed circuit board in a manner known in the art. One problem with the use of land L around each end of a plated through-hole or via that terminates on an exposed surface of a printed circuit board layer is that the additional conductive material utilized to form land L provides increased opportunities for forming electrical shorts with adjacent conductive lines or lands L during installation of electrical components on the printed circuit board layer. Moreover, the use of lands L decrease the available density of conductor lines and lands on the printed circuit board layer. More specifically, printed circuit board layers are manufactured in accordance with rules regarding minimum spacing between edges of adjacent conductors, such as lands L and conductive lines. Accordingly, eliminating the land L around each exposed end of a through-hole or via would enable an adjacent structure, such as an adjacent land L or an adjacent conductive line, to be moved closer to the landless through-hole or via without violating the minimum spacing rule. Accordingly, it would be desirable to eliminate the use of a land L around each exposed end of a through-hole or via.
• With reference back toFIG. 1, a method of forming printedcircuit board layer2 with a landless through-hole or via will now be described. As described above in connection withFIG. 1, printedcircuit board layer2 includes an electrically conductive sheet orfoil4 that is formed from a copper foil, an iron-nickel alloy, or combinations thereof. In one desirable embodiment, electricallyconductive sheet4 is formed of Invar.Sheet4 can have one or more through-holes orvias6 that extend throughsheet4.
• With reference toFIGS. 16 and 17 and with continuing reference toFIG. 1,sheet4, including each through-hole6 therein, is optionally conformally coated with acopper layer144. Desirably,copper layer144 is electrodeposited onsheet4. However, this is not to be construed as limiting the invention.
• The use ofcopper layer144 is particularly advantageous whensheet4 is formed from a material other than copper in order to avoid mismatches between the thermal coefficient of expansion of thematerial forming sheet4 and the thermal coefficient of expansion of materials deposited overcopper layer144 or electrical components mounted to printedcircuit board layer2.
• Next,sheet4 orcopper layer144, if present, is conformally coated with an insulative material to formcoating8. Desirably, the insulativematerial forming coating8 is initially electrodeposited onsheet4 orcopper layer144, if present. Electrodepositing this insulative material produces a substantially uniform layer that conforms to the surfaces and edges ofsheet4 orcopper layer144, if present. It has been observed that this substantially uniform layer of electrodeposited insulative material, however, has a relatively rough surface that is not desirable for forming a circuit pattern, e.g.,circuit pattern146, thereon. Accordingly, after the insulative material has been electrodeposited,PCB layer2 is heated to an elevated temperature sufficient to cause the insulative material to wholly or partially melt. Upon melting, the insulative material deposited on the opposing surfaces ofsheet4 orcopper layer144, if present, flows and levels thereby becoming sufficiently flat so that when cooled provides a suitably smooth and uniform surface for formingcircuit pattern146 thereon. Melting the insulative material also enables it to flow around the edges of each through-hole6. More specifically, melting the insulative material causes the shape of the insulative material in each through-hole6 to change from its conformally coated shape shown in phantom inFIG. 17 to the shape shown in cross section inFIG. 17. When cooled back to a solid, the insulative material inside each through-hole6 retains the shape substantially as shown in cross section inFIG. 17.
• Upon cooling, the insulative material forms coating8.Coating8 includes insulatingtop layer10, which coverstop surface12 ofsheet4 ortop surface148 ofcopper layer144, if present, insulatingbottom layer14, which covers abottom surface16 ofsheet4 or abottom surface150 ofcopper layer144, if present, an insulating edge layer18 (shown best inFIG. 1), which covers anedge20 ofsheet4, and, for each through-hole6, an insulating through-hole layer152 which covers aninterior surface154 ofsheet4 or aninterior surface156 ofcopper layer144, if present.
• As can be seen, oncecoating8, especially insulating through-hole layer152, is formed, the surface of insulating through-hole layer152 converges from a position adjacenttop layer10 to a position intermediatetop layer10 andbottom layer14, and diverges from the position intermediatetop layer10 andbottom layer14 to a position adjacentbottom layer14.
• As shown in the cross section of through-hole6 inFIG. 17, one side of insulating through-hole layer152, has an arcuate outline. Moreover, as shown in the cross section of through-hole6 inFIG. 17, opposing sides of insulating through-hole layer152 have an outline generally in the shape of a hyperbola.
• Oncecoating8 is formed, a layer of copper is formed, e.g., electrodeposited, oncoating8, i.e., ontop layer10,bottom layer14, insulatingedge layer18, and each insulating through-hole layer152. Because each insulating through-hole layer152 has the form shown inFIG. 17, the electrodeposited copper oncoating8 conforms to the arcuate surface of insulating through-hole layer152. In other words, the copper electrodeposited oncoating8 conformally coats coating8, especially the arcuate surface of insulating through-hole layer152.
• Next, the copper electrodeposited oncoating8 can be patterned and etched in a manner known in the art to definecircuit pattern146 thereon.Exemplary circuit pattern146 includes conductive traces158-164 ontop layer10,conductive traces166 and168 onbottom layer14 and one or more through-hole conductors170 on the surface of each insulating through-hole layer152. As shown inFIG. 17, through-hole conductor170 has a substantially uniformed thickness.
• Opposing sides of the interior surface of through-hole conductor170 have a minimum diameter D1. The arcuate surface of insulating through-hole layer152 enables electrical connection to be established between through-hole conductor170 andconductive traces160,162,166 and168 without the need for a land L, shown in phantom inFIG. 16.
• With reference toFIGS. 18 and 19 and with continuing reference toFIGS. 1, 16 and17, if desired, instead of through-hole6 including a single through-hole conductor170, through-hole6 can include a plurality of electrically isolated through-hole conductors170-1,170-2, etc., formed on insulating through-hole layer152. Each through-hole conductor170-1,170-2, etc., can be utilized to electrically connect a conductive trace defined ontop layer10 to a conductive trace defined onbottom layer14. For example, through-hole conductor170-1 can be utilized to electrically connectconductive trace160 andconductive trace166 disposed ontop layer10 andbottom layer14, respectively, ofcoating8. Similarly, through-hole conductor170-2 can be utilized to electrically connectconductive trace162 andconductive trace168 disposed ontop layer10 andbottom layer14, respectively, ofcoating8.
• The ability to form a plurality of electrically isolated through-hole conductors170 on insulating through-hole layer152 is facilitated by the arcuate shape of insulating through-hole layer152 and, thereby, the arcuate shape of the copper electrodeposited on insulating through-hole layer152. More specifically, the arcuate shape of the copper electrodeposited on insulating through-hole layer152 enables photoresist to be deposited thereon and then patterned and etched in a manner known in the art. Thereafter, unhardened photoresist and the copper underlying said unhardened photoresist can be removed by means known in the art, such as chemical etching, to define the plurality of through-hole conductors170-1,170-2, etc., in through-hole6. Thereafter, hardened photoresist can be removed by means known in the art.
• As shown best inFIG. 18, removing portions of the copper deposited on insulating through-hole layer152 to define the plurality of through-hole conductors170 in through-hole6 results in through-hole6 having a minimum diameter D1 between the surfaces of opposing through-hole conductors170. In contrast, opposing surfaces of insulating through-hole layer152 where the electrodeposited copper has been removed will have a second diameter D2 that is larger than diameter D1.
• The photoresist utilized to define the plurality of through-hole conductors170 in through-hole6 is desirably an electrodeposited photoresist that conformally coats the copper electrodeposited on insulating through-hole layer152 of through-hole6. Suitable exemplary electro-depositable photoresists are disclosed in U.S. Pat. No. 6,560,053 to Kahle, II et al.; U.S. Pat. No. 5,733,479 to Kahle, II et al.; U.S. Pat. No. 5,721,088 to Martin et al.; and U.S. Pat. No. 6,100,008 to McMurdie, which are incorporated herein by reference.
• The combination of the electrodeposited photoresist on the arcuate surface of the copper electrodeposited on insulating through-hole layer152 of through-hole6 facilitates exposure of the photoresist to a suitable curing radiation in order to define the plurality of electrically isolated through-hole conductors170 on insulating through-hole layer152. In contrast, the vertical surface of a prior art through-holes limit or prevent uniform exposure of the photoresist in the through-hole to curing radiation, especially exposure to collimated light that may be utilized to define one or more conductive traces, or any other portion of a circuit pattern, ontop layer10 andbottom layer14 ofcoating8.
• A method of forming printedcircuit board layer2 with an edge contact or edge via will now be described with reference toFIGS. 20 and 21 and with reference back toFIGS. 1 and 16-19. As discussed above, edge20 ofsheet4 can be optionally conformally coated withcopper layer144, which can also be utilized to optionally conformally coat each through-hole6 insheet4 in the manner discussed above in connection withFIGS. 16-19. For the purpose of describing the present invention, it will be assumed thatcopper layer144 is utilized toconformally coat edge20 ofsheet4 and each through-hole or via6 ofsheet4. However, this is not to be construed as limiting the invention.
• Next, edge20 ofsheet4 or the portion ofcopper layer144, if present, coveringedge20 ofsheet4 is conformally coated with the insulative material utilized to formcoating8 defining insulatingtop layer10, insulatingbottom layer14 and insulatingedge layer18, the latter of which coversedge20 ofsheet4 or the portion ofcopper layer144, if present, overlayingedge20 ofsheet4. Desirably, the insulativematerial forming coating8 is initially electrodeposited onsheet4 orcopper layer144, if present, to form a substantially uniform layer ofcoating8 that conforms to the surfaces and edges ofsheet4 orcopper layer144, if present.
• After the insulative material utilized to formcoating8 has been electrodeposited, printedcircuit board layer2 is heated to an elevated temperature sufficient to cause the insulative material to wholly or partially melt. Upon melting, the insulative material deposited on the opposing surfaces ofsheet4 orcopper layer144, if present, flows and levels thereby becoming sufficiently flat so that, when cooled, provides a suitably smooth and uniform surface for forming a circuit pattern thereon. Melting the insulative material also enables it to flow around the edges of each through-hole via6 and aroundedge20 ofsheet4 or the portion ofcopper layer144, if present, overlayingedge20 ofsheet4. More specifically, melting the insulative material causes the shape of insulatingedge layer18 to change from its conformally coated shape shown in phantom inFIG. 21 to the arcuate or rounded outline or shape shown in cross section inFIG. 21. When cooled back to a solid, the insulative material forming insulatingedge layer18 assumes the shape substantially as shown in cross section inFIG. 21.
• Oncecoating8 is formed, a layer of copper is formed (e.g., electrodeposited, electroplated, seed electroplated, metal vapor deposited, sputtered or any other suitable and/or desirable method of providing a uniform layer of copper) oncoating8, i.e., on one or more oftop layer10,bottom layer14, insulatingedge layer18 and/or in each insulating through-hole layer152. Because insulatingedge layer18 has the form shown in cross section inFIG. 21, the copper electrodeposited oncoating8 conforms to the arcuate or rounded surface of insulatingedge layer18.
• Next, the copper electrodeposited oncoating8 can be patterned and etched in a manner known in the art to define acircuit pattern200 thereon.Exemplary circuit pattern200 includes conductive traces202-204 ontop layer10,bottom layer14 and insulatingedge layer18. However,circuit pattern200 is not to be construed as limiting the invention since it is envisioned that the conductive traces ofcircuit pattern200 can be disposed on any combination oftop layer10,bottom layer14 and/or insulatingedge layer18. When deposited on insulatingedge layer18, a conductive trace of circuit pattern can extend betweentop layer10 andbottom layer14, as shown inFIGS. 20 and 21, or laterally thereto along all or part of the circumference of insulatingedge layer18.
• The ability to form conductive traces202-206 around insulatingedge layer18 is facilitated by the arcuate shape of insulatingedge layer18 and, thereby, the arcuate shape of the copper electrodeposited on insulatingedge layer18. More specifically, the arcuate shape of the copper electrodeposited on insulatingedge layer18 enables photoresist to be deposited thereon and then patterned and etched in a manner known in the art. Thereafter, unhardened photoresist and the copper underlying said unhardened photoresist can be removed by means known in the art, such as chemical etching, to define conductive traces202-206 ontop surface10,bottom surface18 and insulatingedge layer18 ofcoating8.
• Photoresist that can be utilized to define conductive traces202-206 is desirably an electro-depositable photoresist of the type disclosed in U.S. Pat. No. 6,560,053 to Kahle, II, et al.; U.S. Pat. No. 5,733,479 to Kahle, II, et al.; U.S. Pat. No. 5,721,088 to Martin et al.; or U.S. Pat. No. 6,100,008 to McMurdie, which are incorporated herein by reference.
• The combination of the electrodeposited photoresist on the arcuate or rounded surface of the copper electrodeposited on insulatingedge layer18 facilitates exposure of said photoresist to a suitable curing radiation in order to define the portions of conductive traces204-206 on insulatingedge layer18. In contrast, the vertical surface of the edge of a prior art printed circuit board limits or prevents uniform exposure of photoresist on said vertical surface to curing radiation, especially exposure to collimated light that may be utilized to define conductive traces202-204, or any other portion ofcircuit pattern200, ontop layer10 and/orbottom layer14 ofcoating8.
• The illustration ofFIGS. 20 and 21 of conductive traces residing on top andbottom layers10 and14 ofcoating8 is not to be construed as limiting the invention since it is envisioned that each conductive trace can reside on only one oftop layer10 andbottom layer14 ofcoating8, with or without a portion of each conductive trace extending about all or part of insulatingedge layer18.
• If desired, the portion or the portions of one or more of conductive traces204-206 covering insulatingedge layer18 can be connected to another conductor of the same or another printedcircuit board layer2 by any suitable and/or desirable conductive means. The other conductor can be, for example, a connection to a power supply, a conductive trace on another printed circuit board, and the like.
• With reference toFIG. 22 and with continuing reference toFIGS. 1, 20 and21, also or alternatively,exemplary circuit pattern200 can include conductive traces208-214 formed ontop layer10 and/orbottom layer14 ofcoating8. In addition, each conductive trace208-214 can include a portion thereof received in a notch or half via216-220 formed inedge20 ofsheet4. More specifically, the insulatingedge layer18 ofcoating8 can be disposed in each notch216-220 in the manner discussed above for the embodiments of via6 disclosed in connection withFIGS. 16-19.
• As shown, the portion ofconductive traces208 and214 can be formed in all or part of the corresponding insulatingedge layer18 inside notches216 and220, respectively, in the manner disclosed above for through-hole conductor170 inFIGS. 16 and 17. Also or alternatively, the portions of conductive traces210 and212 on the insulatingedge layer18 inside notch218 are deposited in the manner disclosed above for through-hole conductors170-1 and170-2 inFIGS. 18 and 19.
• Essentially, in the embodiment shown inFIG. 22, notches216 and220 are similar to one half of via6 shown inFIG. 17 while notch218 is similar to one half of via6 shown inFIG. 19 with the exception that conductive traces210 and212 are positioned adjacent each other within notch218 whereas through-hole conductors170-1!170-2 of throughhole6 inFIG. 19 are in opposition.
• With reference toFIG. 23, heretofore, each instance ofsheet4 was described as being a single sheet or layer. However, this is not to be construed as limiting the invention since, as shown inFIG. 23,sheet4 can be multi-layer comprised of a first sheet or layer4-1 laminated to a second sheet or layer4-2. Each sheet or layer4-1 and4-2 can be made from any suitable and/or desirable material such as a copper foil, an iron-nickel alloy, or combinations thereof. Moreover, as shown inFIG. 24,sheet4 can be comprised of a laminated stack comprised of first sheet or layer4-1, an insulatinglayer230, and second sheet or layer4-2. The illustration ofsheets4 inFIGS. 23 and 24, however, is not to be construed as limiting the invention since it is envisioned thatsheet4 can have any suitable and/or desirable configuration.
• Two or more printed circuit board layers2 described above in connection withFIGS. 16-22 can be utilized to form a multi-layer printed circuit board assembly, likemulti-layer PCB assembly60 or104, with or without insulatinginterlayer140 sandwiched between two or more adjacent printed circuit board layers2. Like printed circuit board layers40,52,90 and102, the printedcircuit board layers2 shown inFIGS. 16-22 can be connected to a disposable part of a panel via one or more tabs, liketabs36,48,92 or108, and can be singulated from the panel in any one of the manners described above in connection with printed circuit board layers40,52,90 and102.
• As can be seen, the present invention provides a printed circuit board having one or more printed circuit board layers each of which has a conductive plane that extends to the edge of the printed circuit board but which can be substantially, but not completely, covered by an insulating material. The edge of the conductive layer not covered by the insulating material is positioned on the edge of the circuit board layer or a tab which is utilized to couple the circuit board layer to a disposable part of a larger panel that the printed circuit board layer is formed from during fabrication. The exposed edge of the conductive layer becomes exposed upon singulating the printed circuit board layer from the disposable part of the panel.
• The conductive layer of each circuit board layer can serve the dual purpose of conducting heat away from electrical components disposed on one or both surfaces of the printed circuit board or printed circuit board layer and providing power or ground to the electrical components.
• The present invention also provides a printed circuit board layer having one or more landless through-holes therethrough. Desirably, in cross section, one side of the interior surface of each through-hole has an arcuate outline. In one desirable embodiment, in cross section, opposing sides of the interior surface of the through-hole have an outline generally in the shape of a hyperbola. Because the interior surface of one side of each through-hole has an arcuate outline in cross section, each through-hole can include a single through-hole conductor extending therethrough or a plurality of electrically isolated through-hole conductors extending therethrough. The ability to form a number of electrically isolated through-hole conductors in a single through-hole enables a reduction in the number of through-holes through the circuit board that are required for passing signals between opposing surfaces or layers thereof. Thus, the use of landless through-holes or vias in accordance with the present invention is capable of reducing the number of through-holes or vias required in a printed circuit board to pass signals between opposing surfaces of the printed circuit board.
• Lastly, the present invention also provides a printed circuit board having one or more conductive traces, each of which can include a portion thereof on an arcuate or rounded edge of the printed circuit board. Desirably, in cross section, each such conductive trace portion has an arcuate or rounded shape. Moreover, each such conductive trace portion can either be disposed on or around a straight edge of the printed circuit board or can be disposed on or around a notch formed in the edge of the printed circuit board. If desired, two or more of said conductive trace portions can be received in the same notch, when provided. The use of one or more conductive traces on or around the edge of a printed circuit board can provide more connection options and can reduce the need for through-holes or vias in the printed circuit board to pass signals between conductive traces on opposing surfaces of the printed circuit board. In addition, the use of one or more conductive traces on or around the edge of the printed circuit board provides more connection options to other devices, such as, without limitation, a power supply, another printed circuit board, etc. For example, one end of a conductive wire can be connected (e.g., soldered) to the conductive trace or portion thereof on the arcuate or rounded edge of the printed circuit board, either on a straight edge or notch thereof, while the other end of the conductive wire can be connected to any desired connection point, e.g., without limitation, a trace or through-hole of the same or another printed circuit board, a terminal post of a power supply, etc.
• The present invention has been described with reference to the preferred embodiments. Obvious modifications and alterations will occur to others upon reading and understanding the preceding detailed description. For example,multi-layer PCB assembly60 was described as being formed by laminating together PCB layers30 and42 with or without an insulating layer, like insulatinginterlayer140, laminated between PCB layers30 and42. However, a multi-layer PCB assembly can be formed from three or more PCB layers laminated together, with or without an insulating layer, like insulatinginterlayer140, laminated between one or more adjacent pairs of PCB layers, with the circuit pattern of each pair of adjacent PCB layers electrically connected in a desired manner. Moreover, an electrical component, e.g.,capacitor134, was described as being connected totabs92 and108 of adjacent PCB layers90 and102 ofmulti-layer PCB assembly104. However, an electrical component can be connected between tabs of adjacent or non-adjacent PCB layers of a multi-layer PCB assembly having three or more PCB layers. It is intended that the invention be construed as including all such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.

Claims (20)

1. A circuit board comprising:

an electrically conductive sheet coated with an insulative coating that forms an insulating top layer covering one surface of the conductive sheet, an insulating bottom layer covering another surface of the conductive sheet and an insulating edge layer covering an edge of the conductive sheet; and

a first electrical conductor on one of the insulating top layer and the insulating bottom layer and on at least part of the insulating edge layer, wherein:

the insulating edge layer and the portion of the first electrical conductor thereon each have an arcuate or rounded shape; and

the portion of the first electrical conductor on the insulating edge layer is electrically isolated from the edge of the conductive sheet by the insulating edge layer.

2. The circuit board ofclaim 1, wherein:

the first electrical conductor is also on the other layer of the circuit board; and

the portions of the first electrical conductor on the top and bottom layers of the circuit board are electrically connected by the portion of the first electrical conductor on the insulating edge layer.

3. The circuit board ofclaim 1, wherein the combination of the portion of the first electrical conductor and the insulating edge layer it overlays is in a notch defined in the edge of the electrically conductive sheet.

4. The circuit board ofclaim 3, further including a second electrical conductor on the top and bottom layers of the circuit board that are electrically connected by a portion of the second electrical conductor on the insulating edge layer which is in the notch in electrical isolation from the portion of the first electrical conductor in the notch.

5. The circuit board ofclaim 1, wherein the insulative coating is initially electrodeposited and thereafter is heated until it flows thereby forming the insulating edge layer having the arcuate or rounded shape.

6. The circuit board ofclaim 1, further including a copper layer disposed between the electrically conductive sheet and the insulative coating.

7. A method of forming a circuit board comprising:

(a) providing an electrically conductive sheet having top and bottom surfaces and an edge;

(b) conformally coating the top and bottom surfaces and the edge of the electrically conductive sheet with an insulating material;

(c) exposing the conformally coated insulating material to an elevated temperature such that the insulating material at least partially melts and flows around the edge of the electrically conductive sheet whereupon, upon removal of the elevated temperature, the insulating material around the edge of the electrically conductive sheet has an arcuate or rounded shape or outline; and

(d) following step (c), forming a first conductor on the insulating material with at least a portion of the first conductor on the insulating material around the edge of the electrically conductive sheet, whereupon said portion of the first conductor has an arcuate or rounded shape or outline.

8. The method ofclaim 7, wherein the first conductor is also formed on the insulating material overlaying at least one of the top and bottom surfaces of the electrically conductive sheet.

9. The method ofclaim 7, wherein said portion of the first conductor and the insulating material it overlays are in a notch formed in a side of the electrically conductive sheet.

10. The method ofclaim 9, wherein:

step (d) includes forming a second conductor on the insulating material with at least a portion of the second conductor overlaying the insulating material in the notch, whereupon said portion of the second conductor has an arcuate or rounded shape or outline; and

said portion of the second conductor in the notch is electrically isolated from said portion of the first conductor in the notch.

11. The method ofclaim 7, wherein step (b) includes electrodepositing the insulating material.

12. The method ofclaim 7, wherein said portion of the first conductor electrically connects other portions of said first conductor on the insulating material overlaying the top and bottom surfaces of the electrically conductive sheet.

13. A circuit board comprising:

an electrically conductive sheet including an insulating edge layer covering an edge of the conductive sheet; and

an electrical conductor on the insulating edge layer, wherein:

the insulating edge layer and the electrical conductor have an arcuate or rounded shape or outline.

14. The circuit board ofclaim 13, further including at least one of:

the electrical conductor on an insulating top layer overlaying a top surface of the electrically conductive sheet; and

the electrical conductor on an insulating bottom layer overlaying a bottom surface of the electrically conductive sheet.

15. The circuit board ofclaim 13, wherein the combination of the electrical conductor and the insulating edge layer it overlays is in a notch in the edge of the conductive sheet.

16. The circuit board ofclaim 15, further including another electrical conductor on the insulating edge layer in the notch, wherein the electrical conductors on the insulating edge layer in the notch are spaced from each other.

17. The circuit board ofclaim 15, further including another electrical conductor on the insulating edge layer outside the notch.

18. A circuit board comprising:

an electrically conductive sheet;

an insulative coating surrounding the conductive sheet with a surface of the insulative coating around an edge of the conductive sheet being rounded; and

at least one electrical conductor conformally deposited on at least the rounded insulative coating around the edge of the conductive sheet and defined via photolithographic and metallization techniques such that said electrical conductor on the rounded insulative coating around the edge of the conductive sheet has a rounded surface.

19. The circuit board ofclaim 18, wherein the edge of the conductive sheet defines a notch therein where at least one electrical conductor formed on at least the rounded insulative coating resides.

20. The circuit board ofclaim 19, wherein:

two electrical conductors reside in the notch; and

the two electrical conductors are electrically isolated from each other in the notch.

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