CROSS-REFERENCE TO RELATED APPLICATIONS This is a continuation of application Ser. No. 10/210,107 filed 2 Aug. 2002, allowed, which is a continuation of application Ser. No. 09/201,757 filed 1 Dec. 1998 and issued 17 Sep. 2002 as U.S. Pat. No. 6,453,304 B1, the contents of both of which applications are incorporated herein by reference in their entirety.
BACKGROUND OF THE INVENTION This invention relates to an apparatus for protecting a copyright of digital information that is digitally transmitted between an information apparatus for home use and personal computers.
Recently, there have been significant advances in data compression for video and audio signals using digital technologies, so that an accumulation and/or transmission of data can be easily performed. Correspondingly, digitalization in the field of broadcasting has also advanced rapidly. For example, a broadcasting system in which an analog video and/or audio signals are digitally compressed and encoded with high efficiency, using an MPEG (Moving Picture Experts Group) standard, and are transmitted through a satellite and/or cable system has been developed. In general, a digital-broadcasting receiver called a set-top-box has been used for receiving and decoding a digital-broadcast signal.
Furthermore, a digital VCR (Video Cassette Recorder) that can record and reproduce video and audio information, such as a digital TV broadcast signal on magnetic type by employing a compression-encoding method has been developed as an apparatus for home use to record and/or reproduce video and audio signals.
One technology by which a requested program can be selected from received digital signals and in which plural information is multiplexed and transmitted is disclosed in the Japanese published unexamined patent application No. 118-56350. Moreover, a digital VCR that uses rotating magnetic heads is shown, for example, in the Japanese published unexamined patent application No. 5-174496. Furthermore, in the publication “Newly Developed D-VHS Digital Tape Recording System for the Multimedia Era” (IEEE Transactions on Consumer Electronics, Vol. 42, No. 3, August 1996, pp. 617-622), a digital broadcast recording system is disclosed in which a digital broadcast receiver and a digital VCR are connected with a transmission line, such as a digital interface. Japanese published unexamined patent application No. H2-7269 is technology describes a method for protecting a copyright of transmitted information in a case where a digital device is connected to a digital interface. In a case where copying of the digital content of an output from a digital interface is prohibited, the digital content is changed (scrambled) to different codes, and then the different codes are outputted on the digital interface. Therefore, the copyright of the digital contents are somewhat protected, because a digital recording apparatus, which receives the different codes doesn't have the ability to decode the different codes.
When a digital broadcasting signal is recorded and reproduced by using a digital VCR, etc., there is a first disadvantage in that, in transmitting copyrighted information externally between apparatuses through a digital interface, unauthorized interception of and/or tampering with the copyrighted information can occur, even if the copyrighted information is scrambled.
As one example, copyrighted information can be intercepted during transmission between apparatuses, and copy control information included therein can be modified (i.e., tampered with) so as to record the copyrighted information with unauthorized copy control information, e.g. allowing unlimited (i.e., piracy) copying. Accordingly, there is a problem that the pirated copyrighted information can be used again by transmitting the information to a device with a descramble function through another digital interface, even though further use should be prohibited. Accordingly, external transmission and recording of copyrighted information with prohibitive copy control information is disadvantageous in that it is susceptible to copyright piracy.
SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a digital information recording apparatus which is able to record digital information in such a way as to protect the digital information, including copy control information, transmitted on a digital transmission line.
Further, it is an object of the present invention to protect a copyright of the digital contents on a digital interface.
In view of the foregoing objects of the invention for solving the problems explained above, a digital information recording apparatus to record digital information, comprises: separation means for separating first digital information and first copy control information from inputted digital information, including at least the first digital information and the first copy control information; decrypt means for decrypting the first digital information outputted from the separation means to produce decrypted second digital information; select means for selecting the first digital information or the decrypted second digital information from the decrypt means; recording means for recording the selected one of the first digital information or the decrypted second digital information; and control means for controlling at least the select means and the recording means in response to the first copy control information received from the separation means.
According to a preferred embodiment, a digital information recording apparatus to record digital information, comprises: separation means for separating first digital information and first copy control information from inputted digital information, including at least the first digital information and the first copy control information; process means for processing the first digital information outputted from the separation means and for outputting second digital information in response to control information; recording means for recording the second digital information; and control means for controlling at least the process means and the recording means in response to the first copy control information; wherein the control means controls the process means using the control information.
According to another embodiment, a digital information recording apparatus having a digital information output means, comprises: separation means for separating first digital information and first copy control information from digital information including at least the first digital information and first copy control information outputted from the digital information output means; decrypt means for decrypting the first digital information outputted from the separation means to produce decrypted second digital information; select means for selecting the first digital information or the decrypted second digital information outputted from the decrypt means; recording means for recording the selected one of the first digital information or the decrypted second digital information; and control means for controlling at least the select means and the recording means in response to the first copy control information received from the separation means.
BRIEF DESCRIPTION OF THE DRAWINGSFIG. 1 is a block diagram of a digital signal transmission circuit according to the present invention.
FIG. 2 is a block diagram of one embodiment of an encryption circuit according to the present invention.
FIG. 3 is a block diagram of a digital signal receiving circuit according to the present invention.
FIG. 4 is a block diagram of an embodiment of a transmitting and receiving system according to the present invention.
FIGS. 5A to5D are diagrams of a packet multiplexing method according to the present invention.
FIG. 6 is a block diagram of one embodiment of the encryption/decryption circuit of the present invention.
FIG. 7 is a block diagram of one embodiment of the digital interface circuit of the present invention.
FIG. 8 is a timing diagram of the packet stream of the present invention.
FIG. 9 is a timing diagram of the packet stream of the present invention.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Various embodiments of the present invention will be explained with reference to the drawings.
FIG. 1 is a block diagram representation of a transmitting circuit according to the present invention. InFIG. 1, there is a digitalsignal input terminal301, a copy controlinformation input terminal302, anencryption circuit303, a copy controlinformation discrimination circuit304, aselection circuit305, a copy controlinformation addition circuit306 and anoutput terminal307, respectively.
A digital signal inputted from theinput terminal301 is supplied to theencryption circuit303 and to one input of theselection circuit305. A copy control information signal, which relates to the digital signal from theinput terminal301, is inputted to theinput terminal302. The copy control information, for example, in the form of 2-bit (or greater bit) digital data, indicates one of a prohibition against copying, a limited permission to allow copying a predetermined number of times (e.g., once) and no-limitation so as to allow unlimited copying of the digital signal, e.g., with copy control data (1, 1), (1, 0) and (0, 0), respectively.
The copy controlinformation discrimination circuit304 performs a discrimination procedure based on the copy control information received from theinput terminal302 and, if the copy control information is discriminated as (1, 1) or (1, 0) which denotes a prohibition or a limited permission, while theencryption circuit303 is controlled to operate actively, theselection circuit305 is switched to a terminal Cr so as to cause encrypted information to pass therethrough. If the copy control information is discriminated as (0, 0), which denotes no-limitation for copying, while theencryption circuit303 is controlled to operate inertly, theselection circuit305 is switched to a terminal Th.
Theencryption circuit303 encrypts the inputted digital signal with a predetermined encryption key which typically may be renewed minute by minute, and outputs the encrypted digital signal. To prevent an error in the propagation of the signal which influences the following data even if some errors like a bit-error are caused during transmission, for example, in the encryption circuit303 a block encryption algorithm is employed by which a block unit, consisting of a plural number of bits, is used so that the encryption processing is realized with a simplified circuit.
One embodiment, theencryption circuit303, is shown inFIG. 2. InFIGS. 2, 3031 and3035 denote a block processing unit respectively,3032,3033, and3034 denote an encryption processing unit, respectively, in which Xa and Xb represent upper-significant and lower-significant bits of an input block of data X, respectively, Ya and Yb represent encrypted data, respectively, and K represents an encryption key. As shown inFIG. 2, the input data block X is converted to sub-blocks consisting of a plural number of bits in theblock processing unit3031. For example, one block is composed of 64 bits in which the sub-blocks Xa and Xb are outputted as the 32 upper-significant bits and the 32 lower-significant bits of the block, respectively. In theencryption processing unit3032, the inputted data sub-blocks Xa and Xb are processed by an exclusive or processing311, by bit-shift and bit-add processings312,313 and315, in which symbol A<<<p means that A is cyclically bit-shifted to the left by a number p bits, and by bit-add processings314 and316. Processing results therefrom are then inputted to the followingencryption processing units3033 and3034, and furthermore their outputs are inputted for processing by other encryption processing units which are not shown inFIG. 2. As a result, the encrypted data Ya and Yb can be obtained from the processing units with repeated encryption processings in a plural number of steps.
In theblock processing unit3035, a block sequence of the data Ya and Yb is converted to become the same as the original bit sequence, and the encrypted data Y is outputted from theblock processing unit3035. Moreover, although not illustrated, the above-mentioned processings can be suspended and consumption of electric power caused by the processings can be reduced in response to an external signal, by stopping supply of a clock signal used as a standard for processings, such as an add processing, or by setting to a hold-mode an enable signal which selects whether to latch or hold data inputted to a register for holding a processing result. InFIG. 1, the copy controlinformation addition circuit306 adds the copy control information inputted from theinput terminal302 to the output data received via theselection circuit305. This can be realized, for example, by adding and storing the copy control information in the header of the output data. After these processings, the output data is outputted from theoutput terminal307.
With the above-mentioned encrypting operations, unless decryption processing is performed to reverse the encryption, any work can be protected from unauthorized use by an intercepting party and/or from tampering, since the digital signal regarding such copyrighted work can be encrypted. In addition, since encryption processing is not performed when the copy control information indicates that unlimited copying of the work is permitted, the work can be used freely in such case.
In addition, in this embodiment, although it is performed outside of theencryption circuit303 to select whether or not the encryption processing is to be performed for the digital signal, switching and the same processing may be performed in the encryption circuit-303.
FIG. 3 is a block diagram of another embodiment of the present invention. This embodiment corresponds to a digital information receiving apparatus as opposed to the transmitting apparatus shown inFIG. 1. InFIG. 3, there is a digitalsignal input terminal401, a copy control informationseparation discrimination circuit402, adecryption circuit403, aselection circuit404 and anoutput terminal405.
In the copy control informationseparation discrimination circuit402, from the digital signal received from theinput terminal401, the copy control information added to the digital signal by the apparatus ofFIG. 1 is separated and the remaining digital signal is outputted to thedecryption circuit403. A discrimination procedure is performed based on the separated copy control information. If the copy control information is discriminated as being (1, 1) or (1, 0), which denotes a prohibition or a limited permission, respectively, thedecryption circuit403 is controlled to actively decrypt the digital signal, and theselection circuit404 is switched to a terminal Cr. If the copy control information is detected as being (0, 0), which permits an unlimited copying, thedecryption circuit403 is inhibited, and theselector404 is switched to the terminal Th.
Thedecryption circuit403 decrypts the inputted digital signal with a predetermined decryption key which is the same as the encryption key added by theencryption circuit303 of the apparatus shown inFIG. 1, and outputs the decrypted digital signal. For a decryption method, for example, an algorithm can be used by which some processings such as a bit shift processing and a bit substitution processing, are repeatedly performed i.e., with a reverse decryption processing corresponding to the encryption processing of the apparatus shown inFIG. 1.
As a result of the above-mentioned procedures, the digital signal whose copyright has to be protected can be subjected to decryption by authorized persons and outputted, and if the copy control information indicates permission for copying, the digital signal can be outputted with no decryption. When theoutput terminal307 inFIG. 1 and theinput terminal401 inFIG. 3 are connected using a digital bus, since the digital signal whose copyright has to be protected is encrypted and transmitted via the bus, the copyright of the work can be protected from unauthorized actions, such as unlawful interception and tampering.
FIG. 4 is a block diagram of a transmission reception system representing an exemplary embodiment of the present invention. A digital signal, for example, is processed using the MPEG2 international standard in this embodiment. InFIG. 4, there is a recording and reproducingunit100, a digital broadcastingsignal receiving unit200, an input andoutput terminal101 for a signal, such as a digital broadcast signal, adigital interface circuit102, a-encryption anddecryption circuit103, a recording and reproducingsignal processing circuit1041, arecording amplifier1042, a reproducingamplifier1043, arotary drum1051,magnetic heads1052, amagnetic tape106, aservo control circuit107, and acontroller108. Furthermore,FIG. 4 shows aninput terminal201 which inputs a digital broadcast signal, a tuner2021, a demodulation and error-correction circuit2022, aselection circuit2023, aMPEG decoder2024, a video and audiosignal output terminal203, acontroller204, an encryption anddecryption circuit205, adigital interface circuit206 and an input andoutput terminal207 for a signal, such as a digital broadcast signal.
The digital broadcast signal sent by a broadcasting station is inputted to the digital broadcastsignal receiving unit200 from theinput terminal201. The digital broadcast signal, for example, is sent through a digital broadcasting satellite, by terrestrial broadcasting or by cable broadcasting or any other suitable arrangement. Here, it is presupposed that a video signal and audio signal are compressed in a packet form using the MPEG system by a broadcasting station.
FIG. 5A,FIG. 5B,FIG. 5C andFIG. 5D illustrate one embodiment of the packet form of a video and audio signal. The inputted broadcast signal can be received by the tuner2021 and detected at a point of predetermined broadcasting frequency by thecontroller204. The detected signal, which is modulated, for example, by using a known modulation system, such as quadrature phase shift keying (QPSK), can be demodulated and subjected to an error correcting procedure in the demodulation and. error-correction circuit2022. As shown inFIG. 5A, the digital signal obtained by the demodulation and error-correction circuit2022 is in the form multiplexed signal in which signals, such as a plural number of channels of compressed video and audio signals, are multiplexed in the packet format, so as to form a Transport Stream (TS). The size of a packet, for example, can be specified to be 188 bytes in the case of the MPEG2 standard.
As shown inFIG. 5B, theselection circuit2023 selects and takes out only the packets required to decode the video and audio signal, whose channel is specified by thecontroller204, from the TS demodulated by the demodulation and error-correction circuit2022.
The procedure carried out in theselection circuit2023 is as follows. At first, a user specifies a logical channel of a desired audio-visual program. Here, the term logical channel refers to a collection of video and audio information constituting one program, and can, for example, correspond to a television channel used by an analog television broadcasting system. Moreover, in general, a frequency band in which a plural number of programs are multiplexed is called a logical channel in the digital broadcasting system.
Next, a program association table PAT, which is contained in the present received PS, is received. The PAT represents a table in program specific information (PSI), specified by the MPEG2 standard. A packet identification (PID), which indicates an identification number of a packet in which a specified logical channel of video and audio information is contained, is described in a program map table (PMT). The PMT is also a table of the PSI. Described in the PMT are the PID of the packet, such as a video and audio signal, which constitutes each logical channel included in the received TS, and a program clock reference (PCR) that indicates the time information timed by a reference clock signal used at the time of the compression of the video and audio signal. Moreover, the copy control information of each logical channel is stored in the PMT. If the PAT is obtained, the PID is taken out from the PAT, and the PMT including the PID is received. As shown inFIG. 5C, each packet of the TS is mainly constituted with a header11(a) and data11(b). As shown inFIG. 5D, thePID111 which indicates an ID number of the packet is stored in the header11(a). Copy control information can be included at any appropriate location within the transmitted/received information e.g., copy control information can be included within a separate packet (shown in dotted form inFIG. 5B) of the transport stream, or it may be included within a data or header portion (again shown in dotted form) in some or all of the program data packets as shown inFIG. 5C.
As mentioned above, in order to discriminate which information, such as video, audio and PCR information which constitute a logical channel, is stored in each packet, it is required to acquire the PID. Theselection circuit2023 supplies a packet-stream in which a video and audio signal are stored at theMPEG decoder2024. TheMPEG decoder2024 expands the compressed video signal and audio signal and restores them. The restored video signal and audio signal are outputted from theoutput terminal203. A user can view and listen to the information carried on these signals using a television monitor.
Hereafter, the process of recording information in the recording and reproducingunit100 will be explained usingFIG. 4,FIG. 6,FIG. 7 andFIG. 8. Theselection circuit2023 supplies a packet stream of a specified logical channel in which a video signal, audio signal, PSI, PCR and other signals are contained, to thedigital interface circuit206 through the encryption anddecryption circuit205. On the other side, theselection circuit2023 transmits copy control information of the PMT packet of the channel to the encryption anddecryption circuit205 and thedigital interface circuit206 via thecontroller204. The packet train, which is outputted from theselection circuit2023 and is encrypted by the encryption anddecryption circuit205, is supplied to the encrypt ion anddecryption circuit103 in the recording and reproducingcircuit100 through theoutput terminal207 andinput terminal101, and thedigital interface circuit102.
FIG. 6 is a block diagram representation of one embodiment of the encryption anddecryption circuits205 and103. The circuits include input andoutput terminals501,505 and508,selection circuits502 and504, an encryption anddecryption circuit503, adiscrimination circuit506 for the copy control information, and anexternal interface circuit507. In the encryption anddecryption circuit205, the copy control information provided from thecontroller204 is sent to the copy controlinformation discrimination circuit506, via input andoutput terminal508 andexternal interface circuit507.
The discrimination circuit forcopy control information506 switches the encryption anddecryption circuit503 andselectors502 and504 according to the copy control information. For example, if the copy control information is “11” or “10,” which means that copying is forbidden or is permitted only once, as a first example,selectors502 and504 are switched to the Cr side and the encryption anddecryption circuit503 is enabled for coding or decoding signals. If the copy control information is “00,” which means that copies are permitted without any limitation, the encryption anddecryption circuit503 is inhibited, whileswitches502 and504 are turned to the Th side.
In the encryption anddecryption circuit205 shown inFIG. 6, a digital signal provided from the input andoutput terminal501 is transmitted directly to the input andoutput terminal505, or is transmitted to the input andoutput terminal505 after being encoded in encryption anddecryption circuit503, depending on the copy control information received from thecontroller108. On the other hand, in the encryption anddecryption circuit103 of the recording/reproducingequipment200, a digital signal sent from input andoutput terminal505 is transmitted to the input andoutput terminal501 either directly or after being subjected to decoding in the encryption anddecryption circuit503, depending upon the copy control information received from thecontroller108. A cipher key used for encryption and decryption is received from theinterface circuit507 in both cases.
Thedigital interface circuit102 of the recording and reproducingunit100 or thedigital interface circuit206 of the recording/reproducingdevice200 is able to realize a protocol of a fast digital bus interface, such as IEEE 1394. It simultaneously has a function of transmitting a fast signal, while keeping the time interval of the transmitted packet stream constant. InFIG. 7, which shows details of thedigital interface circuits102,206, there are input andoutput terminals601,605 and607, apacketizing circuit602, abuffer603, aheader processing circuit604 and anexternal interface circuit606. In this Figure, the encryption and decryption circuit is connected to the input andoutput terminal601, and a digital bus interface is connected to the input andoutput terminal605. In thedigital interface circuit206, a packet stream sent from. the encryption anddecryption circuit205 is applied to thepacketizing circuit602 via input andoutput terminal601, where information as to the arriving time of each packet at thepacketizing circuit602 is added to the header of each packet as a time stamp, which can be used to maintain the time interval of the packet stream.
The packet stream to which time stamps were added is stored in thebuffer circuit603. These packets are processed as bus-packets and are sent out on a digital bus interface. Theheader processing circuit604 adds copy control information received fromcontroller204, an indication of the size of the packet, error correction symbols and other information to the packets, which are original packets received by thebuffer603 itself, an unified (i.e. combined) packet made up of some of the packets received by thebuffer603, or a partial divided packet derived from a received packet. After that, they are sent to the digital bus interface.
On the other hand, signal processing in thedigital interface circuit102 is performed as follows.Header processing circuit604 reads out the copy control information of the packet received from the input andoutput terminal605, which was added by theheader processing circuit604 in thedigital interface circuit206, and sends the information tocontroller108 viaexternal interface circuit606. At the same time, theheader processing circuit604 reads out packet size information, error information and other information of the received packet and sends the same to thebuffer circuit603. Divided packets are constructed into their original form and are outputted from this block with a timing corresponding to the time stamps that are added at the top of each packet.
As shown inFIG. 4, a logical channel of the packet enciphered by the encryption anddecryption circuit205 of thereceiver200, after having been outputted fromselector2023, is outputted from the input andoutput terminal207. The logical channel is supplied to the input andoutput terminal101 of the recording/reproducingdevice100 and is transmitted to the encryption anddecryption circuit103 viadigital interface circuit102, where it is decoded.
FIG. 8 is a timing chart of the packet streams for each processing step, such as from input of packets to the encryption anddecryption circuit205, to the output of packets from the encryption anddecryption circuit103. The packet train supplied to the encryption anddecryption circuit205, as seen in line (a), is enciphered by the encryption anddecryption circuit206, as seen in line (b), and after that a header is added in thedigital interface circuit206 before sending the packets to the digital bus interface, as seen in line (c). The packet stream is accepted by thedigital interface circuit102, which then separates the headers there. The received packets are decoded at the encryption anddecryption circuit103 to the original packet stream. Naturally, if copying is allowable, no encipherment is carried out.
InFIG. 8, one logical packet stream is illustrated as an example, however, the present invention is not limited thereto. When a packet stream consisting of several channels is transmitted on the digital interface circuit, signal processing for each packet is carried out depending upon the copy control information of each packet.
FIG. 9 is a timing chart of a packet stream consisting of several channels. For example, if channel aCH has copy control information prohibiting copying, channel bCH has control information allowing a limited number of copies and channel cCH has control information allowing unlimited copying, in this case, encoding is performed for channels aCH and bCH, but channel cCH is transmitted without any encoding. Some extra delay is added to channel cCH to realize the same timing as channels aCH and bCH. Furthermore, when, for example, a packet of channel aCH and that of channel cCH are transmitted as a combined packet, the copy control information of each channel is stored in the same packet header. Even in such a case, an acceptor side decoding of channel aCH channel packet is prevented and no decoding is performed for the cCH channel packet after reading the information in the packet header. Using this process, an acceptor side can read the channel cCH signal without a decoding circuit, but it can access channels aCH and/or bCH only after decoding them.
The signal processing performed by the recording/reproducingdevice100 will be explained usingFIG. 4. Encryption anddecryption circuit103 transmits a decoded packet train to the recording/reproducingsignal processing circuit1041, which adds copy control information received fromcontroller108, a proper control sign and an error collection signal and other information to it, and sends the result torecording amplifier1042 as a recording signal. In this process, copy control information that is to be recorded, has been modified as follows; if “10,” which means that only a single copying was permitted by the original control information, then the recording information is changed to “11,” which subsequently prohibits copying; if the original control information is “00,” the same “00” is recorded. When the copy control information is “11,” then the recording itself is stopped.
Servo circuit107 controls the rotary phase ofrotating drum1051, and signals are recorded on the proper recording tracks onmagnetic tape106 by themagnetic heads1052 mounted on therotating drum1051. A program that a user selects can be recorded on the magnetic tape by using the above-mentioned processing. Because enciphered information is transmitted on the digital bus interface, an unauthorized interception and a falsification of the data can be prevented.
Next, a reproducing process will be explained.Servo circuit107 controls the rotary phase ofrotating drum1051.Magnetic heads1052 that scan the signal track of themagnetic tape106 read out a reproduced signal, and this signal is transmitted to recording/reproducingsignal processing circuit1041 after being amplified by reproducingamplifier1043. The recording/reproducingsignal processing circuit1041 performs error correction processing on the reproduced signal, and then recreates packets. In this process, the copy control information stored on the magnetic tape during the recording process is reproduced and transmitted to the controller.
The reproduced packet stream is encoded by encryption anddecryption circuit103, depending upon the copy control information, and is sent to thedigital bus interface102, after the copy control information is added thereto by thedigital interface circuit102. Thedigital interface circuit206 separates the copy control information, while maintaining the time interval. Then, the packets are decoded in thecircuit205, depending upon the copy control-information, and are transmitted toselector2023 These signals can be used by the user as the received broadcast signal. With such an arrangement, a processed signal on the digital bus interface is encoded so as to be protected from unauthorized interception and falsification.
This example of the invention has been directed to a magnetic recording device with a helical scanning head as a recording/reproducing device. However, the invention is not restricted to such an arrangement, but can be applied to other devices, for example, those with an optical disk memory or a semiconductor memory. Furthermore, IEEE 1394 provides an example of a digital interface circuit, but the invention is not limited to this digital interface circuit, since other interface standards or arrangements are likewise applicable. In the described example of the invention, one tuner for digital broadcast is connected to one recording/reproducing device, however, this invention is not to be restricted to such a case, but can be applied to any other possible connection. For example, a connection between a tuner for digital broadcast and a computer, a connection between a computer and a recording/reproducing device, and a connection using a daisy chain between a digital tuner and several devices are possible.
As explained above, this invention makes it possible to protect the digital contents of proprietary data transmitted through a digital transmission line.