US20050078256A1 - In plane switching mode liquid crystal display device and fabrication method thereof - Google Patents
In plane switching mode liquid crystal display device and fabrication method thereofDownload PDFInfo
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- US20050078256A1 US20050078256A1US10/950,896US95089604AUS2005078256A1US 20050078256 A1US20050078256 A1US 20050078256A1US 95089604 AUS95089604 AUS 95089604AUS 2005078256 A1US2005078256 A1US 2005078256A1
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
- G02F1/134363—Electrodes characterised by their geometrical arrangement for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136222—Colour filters incorporated in the active matrix substrate
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
Definitions
- the present inventionrelates to a liquid crystal display device (LCD), and more particularly, to an In-Plane Switching (IPS) mode LCD in which a color filter layer and a thin film transistor are formed on the same substrate to drive the liquid crystal using a fringe field.
- LCDliquid crystal display device
- IPSIn-Plane Switching
- CTRcathode ray tube
- a cathode ray tubehas been most widely used among display devices for displaying image information on a screen.
- CRTsare large and heavy compared with the display area.
- the use of display deviceshas expanded to personal computers, notebook computers, wireless terminals, vehicle instrument panels, electronic display boards and the like.
- information communication technologysince it is possible to transmit a large amount of image information, increasing importance has been placed on a next generation display device capable of processing and displaying the large amount of image information.
- next generation display devicesare required to realize lighter, thinner, shorter and smaller characteristics, a high luminance, a large-sized screen, low power consumption and a low price.
- LCDliquid crystal display devices
- twisted nematic (TN) mode LCDshave been generally used.
- TN mode type LCDafter electrodes are formed on two substrates and liquid crystal directors are aligned twisted by 90°, a driving voltage is applied to the electrodes to drive the liquid crystal directors.
- the TN mode LCDhas a narrow viewing angle.
- In-plane switching (IPS) mode LCDsoptically compensated birefringence mode LCDs, etc. are examples of such LCDs.
- the IPS mode LCDgenerates a horizontal electric field to drive the liquid crystal molecules in a horizontal state with respect to the substrates by forming two electrodes on an identical substrate and applying a voltage between the two electrodes.
- the longer axis of the liquid crystal moleculedoes not stand up with respect to the substrates.
- the IPS mode LCDhas a small variation in the birefringence of liquid crystal according to a visual direction and thus has an excellent viewing angle characteristic compared with the TN mode LCD.
- FIG. 1is a sectional view of a related art IPS mode LCD.
- a related art IPS mode LCDis formed by attaching a first substrate 118 and a second substrate 119 facing the first substrate 118 , and interposing a liquid crystal layer 130 therebetween.
- a metal filmis first deposited on the first substrate 118 and is patterned to form a plurality of gate lines and a plurality of gate electrode 109 branched from the respective gate lines and formed at a thin film transistor region.
- a gate insulating layer 120is formed on an entire surface of the first substrate including the gate electrode 109 , and then a semiconductor layer 115 forming an ohmic contact layer with an active layer 115 a is formed on a predetermined region of the gate insulating layer 120 .
- a data line 110forming a matrix configuration together with the gate line is formed.
- source electrode 116 and drain electrode 117 of a thin film transistorare formed along with the data line 110 .
- a common line and a common electrode 113are formed to be parallel with the gate line 110 .
- the common line and the common electrode 113may be formed on the same layer as the gate electrode 109 .
- a passivation film 128is formed on the entire surface of the first substrate 118 constructed as above. After that, a pixel electrode 114 is formed to be electrically connected with the drain electrode 117 and be parallel to the data line 110 . On the entire surface of the first substrate 118 constructed as above, a first orientation film 129 is formed.
- a black matrix 121 for preventing light from being leakedis formed on the second substrate 119 .
- a color filter layer 122consisting of color patterns of red (R), green (G), and blue (B) is formed between the black matrixes 121 .
- an overcoat layer 123 for planarizing an upper surface thereof and protecting the underlying color filter layer 122is formed on the color filter layer 122 .
- a second orientation film 126is formed on the overcoat layer 123 .
- Edges between the first and second substrates 118 and 119are sealed by a seal pattern (not shown) to prevent the liquid crystal layer 130 interposed between the first and second substrates 118 and 119 from being leaked.
- Attaching of the first and second substrates 118 and 119is determined by a margin on design of each substrate. Generally, preciseness of a few micrometers is required. If the attaching margin deviates from an allowed margin, light is leaked and accordingly a desired characteristic is not obtained.
- an IPS mode LCD of one aspectincludes: a first substrate and a second substrate; a thin film transistor and a color filter layer on the first substrate; a common electrode and a pixel electrode arranged in a zigzag configuration on the first substrate; and a liquid crystal layer between the first and second substrates.
- a method of fabricating an IPS mode LCDincludes: forming a color filter layer and a thin film transistor on a first substrate; forming a common electrode and a pixel electrode in a zigzag configuration on the thin film transistor; and forming a liquid crystal layer between the first substrate and a second substrate facing the first substrate.
- FIG. 1is a sectional view of a related art IPS mode LCD according to the related art
- FIG. 2is a plane view illustrating a schematic configuration of an IPS mode LCD having a COT structure according to an embodiment of the present invention
- FIG. 3is a sectional view taken along the line I-I′ of FIG. 2 ;
- FIGS. 4A through 4Cillustrate a method of fabricating an IPS mode LCD according to an embodiment of the present invention
- FIGS. 5A and 5Bare sectional views illustrating a schematic configuration of an IPS mode LCD having a TOC structure according to another embodiment of the present invention.
- FIGS. 6A through 6Cillustrate a method of fabricating an IPS mode LCD having a TOC structure according to another embodiment of the present invention.
- FIG. 2is a plane view illustrating a schematic configuration of an IPS mode LCD having a COT structure according to an embodiment of the present invention
- FIG. 3is a sectional view taken along the line I-I′ of FIG. 2 .
- the IPS mode LCDhas a color filter on TFT (COT) structure that a color filter layer is formed on an array substrate including a thin film transistor and prevents light passing through the common electrode and the pixel electrode from being absorbed into the color filter layer, thereby enhancing brightness.
- COTcolor filter on TFT
- the IPS mode LCDcan be equivalently applied to IPS mode LCDs having a TFT on color filter (TOC) structure.
- an array substrate of the IPS mode LCDis configured to include a plurality of gate lines 208 arranged spaced apart by a predetermined distance in parallel with each other in a first direction, a common line 231 arranged adjacent to and in parallel with the gate lines 208 , and a plurality of data lines 210 perpendicularly crossing the gate lines 208 and the common line 231 , and defining a pixel region together with the gate lines 208 .
- the gate lines 208 and the data lines 210are formed by depositing a metal film such as Al, Cu, Ta, Ti, Mo, a Mo alloy, an Al alloy and the like and patterning the deposited metal film.
- a thin film transistorincluding a gate electrode 209 , a semiconductor layer 215 , a source electrode 216 , and a drain electrode 217 is formed at a crossing point of the gate line 208 and the data line 210 .
- the source electrode 216is connected with the data line 210 and the gate electrode is connected with the gate line 208 .
- a pixel electrode 214 connected with the drain electrode 217 , and a common electrode 213 arranged in parallel with the pixel electrode 214 and connected with the common line 231are formed.
- the common line 231may be formed extending on the gate line 208 to form a storage capacitor.
- the pixel electrode 214includes a plurality of vertical parts 214 b and a single horizontal part 214 a .
- the plurality of vertical parts 214 bare electrically connected with the drain electrode 217 through a drain contact hole 233 and are spaced apart by a predetermined interval from one another.
- the single horizontal part 214 aconnects the plurality of vertical parts 214 b as one body.
- the common electrode 213includes a plurality of vertical parts 213 b and a single horizontal part 213 a .
- the plurality of vertical parts 213 bextend downward from the common line 231 , and are interdigitally arranged with the vertical parts 214 b of the pixel electrode 214 , and the horizontal part 213 a connects the plurality of vertical parts 213 b as one body.
- the vertical parts 213 b of the common electrode 213are interdigitally arranged with and the vertical parts 214 b of the pixel electrode 214 in a zigzag configuration.
- FIG. 2by forming the common electrode 213 and the pixel electrode 214 in a bent structure of a zigzag configuration and performing an alignment process in one direction, it is possible to change the direction of an electric field applied to the injected liquid crystal.
- the bend anglemay be set to be less than 300 or in a range of 60-120° except for 90° with respect to the alignment direction of the liquid crystal layer by the alignment process (i.e., rubbing process). Specifically, the bend angle is set to be less than 30° when the dielectric anisotropy is positive, or to be in a range of 60-120° except for 90° when the dielectric anisotropy is negative. Chiral dopants may be added to the liquid crystal layer.
- the common electrode 213 and the pixel electrode 214are arranged such that alignment characteristic of the liquid crystal are symmetric to each other. Accordingly, liquid crystal molecules on a unit pixel region are aligned only in one direction but in multiple directions, thereby inducing multiple domains permitting a variety of alignment directions in one pixel region.
- the data lines 210 , the pixel electrode 214 and/or the common electrode 213has a bent structure.
- a black matrix layer 240is formed on the gate lines 208 , the data lines 210 and the TFT region.
- a color filter layer 241is also formed to display a desired color on the pixel region defined by the gate lines 208 and the data lines 210 crossing the gate lines 208 . If the data lines 210 are formed in a zigzag configuration, the black matrix layer and the color filter layer 241 are formed in a zigzag pattern.
- the order of processes of forming the color filter layer 241 and the black matrix layer 240may be exchanged. Also, the color filter layer 241 and the black matrix layer 240 may be formed on different layers. Alternatively, the black matrix layer 240 may be formed on the other substrate.
- the IPS mode LCDis formed by attaching a first substrate 218 and a second substrate 219 facing the first substrate 218 , and forming a liquid crystal layer 230 between the first substrate 218 and the second substrate 219 .
- a metal filmis deposited on the first substrate 218 and is then patterned to form the plurality of gate lines (see 208 of FIG. 2 ), and the gate electrode 209 branched from the gate line 208 and extending to the TFT site.
- a gate insulating layer 220is formed on the entire surface of the first substrate 218 including the gate electrode 209 , and then a semiconductor layer 215 including an active layer 215 a and an ohmic contact layer 215 b is formed on the gate insulating layer 220 .
- the data line 210is formed on the gate insulating layer 220 so as to form a matrix configuration together with the gate line 208 .
- the source electrode 216 and drain electrode 217 of a thin film transistorare formed concurrently with the date line 210 while the data line 210 is formed.
- a passivation layer 228is formed on the thin film transistor.
- the passivation layer 228may be formed from an organic material such as a photo-acryl and BCB (benzo cyclobutene) or inorganic materials such as silicon oxide (SiOx) and silicon nitride (SiNx).
- the color filter layer 241 including a drain contact hole 233is formed on the source/drain electrode 216 / 217 and the gate insulating layer 220 of the pixel region.
- An overcoat layer 245may be formed on an entire surface of a resultant structure of the first substrate 218 including the color filter layer 241 so as to planarize the resultant structure of the first substrate 218 .
- the overcoat layer 245also may be omitted.
- the overcoat layer 245is formed of a film of organic or inorganic material. On the overcoat layer 245 , the common electrode 213 and the pixel electrode 214 are formed.
- the common electrode 213 and the pixel electrode 214are formed of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO) through which light passes well.
- the common electrode 213 and the pixel electrode 214are formed in a zigzag configuration.
- the data lines 210may be also formed in a zigzag configuration.
- the black matrix layer 240 and the color filter layer 241may be formed in a zigzag configuration.
- the black matrix layer 240is formed on the TFT region, the gate lines 208 and the data lines 210 to prevent light from being leaked.
- First and second alignment layers 229 and 226are coated on facing surfaces of the first substrate 218 and the second substrate 219 .
- the color filter layer 241 on the regions where the common electrode 213 and the pixel electrode 214 are positionedis removed and a hole may be formed instead of the color filter layer 241 .
- FIGS. 4A through 4Cillustrate a method of fabricating an IPS mode LCD according to an embodiment of the present invention.
- a metal filmis deposited on a substrate 218 and is then patterned to form a plurality of gate lines 208 , and a gate electrode 209 branched from each of the gate lines 208 at a TFT site.
- a gate insulating layer 220is formed on an entire surface of the substrate 218 including the gate electrode 209 , and then a semiconductor layer 215 including an active layer 215 a and an ohmic contact layer 215 b is formed on the gate insulating layer 220 .
- a plurality of data lines 210are formed on the gate insulating layer 220 so as to form a matrix configuration together with the gate lines 208 .
- Source and drain electrodes 216 and 217 of a TFTare formed concurrently with the data lines 210 while the data lines 210 are formed.
- the gate lines 208 and the data lines 210are formed by depositing a metal film such as Al, Cu, Ta, Ti, Mo, a Mo ally, an Al alloy and the like and patterning the deposited metal film.
- a black resinis coated on an entire surface of a resultant structure of the substrate 218 and is then patterned to form a black matrix layer 240 on the TFT, the data line 210 and the gate line 208 .
- a color filter layer 241is formed on the substrate 218 including the black matrix layer 240 , and a drain contact hole 233 exposing the drain electrode 217 is formed in the color filter layer 241 .
- the color filter layer 241may be formed by printing, dyeing, polymer electrodeposition, ink jet deposition, pigment dispersion or the like.
- an overcoat layer 245is formed on an entire surface of the substrate 218 including the color filter layer 241 so as to planarize the substrate 218 as shown in FIG. 4C .
- the overcoat layer 245may be an organic material such as photo-acryl and BCB (benzo cyclobutene) or an inorganic material such as silicon oxide (SiOx) or silicon nitride (SiNx). Alternatively, the overcoat layer 245 may be omitted.
- a common electrode 213 and a pixel electrode 214are formed on the overcoat layer 245 .
- the drain electrode 217is electrically connected with the pixel electrode 214 through the drain contact hole 233 .
- the common electrode 213 and the pixel electrode 214are formed of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO) through which light passes.
- ITOindium tin oxide
- IZOindium zinc oxide
- the common electrode 213 and the pixel electrode 214are formed in a zigzag configuration.
- the data lines 210may be also formed in a zigzag configuration.
- the black matrix layer 240 and the color filter layer 241may be formed in a zigzag configuration.
- aligned liquid crystal moleculeshave a symmetric alignment characteristic.
- liquid crystal molecules on one pixelmay be aligned into multi-domains having at least two domains, birefringence depending on the alignment direction of liquid crystal molecules is offset, thereby minimizing color shift phenomenon. Also, it becomes possible to widen a region where gray scale inversion does not exist, thereby enhancing viewing angle characteristic.
- the alignment materialis formed on an entire surface of a resultant structure of the substrate 218 to form an alignment layer 229 .
- the alignment materialmay be polyimide, polyamide or the like.
- FIGS. 5A and 5Bare sectional views illustrating a schematic configuration of an IPS mode LCD having a TFT on color filter (TOC) structure according to another embodiment of the present invention, and taken along the line I-I′ like in FIG. 2 .
- TOCTFT on color filter
- the IPS mode LCD having the TOC structureincludes a first transparent substrate 318 , a color filter layer 341 formed on the first transparent substrate 318 , and an overcoat layer 328 formed on the color filter layer 341 , for protecting the color filter layer 341 .
- the overcoat layer 328may be omitted.
- a thin film transistoris formed on the overcoat layer 328 .
- a gate electrode 309is first formed on the overcoat layer 328 , a gate insulating layer 320 is formed on an entire surface of the first transparent substrate 318 including the gate electrode 309 , a semiconductor layer including an active layer 315 a and an ohmic contact layer 315 b is formed on the gate insulating layer 320 , and a source/drain electrode 316 / 317 is formed on the semiconductor layer 315 .
- a black matrix layer 340is formed on the TFT and the gate line 310 .
- a passivation layer 345is formed on an entire surface of the first transparent substrate 318 including the black matrix layer 340 and the TFT.
- a drain contact hole 333is formed in the passivation layer 345 so as to electrically connect the drain electrode 317 with a pixel electrode 314 .
- a common electrode 313is formed interdigitally with the pixel electrode 314 in a zigzag configuration.
- the pixel electrode 314is electrically connected with the drain electrode 317 through the drain contact hole 333 .
- the data line 310may be also formed in a zigzag configuration.
- the common electrode 313 and the pixel electrode 314are formed of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO) through which light passes.
- First and second alignment layers 329 and 326are coated on facing surfaces of the first substrate 318 and a second substrate 319 .
- the black matrix layer 340may be formed below the TFT.
- FIGS. 6A through 6Cillustrate a method of fabricating an IPS mode LCD having a TOC structure according to another embodiment of the present invention.
- red (R), green (G) and blue (B) color filtersis selected and coated on the substrate 318 to form a color filter layer 341 .
- the color filter layer 341is formed by printing, dyeing, polymer electrodeposition, pigment dispersion, ink jet deposition or the like. In pigment dispersion, a photosensitive resist film colored by a prepared pigment is coated on the substrate, patterned by an exposure, and developed to form the color filter layer 341 .
- the color filter layer 341is, for example, formed from acryl resin or the like. In other words, the acryl resin is patterned by a pre-bake, an exposure, a development, and a post-bake.
- a thin film transistoris formed on the resultant substrate including the color filter layer 341 as shown in FIG. 6B .
- an overcoat layeris first formed of a BCB or a photo acryl material on the color filter layer 341 .
- a metal filmis deposited on the overcoat layer 328 and is then patterned, thereby forming a plurality of gate lines 308 and a gate electrode 309 branched from each of the gate lines 308 at a TFT site.
- a gate insulating layer 320is formed on an entire surface of the substrate 318 including the gate electrode 309 , and then a semiconductor layer 315 including an active layer 315 a and an ohmic contact layer 315 b is formed on the gate insulating layer 320 .
- a plurality of data lines 310are formed on the gate insulating layer 320 so as to form a matrix configuration together with the gate lines 308 .
- Source and drain electrodes 316 and 317 of the TFTare formed concurrently with the data lines 310 while the data lines 310 are formed.
- the gate lines 308 and the data lines 310are formed by depositing a metal film such as Al, Cu, Ta, Ti, Mo, a Mo ally, an Al alloy and the like and patterning the deposited metal film.
- a black resinis coated on an entire surface of a resultant structure of the substrate 318 including the TFT and is then patterned to form a black matrix layer 340 on the TFT, the data line 310 and the gate line 308 .
- a passivation layer 345is formed on the resultant substrate 318 including the black matrix layer 340 .
- the passivation layer 345may be formed of organic materials such as a photo-acryl or BCB (benzo cyclobutene) or inorganic materials such as silicon oxide (SiOx) and a silicon nitride (SiNx).
- a drain contact hole 333 exposing the drain electrode 317is formed in the passivation layer 345 .
- a common electrode 313 and a pixel electrode 314are formed on the passivation layer 345 including the drain contact hole 333 .
- the drain electrode 317is electrically connected with the pixel electrode 314 through the drain contact hole 333 .
- the common electrode 313 and the pixel electrode 314are formed of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO) through which light passes.
- the common electrode 313 and the pixel electrode 314are formed in a zigzag configuration.
- the data lines 310may be also formed in a zigzag configuration.
- the black matrix layer 340 and the color filter layer 341may be formed in a zigzag configuration.
- aligned liquid crystal moleculeshave a symmetric alignment characteristic.
- liquid crystal molecules on one pixelmay be aligned into multiple domains having at least two domains, birefringence depending on the alignment direction of liquid crystal molecules is offset, thereby minimizing color shift phenomenon. Also, it becomes possible to widen a region where gray scale inversion does not exist, thereby enhancing viewing angle characteristic.
- the alignment materialis formed on an entire surface of a resultant structure of the substrate 318 to form an alignment layer 329 .
- the alignment materialmay be polyimide, polyamide or the like.
- the color filter layeris formed on the same substrate as the TFT and electrode patterns are arranged in a zigzag configuration, thereby inducing multiple domains to offset birefringence depending on the alignment direction of liquid crystal molecules and to minimize color shift phenomenon. Also, it becomes possible to widen a region where gray scale inversion does not exist, thereby enhancing viewing angle characteristic. Also, in the present invention, the color filter layer is formed on the same substrate as the TFT, thereby enhancing color reproducibility and reducing process time to enhance the production yield.
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Abstract
Description
- This application claims the benefit of the Korean Application No. P2003-70131, filed on Oct. 9, 2003, which is hereby incorporated by reference.
- 1. Technical Field
- The present invention relates to a liquid crystal display device (LCD), and more particularly, to an In-Plane Switching (IPS) mode LCD in which a color filter layer and a thin film transistor are formed on the same substrate to drive the liquid crystal using a fringe field.
- 2. Description of the Related Art
- In general, a cathode ray tube (CRT) has been most widely used among display devices for displaying image information on a screen. However, CRTs are large and heavy compared with the display area. With the development of the electronic industry, the use of display devices has expanded to personal computers, notebook computers, wireless terminals, vehicle instrument panels, electronic display boards and the like. Also, due to the development of information communication technology, since it is possible to transmit a large amount of image information, increasing importance has been placed on a next generation display device capable of processing and displaying the large amount of image information.
- Such next generation display devices are required to realize lighter, thinner, shorter and smaller characteristics, a high luminance, a large-sized screen, low power consumption and a low price. Among such next generation display devices, liquid crystal display devices (LCD) are used as they have excellent resolution compared with other flat displays and a fast response time considerable to that of the CRT in implementing a moving picture.
- More specifically, twisted nematic (TN) mode LCDs have been generally used. In the TN mode type LCD, after electrodes are formed on two substrates and liquid crystal directors are aligned twisted by 90°, a driving voltage is applied to the electrodes to drive the liquid crystal directors. However, the TN mode LCD has a narrow viewing angle.
- Recently, LCDs employing a new mode are being actively researched to increase the viewing angle. In-plane switching (IPS) mode LCDs, optically compensated birefringence mode LCDs, etc. are examples of such LCDs.
- The IPS mode LCD generates a horizontal electric field to drive the liquid crystal molecules in a horizontal state with respect to the substrates by forming two electrodes on an identical substrate and applying a voltage between the two electrodes. In other words, the longer axis of the liquid crystal molecule does not stand up with respect to the substrates. To this end, the IPS mode LCD has a small variation in the birefringence of liquid crystal according to a visual direction and thus has an excellent viewing angle characteristic compared with the TN mode LCD.
FIG. 1 is a sectional view of a related art IPS mode LCD. Referring toFIG. 1 , a related art IPS mode LCD is formed by attaching afirst substrate 118 and asecond substrate 119 facing thefirst substrate 118, and interposing aliquid crystal layer 130 therebetween. A metal film is first deposited on thefirst substrate 118 and is patterned to form a plurality of gate lines and a plurality ofgate electrode 109 branched from the respective gate lines and formed at a thin film transistor region.- Next, a
gate insulating layer 120 is formed on an entire surface of the first substrate including thegate electrode 109, and then asemiconductor layer 115 forming an ohmic contact layer with anactive layer 115ais formed on a predetermined region of thegate insulating layer 120. On thegate insulating layer 120, adata line 110 forming a matrix configuration together with the gate line is formed. - In the course of forming the
data line 110,source electrode 116 anddrain electrode 117 of a thin film transistor are formed along with thedata line 110. Also, a common line and acommon electrode 113 are formed to be parallel with thegate line 110. Alternatively, the common line and thecommon electrode 113 may be formed on the same layer as thegate electrode 109. - On the entire surface of the
first substrate 118 constructed as above, apassivation film 128 is formed. After that, apixel electrode 114 is formed to be electrically connected with thedrain electrode 117 and be parallel to thedata line 110. On the entire surface of thefirst substrate 118 constructed as above, afirst orientation film 129 is formed. - On the other hand, on the
second substrate 119, ablack matrix 121 for preventing light from being leaked is formed. Acolor filter layer 122 consisting of color patterns of red (R), green (G), and blue (B) is formed between theblack matrixes 121. On thecolor filter layer 122, anovercoat layer 123 for planarizing an upper surface thereof and protecting the underlyingcolor filter layer 122 is formed. Next, asecond orientation film 126 is formed on theovercoat layer 123. - Edges between the first and
second substrates liquid crystal layer 130 interposed between the first andsecond substrates second substrates - To realize high definition, integration of the LCD has increased and an interval between devices has narrowed. Accordingly, if even a minor error in attachment exists, corresponding devices are formed at misaligned sites, so that color reproducibility and production yield are lowered.
- However, in the related art IPS mode LCD where the color filter layer and the thin film transistor are formed on different substrates, the attachment preciseness is lowered due to alignment margin between the color filter substrate and the array substrate. Also, since the color filter substrate and the array substrate are separately formed, process time is increased, so that production yield is lowered.
- By way of introduction only, as embodied and broadly described herein, an IPS mode LCD of one aspect includes: a first substrate and a second substrate; a thin film transistor and a color filter layer on the first substrate; a common electrode and a pixel electrode arranged in a zigzag configuration on the first substrate; and a liquid crystal layer between the first and second substrates.
- According to another aspect of the present invention, a method of fabricating an IPS mode LCD is provided that includes: forming a color filter layer and a thin film transistor on a first substrate; forming a common electrode and a pixel electrode in a zigzag configuration on the thin film transistor; and forming a liquid crystal layer between the first substrate and a second substrate facing the first substrate. It is to be understood that both the foregoing general description and the following detailed description of the present invention are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.
- The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the principle of the invention. In the drawings:
FIG. 1 is a sectional view of a related art IPS mode LCD according to the related art;FIG. 2 is a plane view illustrating a schematic configuration of an IPS mode LCD having a COT structure according to an embodiment of the present invention;FIG. 3 is a sectional view taken along the line I-I′ ofFIG. 2 ;FIGS. 4A through 4C illustrate a method of fabricating an IPS mode LCD according to an embodiment of the present invention;FIGS. 5A and 5B are sectional views illustrating a schematic configuration of an IPS mode LCD having a TOC structure according to another embodiment of the present invention; andFIGS. 6A through 6C illustrate a method of fabricating an IPS mode LCD having a TOC structure according to another embodiment of the present invention.- The present invention will now be described more fully with reference to the accompanying drawings, in which exemplary embodiments of the invention are shown.
FIG. 2 is a plane view illustrating a schematic configuration of an IPS mode LCD having a COT structure according to an embodiment of the present invention, andFIG. 3 is a sectional view taken along the line I-I′ ofFIG. 2 .- The IPS mode LCD has a color filter on TFT (COT) structure that a color filter layer is formed on an array substrate including a thin film transistor and prevents light passing through the common electrode and the pixel electrode from being absorbed into the color filter layer, thereby enhancing brightness. Alternatively, the IPS mode LCD can be equivalently applied to IPS mode LCDs having a TFT on color filter (TOC) structure.
- As shown in
FIG. 2 , an array substrate of the IPS mode LCD is configured to include a plurality ofgate lines 208 arranged spaced apart by a predetermined distance in parallel with each other in a first direction, acommon line 231 arranged adjacent to and in parallel with thegate lines 208, and a plurality ofdata lines 210 perpendicularly crossing thegate lines 208 and thecommon line 231, and defining a pixel region together with the gate lines208. The gate lines208 and thedata lines 210 are formed by depositing a metal film such as Al, Cu, Ta, Ti, Mo, a Mo alloy, an Al alloy and the like and patterning the deposited metal film. - A thin film transistor (TFT) including a
gate electrode 209, asemiconductor layer 215, asource electrode 216, and adrain electrode 217 is formed at a crossing point of thegate line 208 and thedata line 210. Thesource electrode 216 is connected with thedata line 210 and the gate electrode is connected with thegate line 208. On the pixel region, apixel electrode 214 connected with thedrain electrode 217, and acommon electrode 213 arranged in parallel with thepixel electrode 214 and connected with thecommon line 231 are formed. Thecommon line 231 may be formed extending on thegate line 208 to form a storage capacitor. - The
pixel electrode 214 includes a plurality ofvertical parts 214band a singlehorizontal part 214a. The plurality ofvertical parts 214bare electrically connected with thedrain electrode 217 through adrain contact hole 233 and are spaced apart by a predetermined interval from one another. Also, the singlehorizontal part 214aconnects the plurality ofvertical parts 214bas one body. - The
common electrode 213 includes a plurality ofvertical parts 213band a singlehorizontal part 213a. The plurality ofvertical parts 213bextend downward from thecommon line 231, and are interdigitally arranged with thevertical parts 214bof thepixel electrode 214, and thehorizontal part 213aconnects the plurality ofvertical parts 213bas one body. - In particular, the
vertical parts 213bof thecommon electrode 213 are interdigitally arranged with and thevertical parts 214bof thepixel electrode 214 in a zigzag configuration. As shown inFIG. 2 , by forming thecommon electrode 213 and thepixel electrode 214 in a bent structure of a zigzag configuration and performing an alignment process in one direction, it is possible to change the direction of an electric field applied to the injected liquid crystal. - The bend angle may be set to be less than 300 or in a range of 60-120° except for 90° with respect to the alignment direction of the liquid crystal layer by the alignment process (i.e., rubbing process). Specifically, the bend angle is set to be less than 30° when the dielectric anisotropy is positive, or to be in a range of 60-120° except for 90° when the dielectric anisotropy is negative. Chiral dopants may be added to the liquid crystal layer.
- Thus, the
common electrode 213 and thepixel electrode 214 are arranged such that alignment characteristic of the liquid crystal are symmetric to each other. Accordingly, liquid crystal molecules on a unit pixel region are aligned only in one direction but in multiple directions, thereby inducing multiple domains permitting a variety of alignment directions in one pixel region. - The data lines210, the
pixel electrode 214 and/or thecommon electrode 213 has a bent structure. To prevent light leakage, ablack matrix layer 240 is formed on thegate lines 208, thedata lines 210 and the TFT region. Acolor filter layer 241 is also formed to display a desired color on the pixel region defined by thegate lines 208 and thedata lines 210 crossing the gate lines208. If thedata lines 210 are formed in a zigzag configuration, the black matrix layer and thecolor filter layer 241 are formed in a zigzag pattern. - The order of processes of forming the
color filter layer 241 and theblack matrix layer 240 may be exchanged. Also, thecolor filter layer 241 and theblack matrix layer 240 may be formed on different layers. Alternatively, theblack matrix layer 240 may be formed on the other substrate. - Referring to
FIG. 3 , the IPS mode LCD is formed by attaching afirst substrate 218 and asecond substrate 219 facing thefirst substrate 218, and forming aliquid crystal layer 230 between thefirst substrate 218 and thesecond substrate 219. In more detail, a metal film is deposited on thefirst substrate 218 and is then patterned to form the plurality of gate lines (see208 ofFIG. 2 ), and thegate electrode 209 branched from thegate line 208 and extending to the TFT site. - Next, a
gate insulating layer 220 is formed on the entire surface of thefirst substrate 218 including thegate electrode 209, and then asemiconductor layer 215 including anactive layer 215aand anohmic contact layer 215bis formed on thegate insulating layer 220. Also, thedata line 210 is formed on thegate insulating layer 220 so as to form a matrix configuration together with thegate line 208. Thesource electrode 216 anddrain electrode 217 of a thin film transistor are formed concurrently with thedate line 210 while thedata line 210 is formed. - A
passivation layer 228 is formed on the thin film transistor. Thepassivation layer 228 may be formed from an organic material such as a photo-acryl and BCB (benzo cyclobutene) or inorganic materials such as silicon oxide (SiOx) and silicon nitride (SiNx). - The
color filter layer 241 including adrain contact hole 233 is formed on the source/drain electrode 216/217 and thegate insulating layer 220 of the pixel region. Anovercoat layer 245 may be formed on an entire surface of a resultant structure of thefirst substrate 218 including thecolor filter layer 241 so as to planarize the resultant structure of thefirst substrate 218. Theovercoat layer 245 also may be omitted. Theovercoat layer 245 is formed of a film of organic or inorganic material. On theovercoat layer 245, thecommon electrode 213 and thepixel electrode 214 are formed. - The
common electrode 213 and thepixel electrode 214 are formed of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO) through which light passes well. Thecommon electrode 213 and thepixel electrode 214 are formed in a zigzag configuration. In addition to thecommon electrode 213 and thepixel electrode 214, thedata lines 210 may be also formed in a zigzag configuration. Further, theblack matrix layer 240 and thecolor filter layer 241 may be formed in a zigzag configuration. - The
black matrix layer 240 is formed on the TFT region, thegate lines 208 and thedata lines 210 to prevent light from being leaked. First and second alignment layers229 and226 are coated on facing surfaces of thefirst substrate 218 and thesecond substrate 219. - In the IPS mode LCD having a color filter on transistor (COT) structure, to prevent the
color filter layer 241 from absorbing light at regions where thecommon electrode 213 and thepixel electrode 214 are positioned, thecolor filter layer 241 on the regions where thecommon electrode 213 and thepixel electrode 214 are positioned is removed and a hole may be formed instead of thecolor filter layer 241. - Hereinafter, a method of fabricating the IPS mode LCD having the COT will be described.
FIGS. 4A through 4C illustrate a method of fabricating an IPS mode LCD according to an embodiment of the present invention. - First, referring to
FIG. 4A , a metal film is deposited on asubstrate 218 and is then patterned to form a plurality ofgate lines 208, and agate electrode 209 branched from each of thegate lines 208 at a TFT site. Next, agate insulating layer 220 is formed on an entire surface of thesubstrate 218 including thegate electrode 209, and then asemiconductor layer 215 including anactive layer 215aand anohmic contact layer 215bis formed on thegate insulating layer 220. Next, a plurality ofdata lines 210 are formed on thegate insulating layer 220 so as to form a matrix configuration together with the gate lines208. Source anddrain electrodes data lines 210 while thedata lines 210 are formed. The gate lines208 and thedata lines 210 are formed by depositing a metal film such as Al, Cu, Ta, Ti, Mo, a Mo ally, an Al alloy and the like and patterning the deposited metal film. - Referring to
FIG. 4B , a black resin is coated on an entire surface of a resultant structure of thesubstrate 218 and is then patterned to form ablack matrix layer 240 on the TFT, thedata line 210 and thegate line 208. Next, acolor filter layer 241 is formed on thesubstrate 218 including theblack matrix layer 240, and adrain contact hole 233 exposing thedrain electrode 217 is formed in thecolor filter layer 241. At this time, the order of processes of forming theblack matrix layer 240 and thecolor filter layer 241 may be exchanged. Thecolor filter layer 241 may be formed by printing, dyeing, polymer electrodeposition, ink jet deposition, pigment dispersion or the like. - After the
black matrix layer 240 and thecolor filter layer 241 are formed as above, anovercoat layer 245 is formed on an entire surface of thesubstrate 218 including thecolor filter layer 241 so as to planarize thesubstrate 218 as shown inFIG. 4C . Theovercoat layer 245 may be an organic material such as photo-acryl and BCB (benzo cyclobutene) or an inorganic material such as silicon oxide (SiOx) or silicon nitride (SiNx). Alternatively, theovercoat layer 245 may be omitted. - A
common electrode 213 and apixel electrode 214 are formed on theovercoat layer 245. At this time, thedrain electrode 217 is electrically connected with thepixel electrode 214 through thedrain contact hole 233. Thecommon electrode 213 and thepixel electrode 214 are formed of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO) through which light passes. - As shown in the plane view of
FIG. 4C , thecommon electrode 213 and thepixel electrode 214 are formed in a zigzag configuration. In addition to thecommon electrode 213 and thepixel electrode 214, thedata lines 210 may be also formed in a zigzag configuration. Further, theblack matrix layer 240 and thecolor filter layer 241 may be formed in a zigzag configuration. - Thus, by arranging electrodes formed on a unit pixel in a zigzag configuration, aligned liquid crystal molecules have a symmetric alignment characteristic. As a result, liquid crystal molecules on one pixel may be aligned into multi-domains having at least two domains, birefringence depending on the alignment direction of liquid crystal molecules is offset, thereby minimizing color shift phenomenon. Also, it becomes possible to widen a region where gray scale inversion does not exist, thereby enhancing viewing angle characteristic.
- Next, an alignment material is formed on an entire surface of a resultant structure of the
substrate 218 to form analignment layer 229. The alignment material may be polyimide, polyamide or the like. - Although the present embodiment shows and describes the IPS mode LCD having the COT structure, the effects of the first embodiment can be applied to an IPS mode LCD having a TOC structure.
FIGS. 5A and 5B are sectional views illustrating a schematic configuration of an IPS mode LCD having a TFT on color filter (TOC) structure according to another embodiment of the present invention, and taken along the line I-I′ like inFIG. 2 . - Referring to
FIG. 5A , the IPS mode LCD having the TOC structure includes a firsttransparent substrate 318, acolor filter layer 341 formed on the firsttransparent substrate 318, and anovercoat layer 328 formed on thecolor filter layer 341, for protecting thecolor filter layer 341. Alternatively, theovercoat layer 328 may be omitted. - A thin film transistor (TFT) is formed on the
overcoat layer 328. In detail, agate electrode 309 is first formed on theovercoat layer 328, agate insulating layer 320 is formed on an entire surface of the firsttransparent substrate 318 including thegate electrode 309, a semiconductor layer including anactive layer 315aand anohmic contact layer 315bis formed on thegate insulating layer 320, and a source/drain electrode 316/317 is formed on thesemiconductor layer 315. - To prevent light leakage, a
black matrix layer 340 is formed on the TFT and thegate line 310. Apassivation layer 345 is formed on an entire surface of the firsttransparent substrate 318 including theblack matrix layer 340 and the TFT. Adrain contact hole 333 is formed in thepassivation layer 345 so as to electrically connect thedrain electrode 317 with apixel electrode 314. - A
common electrode 313 is formed interdigitally with thepixel electrode 314 in a zigzag configuration. Thepixel electrode 314 is electrically connected with thedrain electrode 317 through thedrain contact hole 333. In addition to thecommon electrode 313 and thepixel electrode 314, thedata line 310 may be also formed in a zigzag configuration. - The
common electrode 313 and thepixel electrode 314 are formed of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO) through which light passes. First and second alignment layers329 and326 are coated on facing surfaces of thefirst substrate 318 and asecond substrate 319. Alternatively, theblack matrix layer 340 may be formed below the TFT. - Hereinafter, a method of fabricating the IPS mode LCD having the TOC structure shown in
FIG. 5A will be described in detail.FIGS. 6A through 6C illustrate a method of fabricating an IPS mode LCD having a TOC structure according to another embodiment of the present invention. - First, referring to
FIG. 6A , red (R), green (G) and blue (B) color filters is selected and coated on thesubstrate 318 to form acolor filter layer 341. Thecolor filter layer 341 is formed by printing, dyeing, polymer electrodeposition, pigment dispersion, ink jet deposition or the like. In pigment dispersion, a photosensitive resist film colored by a prepared pigment is coated on the substrate, patterned by an exposure, and developed to form thecolor filter layer 341. Thecolor filter layer 341 is, for example, formed from acryl resin or the like. In other words, the acryl resin is patterned by a pre-bake, an exposure, a development, and a post-bake. - After the
color filter layer 341 is formed as above, a thin film transistor (TFT) is formed on the resultant substrate including thecolor filter layer 341 as shown inFIG. 6B . Prior to forming the TFT, an overcoat layer is first formed of a BCB or a photo acryl material on thecolor filter layer 341. Thereafter, a metal film is deposited on theovercoat layer 328 and is then patterned, thereby forming a plurality of gate lines308 and agate electrode 309 branched from each of the gate lines308 at a TFT site. Next, agate insulating layer 320 is formed on an entire surface of thesubstrate 318 including thegate electrode 309, and then asemiconductor layer 315 including anactive layer 315aand anohmic contact layer 315bis formed on thegate insulating layer 320. - Next, a plurality of
data lines 310 are formed on thegate insulating layer 320 so as to form a matrix configuration together with the gate lines308. Source anddrain electrodes data lines 310 while thedata lines 310 are formed. The gate lines308 and thedata lines 310 are formed by depositing a metal film such as Al, Cu, Ta, Ti, Mo, a Mo ally, an Al alloy and the like and patterning the deposited metal film. - Referring to
FIG. 6C , a black resin is coated on an entire surface of a resultant structure of thesubstrate 318 including the TFT and is then patterned to form ablack matrix layer 340 on the TFT, thedata line 310 and the gate line308. Next, apassivation layer 345 is formed on theresultant substrate 318 including theblack matrix layer 340. Thepassivation layer 345 may be formed of organic materials such as a photo-acryl or BCB (benzo cyclobutene) or inorganic materials such as silicon oxide (SiOx) and a silicon nitride (SiNx). - After the
passivation layer 345 is formed, adrain contact hole 333 exposing thedrain electrode 317 is formed in thepassivation layer 345. Acommon electrode 313 and apixel electrode 314 are formed on thepassivation layer 345 including thedrain contact hole 333. At this time, thedrain electrode 317 is electrically connected with thepixel electrode 314 through thedrain contact hole 333. - The
common electrode 313 and thepixel electrode 314 are formed of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO) through which light passes. Thecommon electrode 313 and thepixel electrode 314 are formed in a zigzag configuration. In addition to thecommon electrode 313 and thepixel electrode 314, thedata lines 310 may be also formed in a zigzag configuration. Further, theblack matrix layer 340 and thecolor filter layer 341 may be formed in a zigzag configuration. - Thus, by arranging electrodes formed on a unit pixel in a zigzag configuration, aligned liquid crystal molecules have a symmetric alignment characteristic. As a result, liquid crystal molecules on one pixel may be aligned into multiple domains having at least two domains, birefringence depending on the alignment direction of liquid crystal molecules is offset, thereby minimizing color shift phenomenon. Also, it becomes possible to widen a region where gray scale inversion does not exist, thereby enhancing viewing angle characteristic.
- Next, an alignment material is formed on an entire surface of a resultant structure of the
substrate 318 to form analignment layer 329. The alignment material may be polyimide, polyamide or the like. - As described above, in the IPS mode LCD of the present invention, the color filter layer is formed on the same substrate as the TFT and electrode patterns are arranged in a zigzag configuration, thereby inducing multiple domains to offset birefringence depending on the alignment direction of liquid crystal molecules and to minimize color shift phenomenon. Also, it becomes possible to widen a region where gray scale inversion does not exist, thereby enhancing viewing angle characteristic. Also, in the present invention, the color filter layer is formed on the same substrate as the TFT, thereby enhancing color reproducibility and reducing process time to enhance the production yield.
- It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention. Thus, it is intended that the present invention covers the modifications and variations of this invention provided they come within the scope of the appended claims and their equivalents.
Claims (40)
1. An in-plane switching (IPS) mode liquid crystal display (LCD) comprising:
a first substrate and a second substrate;
a thin film transistor and a color filter layer disposed on the first substrate;
a common electrode and a pixel electrode arranged in a zigzag configuration on the first substrate; and
a liquid crystal layer between the first and second substrates.
2. The IPS mode LCD ofclaim 1 , wherein the color filter layer is closer to the first substrate than the thin film transistor is to the first substrate.
3. The IPS mode LCD ofclaim 2 , further comprising an overcoat layer disposed on the color filter layer.
4. The IPS mode LCD ofclaim 1 , wherein the color filter layer is closer to the liquid crystal layer than the thin film transistor is to the liquid crystal layer.
5. The IPS mode LCD ofclaim 4 , further comprising an overcoat layer disposed on the color filter layer.
6. The IPS mode LCD ofclaim 1 , further comprising:
a gate line and a data line crossing with each other on the first substrate and defining a pixel region; and
a black matrix layer on the thin film transistor, the gate line and the data line.
7. The IPS mode LCD ofclaim 6 , wherein the thin film transistor is disposed at a crossing portion of the gate and data lines.
8. The IPS mode LCD ofclaim 6 , wherein the black matrix layer is formed of black resin.
9. The IPS mode LCD ofclaim 1 , further comprising a black matrix layer disposed on the first substrate.
10. The IPS mode LCD ofclaim 9 , wherein the black matrix layer and color filter layer are laterally adjacent to each other.
11. The IPS mode LCD ofclaim 9 , wherein the black matrix layer is closer to the liquid crystal layer than the color filter layer is to the liquid crystal layer.
12. The IPS mode LCD ofclaim 11 , wherein the thin film transistor is closer to the liquid crystal layer than the color filter layer is to the liquid crystal layer.
13. The IPS mode LCD ofclaim 12 , further comprising an overcoat layer that covers the black matrix layer.
14. The IPS mode LCD ofclaim 13 , wherein the overcoat layer is disposed in a pixel region laterally adjacent to the black matrix layer.
15. The IPS mode LCD ofclaim 13 , wherein the common and pixel electrodes are disposed on the overcoat layer.
16. The IPS mode LCD ofclaim 10 , further comprising an overcoat layer that covers the black matrix layer and color filter layer.
17. The IPS mode LCD ofclaim 16 , wherein the common and pixel electrodes are disposed on the overcoat layer.
18. The IPS mode LCD ofclaim 1 , wherein the common and pixel electrodes are disposed on the color filter layer.
19. The IPS mode LCD ofclaim 1 , wherein the common and pixel electrodes are disposed closer to the liquid crystal layer than the thin film transistor is to the liquid crystal layer.
20. The IPS mode LCD ofclaim 1 , further comprising alignment films disposed on the first and second substrates.
21. The IPS mode LCD ofclaim 1 , wherein the zigzag configuration has a bend angle less than300 with respect to an alignment direction of the liquid crystal layer.
22. The IPS mode LCD ofclaim 1 , wherein the zigzag configuration has a bend angle range of 60-120°, except 90°, with respect to an alignment direction of the liquid crystal layer.
23. The IPS mode LCD ofclaim 1 , wherein the common and pixel electrodes are formed of a transparent conductive material.
24. The IPS mode LCD ofclaim 1 , wherein the common and pixel electrodes have a plurality of bends.
25. A method of fabricating an IPS mode LCD, the method comprising:
forming a color filter layer and a thin film transistor on a first substrate;
forming a common electrode and a pixel electrode in a zigzag configuration after forming the thin film transistor; and
providing a liquid crystal layer between the first substrate and a second substrate facing the first substrate.
26. The method ofclaim 25 , wherein the color filter layer is closer to the first substrate than the thin film transistor is to the first substrate.
27. The method ofclaim 25 , wherein the color filter layer is closer to the liquid crystal layer than the thin film transistor is to the liquid crystal layer.
28. The method ofclaim 25 , further comprising forming a black matrix layer on the thin film transistor.
29. The method ofclaim 25 , further comprising forming a black matrix layer on the first substrate.
30. The method ofclaim 25 , wherein the zigzag configuration has a bend angle less than 30° with respect to an alignment direction of the liquid crystal layer.
31. The method ofclaim 25 , wherein the zigzag configuration has a bend angle range of 60-120°, except 90°, with respect to an alignment direction of the liquid crystal layer.
32. An in-plane switching (IPS) mode liquid crystal display (LCD) comprising:
a first substrate and a second substrate;
a thin film transistor and a color filter layer disposed on the first substrate;
a liquid crystal layer between the first and second substrates; and
a common electrode and a pixel electrode arranged on the first substrate in a configuration that produces multiple domains in the liquid crystal layer when liquid crystal molecules in the liquid crystal layer are aligned.
33. The IPS mode LCD ofclaim 32 , wherein the common and pixel electrodes are arranged such that when the liquid crystal molecules are aligned, the liquid crystal molecules are symmetric.
34. The IPS mode LCD ofclaim 32 , wherein the common and pixel electrodes are non-linear.
35. The IPS mode LCD ofclaim 32 , further comprising a black matrix layer disposed on the first substrate and laterally adjacent to the color filter layer.
36. The IPS mode LCD ofclaim 32 , further comprising a black matrix layer disposed on the first substrate and closer to the liquid crystal layer than the color filter layer is to the liquid crystal layer.
37. The IPS mode LCD ofclaim 32 , wherein the thin film transistor is closer to the liquid crystal layer than the color filter layer is to the liquid crystal layer.
38. The IPS mode LCD ofclaim 32 , further comprising:
a black matrix layer disposed on the first substrate; and
an overcoat layer that covers the black matrix layer.
39. The IPS mode LCD ofclaim 38 , wherein the overcoat layer is disposed in a pixel region laterally adjacent to the black matrix layer.
40. The IPS mode LCD ofclaim 32 , wherein the common and pixel electrodes have a plurality of bends.
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| KR1020030070131AKR101001520B1 (en) | 2003-10-09 | 2003-10-09 | Transverse electric field type liquid crystal display device and manufacturing method thereof |
| KRP2003-70131 | 2003-10-09 |
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Also Published As
| Publication number | Publication date |
|---|---|
| US20110157534A1 (en) | 2011-06-30 |
| KR20050034261A (en) | 2005-04-14 |
| US8199302B2 (en) | 2012-06-12 |
| KR101001520B1 (en) | 2010-12-14 |
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