US20040209475A1 - Planarization process for semiconductor substrates - Google Patents

Abstract

A method of manufacturing semiconductor devices using an improved chemical mechanical planarization process for the planarization of the surfaces of the wafer on which the semiconductor devices are formed. The improved chemical mechanical planarization process includes the formation of a flat planar surface from a deformable coating on the surface of the wafer filling in between the surface irregularities prior to the planarization of the surface through a chemical mechanical planarization process.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS
• This application is a continuation of application Ser. No. 09/832,560, filed Apr. 11, 2001, pending, which is a continuation of application Ser. No. 08/862,752, filed May 23, 1997, now U.S. Pat. No. 6,331,488, issued Dec. 18, 2001.[0001]
BACKGROUND OF THE INVENTION
• 1. Field of the Invention[0002]
• The present invention relates to the manufacturing of semiconductor devices. More particularly, the present invention relates to an improved chemical mechanical planarization process for the planarization of surfaces in the manufacturing of semiconductor devices.[0003]
• 2. State of the Art[0004]
• Typically, integrated circuits are manufactured by the deposition of layers of predetermined materials to form the desired circuit components on a silicon wafer semiconductor substrate. As the layers are deposited on the substrate wafer to form the desired circuit component, the planarity of each of the layers is an important consideration because the deposition of each layer produces a rough, or nonplanar topography initially on the surface of the wafer substrate and, subsequently, on any previously deposited layer of material.[0005]
• Typically, photolithographic processes are used to form the desired circuit components on the wafer substrate. When such photolithographic processes are pushed to their technological limits of circuit formation, the surface on which the processes are used must be as planar as possible to ensure success in circuit formation. This results from the requirement that the electromagnetic radiation used to create a mask, which is used in the formation of the circuits of the semiconductor devices in wafer form, must be accurately focused at a single level, resulting in the precise imaging over the entire surface of the wafer. If the wafer surface is not sufficiently planar, the resulting mask will be poorly defined, causing, in turn, a poorly defined circuit which may malfunction. Since several different masks are used to form the different layers of circuits of the semiconductor devices on the substrate wafer, any nonplanar areas of the wafer will be subsequently magnified in later deposited layers.[0006]
• After layer formation on the wafer substrate, either a chemical etch-back process of planarization, or a global press planarization process typically followed by a chemical etch-back process of planarization, or chemical mechanical planarization process may be used to planarize the layers before the subsequent deposition of a layer of material thereover. In this manner, the surface irregularities of a layer may be minimized so that subsequent layers deposited thereon do not substantially reflect the irregularities of the underlying layer.[0007]
• One type of chemical etch-back process of planarization, illustrated in EUROPEAN PATENT APPLICATION 0 683 511 A2, uses a coating technique in which an object having a flat surface is used to planarize a coating material applied to the wafer surface prior to a plasma reactive ion etching process being used to planarize the wafer surface. Often, however, the planarization surface will contain defects, such as pits or other surface irregularities. These may result from defects in the flat surface used for planarizing or from foreign material adhering to the flat surface. The etching of such a wafer surface having irregularities will, at best, translate those undesirable irregularities to the etched surface. Further, since some etching processes may not be fully anisotropic, etching such irregular surfaces may increase the size of the defects in the etched wafer surface.[0008]
• One type of global press planarization process, illustrated in U.S. Pat. No. 5,434,107, subjects a wafer with features formed thereon having been coated with an inter-level dielectric material to an elevated temperature while an elevated pressure is applied to the wafer using a press until the temperature and pressure conditions exceed the yield stress of the upper film on the wafer so that the film will attempt to be displaced into and fill both the microscopic and local depressions in the wafer surface. It should be noted that the film is only deformed locally on the wafer, not globally, during the application of elevated temperature and pressure since the object contacting the surface of the wafer will only contact the highest points or areas on the surface of the wafer to deform or displace such points or areas of material on the entire wafer surface. Other nonlocal depressions existing in the wafer are not affected by the pressing as sufficient material is not displaced thereinto. Subsequently, the temperature and pressure are reduced so that the film will become firm again thereby leaving localized areas having a partially planar upper surface on portions of the wafer while other portions of the wafer surface will remain nonplanar.[0009]
• In one instance, global planar surfaces are created on a semiconductor wafer using a press located in a chamber. Referring to drawing FIG. 1, a[0010]global planarization apparatus100 is illustrated. Theglobal planarization apparatus100 serves to press the surface of asemiconductor wafer120 having multiple layers including a deformableoutermost layer122 against a fixedpressing surface132. The surface of thedeformable layer122 will assume the shape and surface characteristics of thepressing surface132 under the application of force to thewafer120. Theglobal planarization apparatus100 includes a fully enclosed apparatus having a hollow cylindrical chamber body and having open top andbottom ends113 and114, respectively, andinterior surface116 and anevacuation port111. Abase plate118 having aninner surface117 is attached to thebottom end114 ofchamber body112 bybolts194. Apress plate130 is removably mounted to thetop end113 ofchamber body112 withpressing surface132 facingbase plate118. Theinterior surface116 ofchamber body112, thepressing surface132 ofpress plate130 and theinner surface117 ofbase plate118 define a sealable chamber.Evacuation port111 can be positioned through any surface, such as throughbase plate118, and not solely throughchamber body112.
• The[0011]press plate130 has apressing surface132 with dimensions greater than that ofwafer120 and being thick enough to withstand applied pressure.Press plate130 is formed from nonadhering material capable of being highly polished so thatpressing surface132 will impart the desired smooth and flat surface quality to the surface of thedeformable layer122 onwafer120. Preferably, the press plate is a disc shaped quartz optical flat.
• A[0012]rigid plate150 having top andbottom surfaces152 and154, respectively, andlift pin penetrations156 therethrough is disposed withinchamber body112 with thetop surface152 substantially parallel to and facing thepressing surface132. Therigid plate150 is constructed of rigid material to transfer a load under an applied force with minimal deformation.
• A uniform force is applied to the[0013]bottom surface154 ofrigid plate150 through the use of abellows arrangement140 and relatively pressurized gas to driverigid plate150 towardpressing surface132. Relative pressure can be achieved by supplying gas under pressure or, if thechamber body112 is under vacuum, allowing atmospheric pressure intobellows arrangement140 to drive the same. Thebellows arrangement140 is attached at one end to thebottom surface154 ofrigid plate150 and to theinner surface117 ofbase plate118 with a boltedmounting plate115 to form a pressure containment that is relatively pressurized throughport119 inbase plate118. One ormore brackets142 are mounted to theinner surface117 of thebase plate118 to limit the motion towardbase plate118 of therigid plate150 whenbellows arrangement140 is not relatively pressurized. The application of force through the use of a relatively pressurized gas ensures the uniform application of force to thebottom surface154 ofrigid plate150. The use ofrigid plate150 will serve to propagate the uniform pressure field with minimal distortion. Alternately, thebellows arrangement140 can be replaced by any suitable means for delivering a uniform force, such as a hydraulic means.
• A flexible[0014]pressing member160 is provided having upper andlower surfaces162 and164, respectively, which are substantially parallel to thetop surface152 ofrigid plate150 and pressingsurface132.Lift pin penetrations166 are provided through flexible pressingmember160. The flexiblepressing member160 is positioned with itslower surface164 in contact with thetop surface152 ofrigid plate150 andlift pin penetrations166 aligned withlift pin penetrations156 inrigid plate150. Theupper surface162 of the flexiblepressing member160 is formed from a material having a low viscosity that will deform under an applied force to closelift pin penetrations166 and uniformly distribute the applied force to the wafer, even when thetop surface152, theupper surface162 and/or thelower surface164 is not completely parallel to thepressing surface132 or when thickness variations exist in thewafer120,rigid plate150 or flexiblepressing member160, as well as any other source of nonuniform applied force.
• [0015]Lift pins170 are slidably disposable throughlift pin penetrations156 and166, respectively, in the form of apertures, to contact the bottom surface126 ofwafer120 for lifting thewafer120 off thetop surface162 of flexiblepressing member160. Movement of thelift pins170 is controlled by liftpin drive assembly172, which is mounted on theinner surface117 of thebase plate118. The lift pin drive assembly provides control of thelift pins170 through conventional means.Lift pins170 and liftpin drive assembly172 are preferably positioned outside the pressure boundary defined by thebellows arrangement140 to minimize the number of pressure boundary penetrations. However, they can be located within the pressure boundary, if desired, in a suitable manner.
• A multi-piece assembly consisting of[0016]lower lid180,middle lid182,top lid184,gasket186 andtop clamp ring188 are used to secure thepress plate130 to thetop end113 ofchamber body112. The ring-shapedlower lid180 is mounted to thetop end113 ofchamber body112 and has a portion with an inner ring dimension smaller thanpress plate130 so thatpress plate130 is seated onlower lid180.Middle lid182 andtop lid184 are ring-shaped members having an inner ring dimension greater thanpress plate130 and are disposed aroundpress plate130.Middle lid182 is located betweenlower lid180 andtop lid184. Agasket186 andtop clamp ring188 are members having an inner ring dimension less than that ofpress plate130 and are seated on the surface ofpress plate130 external to the chamber.Bolts194secure press plate130 to thechamber body112.
• [0017]Heating elements190 andthermocouples192 control the temperature of themember160.
• In operation, the[0018]top clamp ring188,gasket186,top lid184, andmiddle lid182 are removed from thebody112 and thepress plate130 lifted fromlower lid180. Thebellows arrangement140 is deflated andrigid plate150 is seated on stand offbrackets142. Thewafer120 is placed on the flexible pressingmember160 with the side of thewafer120 opposite thedeformable layer122 in contact with flexible pressingmember160. Thepress plate130 is mounted on thelower lid180 and themiddle lid182 andupper lid184 are installed and tightened usinggasket186 andtop clamp ring188 sealingpress plate130 betweentop clamp ring188 andlower lid180. The temperature of flexiblepressing member160,press plate130, andrigid plate150 are adjusted through the use ofheating elements190 monitored bythermocouples192 to vary the deformation characteristics of thedeformaable layer122 ofwafer120.Chamber body112 is evacuated throughport119 to a desired pressure.
• A pressure differential is established between the interior and exterior of the[0019]bellows arrangement140, whether by pressurizing or by venting when thechamber body112 having been evacuated thereby drivesrigid plate150, flexible pressingmember160, andwafer120 towardpress plate130 and bringsdeformable layer122 ofwafer120 into engagement withpressing surface132 ofpress plate130. Upon engagement ofwafer120 withpress plate130, the continued application of force will deform the flexible pressingmember160 which, in turn, serves to closelift pin penetrations166 and distribute the force to ensure thewafer120 experiences uniform pressure on itsdeformable layer122. After thewafer120 has been in engagement withpressing surface132 for a sufficient time to causedeformable layer122 to globally correspond to thepressing surface132, thedeformable layer122 is hardened or cured. The pressure is released from thebellows arrangement140, thereby retractingwafer120, flexible pressingmember160, andrigid plate150 from thepress plate130. The downward movement ofrigid plate150 will be terminated by its engagement with stand off offsetbrackets142.
• Once the[0020]rigid plate150 is fully retracted, the vacuum is released inchamber body112. Lift pins170 are moved throughlift pin penetrations156 in therigid plate150 andlift pin penetrations166 in the flexible pressingmember160 to liftwafer120 off the flexible pressingmember160. Thetop clamp ring188,gasket186,top lid184,middle lid182, andpress plate130 are removed and thewafer120 is removed off lift pins170 for further processing.
• Once the wafer is removed, it will be subjected to an etch to establish the planar surface at the desired depth. A system used or depicted in FIG. 1 provides an optimal method of deforming a flowable, curable material to form a generally planarized surface. However, the method is still subject to yielding a wafer surface with irregularities therein, and the need for the subsequent etch to define the desired surface height will still result in undesirable transfer and possible enlargement of any such surface irregularities.[0021]
• Conventional chemical mechanical planarization processes are used to planarize layers formed on wafer substrates in the manufacture of integrated circuit semiconductor devices. Typically, a chemical mechanical planarization (CMP) process planarizes a nonplanar irregular surface of a wafer by pressing the wafer against a moving polishing surface that is wetted with a chemically reactive, abrasive slurry. The slurry is usually either basic or acidic and generally contains alumina or silica abrasive particles. The polishing surface is usually a planar pad made of a relatively soft, porous material, such as a blown polyurethane, mounted on a planar platen.[0022]
• Referring to drawing FIG. 2, a conventional chemical mechanical planarization apparatus is schematically illustrated. A[0023]semiconductor wafer1112 is held by awafer carrier1111. A soft,resilient pad1113 is positioned between thewafer carrier1111 and thewafer1112. Thewafer1112 is held against thepad1113 by a partial vacuum. Thewafer carrier1111 is continuously rotated by adrive motor1114 and is also designed for transverse movement as indicated by thearrows1115. The rotational and transverse movement is intended to reduce variability in material removal rates over the surface of thewafer1112. The apparatus further comprises arotating platen1116 on which is mounted apolishing pad1117. Theplaten1116 is relatively large in comparison to thewafer1112, so that during the chemical mechanical planarization process, thewafer1112 may be moved across the surface of thepolishing pad1117 by thewafer carrier1111. A polishing slurry containing a chemically reactive solution, in which abrasive particles are suspended, is delivered through asupply tube1121 onto the surface of thepolishing pad1117.
• Referring to drawing FIG. 3 a typical polishing table is illustrated in top view. The surface of the polishing table[0024]1 is precision machined to be flat and may have a polishing pad affixed thereto. The surface of the table rotates the polishing pad past one ormore wafers3 to be polished. Thewafer3 is held by a wafer holder, as illustrated hereinbefore, which exerts vertical pressure on the wafer against the polishing pad. The wafer holder may also rotate and/or orbit the wafer on the table during wafer polishing.
• Alternately, the table[0025]1 may be stationary and serve as a supporting surface forindividual polishing platens2, each having their own individual polishing pad. As illustrated in U.S. Pat. No. 5,232,875, each platen may have its own mechanism for rotating or orbiting theplaten2. A wafer holder will bring a wafer in contact with theplaten2 and an internal or external mechanism to the wafer holder may be used to also rotate the wafer during the polishing operation. In a polishing table having multiple individual platens, each platen must be precision machined.
• The[0026]wafers3 are typically stored and transported in wafer cassettes which hold multiple wafers. Thewafers3 or wafer holders are transported between the wafer cassettes and the polishing table1 using the wafer transport arm4. The wafer transport arm4 will transport thewafers3 between the polishing table and thestations5, which may be wafer cassette stations or wafer monitoring stations.
• The polishing characteristics of the polishing pad will change during use as[0027]multiple wafers3 are polished. The glazing or changing of the polishing characteristics will affect the planarization of the surface of thewafers3 if the pads are not periodically conditioned and unglazed. Thepad conditioner6 is used to periodically unglaze the surface of the polishing pad. Thepad conditioner6 has a range of motion which allows it to come in contact with the individual pads and conduct the periodic unglazing and then to move to its rest position.
• The pressure between the surface of the wafer to be polished and the moving polishing pad may be generated by either the force of gravity acting on the wafer and the wafer carrier or by mechanical force applied normal to the wafer surface. The slurry may be delivered or injected through the polishing pad onto its surface. The planar platens may be moved in a plane parallel to the pad surface with either an orbital, fixed-direction vibratory or random direction vibratory motion.[0028]
• While a chemical mechanical planarization process is an effective process to planarize the surface of a wafer, variations in height on the surface to be planarized by the chemical mechanical planarization process, although minimized through the chemical mechanical planarization process, will often not be completely removed to yield an optimally planar surface. As is well known in the art, the chemical mechanical planarization process polishing pad will deform, or “dish,” into recesses between structures of the surface of the wafer. The structure spacing on the wafer which will yield this “dishing” is clearly a function of various factors, such as the pad composition, the polishing pressure, etc. This pad “dishing” will clearly lead to less than optimal planarization of the surface of the wafer. Further, the surface irregularities extending into or down to the wafer surface being planarized tend to collect slurry, thereby causing such areas of the wafer to be subjected to the corrosive effects of the slurry longer than other areas of the wafer surface which do not collect the slurry.[0029]
• To help minimize polishing pad deformation (dishing) caused by surface irregularities formed by the integrated circuit components on the wafer surface, dummy structures have also been included on the wafer surface in an attempt to provide a more uniform spacing of structures on the wafer surface. While the use of such dummy structures will often be useful, the ultimate result is also highly dependent upon the later chemical mechanical planarization process conditions.[0030]
• Therefore, a need exists to reduce the surface irregularities on a wafer before the chemical mechanical planarization process to facilitate planarization of the wafer surface irregularities by such process and to facilitate planarization which provides greater latitude in the chemical mechanical planarization process parameters.[0031]
BRIEF SUMMARY OF THE INVENTION
• The present invention relates to an improved chemical mechanical planarization process for the planarization of surfaces in the manufacturing of semiconductor devices. The improved chemical mechanical planarization process of the present invention includes the formation of a flat, planar surface from a deformable, planar coating on the surface of the wafer filling the areas between the surface irregularities prior to the planarization of the surface through a chemical mechanical planarization process.[0032]
BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS
• FIG. 1 is a side view of a global planarization apparatus;[0033]
• FIG. 2 is an illustration of a conventional rotational chemical mechanical planarization apparatus;[0034]
• FIG. 3 is an illustration of a top view of a polishing table of a conventional rotational chemical mechanical planarization apparatus;[0035]
• FIG. 4 is a cross-sectional view of a portion of a wafer substrate having electrical circuit components formed thereon with a coating thereover;[0036]
• FIG. 5 is a cross-sectional view of a portion of a wafer substrate having electrical circuit components formed thereon, a coating thereover, a deformable coating, and a portion of a flat pressing member used in the present invention;[0037]
• FIG. 6 is a cross-sectional view of a portion of a wafer substrate having electrical circuit components formed thereon, a coating thereover, and a deformable coating after the deformation thereof using a flat pressing member in the process of the present invention;[0038]
• FIG. 7 is a cross-sectional view of a portion of a wafer substrate having electrical circuit components formed thereon and a coating material between the electrical circuit components after the chemical mechanical planarization process of the present invention of the configuration illustrated in drawing FIG. 6;[0039]
• FIG. 8 is a cross-sectional view of a portion of a wafer substrate, a resilient member located below the wafer substrate, a support member located below the resilient member and electrical circuit components formed on the wafer substrate, a coating located over the electrical circuits, and a deformable coating located over the coating formed over the electrical circuits after the deformation thereof using a flat pressing member in the process of the present invention;[0040]
• FIGS. 9A and 9B are a process flow description of the improved chemical mechanical planarization process of the present invention as illustrated in FIG. 7; and[0041]
• FIGS. 10A and 10B are a process flow description of the improved chemical mechanical planarization process of the alternative embodiment of the present invention illustrated in drawing FIG. 8.[0042]
DETAILED DESCRIPTION OF THE INVENTION
• Referring to drawing FIG. 4, a portion of a[0043]wafer substrate20 is illustrated having portions ofelectrical circuit components22 formed thereon and a coating ofmaterial24, typically a metallic material, a semiconductor material, or an insulatingmaterial24, covering theelectrical circuit components22 and portions of thewafer substrate20 located between theelectrical circuit components22. As illustrated, the portions of theelectrical circuit components22 are formed havingupper surfaces26 thereon while the coating of insulatingmaterial24 is formed having an irregularnonplanar surface28 extending over theupper surfaces26 of theelectrical circuit components22. The insulatingmaterial24 typically comprises an insulating oxide or other dielectric material and may include a plurality of layers of such insulating or other types of material, as desired. In this instance, for convenience, the insulatingmaterial24 is illustrated covering thewafer substrate20 and theelectrical circuit components22 thereon regardless of the number of layers thereof.
• It can be easily seen that if only portions of the[0044]nonplanar surface28 of insulatingmaterial24 are removed for the formation of additional electrical circuit components, the nonplanar surface of the insulatingmaterial24 would cause masking and etching problems as the masking of the insulatingmaterial24 as well as the etching thereof would not be uniform. Therefore, thenonplanar surface28 must be globally planarized to facilitate further electrical circuit component formation.
• At this juncture, if a conventional chemical mechanical planarization process is used on the[0045]wafer substrate20, the surface of the wafer will be subject to a reactive slurry and one or more polishing pads used in the process in an attempt to form a planar surface on the insulatingmaterial24 covering theelectrical circuit components22. Some of the problems associated with such a conventional chemical mechanical planarization process are that the reactive slurry is unevenly distributed about thewafer substrate20 and the pad used in the process, that particulates removed from thewafer substrate20 and insulatingmaterial24 during the polishing process may become lodged in the polishing pad, forming a glaze thereon, thereby affecting the rate of removal by the pad and causing the polishing pad to unevenly remove material during the process, and that as the chemical mechanical planarization process begins by polishing an irregular surface on the wafer, such surface causes the deformation of the polishing pad (dishing), thereby further inducing irregularities not initially present in the surface being polished, the induced irregularities of the surface of the wafer during the chemical mechanical planarization of the wafer surface being caused by the dishing of the polishing pad from the force applied thereto and the deformation of the pad by surface areas of the wafer. Therefore, before starting the chemical mechanical planarization process of the surface of a wafer, it is desirable to have the surface to be planarized as nearly planar as possible to help ensure the even removal of material therefrom and to help eliminate the deformation of the polishing pad(s) being used to thereby, in turn, help minimize any surface irregularities being introduced into the surface being planarized by such pad deformation.
• Referring to drawing FIG. 5, the improved chemical mechanical planarization process of the present invention is illustrated in relation to a[0046]wafer substrate20 havingelectrical circuit components22 thereon and a coating of insulatingmaterial24 thereover. In the improved chemical mechanical planarization process of the present invention, prior to the initiation of the chemical mechanical planarization of thewafer substrate20,electrical circuit components22 and insulatingmaterial24, a layer ofdeformable material30 is coated or deposited over the insulatingmaterial24. Thedeformable material30 may be of any suitable type material that readily flows over thenonplanar surface28 of the insulatingmaterial24 and that is subsequently solidified through curing or hardening or other type of solidification. Alternately, thedeformable material30, in some instances, may be a readily deformable metal capable of being deformed under low temperature and low pressure which may be readily deposited over the insulatingmaterial24 through well known techniques and processes. Whatever the type ofdeformable material30, thedeformable material30 is applied over the insulatingmaterial24 to any desired depth but is typically applied in a thickness greater than the thickness of the surface topography of the wafer, the thickness of thedeformable material30 initially applied to the wafer depending upon the type of material selected for such use, the dimensions of the surface irregularities, etc. After the application of the layer ofdeformable material30 to the insulatingmaterial24 and before thedeformable material30 has cured, hardened, or solidified to the point which it is not capable of being deformed, anobject32 having a flatplanar surface34 thereon is forced under pressure into thedeformable material30 to form a flat,planar surface36 thereon and is kept in contact with thedeformable material30 while thedeformable material30 cures, hardens, or solidifies. Theobject32 may be of any well known suitable material, such as an optical quartz glass disc shaped object, having a desired flat, planar ground surface thereon which may be used to be pressed into thedeformable material30 to form a flat,planar surface36 thereon. If desired, theobject32 may be tailored to meet process requirements of the desired range of pressure to be applied to thedeformable material30 and the method of curing, hardening or solidifying thedeformable material30. Further, if desired, the flat,planar surface34 on theobject32 may have a shape other than a flat,planar surface34, such as either a concave surface, convex surface, concave and convex surface, or any type desired surface suitable in a chemical mechanical planarization process. Additionally, the flat,planar surface34 of theobject32 may be coated with a suitable release agent coating to facilitate its removal from thedeformable material30 after the curing, hardening or solidification thereof.
• The[0047]deformable material30 may be any suitable well known organic type, such as monomers, monomer mixtures, oligomers, and oligomer mixtures that are solidified through curing. Alternately, thedeformable material30 may be any suitable type epoxy resin which may be cured using an acid catalyst.
• The[0048]object32 is kept through the application of suitable pressure thereto, or application of pressure to thewafer substrate20, or the application of pressure to both theobject32 and thewafer substrate20 in engagement with thedeformable material30 until such material has hardened or solidified to form a permanently flat,planar surface36 thereon being the mirror image of the flat,planar surface34 on theobject32. At such time, theobject32 is removed from engagement with thedeformable material30.
• Referring to drawing FIG. 6, before the chemical mechanical planarization process of the present invention commenced the[0049]wafer substrate20 havingelectrical circuit components22 andinsulative material24 thereon is illustrated having thedeformable material30 having a flat,planar surface36 thereon providing a global flat, planar surface on the wafer substrate. As illustrated, the flat,planar surface36 on thedeformable material30 is a flat, planar surface from which the chemical mechanical planarization process is to begin on thewafer substrate20. In this manner, a conventional, well known chemical mechanical planarization process as described hereinbefore can be used to form flat planar surfaces on the insulatingmaterial24. By starting with a globally flat,planar surface36 on thedeformable material30, any deformation of the pad1117 (FIG. 2) is minimized. Also, any nonuniform planarization which may occur due to the uneven distribution of the chemical reactive solution and abrasives included therein or material particles from the surfaces being planarized being collected or present in thepolishing pad1117 resulting from surface irregularities is minimized. In this manner, by starting the chemical mechanical planarization process from a globally flat,planar surface36 of thedeformable material30, as the chemical mechanical planarization process is carried out, the surfaces of the layers being planarized remain flat and planar because thepolishing pad1117 is subjected to more uniform loading and operation during the process. This is in clear contrast to the use of a chemical mechanical planarization process beginning from an irregular nonplanar surface as is typically carried out in the prior art.
• Referring to drawing FIG. 7, illustrated is a[0050]wafer substrate20,electrical circuit components22 and insulatingmaterial24 which have been planarized using the improved chemical mechanical planarization process of the present invention. As illustrated, a flat,planar surface40 has been formed through the use of the chemical mechanical planarization process of the present invention as described hereinbefore with the flat,planar surface40 including flatplanar surface28′ of the insulatingmaterial24.
• Referring to drawing FIG. 8, an alternate apparatus and method of the improved chemical mechanical planarization process of the present invention is illustrated. The present invention is illustrated in relation to a[0051]wafer substrate20 havingelectrical circuit components22 thereon and a coating of insulatingmaterial24 thereover. In the improved chemical mechanical planarization process of the present invention, prior to the initiation of the chemical mechanical planarization of thewafer substrate20,electrical circuit components22 and insulatingmaterial24, a layer ofdeformable material30 is coated or deposited over the insulatingmaterial24. Thedeformable material30 may be of any suitable type material which readily flows over thenonplanar surface28 of the insulatingmaterial24 that is subsequently solidified through curing or hardening. Thedeformable material30 is applied over the insulatingmaterial24 to any desired depth but is typically applied in a thickness greater than the surface topography of the wafer, the thickness of thedeformable material30 initially applied to the wafer depending upon the type of material selected for such use, the dimensions of the surface irregularities, etc.
• After the application of the layer of[0052]deformable material30 to the insulatingmaterial24 and before thedeformable material30 has cured, hardened, or solidified to the point which it is not capable of being deformed, a flexibleresilient member50 is placed under thewafer substrate20 between thewafer substrate20 and thesubstrate60 on which thewafer substrate20 is supported and anobject32 having a flatplanar surface34 thereon is forced under pressure into flat,planar surface36 of thedeformable material30 to form a globally flat,planar surface36 thereon and is kept in contact with thedeformable material30 while thedeformable material30 cures, hardens, or solidifies. As previously illustrated, theobject32 may be of any well known suitable material, such as an optical quartz glass disc shaped object having a flat, planar ground surface thereon which may be used to be pressed into thedeformable material30 to form a globally flat,planar surface36 thereon. If desired, theobject32 may be tailored to meet process requirements of the desired range of pressure to be applied to thedeformable material30 and the method of curing, hardening or solidifying thedeformable material30.
• Further, if desired, the flat,[0053]planar surface34 of theobject32 may have a shape other than a flat,planar surface34, such as either a concave surface, convex surface, or any desired surface. Additionally, the flat,planar surface34 of theobject32 may be coated with a suitable release agent coating to facilitate its removal from thedeformable material30 after the curing, hardening or solidification thereof. The flexibleresilient member50 comprises a suitably shaped member compatible with thewafer substrate20 formed of resilient material which will deform under an applied force to uniformly distribute the applied force from theobject32 to thedeformable material30, even if the flat,planar surface34 ofobject32, surfaces52 and54 of the flexibleresilient member50 and the flat,planar surface36 of thedeformable material30 onwafer substrate20 are not substantially parallel to each other or, alternately, when thickness variations locally exist within either thewafer substrate20,electrical circuit components22, insulatingmaterial24,object32, and/or flexibleresilient member50. It is preferred that the flexibleresilient member50 is thermally stable and resistant to the temperature ranges of operation experienced during the pressing byobject32 and that the flexibleresilient member50 be formed from a low viscosity and low durometer hardness material. In this manner, the flexibleresilient member50 serves to compensate for the variations in the thickness of thewafer substrate20,electrical circuit components22, insulatingmaterial24,deformable material30, and object32 as well as compensating for any nonparallel surfaces on theobject32 or thewafer substrate20 or thesubstrate60 on which thewafer substrate20 is supported during the pressing ofobject32 to form flat,planar surface36 on thedeformable material30 prior to the beginning of the chemical mechanical planarization process thereafter. The preferable manner in which the insulatingmaterial24 on awafer substrate20 is to be globally planarized to have a globally flat,planar surface28′ to begin the chemical mechanical planarization process is to use theglobal planarization apparatus100 hereinbefore described with respect to drawing FIG. 1, or its equivalent.
• Referring to drawing FIGS. 9A and 9B, the improved chemical mechanical planarization process of the present invention as described hereinbefore is illustrated in a series of process steps[0054]202 through218.
• In[0055]process step202, awafer substrate20 is provided havingelectrical circuitry components22 formed thereon and an insulatingmaterial24 covering theelectrical circuitry components22 and portions of thewafer substrate20.
• In[0056]process step204, a coating ofdeformable material30 which is uncured, unhardened, or not solidified at the time of application is applied to the coating of insulatingmaterial24 to cover the same.
• Next, in[0057]process step206, anobject32 having a flatplanar surface34 thereon is provided for use.
• In[0058]process step208, the surface ofdeformable material30 is contacted by the flat,planar surface34 of theobject32.
• In[0059]process step210, a predetermined level of pressure is applied at a predetermined temperature level to thedeformable material30. The pressure may be applied to either theobject32, thewafer substrate20, or both, etc.
• In[0060]process step212, flat,planar surface34 ofobject32 forms a flat,planar surface36 on thedeformable material30.
• In[0061]process step214, while the flat,planar surface34 of theobject32 engages thedeformable material30 thereby forming the flat,planar surface36 thereon, thedeformable material30 is cured, hardened, or solidified to cause the permanent formation and retention of the flat,planar surface36 on thedeformable material30.
• In[0062]process step216, theobject32 is removed from engagement with thedeformable material30 after the curing, hardening or solidification thereof to retain the flat,planar surface36 thereon.
• In[0063]process step218, thewafer substrate20 havingelectrical circuit components22, insulatingmaterial24, and cured, hardened, or solidifieddeformable material30 thereon is subjected to a suitable chemical mechanical planarization process until theupper surfaces26 of the electrical circuit components and flat,planar surface28′ of the insulatingmaterial24 are a concurrent common flat, planar surface extending across the wafer substrate20 (see FIG. 7).
• Referring to drawing FIGS. 10A and 10B, alternately, if the apparatus and method described with respect to drawing FIG. 8 are used, the process of such improved chemical mechanical planarization process is illustrated in process steps[0064]302 through320.
• In[0065]process step302, awafer substrate20 is provided havingelectrical circuitry components22 formed thereon and an insulatingmaterial24 covering theelectrical circuit components22 and portions of thewafer substrate20.
• In[0066]process step304, a coating ofdeformable material30 which is uncured, unhardened, or not solidified at the time of application is applied to the coating of insulatingmaterial24 to cover the same.
• Next, in[0067]process step306, anobject32 having a flatplanar surface34 thereon is provided for use.
• In[0068]process step308, a flexibleresilient member50 is placed in contact with the bottom surface of thewafer substrate20.
• In[0069]process step310, the flat,planar surface36 of thedeformable material30 is contacted with the flat,planar surface34 of theobject32.
• In[0070]process step312, flexibleresilient member50 remains contacting or engaging the bottom surface of thewafer substrate20.
• In[0071]process step314, a predetermined level of pressure is applied at a predetermined temperature level to either theobject32, or thewafer substrate20, or both, thereby causing the flat,planar surface34 of theobject32 to transmit force to thedeformable material30, thereby causing the flat,planar surface36 of thedeformable material30 to form a flatplanar surface36 thereon substantially similar to the flatplanar surface34 of theobject32.
• In[0072]process step316, while the flat,planar surface34 of theobject32 engages thedeformable material30, thereby forming the flat,planar surface36 thereon, thedeformable material30 is cured, hardened or solidified to cause the permanent formation and retention of the flat,planar surface36 on thedeformable material30.
• In[0073]process step318, theobject32 is removed from engagement with thedeformable material30 after the curing, hardening or solidification thereof to retain the flat,planar surface36 thereon. If the flexibleresilient member50 is used on the bottom of thewafer substrate20, it may remain, or, if desired, a comparable flexible member may be provided during the chemical mechanical planarization process.
• In[0074]process step320, thewafer substrate20 havingelectrical circuit components22, insulatingmaterial24, and cured, hardened, or solidifieddeformable coating30 thereon is subjected to a suitable chemical mechanical planarization process until theupper surfaces26 of the electrical circuit components and flat,planar surface28′ of the insulatingmaterial24 are a concurrent, common, unbroken flat,planar surface40 extending across the wafer substrate20 (see FIG. 7). The preferable manner in which the insulatingmaterial24 on awafer substrate20 is to be globally planarized to have a globally flat,planar surface28 to begin the chemical mechanical planarization process is to use theglobal planarization apparatus100 hereinbefore described with respect to drawing FIG. 1, or its equivalent.
• In this manner, when the improved process of chemical mechanical planarization of the present invention is used, the resulting planarized surface on the wafer substrate is globally planar or more planar since the process started from a globally flat, planar surface and the chemical mechanical planarization process reaches a successful conclusion more quickly because the surface being planarized does not deform the polishing pad unnecessarily as the surface remains substantially planar throughout the process. This is in clear contrast to the prior art conventional chemical mechanical planarization process which begins from an irregular nonplanar surface, thereby causing the deformation and deflection of the polishing pad, thereby, in turn, causing an irregular nonplanar surface in the surface being planarized. Furthermore, the improved chemical mechanical planarization process of the present invention offers advantages over a globally planarized surface which is subsequently dry resistant etched-back. In globally planarized surfaces which are dry etched-back, the dry etching process does not act uniformly on the materials being etched as they are subjected to the etching process at differing times and each material exhibits a differing etching rate, thereby causing irregularities to be present in the resulting final surface at the end of the dry etching process. In contrast, the improved chemical mechanical planarization process begins from a globally flat planar surface, retains a globally flat, planar surface throughout the process, and results in a final globally flat planar surface at the end of the process.[0075]
• It will be understood that changes, additions, modifications, and deletions may be made to the improved chemical mechanical planarization process of the present invention which are clearly within the scope of the claimed invention.[0076]

Claims (126)

1. A method for planarizing a wafer comprising:

providing a wafer having a nonplanar film surface thereon;

coating the nonplanar film surface of the wafer with a deformable material;

contacting the deformable material with an object having a substantially flat planar surface;

forming a substantially flat planar surface on the nonplanar film surface of the wafer using the substantially flat planar surface of the object;

curing the deformable material while the object contacts the deformable material;

removing the object from contacting the deformable material on the surface of the wafer; and

planarizing the wafer using a chemical mechanical planarization process.

2. A method for planarizing a wafer comprising:

providing a wafer having a nonplanar film surface thereon;

coating the nonplanar film surface of the wafer with a deformable material;

contacting the deformable material with an object having a flat planar surface;

forming a substantially flat planar surface on the nonplanar film surface of the wafer by contacting the deformable material with the flat planar surface of the object;

hardening the deformable material while the object contacts the deformable material;

removing the object from contacting the deformable material of the wafer; and

planarizing the wafer using a chemical mechanical planarization process.

3. A method for planarizing a wafer comprising:

providing a wafer having a nonplanar film surface thereon;

coating the nonplanar film surface of the wafer with a deformable material;

contacting the deformable material with an object;

forming a substantially flat planar surface on the nonplanar film surface of the wafer using the object;

solidifying the deformable material while the object contacts the deformable material;

removing the object from contacting the deformable material on the surface of the wafer; and

planarizing the wafer using a chemical mechanical planarization process.

4. The method ofclaim 3, further comprising:

applying pressure to the object while the object contacts the deformable material.

5. The method ofclaim 3, further comprising: applying pressure to the coating of the deformable material on the nonplanar surface of the wafer while the object contacts the deformable material.

6. The method ofclaim 3, wherein the object includes a substantially flat planar surface thereon contacting the deformable material.

7. A method for planarizing a wafer, the method comprising:

providing a wafer having a nonplanar film surface thereon;

coating the nonplanar film surface of the wafer with a deformable material;

contacting the deformable material with an object, the object including a shaped surface thereon contacting the deformable material, the shaped surface including a convex surface portion;

forming a substantially flat planar surface on the nonplanar film surface of the wafer using the shaped surface of the object;

removing the shaped surface of the object from contacting the deformable material on the surface of the wafer; and

planarizing the wafer using a chemical mechanical planarization process.

8. A method for planarizing a wafer comprising:

providing a wafer having a nonplanar film surface thereon;

coating the nonplanar film surface of the wafer with a deformable material;

contacting the deformable material with an object, the object including a shaped surface thereon contacting the deformable material, the shaped surface including a concave surface portion;

forming a substantially flat planar surface on the nonplanar film surface of the wafer using the concave surface portion of the shaped surface of the object;

removing the shaped surface of the object from contacting the deformable material on the surface of the wafer; and

planarizing the wafer using a chemical mechanical planarization process.

9. A method for planarizing a wafer comprising:

providing a wafer having a nonplanar film surface thereon;

coating the nonplanar film surface of the wafer with a deformable material;

contacting the deformable material with an object, the object including a shaped surface thereon contacting the deformable material, the shaped surface including a convex surface portion and a concave surface portion;

forming a substantially flat planar surface on the nonplanar film surface of the wafer using the shaped surface of the object;

removing the shaped surface of the object from contacting the deformable material on the surface of the wafer; and

planarizing the wafer using a chemical mechanical planarization process.

10. A method for planarizing a wafer comprising:

providing a wafer having a nonplanar film surface thereon;

coating the nonplanar film surface of the wafer with a deformable material;

contacting the deformable material with an object, the object including a shaped surface thereon contacting the deformable material, the object including a flat optical glass object;

forming a substantially flat planar surface on the nonplanar film surface of the wafer using the shaped surface of the object;

removing the shaped surface of the object from contact with the deformable material on the surface of the wafer; and

planarizing the wafer using a chemical mechanical planarization process.

11. A method for planarizing a wafer comprising:

providing a wafer having a nonplanar film surface thereon;

coating the nonplanar film surface of the wafer with a deformable material;

coating an object with a release agent prior to contacting the deformable material;

contacting the deformable material with the object, the object including a shaped surface thereon contacting the deformable material;

forming a substantially flat planar surface on the nonplanar film surface of the wafer using the shaped surface of the object;

removing the shaped surface of the object from contacting the deformable material on the surface of the wafer; and

planarizing the wafer using a chemical mechanical planarization process.

12. The method ofclaim 11, wherein the object comprises a substantially inflexible object having a flat surface thereon.

13. The method ofclaim 11, further comprising:

contacting the wafer with a resilient member.

14. The method of claims13, wherein a back side of the wafer is contacted with the resilient member.

15. The method ofclaim 14, further comprising: applying pressure to the resilient member to form a substantially flat planar surface on the deformable material by contacting the deformable material with the shaped surface of the object by applying the pressure to the wafer.

16. The method ofclaim 15, further comprising:

contacting the resilient member with a substrate; and

applying pressure to the substrate thereby applying pressure to the resilient member thereby applying pressure to the wafer.

17. The method ofclaim 15, further comprising:

applying pressure to the wafer through the resilient member thereby applying pressure to the object thereby deforming the coating of the deformable material on the wafer by the shaped surface of the object contacting the deformable material on the wafer.

18. The method ofclaim 11, wherein the wafer comprises a wafer having electrical circuit components on a surface thereof.

19. The method ofclaim 11, wherein the wafer comprises a wafer having a plurality of electrical circuit components on a surface thereof and a coating substantially covering the plurality of electrical circuit components.

20. The method ofclaim 11, wherein the wafer comprises a wafer having a plurality of electrical components on a surface thereof and a coating substantially covering the plurality of electrical components and the wafer.

21. The method ofclaim 11, further comprising:

applying a substantially uniform pressure to the object while the object is in contact with the deformable material for forming a substantially flat planar surface on the deformable material on the wafer.

22. The method ofclaim 11, further comprising:

applying a substantially uniform pressure to the deformable material on the nonplanar film surface of the wafer to form a substantially flat planar surface on the deformable material.

23. A method for planarizing a nonplanar film surface of a wafer having at least one electrical circuit formed thereon comprising:

coating the nonplanar film surface of the wafer with a deformable material;

contacting the deformable material with an object;

forming a substantially flat planar surface on the nonplanar film surface of the wafer using the object;

curing the deformable material while the object contacts the deformable material;

removing the object from contacting the deformable material; and

planarizing the substantially flat planar surface on the wafer using a chemical mechanical planarization process.

24. A method for planarizing a nonplanar film surface of a wafer having at least one electrical circuit formed thereon comprising:

coating the nonplanar film surface of the wafer with a deformable material;

contacting the deformable material with an object;

forming a substantially flat planar surface on the nonplanar film surface of the wafer using the object;

hardening the deformable material while the object contacts the deformable material;

removing the object from contacting the deformable material; and

planarizing the substantially flat planar surface on the wafer using a chemical mechanical planarization process.

25. A method for planarizing a nonplanar film surface of a wafer having at least one electrical circuit formed thereon comprising:

coating the nonplanar film surface of the wafer with a deformable material;

contacting the deformable material with an object;

forming a substantially flat planar surface on the nonplanar film surface of the wafer using the object;

solidifying the deformable material while the object contacts the deformable material;

removing the object from contacting the deformable material; and

planarizing the substantially flat planar surface on the wafer using a chemical mechanical planarization process.

26. The method ofclaim 25, further comprising:

applying pressure to the object contacting the deformable material while the object contacts the deformable material.

27. The method ofclaim 25, further comprising:

applying pressure to the deformable material on the surface of the wafer while the object contacts the deformable material.

28. The method ofclaim 25, wherein the object includes a substantially flat planar surface thereon contacting the deformable material.

29. The method ofclaim 25, wherein the object includes a shaped surface thereon contacting the deformable material.

30. A method for planarizing a nonplanar film surface of a wafer having at least one electrical circuit formed thereon comprising:

providing an object;

coating the nonplanar film surface of the wafer with a deformable material;

coating the object with a release agent;

contacting the deformable material with the object;

forming a substantially flat planar surface on the nonplanar film surface of the wafer using the object;

removing the object from contacting the deformable material; and

planarizing the substantially flat planar surface on the wafer using a chemical mechanical planarization process.

31. The method ofclaim 30, wherein the object includes a substantially inflexible object.

32. The method ofclaim 30, further comprising:

contacting the wafer with a resilient member.

33. The method ofclaim 30, wherein a back side of the wafer is contacted with a resilient member.

34. The method ofclaim 33, further comprising:

applying pressure to the flexible resilient member to form a substantially flat planar surface on the deformable material.

35. The method ofclaim 33, further comprising:

contacting the resilient member with a substrate; and

applying pressure to the substrate thereby applying pressure to the flexible resilient member.

36. The method ofclaim 33, further comprising:

applying pressure to the wafer by applying pressure to the flexible resilient member thereby applying pressure to the object.

37. The method ofclaim 30, wherein the wafer comprises a wafer having a plurality of electrical circuit components on a surface thereof.

38. The method ofclaim 30, wherein the wafer comprises a wafer having a plurality of electrical components on a surface thereof and a coating substantially covering the plurality of electrical components.

39. The method ofclaim 30, wherein the wafer comprises a wafer having a plurality of electrical circuits on a surface thereof and a coating substantially covering the plurality of electrical circuits and the wafer.

40. The method ofclaim 30, further comprising: applying a substantially uniform pressure to the object while the object is in contact with the deformable material.

41. The method ofclaim 30, further comprising:

applying a substantially uniform pressure to the deformable material on the surface of the wafer to form a substantially flat planar surface on the deformable material.

42. A wafer comprising:

a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material cured in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.

43. A wafer comprising:

a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material hardened in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.

44. A wafer comprising:

a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material solidified in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.

45. The wafer ofclaim 44, further comprising:

solidifying the deformable material while applying pressure to the object as the object contacts the deformable material.

46. The wafer ofclaim 44, wherein the object includes the substantially flat planar surface thereon contacting the deformable material.

47. A wafer in a chemical mechanical planarization process comprising:

a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material cured in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.

48. A wafer in a chemical mechanical planarization process comprising:

a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material hardened in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.

49. A wafer in a chemical mechanical planarization process comprising:

a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material solidified in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.

50. The wafer in a chemical mechanical planarization process ofclaim 49, further comprising:

solidifying the deformable material while applying pressure to the object as the object contacts the deformable material.

51. The wafer in a chemical mechanical planarization process ofclaim 49, wherein the object includes the substantially flat planar surface thereon contacting the deformable material.

52. A wafer having at least a portion of at least one integrated circuit formed thereon in a chemical mechanical planarization process comprising:

a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material cured in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.

53. A wafer having at least a portion of at least one integrated circuit formed thereon in a chemical mechanical planarization process comprising:

a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material hardened in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.

54. A wafer having at least a portion of at least one integrated circuit formed thereon in a chemical mechanical planarization process comprising:

a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material solidified in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.

55. The wafer having at least a portion of at least one integrated circuit formed thereon in a chemical mechanical planarization process ofclaim 54, further comprising:

solidifying the deformable material while applying pressure to the object as the object contacts the deformable material.

56. The wafer having at least a portion of at least one integrated circuit formed thereon in a chemical mechanical planarization process ofclaim 54, wherein the object includes the substantially flat planar surface thereon contacting the deformable material.

57. A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising:

a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material cured in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.

58. A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising:

a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material hardened in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.

59. A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising:

a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material solidified in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.

60. The wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device being formed on the wafer, the wafer located in a chemical mechanical planarization process ofclaim 59, further comprising:

solidifying the deformable material while applying pressure to the object as the object contacts the deformable material.

61. The wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device being formed on the wafer, the wafer located in a chemical mechanical planarization process ofclaim 59, wherein the object includes the substantially flat planar surface thereon contacting the deformable material.

62. A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising:

a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material cured in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.

63. A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising:

a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material hardened in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.

64. A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising:

a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material solidified in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.

65. The wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process ofclaim 64, further comprising:

solidifying the deformable material while applying pressure to the object as the object contacts the deformable material.

66. The wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process ofclaim 64, wherein the object includes the substantially flat planar surface thereon contacting the deformable material.

67. A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising:

a wafer substrate having a substantially planar surface thereon formed during a planarization of a deformable material cured in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.

68. A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising:

a wafer substrate having a substantially planar surface thereon formed during a planarization of a deformable material hardened in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.

69. A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a planarization process comprising:

a wafer substrate having a substantially planar surface thereon formed during a planarization of a deformable material solidified in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.

70. The wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process ofclaim 69, further comprising:

solidifying the deformable material while applying pressure to the object as the object contacts the deformable material.

71. The wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process ofclaim 69, wherein the object includes the substantially flat planar surface thereon contacting the deformable material.

72. A wafer comprising:

a wafer having a surface thereon formed during an initial planarization of a material cured in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.

73. A wafer comprising:

a wafer having a surface thereon formed during an initial planarization of a material hardened in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.

74. A wafer comprising:

a wafer having a surface thereon formed during an initial planarization of a material solidified in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.

75. The wafer ofclaim 74, further comprising:

solidifying the material while applying pressure to the object as the object contacts the material.

76. The wafer ofclaim 74, wherein the surface of the object includes a substantially flat planar surface thereon contacting the material.

77. A wafer in a chemical mechanical planarization process comprising:

a wafer having a surface thereon formed during an initial planarization of a material cured in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.

78. A wafer in a chemical mechanical planarization process comprising:

a wafer having a surface thereon formed during an initial planarization of a material hardened in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.

79. A wafer in a chemical mechanical planarization process comprising:

a wafer having a surface thereon formed during an initial planarization of a material solidified in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.

80. The wafer in a chemical mechanical planarization process ofclaim 79, further comprising:

solidifying the material while applying pressure to the object as the object contacts the material.

81. The wafer in a chemical mechanical planarization process ofclaim 79, wherein the surface of the object includes a substantially flat planar surface thereon contacting the deformable material.

82. A wafer having at least a portion of at least one integrated circuit formed thereon in a chemical mechanical planarization process comprising:

a wafer having a surface thereon formed during an initial planarization of a material cured in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.

83. A wafer having at least a portion of at least one integrated circuit formed thereon in a chemical mechanical planarization process comprising:

a wafer having a surface thereon formed during an initial planarization of a material hardened in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.

84. A wafer having at least a portion of at least one integrated circuit formed theron in a chemical mechanical planarization process comprising:

a wafer having a surface thereon formed during an initial planarization of a material solidified in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.

85. The wafer having at least a portion of at least one integrated circuit formed thereon in a chemical mechanical planarization process ofclaim 84, further comprising:

solidifying the material while applying pressure to the object as the object contacts the material.

86. The wafer having at least a portion of at least one integrated circuit formed thereon in a chemical mechanical planarization process ofclaim 84, wherein the surface of the object includes a substantially flat planar surface thereon contacting the deformable material.

87. A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising:

a wafer having a surface thereon formed during an initial planarization of a material cured in contact with a surface of an object and a final planarization of the deformable material using a chemical mechanical planarization process.

88. A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising:

a wafer having a surface thereon formed during an initial planarization of a material hardened in contact with a surface of an object and a final planarization of the deformable material using a chemical mechanical planarization process.

89. A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising:

a wafer having a surface thereon formed during an initial planarization of a material solidified in contact with a surface of an object and a final planarization of the deformable material using a chemical mechanical planarization process.

90. The wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device being formed on the wafer, the wafer located in a chemical mechanical planarization process ofclaim 89, further comprising:

solidifying the material while applying pressure to the object as the object contacts the material.

91. The wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device being formed on the wafer, the wafer located in a chemical mechanical planarization process ofclaim 89, wherein the surface of the object includes a substantially flat planar surface thereon contacting the material.

92. A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising:

a wafer having a surface thereon formed during an initial planarization of a material cured in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.

93. A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising:

a wafer having a surface thereon formed during an initial planarization of a material hardened in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.

94. A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising:

a wafer having a surface thereon formed during an initial planarization of a material solidified in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.

95. The wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process ofclaim 94, further comprising:

solidifying the material while applying pressure to the object as the object contacts the material.

96. The wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process ofclaim 94, wherein the surface of the object includes a substantially flat planar surface thereon contacting the material.

97. A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising:

a wafer having a surface thereon formed during a planarization of a material cured in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.

98. A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising:

a wafer having a surface thereon formed during a planarization of a material hardened in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.

99. A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising:

a wafer having a surface thereon formed during a planarization of a material solidified in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.

100. The wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process ofclaim 99, further comprising:

solidifying the material while applying pressure to the object as the object contacts the material.

101. The wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process ofclaim 99, wherein the surface of the object includes a substantially flat planar surface thereon contacting the material.

102. A semiconductor device comprising:

a portion of a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material cured in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.

103. A semiconductor device comprising:

a portion of a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material hardened in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.

104. A semiconductor device comprising:

a portion of a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material solidified in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.

105. The semiconductor device ofclaim 104, further comprising:

solidifying the deformable material while applying pressure to the object as the object contacts the deformable material.

106. The semiconductor device ofclaim 104, wherein the object includes the substantially flat planar surface thereon contacting the deformable material.

107. A semiconductor device comprising:

a portion of a wafer having a surface thereon formed during an initial planarization of a material cured in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.

108. A semiconductor device comprising:

a portion of a wafer substrate having a surface thereon formed during an initial planarization of a material hardened in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.

109. A semiconductor device comprising:

a portion of a wafer having a surface thereon formed during an initial planarization of a material solidified in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.

110. The semiconductor device ofclaim 109, further comprising:

solidifying the material while applying pressure to the object as the object contacts the material.

111. The semiconductor deviceclaim 109, wherein the surface of the object includes a substantially flat planar surface thereon contacting the material.

112. An incomplete semiconductor device in wafer form comprising:

a portion of a wafer having a surface thereon formed during an initial planarization of a material cured in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.

113. An incomplete semiconductor device in wafer form comprising:

a portion of a wafer substrate having a surface thereon formed during an initial planarization of a material hardened in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.

114. An incomplete semiconductor device comprising:

a portion of a wafer having a substantially planar surface thereon formed during an initial planarization of a material solidified in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.

115. The incomplete semiconductor device ofclaim 114, further comprising:

solidifying the material while applying pressure to the object as the object contacts the material.

116. The incomplete semiconductor device ofclaim 114, wherein the surface of the object includes a substantially flat planar surface thereon contacting the material.

117. A semiconductor device in a manufacturing process comprising:

a portion of a wafer having a surface thereon formed during an initial planarization of a material cured in contact with a substantially flat planar surface of an object and a final planarization of the material using a chemical mechanical planarization process.

118. A semiconductor device in a manufacturing process comprising:

a portion of a wafer having a surface thereon formed during an initial planarization of a material hardened in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.

119. A semiconductor device in a manufacturing process comprising:

a portion of a wafer having a surface thereon formed during an initial planarization of a material solidified in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.

120. The semiconductor device in a manufacturing process ofclaim 119, further comprising:

solidifying the material while applying pressure to the object as the object contacts the material.

121. The semiconductor device in a manufacturing process ofclaim 119, wherein the surface of the object includes a substantially flat planar surface thereon contacting the material.

122. An incomplete semiconductor device in a manufacturing process comprising:

a portion of a wafer having a surface thereon formed during an initial planarization of a material cured in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.

123. An incomplete semiconductor device in a manufacturing process comprising:

a portion of a wafer having a surface thereon formed during an initial planarization of a material hardened in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.

124. An incomplete semiconductor device in a manufacturing process comprising:

a portion of a wafer having a surface thereon formed during an initial planarization of a material solidified in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.

125. The incomplete semiconductor device in a manufacturing process ofclaim 124, further comprising:

solidifying the material while applying pressure to the object as the object contacts the material.

126. The incomplete semiconductor device in a manufacturing process ofclaim 124, wherein the surface of the object includes a substantially flat planar surface thereon contacting the material.

Images