US20040140545A1 - Method for fabricating semiconductor package having flex circuit, interconnects, and dense array external contacts - Google Patents

Abstract

A chip scale semiconductor package and a method for fabricating the package are provided. The package includes a semiconductor die and a flex circuit bonded to the face of the die. The flex circuit includes a polymer substrate with a dense array of external contacts, and a pattern of conductors in electrical communication with the external contacts. The package also includes interconnects configured to provide separate electrical paths between die contacts (e.g., bond pads), and the conductors on the flex circuit. Several different embodiments of interconnects are provided including: bumps on the die contacts, bonded to the flex circuit conductors with a conductive adhesive layer; polymer bumps on the conductors, or die contacts, applied in a semi-cured state and then fully cured; solder bumps on the die contacts and conductors, bonded to one another using a bonding tool; rivet-like bonded connections between the conductors and die contacts, formed using metal bumps and a wire bonding or ball bonding apparatus; single point bonded connections between the conductors and die contacts, formed with a bonding tool; and wire bonds between the conductors and die contacts.

Description

FIELD OF THE INVENTION
• This invention relates generally to semiconductor packaging. More particularly, this invention relates to a chip scale semiconductor package that includes a flex circuit bonded to a semiconductor die, and interconnects electrically connecting contacts on the die to external contacts on the flex circuit.[0001]
BACKGROUND OF THE INVENTION
• One type of semiconductor package is referred to as a “chip scale package”. Chip scale packages are also referred to as “chip size packages”, and the dice are referred to as being “minimally packaged”. Chip scale packages can be fabricated in “uncased” or “cased” configurations. Uncased chip scale packages have a “footprint” (peripheral outline) that is about the same as an unpackaged die. Cased chip scale packages have a peripheral outline that is slightly larger that an unpackaged die. For example, a footprint for a typical cased chip scale package can be about 1.2 times the size of the die contained within the package.[0002]
• Typically, a chip scale package includes a substrate bonded to the face of the die. The substrate includes the external contacts for making outside electrical connections to the chip scale package. The substrate for a chip scale package can comprise a flexible material, such as a polymer tape, or a rigid material, such as silicon, ceramic, glass or FR-4. The external contacts for one type of chip scale package include solder balls arranged in a dense array, such as a ball grid array (BGA), or a fine ball grid array (FBGA). These dense arrays permit a high input/output capability for the chip scale package. For example, a FBGA on a chip scale package can include several hundred solder balls.[0003]
• One aspect of chip scale packages is that the dense arrays of external contacts are difficult to fabricate. In particular, reliable electrical interconnections must be made between the external contacts for the package, and contacts on the die contained within the package. Typically, the contacts on the die are thin film aluminum bond pads in electrical communication with integrated circuits on the die.[0004]
• FIG. 1 illustrates a prior art[0005]chip scale package10. Thepackage10 includes: asemiconductor die12; apolymer tape14 bonded to a face of the die12; and anencapsulant16 bonded to the face and sides of the die12. In addition, thepackage10 includes anadhesive layer18 for bonding thepolymer tape14 to thedie12, and a dense array ofsolder balls20 formed on thepolymer tape14.Metal beams22 are bonded to thesolder balls20, and todevice bond pads24 on the die12. Themetal beams22 are also encapsulated in theencapsulant16.
• A representative process flow for forming the[0006]chip scale package10 includes bonding one ormore dice10 to a strip of thepolymer tape14. Themetal beams22 can then be bonded to thedevice bond pads24. Next, theencapsulant16 can be formed, and thesolder balls20 attached to themetal beams22. Theindividual packages10 can then be singulated from the strip ofpolymer tape14 and tested.
• Typically, a thermosonic bonding process using gold or gold plated materials are employed to bond the[0007]metal beams22. In addition, specialized bonding tools are required to make the bonds between themetal beams22 and thebond pads24. Themetal beams22 are also subjected to stresses from the bonding and encapsulation processes, and during subsequent use of thepackage10. These stresses can cause the bonds to weaken or pull apart.
• The present invention is directed to an improved chip scale semiconductor package including dense array external contacts, and improved interconnects between the external contacts and contacts on the die.[0008]
SUMMARY OF THE INVENTION
• In accordance with the present invention, an improved chip scale package, and a method for fabricating the package are provided. The package comprises a singulated semiconductor die, and a flex circuit bonded to a face of the die in electrical communication with die contacts (e.g., device bond pads). The flex circuit includes a polymer substrate on which external contacts, such as an array of solder bumps (e.g., BGA, FBGA), are formed. The flex circuit also includes conductors on the polymer substrate, in electrical communication with the external contacts.[0009]
• In addition to the die and flex circuit, the package includes interconnects electrically connecting the die contacts to the flex circuit conductors. A wafer level fabrication process can be used to bond the flex circuit and form the interconnects. Singulation of the wafer forms the individual packages.[0010]
• In a first embodiment, the interconnects comprise solder bumps on the die contacts, and a conductive polymer layer which forms separate electrical paths between the solder bumps and the flex circuit conductors. Suitable materials for forming the conductive polymer layer include z-axis anisotropic adhesives, and z-axis epoxies applied as a viscous paste, and then cured under compression.[0011]
• In a second embodiment, the interconnects comprise conductive polymer bumps on the die contacts, which are bonded to the flex circuit conductors. Suitable materials for forming the polymer bumps include isotropic adhesives that are conductive in any direction (e.g., silver filled silicone), and anisotropic adhesives that are conductive in only one direction (z-axis epoxies). In addition, an electrically insulating adhesive layer, such as silicone, can be used to bond the flex circuit to the die, and to absorb thermal stresses. Furthermore, the polymer bumps can be applied to the die contacts in a semi-cured, or B-stage condition, and then fully cured while in physical contact with the die contacts. For semi-cured polymer bumps, a compliant elastomeric base material can include dendritic metal particles for penetrating oxide layers on the die contacts, and a solvent to permit partial curing at room temperature.[0012]
• In a third embodiment, the interconnects comprise solder bumps on the die contacts, bonded to solder bumps on the flex circuit conductors. A compliant layer can also be formed between the die and flex circuit to absorb thermal stresses. Bonding of the solder bumps can be with thermocompression bonding, thermosonic bonding, or ultrasonic bonding.[0013]
• In a fourth embodiment, the interconnects comprise solder bumps on the flex circuit conductors, and polymer bumps on the die contacts.[0014]
• In a fifth embodiment, the interconnects comprise solder bumps on the die contacts, bonded to plated metal bumps on the flex circuit conductors. A compliant layer can also be formed between the flex circuit and die, as an adhesive and thermal expansion joint. Suitable materials for the plated metal bumps include gold, palladium and gold plated metals.[0015]
• In a sixth embodiment, the interconnects comprise rivet-like, bonded connections between the die contacts and the flex circuit conductors. The bonded connections include a first set of metal bumps on the die contacts, and a second set of metal bumps formed through openings in the conductors and bonded to the first set of metal bumps. Both sets of metal bumps can be formed using a bonding tool of a wire bonding apparatus. Alternately, the metal bumps can be formed using a solder ball bumper apparatus configured to place and reflow a first set of pre-formed solder balls on the die contacts, and then to place and reflow a second set of pre-formed solder balls through the openings in the flex circuit conductors onto the first set.[0016]
• In a seventh embodiment, the interconnects comprise bonded connections between the flex circuit conductors and the die contacts formed using thermocompression bonding, thermosonic bonding, or a laser pulse. In this embodiment the polymer substrate can include openings which provide access for a bonding tool to portions of the flex circuit conductors. Using the openings the tool presses and bonds the portions to the die contacts. In addition, adhesive dots can be formed between the flex circuit substrate, and the die to align and attach the flex circuit to the die. The die contacts can also include an electrolessly plated metal to facilitate formation of the bonded connections.[0017]
• In an eight embodiment, the interconnects comprise compliant polymer bumps on the die contacts, and a conductive polymer layer which electrically connects the polymer bumps to the flex circuit conductors.[0018]
• In a ninth embodiment, the interconnects comprise plated metal bumps on the flex circuit conductors, and a conductive polymer layer which electrically connects the plated metal bumps to the die contacts.[0019]
• In a tenth embodiment, the interconnects comprise wire bonds formed between the die contacts and the flex circuit conductors. In this embodiment the flex circuit substrate includes openings for the wire bonds.[0020]
BRIEF DESCRIPTION OF THE DRAWINGS
• FIG. 1 is an enlarged schematic cross sectional view of a prior art chip scale package;[0021]
• FIG. 2A is a schematic plan view of a semiconductor wafer during a wafer level process for fabricating chip scale packages in accordance with the invention;[0022]
• FIG. 2B is a schematic side elevation view of the wafer of FIG. 2A following attachment of a flex circuit thereto;[0023]
• FIG. 3 is a schematic plan view of a semiconductor package constructed in accordance with the invention;[0024]
• FIG. 4 is an enlarged schematic cross sectional view taken along section line[0025]4-4 of FIG. 3 illustrating an interconnect for the package of FIG. 3;
• FIG. 5 is an enlarged schematic cross sectional view equivalent to FIG. 4 of an alternate embodiment interconnect;[0026]
• FIG. 6 is an enlarged schematic cross sectional view equivalent to FIG. 4 of an alternate embodiment interconnect;[0027]
• FIG. 7 is an enlarged schematic cross sectional view equivalent to FIG. 4 of an alternate embodiment interconnect;[0028]
• FIG. 8 is an enlarged schematic cross sectional view equivalent to FIG. 4 of an alternate embodiment interconnect;[0029]
• FIGS. 9A and 9B are enlarged schematic cross sectional views equivalent to FIG. 4 of an alternate embodiment interconnect during fabrication using a bonding tool of a wire bonder apparatus;[0030]
• FIGS. 9C and 9D are enlarged schematic cross sectional views equivalent to FIGS. 9A and 9B of an alternate embodiment interconnect during fabrication using a bonding tool of a solder ball bumper;[0031]
• FIGS. 10A and 10 are enlarged schematic cross sectional views equivalent to FIG. 4 of an alternate embodiment interconnect during fabrication;[0032]
• FIG. 11 is an enlarged schematic cross sectional view equivalent to FIG. 4 of an alternate embodiment interconnect;[0033]
• FIG. 12 is an enlarged schematic cross sectional view equivalent to FIG. 4 of an alternate embodiment interconnect; and[0034]
• FIG. 13 is an enlarged schematic cross sectional view equivalent to FIG. 4 of an alternate embodiment interconnect.[0035]
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
• Referring to FIGS.[0036]2A-2B, steps in a wafer level process for fabricating chip scale semiconductor packages in accordance with the invention are illustrated. Initially, as shown in FIG. 2A, asemiconductor wafer30 can be provided. Thewafer30 includesmultiple semiconductor dice32. Each die32 has a desired size and peripheral shape (e.g., rectangular, square). In addition, each die32 includes integrated circuits in a desired configuration. Still further, each die32 includes die contacts48 (FIG. 3) in electrical communication with the integrated circuits. The die contacts48 (FIG. 3) can be conventional thin film aluminum bond pads formed on the face of the die.
• As shown in FIG. 2B, a sheet of[0037]flex circuit34 can be bonded to a face (circuit side) of thewafer30. Theflex circuit34 comprises a multi layered sheet of material similar to TAB tape, such as “ASMAT” manufactured by Nitto Denko. Theflex circuit34 can be formed separately, and then bonded to thewafer30. Bonding of theflex circuit34 to thewafer30 will be more fully described as the description proceeds. Following bonding of theflex circuit34 to thewafer30, thedice32 can be singulated by saw cutting, or shearing thewafer30, to form individual chip scale packages42 (FIG. 3).
• As shown in FIG. 3, each[0038]chip scale package42 includes asingulated die32 and a singulated portion offlex circuit34A. Thepackage42 andflex circuit34A have a peripheral outline substantially similar to that of thedie32. Theflex circuit34A includes apolymer substrate36, which comprises an electrically insulating, flexible material. Suitable materials for thepolymer substrate36 include polyimide, polyester, epoxy, urethane, polystyrene, silicone and polycarbonate. A representative thickness for thepolymer substrate36 can be from about 25 to 400 μm.
• The[0039]flex circuit34A also includes an array ofexternal contacts40 formed on a first side of thepolymer substrate36. In the illustrative embodiment theexternal contacts40 comprise metal balls on a land pad41 (FIG. 4). For example, eachexternal contact40 can be generally hemispherical, convex, or dome-shaped, with an outside diameter “D” and a height of “H”. Representative size ranges for the diameter “D” and height “H” can be from about 2.5 mils to 30 mils. A pitch and density of theexternal contacts40 can be selected as required. For example, theexternal contacts40 can be arranged in a dense array, such as a ball grid array (BGA), or fine ball grid array (FBGA). For simplicity in FIG. 3, theexternal contacts40 are illustrated in an array of two rows. However, some dense arrays can cover the entire face of thechip scale package42 and include hundreds ofexternal contacts40.
• The[0040]external contacts40 can comprise a solder alloy such as 95% Pb/5% Sn, 60% Pb/40% Sn, 63% In/37% Sn, or 62% Pb/36% Sn/2% Ag. For example, theexternal contacts40 can comprise pre-fabricated solder balls bonded to solderwettable land pads41. Suitable pre-fabricated solder balls are manufactured by Mitsui Comtek Corp. of Saratoga, Calif. under the trademark “SENJU SPARKLE BALLS”. A solder ball bumper can be used to bond the solder balls to the land pads41 (FIG. 4). A suitable solder ball bumper is manufactured by Pac Tech Packaging Technologies of Falkensee, Germany.
• Alternately, the[0041]external contacts40 can be formed using an electro-deposition or electroless deposition process to deposit land pads and balls of desired materials. As another alternative, theexternal contacts40 can be formed using electroless deposition and wave soldering as described in U.S. patent application Ser. No. 08/905,870, entitled “Method And System For Fabricating Solder Bumps On Semiconductor Components”, incorporated herein by reference. Still further, theexternal contacts40 can comprise a conductive polymer material, such as metal filled epoxy bumps formed by a stencil printing process.
• The land pads[0042]41 (FIG. 4) for theexternal contacts40 comprise a metal selected to provide adhesion and a diffusion barrier. Suitable metals for theland pads41 include nickel, zinc, chromium and palladium. The land pads41 (FIG. 4) can be formed using an electro-deposition or electroless deposition as previously described for theexternal contacts40. The land pads41 (FIG. 4) can also be formed by blanket depositing a metal layer, then photo-patterning and etching the metal layer. Metal filled vias43 (FIG. 4) in thepolymer substrate36 electrically connect theland pads41 to theflex circuit conductors38. The metal filledvias43 can also be formed using an electro-deposition or electroless deposition process.
• As shown in FIG. 3, the[0043]flex circuit34A also includes a pattern ofconductors38 formed on a second side of thepolymer substrate36, in electrical communication with theexternal contacts40. Theconductors38 can be formed on thepolymer substrate36 prior to formation of theexternal contacts40. For example, a metallic layer can be blanket deposited on thepolymer substrate36, such as by electrodeposition, and then patterned and etched to form theconductors38. Preferably, theconductors38 comprise a highly conductive metal, such as gold, gold plated metals, copper, plated copper, nickel or an alloy such as Ni—Pd. By way of example, theconductors38 can be formed with a thickness of from 1 μm-35 μm. In place of a deposition process, theconductors38 can comprise a separate element, such as metal foil about 1 mil thick, bonded to thepolymer substrate36 and patterned.
• Referring to FIG. 4, an[0044]interconnect44 for the package42 (FIG. 3) is illustrated. As used herein, the term “interconnect” refers to a component that electrically connects the packaged die32 to theflex circuit34A. More particularly, theinterconnect44 forms separate electrical paths between thedie contacts48 and theflex circuit conductors38.
• In the embodiment of FIG. 4, the[0045]interconnect44 comprises solder bumps46 on thedie contacts48, and aconductive polymer layer52 in electrical communication with the solder bumps46 andflex circuit conductors38. Suitable materials for forming theconductive polymer layer52 include z-axis anisotropic adhesives, and z-axis epoxies. In general, a z-axis anisotropic adhesive provides conductivity in the z-direction, and electrical isolation in the x and y directions. Theconductive polymer layer52 thus functions to provide separate electrical paths between the solder bumps46 andflex circuit conductors38.
• The z-axis anisotropic adhesives can be provided in either a thermal plastic configuration or a thermal setting configuration. Thermal plastic conductive elastomers are heated to soften for use and then cooled under compression for curing. Thermal setting conductive elastomers are viscous at room temperature, but require heat curing under compression at temperatures from 100-300° C. for from several minutes to an hour or more. Suitable z-axis anisotropic adhesives include “Z-POXY”, by A.I. Technology, Trenton, N.J., and “SHELL-ZAC”, by Sheldahl, Northfield, Minn..[0046]
• The solder bumps[0047]46 on the die32 comprise a solder material as previously described forexternal contacts40. The solder bumps46 can also include underlying layers (not shown) on thedie contacts48 to provide adhesion and diffusion barriers. In addition, apassivation layer50 on the die32 electrically isolates the solder bumps46 and diecontacts48. The solder bumps46 can be fabricated using a deposition process as previously described, or using electroless deposition and wave soldering as described in previously incorporated U.S. patent application Ser. No. 08/905,870.
• Referring to FIG. 5, an[0048]alternate embodiment interconnect44A comprises polymer bumps54 on thedie contacts48, and an electrically insulating adhesive layer56 formed between the die32 andflex circuit34A. The polymer bumps54 can comprise an anisotropic adhesive as previously described, or an isotropic conductive adhesive (i.e., conductive in all directions). Suitable methods for forming the polymer bumps54 include screen printing through a stencil, and dot shooting through a nozzle. Suitable materials for forming the polymer bumps54 include the anisotropic adhesives previously described and isotropic adhesives, such as silver filled silicone. The polymer bumps54 can be deposited on thedie contacts48 in a viscous condition and then cured under compression.
• After formation on the[0049]die contacts48, the polymer bumps54 can be aligned with theflex circuit conductors38 and placed in contact therewith. Alignment can be accomplished with a split optics system such as one used in an aligner bonder tool, or using an alignment fence or jig. Full curing under compression physically bonds the polymer bumps54 to theflex circuit conductors38 in electrical communication therewith. Full curing can be accomplished using an oven maintained at a temperature of between 150° C. to 300° C. for from several minutes to an hour.
• Alternately, the polymer bumps[0050]54 can be deposited in a semi-cured, or B-stage condition and then fully cured after contact with theflex circuit conductors38. In this case the polymer bumps54 can be formulated with dendritic conductive particles in an adhesive base (e.g., silicone). One suitable formula includes silver particles and a pthalate-acetate hydroxyl copolymer. The adhesive base can also include a solvent to allow semi-curing of the material at room temperature, and full curing at higher temperatures (e.g., 150° C.). In a semi-cured condition the polymer bumps54 have a stable configuration that provides electrical paths through the material. The semi-cured condition also permits conductive particles to penetrate oxide layers on theflex circuit conductors38 without the necessity of compression loading the material during the curing process.
• The adhesive layer[0051]56, in addition to providing electrical insulation, also physically attaches theflex circuit34A to the die32 and provides a compliant layer. One suitable electrically insulating adhesive layer56 is “ZYMET” silicone elastomer manufactured by Zymet, Inc., East Hanover, N.J.. The adhesive layer56 can also comprise an instant curing elastomer such as a cyanoacrylate adhesive, or an anaerobic acrylic adhesive. Suitable cyanoacrylate adhesives are commercially available from Loctite Corporation, Rocky Hill, Conn. under the trademarks “410” or “416”.
• Referring to FIG. 6, an[0052]alternate embodiment interconnect44B comprises solder bumps46 on thedie contacts48, bonded tosolder bumps46A on theflex circuit conductors38. The solder bumps46 and46A can be formed using the solders and methods previously described. Bonding of the solder bumps46 and46A can be accomplished with heat and pressure using a gang bonding thermode.
• In addition, a[0053]compliant layer58 can be formed between theflex circuit34A and die32. In this case the main purpose of thecompliant layer58 is as a thermal expansion joint to compensate for any CTE mismatch between theflex circuit34A and die32. Thecompliant layer58 can be formed in the gap between theflex circuit34A and die32 using a suitable dispensing method. Suitable dispensing methods include spin-on, stenciling and drawing a material into the gap by capillary action. Also thecompliant layer58 can be formed prior to formation of the solder bumps46 on thedie32 and patterned with openings for the solder bumps46. One suitable material for the compliant layer is “HYSOL BRAND FP4520” sold by Dexter Electronic Materials. Alternately, thecompliant layer58 can be omitted.
• Referring to FIG. 7, an[0054]alternate embodiment interconnect44C comprises polymer bumps54 on thedie contacts48, bonded tosolder bumps46A on theflex circuit conductors38. The polymer bumps54 can be formed as previously described by depositing an uncured conductive polymer and curing under compression as previously described. The polymer bumps54 can also be fabricated in a semi-cured, or B-stage condition as previously described. In addition, an adhesive layer56 can be formed as previously described.
• Referring to FIG. 8, an[0055]alternate embodiment interconnect44D comprises solder bumps46 on thedie contacts48, bonded to plated metal bumps60 on theflex circuit conductors38. The solder bumps46 can be formed as previously described. The platedmetal bumps60 can also be formed substantially as previously described, but using a gold or gold plated metal. Bonding the platedmetal bumps60 to the solder bumps46 can be using a gang bonding thermode as previously described. In addition, acompliant layer58 can be formed or alternately omitted as previously described.
• Referring to FIGS. 9A and 9B, an alternate embodiment riveted[0056]interconnect44E (FIG. 9B) is shown. Initially, as shown in FIG. 9A, first metal bumps62 can be formed on thedie contacts48. The metal bumps62 can be formed using a conventional wire bonding apparatus configured for thermocompression bonding (T/C), thermosonic bonding (T/S), or wedge bonding (W/B) of ametal wire82. The wire bonding apparatus can include abonding tool80 adapted to manipulate themetal wire82. Suitable wire materials for forming themetal bump62 include gold, palladium, silver and solder alloys.
• As shown in FIG. 9B, in this embodiment the[0057]flex circuit34B includesconductors38A withopenings64. In addition, apolymer substrate36A of theflex circuit34C includesopenings66 aligned with theopenings64 inconductors38A. Theopenings64 and66 provide access for formingsecond metal bumps62A (FIG. 9B) on the first metal bumps62 (FIG. 9A). Thesecond metal bumps62A can also be formed using thebonding tool80. Thesecond metal bumps62A (FIG. 9B) compress the first metal bumps62 (FIG. 9A) to formcompressed metal bumps62C (FIG. 9B).
• During formation of the[0058]second metal bumps62A (FIG. 9B) annular shoulders68 (FIG. 9B) can form around the outer peripheral edges of theopenings64 in theflex circuit conductor38A. Theannular shoulders68 comprises portions of thesecond metal bumps62A which are compressed against theflex circuit conductors38A. In this configuration, thesecond metal bumps62A form bonded connections between theflex circuit conductors38A and thecompressed metal bumps62C, which are similar to metal rivets. The bonded connections physically attach theflex circuit34A to thedie32. In addition, the bonded connections form separate electrical paths between thedie contacts48 and theflex circuit conductors38A. An additional compliant layer (not shown) equivalent to the compliant layer58 (FIG. 6) previously described may also be employed to provide compliancy and accommodate thermal expansion. However, with no compliant layer, theflex circuit36A is free floating in areas betweenadjacent metal bumps62A. Accordingly, differences in thermal expansion between theflex circuit34A and the die32 can be absorbed by movement of theflex circuit34A.
• FIGS. 9C and 9D illustrate essentially the same embodiment as FIGS. 9A and 9B, constructed using a solder ball bumper apparatus rather than a wire bonder. A solder ball bumper apparatus attaches pre-formed solder balls to metal pads, such as bond pads on a die or land pads on a substrate, using a reflow process. A representative solder ball bumper apparatus with a laser reflow system is manufactured by Pac Tech Packaging Technologies of Falkensee, Germany.[0059]
• As shown in FIG. 9C, the ball bumper apparatus includes a[0060]bonding tool84, which has bondedpre-formed solder balls86 to the diecontacts48. Following bonding of theballs86 to the diecontacts48, theflex circuit34B can be placed on thedie32, with theopenings64 in theflex circuit conductors38A in alignment with the bondedsolder balls86. As shown in FIG. 9D,second balls86A can be placed on thesolder balls86, and then reflowed using thesame bonding tool84. The second reflow step also compresses the initially bonded solder balls86 (FIG. 9C) to formcompressed solder balls86C (FIG. 9D). In addition, the sizes of theopenings64 andsolder balls86A can be selected to form bonded connections between theflex circuit conductors38A and thecompressed solder balls86C. Additionally, a compliant layer similar to compliant layer58 (FIG. 7) can be formed in the gap between theflex circuit34B and die32.
• Referring to FIG. 10, an[0061]alternate embodiment interconnect44F is illustrated. Theinterconnect44F includes bondedconnections74 betweenflex circuit conductors38B and thedie contacts48. Theinterconnect44F also includeadhesive members72 between theflex circuit34C and die32. Theadhesive members72 can comprise an electrically insulating adhesive such as silicone applied in a tacking configuration or as a continuous ridge.
• The bonded[0062]connections74 can be formed using atool75 such as a laser pulse tool, or alternately a thermocompression or thermosonic thermode. For a laser pulse tool, thetool75 can be a component of a solder ball bumper, such as the previously described apparatus manufactured by Pac Tech. For a thermode, thetool75 can be a component of a conventional wire bonder apparatus.Openings66B can be provided in thepolymer substrate36B to provide access for thetool75. In this embodiment, theflex circuit conductors38B comprise a metal that can be bonded to the diecontacts48 using the heat generated by thetool75. Suitable metals for theflex circuit conductors38B include copper, gold and nickel.
• In addition, as shown in FIG. 10A, a[0063]bonding layer70 can be electrolessly deposited on thedie contacts48 prior to formation of the bondedconnections74. Thebonding layer70 provides a metallurgy suitable for bonding to theflex circuit conductors38B. Suitable metals for forming thebonding layer70 include palladium, gold, tin and tin plated copper. Solutions for electrolessly plating these metals are known in the art. For example, palladium bonding layers70 can be formed using a 1 gm/liter palladium solution comprising palladium chloride and sodium hypophosphate. A suitable palladium solution is commercially available from Lea Ronal under the trademark “PALLAMERSE Pd”. A representative thickness of thebonding layer70 can be from several hundred A to several μm or more. Thebonding layer70 can also be formed as described in the previously incorporated U.S. patent application Ser. No. 08/905,870. Also in this embodiment, if desired, a low stress compliant layer can be formed in the gap between theflex circuit conductors38B and thedie50. The low stress compliant layer can be formed as previously described for compliant layer58 (FIG. 6) mainly to absorb thermal stresses between theflex circuit34C and die32.
• Referring to FIG. 11, an alternate embodiment interconnect[0064]44G includes polymer bumps54 formed on thedie contacts48 substantially as previously described (e.g.,54-FIG. 7). In addition, the interconnect44G includes aconductive polymer layer52 formed substantially as previously described (e.g.,52-FIG. 3). Curing thepolymer layer52 under compression forms separate electrical paths between the polymer bumps54 and theflex circuit conductors38.
• Referring to FIG. 12, an[0065]alternate embodiment interconnect44H includes plated metal bumps60 on theflex circuit conductors38, and aconductive polymer layer52. The platedmetal bumps60 can be formed substantially as previously described (e.g.,60-FIG. 8). In addition, theconductive polymer layer52 can be formed substantially as previously described (e.g.,52-FIG. 3). Curing thepolymer layer52 under compression forms separate electrical paths between the platedmetal bumps60 and thedie contacts48.
• Referring to FIG. 13, an alternate embodiment interconnect[0066]44I includes a flex circuit34D having apolymer substrate36C andconductors38C. The interconnect44I also includeswires76 bonded to theconductors38C, and to the diecontacts48. In this embodiment theconductors38C can be insulated with a suitable insulating layer (not shown). In addition, thepolymer substrate36C contacts thedie passivation layer50 to provide electrical insulation between the die32 andflex circuit34C. Also, thepolymer substrate36C includesopenings78 to allow access for wire bonding thewires76. Wire bonding can be accomplished using a conventional wire bonder. Suitable materials for thewires76 include aluminum alloys (e.g., aluminum-silicon and aluminum-magnesium) and gold. In addition, a compliant layer (not shown) can be formed between the flex circuit34D and die32 as previously described.
• Thus the invention provides an improved semiconductor package and method of fabrication. While the invention has been described with reference to certain preferred embodiments, as will be apparent to those skilled in the art, certain changes and modifications can be made without departing from the scope of the invention as defined by the following claims.[0067]

Claims (69)

What is claimed is:

1. A semiconductor package comprising:

a semiconductor die comprising a die contact formed thereon;

a flex circuit comprising a polymer substrate with an external contact formed thereon, and a conductor in electrical communication with the external contact; and

a conductive polymer layer between the die and the substrate, said conductive polymer layer configured to attach the flex circuit to the die and to provide an electrical path between the die contact and the conductor.

2. The package ofclaim 1 wherein the conductive polymer layer comprises a z-axis anisotropic adhesive.

3. The package ofclaim 1 further comprising a first bump on the die contact, said first bump comprising a material selected from the group consisting of solders, conductive polymers and plated metals.

4. The package ofclaim 1 further comprising a second bump on the conductor, said second bump comprising a material selected from the group consisting of solders, conductive polymers and plated metals.

5. The package ofclaim 1 wherein the flex circuit includes a plurality of external contacts in a ball grid array or a fine ball grid array.

6. A semiconductor package comprising:

a semiconductor die comprising a die contact with a bump thereon;

a flex circuit comprising a polymer substrate with an external contact formed thereon, and a conductor in electrical communication with the external contact; and

a conductive polymer layer between the die and the substrate, said conductive polymer layer configured to attach the flex circuit to the die and to provide an electrical path between the bump and the conductor.

7. The package ofclaim 6 wherein the bump comprises a material selected from the group consisting of solders, conductive polymers and plated metals.

8. The package ofclaim 6 wherein the conductive polymer layer comprises a z-axis anisotropic adhesive.

9. A semiconductor package comprising:

a semiconductor die comprising a die contact;

a flex circuit comprising a polymer substrate with an external contact formed thereon, and a conductor in electrical communication with the external contact, said conductor including a bump; and

a conductive polymer layer between the die and the substrate, said conductive polymer layer configured to attach the flex circuit to the die and to provide an electrical path between the die contact and the bump.

10. The package ofclaim 9 wherein the bump comprises a material selected from the group consisting of solders, conductive polymers and plated metals.

11. The package ofclaim 9 wherein the conductive polymer layer comprises a z-axis anisotropic adhesive.

12. A semiconductor package comprising:

a semiconductor die having a face and a die contact formed thereon;

a conductive polymer bump formed on the die contact;

a flex circuit attached to the face of the die, said flex circuit comprising a polymer substrate with an external contact formed thereon, and a conductor in electrical communication with the external contact, said conductor bonded to the conductive polymer bump; and

an electrically insulating adhesive layer between the flex circuit and die.

13. The package ofclaim 12 wherein the polymer bump comprises a conductive adhesive.

14. The package ofclaim 12 wherein the polymer bump comprises a conductive adhesive applied in a semi-cured condition.

15. A semiconductor package comprising:

a semiconductor die having a face and a first bump formed thereon;

a flex circuit attached to the face of the die, said flex circuit comprising a polymer substrate with an external contact formed thereon, and a conductor in electrical communication with the external contact, said conductor including a second bump bonded to the first bump; and

an electrically insulating adhesive layer between the flex circuit and die.

16. The package ofclaim 15 wherein the first bump and the second bump comprise solder.

17. The package ofclaim 15 wherein the first bump comprises a conductive polymer and the second bump comprises solder.

18. The package ofclaim 15 wherein the first bump comprises solder and the second bump comprises a conductive polymer.

19. The package ofclaim 15 wherein the adhesive layer comprises a compliant polymer.

20. A semiconductor package comprising:

a semiconductor die having a face and a die contact with a first bump formed thereon;

a flex circuit attached to the face of the die, said flex circuit comprising a polymer substrate with an external contact formed thereon, and a conductor in electrical communication with the external contact, said conductor including an opening therein proximate to the first bump; and

a second bump formed in the opening and on the first bump, said first and second bumps configured to form a bonded connection between the conductor and the die contact.

21. The package ofclaim 20 wherein the first and second bumps comprise a material selected from the class consisting of gold and palladium.

22. The package ofclaim 20 wherein the second bump includes a peripheral shoulder engaging the opening in the conductor.

23. The package ofclaim 20 wherein the flex circuit includes a plurality of external contacts in a ball grid array or fine ball grid array.

24. The package ofclaim 20 wherein the first and second bumps comprise metal bumps formed using a wire bonding apparatus or a ball bumper apparatus.

25. A semiconductor package comprising:

a semiconductor die comprising a die contact with a first metal bump bonded thereto;

a flex circuit attached to the die, said flex circuit comprising a polymer substrate with an external contact formed thereon;

said flex circuit further comprising a conductor in electrical communication with the external contact, said conductor including an opening therein; and

a second metal bump formed on the first metal bump, said second metal bump including a peripheral shoulder engaging the opening to form a bonded connection between the conductor and die contact.

26. The package ofclaim 25 wherein the first and second metal bumps comprise a metal selected from the class consisting of gold, palladium and solder.

27. The package ofclaim 25 wherein the first and second metal bumps comprise pre-formed solder balls.

28. The package ofclaim 25 further comprising a compliant layer formed between the flex circuit and the die.

29. A semiconductor package comprising:

a semiconductor die having a face and a die contact with a first metal ball bonded thereto;

a flex circuit proximate to the face of the die, said flex circuit comprising a polymer substrate with an external contact formed thereon;

said flex circuit further comprising a conductor in electrical communication with the external contact, said conductor including an opening therein; and

a second metal ball reflowed through the opening onto the first metal ball to form a bonded connection between the conductor and the die contact and to physically attach the flex circuit to the die.

30. The package ofclaim 29 wherein the first and second metal balls comprise pre-formed solder balls.

31. The package ofclaim 29 further comprising a compliant layer formed between the flex circuit and the face of the die.

32. A semiconductor package comprising:

a semiconductor die having a face and a die contact;

a flex circuit attached to the face of the die, said flex circuit comprising a polymer substrate with an external contact formed thereon and a conductor in electrical communication with the external contact;

an opening in the polymer substrate configured to allow access to the conductor;

a bonded connection proximate to the opening physically and electrically bonding the conductor and the die contact; and

an adhesive member configured to attach the flex circuit to the die.

33. The package ofclaim 32 further comprising an electrolessly deposited layer on the pad configured to facilitate formation of the bonded connection.

34. The package ofclaim 32 wherein the adhesive member comprises adhesive dots.

35. A semiconductor package comprising:

a semiconductor die having a face and a die contact;

a metal layer formed on the die contact, said metal layer configured to facilitate bonding to the die contact;

a flex circuit attached to the face of the die, said flex circuit comprising a polymer substrate with an external contact formed thereon and a conductor in electrical communication with the external contact, said flex circuit further comprising an opening configured to permit access to a portion of the conductor; and

a bonded connection between the conductor and the die contact, said bonded connection comprising the portion of the conductor bonded to the metal layer.

36. The package ofclaim 35 further comprising a plurality of adhesive members configured to attach the flex circuit to the die.

37. The package ofclaim 35 wherein the metal layer comprises a material selected from the group consisting of gold and palladium.

38. The package ofclaim 35 wherein the metal layer comprises an electrolessly deposited layer.

39. A semiconductor package comprising:

a semiconductor die having a face and a die contact;

a flex circuit attached to the face of the die, said flex circuit comprising a polymer substrate with an external contact formed on a first side thereof and with a second side thereof proximate to the face of the die, said flex circuit further comprising a conductor in electrical communication with the external contact and an opening configured to permit access to the die contact; and

a wire bonded to the conductor and to the die contact.

40. The package ofclaim 39 wherein the polymer substrate contacts the face of the die.

41. The package ofclaim 39 wherein the first side of the polymer substrate comprises an exposed surface.

42. A method for fabricating a semiconductor package comprising:

providing a semiconductor die with a die contact having a bump thereon;

providing a flex circuit comprising a polymer substrate with an external contact formed thereon, and a conductor in electrical communication with the external contact; and

forming a conductive polymer layer between the flex circuit and the die, to attach the flex circuit to the die, and form an electrical path between the bump and the conductor.

43. The method ofclaim 42 wherein the bump comprises a material selected from the group consisting of conductive polymers, solder and metal plating.

44. The method ofclaim 42 wherein the conductive polymer layer comprises a z-axis anisotropic adhesive.

45. The method ofclaim 42 wherein forming the conductive polymer layer comprises depositing a conductive material in a semi-cured condition and then curing the material.

46. A method for fabricating a semiconductor package comprising:

providing a semiconductor die with a die contact formed thereon;

forming a polymer bump on the die contact, said polymer bump in a semi-cured condition;

providing a flex circuit comprising a polymer substrate with an external contact formed thereon, and a conductor in electrical communication with the external contact; and

bonding the polymer bump to the conductor by placing the bump and conductor in contact and curing the bump.

47. The method ofclaim 46 wherein the polymer bump comprises a compliant base material with dendritic metal particles.

48. A method for fabricating a semiconductor package comprising:

providing a semiconductor die with a die contact formed thereon;

forming a first bump on the die contact;

providing a flex circuit comprising a polymer substrate with an external contact formed thereon, and a conductor in electrical communication with the external contact;

forming a second bump on the conductor; and

bonding the first bump to the second bump by applying heat and pressure.

49. The method ofclaim 48 wherein the first and second bumps comprise solder.

50. The method ofclaim 48 wherein the first bump comprises solder and the second bump comprises a conductive polymer.

51. The method ofclaim 48 wherein the first bump comprises a conductive polymer and the second bump comprises solder.

52. The method ofclaim 48 wherein the first bump comprises a plated metal and the second bump comprises a conductive polymer.

53. The method ofclaim 48 wherein the first bump comprises a conductive polymer and the second bump comprises a plated metal.

54. A method for fabricating a semiconductor package comprising:

providing a semiconductor die including a die contact formed thereon;

forming a first bump on the die contact;

providing a flex circuit comprising a polymer substrate with an external contact formed thereon, and a conductor in electrical communication with the external contact, said conductor including an opening; and

bonding a second bump to first bump, said second bump including a peripheral shoulder proximate to the opening attaching the flex circuit to the die.

55. The method ofclaim 54 wherein forming the first and second bumps comprises bonding metal balls with a wire bonding apparatus.

56. The method ofclaim 56 wherein forming the first and second bumps comprises placing and reflowing pre-formed solder balls with a ball bumper apparatus.

57. A method for fabricating a semiconductor package comprising:

providing a semiconductor die including a die contact formed thereon;

forming a first bump on the die contact using a wire and a bonding tool;

providing a flex circuit comprising a polymer substrate with an external contact formed thereon, and a conductor in electrical communication with the external contact, said conductor including an opening; and

bonding a second bump to the first bump using the tool, said second bump including a peripheral shoulder proximate to the opening attaching the flex circuit to the die.

58. The method ofclaim 57 wherein the polymer substrate includes a second opening to provide access for the tool.

59. The method ofclaim 57 wherein the first and second bumps comprise a material selected from the group consisting of gold and palladium.

60. A method for fabricating a semiconductor package comprising:

providing a semiconductor die including a die contact formed thereon;

placing and reflowing a first metal ball on the die contact;

providing a flex circuit comprising a polymer substrate with an external contact formed thereon, and a conductor in electrical communication with the external contact, said conductor including an opening; and

bonding the conductor to the first metal ball by placing a second metal ball through the opening onto the first metal ball and then reflowing the second metal ball.

61. The method ofclaim 60 wherein placing and reflowing the first metal ball is performed with a ball bumper apparatus.

62. The method ofclaim 60 wherein placing and reflowing the second metal ball is performed with a ball bumper apparatus.

63. The method ofclaim 60 wherein the first metal ball and the second metal ball comprise pre-formed solder balls.

64. A method for fabricating a semiconductor package comprising:

providing a semiconductor die including a die contact formed thereon;

providing a flex circuit comprising a polymer substrate with an external contact formed thereon, and a conductor in electrical communication with the external contact, said polymer substrate including an opening, said conductor including a portion proximate to the opening; and

bonding the portion of the conductor to the die contact by heating the portion with a tool placed through the opening.

65. The method ofclaim 64 further comprising forming an adhesive member between the flex circuit and die.

66. The method ofclaim 64 further comprising forming a plurality of adhesive dots between the flex circuit and die.

67. The method ofclaim 64 further comprising electrolessly depositing a layer on the pad configured to facilitate the bonding step.

68. A method for fabricating a semiconductor package comprising:

providing a semiconductor die including a die contact formed thereon;

electrolessly depositing a layer on the die contact;

providing a flex circuit comprising a polymer substrate with an external contact formed thereon, and a conductor in electrical communication with the external contact, said polymer substrate including an opening, said conductor including a portion proximate to the opening; and

bonding the portion of the conductor to the layer on the die contact using a tool placed through the opening, said tool selected from the group consisting of thermocompression tools, thermosonic tools and laser tools.

69. The method ofclaim 68 wherein the layer comprises a material selected from the group consisting of gold and palladium.

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