US20040089941A1 - Semiconductor device having radiation structure - Google Patents

Abstract

A semiconductor device includes two semiconductor chips that are interposed between a pair of radiation members, and thermally and electrically connected to the radiation members. One of the radiation members has two protruding portions and front ends of the protruding portions are connected to principal electrodes of the semiconductor chips. The radiation members are made of a metallic material containing Cu or Al as a main component. The semiconductor chips and the radiation members are sealed with resin with externally exposed radiation surfaces.

Description

CROSS REFERENCE TO RELATED APPLICATIONS
• This application is based upon and claims the benefit of Japanese Patent Applications No. 11-3331-19 filed on Nov. 24, 1999, No. 11-333124 filed on Nov. 24, 1999, No. 2000-88579 filed on Mar. 24, 2000, No. 2000-97911 filed on Mar. 30, 2000, No. 2000-97912 filed on Mar. 30, 2000 and No. 2000-305228 filed on Oct. 4, 2000, the contents of which are incorporated herein by reference.[0001]
BACKGROUND OF THE INVENTION
• 1. Field of the Invention[0002]
• This invention relates to a semiconductor device in which heat is radiated from both sides of a semiconductor chip accommodated therein. 2. Description of the Related Art[0003]
• For example, JP-A-6-291223 discloses a semiconductor device in which heat is radiated from both sides of a semiconductor chip. FIGS. 1A to[0004]1C show this semiconductor device. As shown in the figures, a pair of radiation members J2, J3 sandwich several semiconductor chips J1, and are thermally and electrically connected to the semiconductor chips J1. The several semiconductor chips J1 arranged on a plane and the radiation members J2, J3 are sealed with resin J5.
• Each of the radiation members J[0005]2, J3 serves as an electrode, and has a surface exposed from the resin J5 at an opposite side of the face contacting the semiconductor chips J1. Each of the radiation members J2, J3 performs radiation of heat by making the exposed surface contact a contact body (not shown) that can exhibit a radiation action. A control terminal J4 connected with a control electrode of the semiconductor chips J1 protrudes to an outside from the resin J5.
• Used as the radiation members J[0006]2, J3 is W (tungsten) or Mo (molybdenum) having a thermal expansion coefficient approximate to that of the semiconductor chips J1. The radiation member J2 that is connected to the surfaces of the semiconductor chips J1 on which the control electrode is formed is an emitter electrode, and the radiation member J3 that is connected to the surfaces of the semiconductor chips J1 at an opposite side of the control electrode is a collector electrode.
• Besides, several solder bumps J[0007]7 protrudes from an insulating plate J6 that has a through hole at a center thereof in which the radiation member J2 penetrates as the emitter electrode. The solder bumps J7 are bonded to bonding pads existing in unit patterns of the respective semiconductor chips J1 disposed on the radiation member J3 as the collector electrode.
• When the radiation members J[0008]2, J3 serving also as electrodes are made of metallic material such as W or Mo having linear thermal expansion coefficient approximate to that of the semiconductor chips J1 made of Si (silicon), these metallic materials are, in electrical conductivity about one third of that of Cu (copper) or Al (aluminum), and in thermal conductivity about one third to two third thereof. Thus, in the present circumstances involving an increased requirement for flowing a large current in the semiconductor chip, using W or Mo as a member that serves as a radiation member and an electrode simultaneously causes many problems.
• Also, in general, a larger chip is required to accommodate a larger current. However, there are many technological problems to increase the chip size, and it is easier to manufacture plural smaller chips and accommodate them into one package.[0009]
• In the technique disclosed in the publication describe above, the several semiconductor chips J[0010]1 are formed in the semiconductor device. However, as shown in FIG. 1A, because the radiation member J2 has a simple rectangular shape, and is provided at the center of the device, disposal of different semiconductor chips in one device is limited. That is, when the semiconductor chips are different from one another in, for example, thickness, it is difficult for the one emitter electrode having a simple shape to be connected to all of the different semiconductor chips.
SUMMARY OF THE INVENTION
• The present invention has been made in view of the above problem. An object of the present invention is to improve a radiation property and an electrical conductivity of a semiconductor device including radiation members that are thermally and electrically connected to both surfaces of a semiconductor chip therein. Another object of the present invention is to provide a semiconductor device easily accommodating several different semiconductor chips therein.[0011]
• For example, according to one aspect of the present invention, in a semiconductor device in which a semiconductor chip is thermally and electrically connected to first and second radiation members therebetween, the first and second radiation members are made of a metallic material that is superior to tungsten and molybdenum in at least one of an electrical conductivity and a thermal conductivity. Accordingly, the radiation property and the electrical conductivity of the semiconductor device can be improved.[0012]
• According to another aspect of the present invention, in a semiconductor device in which first and second semiconductor chips are thermally and electrically connected to first and second radiation members therebetween, the first radiation member has first and second protruding portions protruding toward the first and second semiconductor chips, and first and second front end portions of the first and second protruding portions are thermally and electrically connected to the first and second semiconductor chips through a bonding member.[0013]
• In this case, even when the first and second semiconductor chips are different from each other in thickness, the first and second radiation members can be provided with first and second radiation surfaces approximately parallel to each other by controlling protruding amounts of the first and second protruding portions.[0014]
• According to still another aspect of the present invention, in a semiconductor device in which a semiconductor chip is disposed between a first conductive member and a second conductive member, the first conductive member is further bonded to a third conductive member at an opposite side of the semiconductor chip so that a bonding area between the first conductive member and the third conductive member is smaller than that between the first conductive member and the semiconductor chip. Accordingly, stress concentration on the first conductive member can be suppressed to prevent occurrence of cracks. This results in improved radiation property and electrical conductivity of the semiconductor device.[0015]
BRIEF DESCRIPTION OF THE DRAWINGS
• Other objects and features of the present invention will become more readily apparent from a better understanding of the preferred embodiments described below with reference to the following drawings, in which;[0016]
• FIG. 1A is a schematic view showing a semiconductor device according to a prior art;[0017]
• FIG. 1B is a cross-sectional view showing the semiconductor device, taken along line IB-IB in FIG. 1A;[0018]
• FIG. 1C is a cross-sectional view showing the semiconductor device, taken along line IC-IC in FIG. 1A;[0019]
• FIG. 2A is a cross-sectional view showing a semiconductor device in a first preferred embodiment;[0020]
• FIG. 2B is an enlarged cross-sectional view showing a part indicated by arrow IIB in FIG. 2A;[0021]
• FIG. 3 is a table showing metals usable for a radiation member in the first embodiment;[0022]
• FIG. 4A is a cross-sectional view partially showing a semiconductor device in a second preferred embodiment;[0023]
• FIGS. 4B to[0024]4D are cross-sectional views respectively showing a first side radiation member and a Si chip in the second embodiment;
• FIGS. 5A to[0025]5C are cross-sectional views respectively taken along lines VA-VA, VB-VB, and VC-VC in FIGS. 4B to4D;
• FIG. 6 is a cross-sectional view showing a semiconductor device in a third preferred embodiment;[0026]
• FIG. 7 is a cross-sectional view showing a semiconductor device in a fourth preferred embodiment;[0027]
• FIG. 8A is a cross-sectional view showing a semiconductor device in a fifth preferred embodiment;[0028]
• FIG. 8B is a cross-sectional view taken along line VIIIB-VIIIB in FIG. 8A;[0029]
• FIG. 9A is a cross-sectional view showing a semiconductor device in a sixth preferred embodiment;[0030]
• FIG. 9B is an enlarged cross-sectional view showing a part indicated by arrow IXB in FIG. 9A;[0031]
• FIG. 9C is a cross-sectional view showing an example in the sixth embodiment;[0032]
• FIG. 10 is a cross-sectional view showing a semiconductor device in a seventh preferred embodiment;[0033]
• FIG. 11 is a cross-sectional view showing a semiconductor device in an eighth preferred embodiment;[0034]
• FIG. 12 is a cross-sectional view showing a semiconductor device in a ninth preferred embodiment;[0035]
• FIG. 13 is a cross-sectional view showing a semiconductor device in a tenth preferred embodiment;[0036]
• FIGS. 14A to[0037]14C are cross-sectional views showing a method for manufacturing the semiconductor device shown in FIG. 13 in a stepwise manner;
• FIG. 15 is a cross-sectional view schematically showing a second lead member and a soldering member as a modified example of the tenth embodiment;[0038]
• FIG. 16 is a cross-sectional view schematically showing a method for manufacturing a semiconductor device in an eleventh preferred embodiment;[0039]
• FIG. 17 is a cross-sectional view schematically showing a method for manufacturing a semiconductor device in a twelfth preferred embodiment;[0040]
• FIG. 18 is a cross-sectional view schematically showing another method for manufacturing the semiconductor device in the twelfth embodiment;[0041]
• FIG. 19 is a cross-sectional view showing a semiconductor device in a thirteenth preferred embodiment;[0042]
• FIGS. 20A to[0043]20C are cross-sectional views for explaining a method for manufacturing the semiconductor device shown in FIG. 19;
• FIG. 21 is a cross-sectional view showing a semiconductor device in a fourteenth preferred embodiment;[0044]
• FIG. 22 is a cross-sectional view showing a semiconductor device in a fifteenth preferred embodiment;[0045]
• FIG. 23 is a cross-sectional view showing a semiconductor device as a modification of the thirteenth embodiment;[0046]
• FIG. 24 is a cross-sectional view showing a semiconductor device in a sixteenth preferred embodiment;[0047]
• FIG. 25 is an enlarged cross-sectional view showing a part surrounded by a broken line in FIG. 24;[0048]
• FIG. 26 is a top plan view showing the semiconductor device in a direction indicated by arrow XXVI in FIG. 24;[0049]
• FIG. 27 is a top plan view showing a semiconductor device in a seventeenth preferred embodiment;[0050]
• FIG. 28A is a cross-sectional view showing the semiconductor device, taken along line XXVIIIA-XXVIIIA in FIG. 27;[0051]
• FIG. 28B is a cross-sectional view showing the semiconductor device, taken along line XXVIIIB-XXVIIIB in FIG. 27;[0052]
• FIG. 29 is a diagram showing an equivalent circuit of an IGBT chip in the semiconductor device in the seventeenth embodiment;[0053]
• FIGS. 30A to[0054]30D are schematic views showing a method for manufacturing radiation members in the seventeenth embodiment;
• FIG. 31 is a schematic view showing a constitution observed in a side direction in a manufacturing process of the semiconductor device;[0055]
• FIGS. 32A to[0056]32C are schematic views showing a step for caulking fixation;
• FIG. 33 is a cross-sectional view partially showing an IGBT chip as an example;[0057]
• FIG. 34 is a cross-sectional view showing a semiconductor device in an eighteenth preferred embodiment;[0058]
• FIGS. 35A and 35B are cross-sectional views showing a radiation member used in a modified example of the eighteenth embodiment; and[0059]
• FIG. 36 is a cross-sectional view showing a semiconductor device in a modified embodiment of the seventeenth embodiment.[0060]
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
• (First Embodiment)[0061]
• A first preferred embodiment is described with reference, to FIGS. 2A and 2B. As shown in FIG. 2A, a pair of[0062]radiation members2,3 are disposed to sandwich twoSi chips1a,1bthat are disposed on a plane. Theradiation members2,3 are thermally and electrically connected to principal electrodes of the Si chips1a,1bthroughbonding members4. Hereinafter, connection means thermal and electrical connection except cases in which specific descriptions are presented. A control electrode of theSi chip1ais electrically connected to acontrol terminal5, which is connected to a lead frame, via awire8 formed by wire bonding.
• Specifically, the radiation member (first side radiation member)[0063]2, facing upper surfaces (first surfaces)6aof the Si chips1a,1bto which the wire bonding is performed is formed with protrudingportions2aprotruding at a step-like shape at positions facing the principal electrodes of the Si chips1a,1b. Front ends of the protrudingportions2aare generally flat and the flat portions are respectively connected to the principal electrodes through thebonding members4. Being generally flat means flat at a level that does not interfere with bonding between the protrudingportions2aand the principal electrodes.
• Next, the protruding[0064]portions2aare explained in more detail. As shown in FIG. 2B, when the Si chips1a,2bare power devices, each withstand voltage at peripheral portions of the Si chips1a,1bis kept byguard rings7 that is provided on one surface of each chip, i.e., on thesurface6aor a surface (second surface)6bopposed to thesurface6a.
• Like the present embodiment, when metallic materials as the[0065]radiation members2,3 are bonded to the both surfaces of eachSi chip1a,1b,theradiation member2 is bonded to the surface (the first surfaces in this embodiment)6awhere the guard rings7 are provided. However, referring to FIG. 2B, a distance indicated by an arrow B at the peripheral portions of the Si chips1a,1b, i.e., at the regions one of which is indicated by a broken line in the figure, the firstside radiation member2 must be electrically insulated from the guard rings7 and from the edge surfaces of the Si chips1a,1b. Therefore, insulated regions must be provided there.
• Because of this, the[0066]radiation member2 has the protrudingportions2aat the positions facing the principal electrodes of the Si chips1a,1b. In other words, theradiation member2 has recess portions at the positions facing the guard rings7 of the Si chips1a,1bto avoid the high withstand regions (insulated regions).
• The radiation member (second side radiation member)[0067]3 bonded to theother surfaces6bof the Si chips1a,1bhas no protruding portion, and is generally flat. That is, the secondside radiation member3 is generally so flat that it does not interfere with mountability of the Si chips1a,1bto theradiation member3. In therespective radiation members2,3, respective surfaces opposite to the surfaces facing the Si chips1a,1bconstitute radiation surfaces10 that are also generally flat and are approximately parallel to each other.
• Here, in this embodiment, the wire-bonded Si chip is an IGBT (Insulated Gate Bipolar Transistor)[0068]1a, while the other Si chip is a FWD (free-wheel diode)1b. In theIGBT1a, the firstside radiation member2 is an emitter, the secondside radiation member3 is a collector, and the control electrode is a gate. As shown in FIG. 2A, the thickness of theFWD1bis larger than that of theIGBT1a. Therefore, in the firstside radiation member2, the protrudingportion2afacing theIGBT1ahas a protruding amount relatively larger than that of the other protrudingportion2afacing theFWD1b.
• As the first side and second[0069]side radiation members2,3, for example, a metallic material including Cu or Al as a main component can be used, which has electrical conductivity and thermal conductivity larger than those of W and Mo, and is cheaper that those. FIG. 3 is a table showing examples of metallic materials usable as theradiation members2,3. As shown in FIG. 3, theradiation members2,3 can be made of one of metal “a” to metal “l”, anoxia copper, and the like. Here, for example, metal “a” is an alloy containing, in mass ratio, Fe (iron) at 2.3%, An (zinc) at 0.1%, P (phosphorous) at 0.03%, and Cu as the remainder.
• The[0070]bonding members4 are preferable to have a shear strength superior to a shear stress produced by thermal stress, and to be superior in both thermal conductivity and electrical conductivity. As suchconductive members4, for example, solder, brazing filler metal, or conductive adhesive can be used. Thewire8 for wire bonding can be made of Au (gold), Al, or the like which is used for wire bonding in general.
• Also, as shown in FIG. 2A, these[0071]members1 to5, and8 are sealed withresin9 while exposing the radiation surfaces10 of theradiation members2,3 at the opposite side of the Si chips1a,1b, and exposing simultaneously thecontrol terminal5 at the opposite side of the wire bonding. The radiation surfaces10 of therespective radiation members2,3 serve as electrodes and perform radiation of heat simultaneously. Theresin9 preferably has a thermal expansion coefficient approximate to those of theradiation members2,3. For example, epoxy based mold resin can be used assuch resin9.
• Further, the resin-sealed[0072]members1 to5 and8 are sandwiched by a pair ofoutside wiring members11 so that the radiation surfaces10 contact theoutside wiring members11. Each of theoutside wiring members11 is a flat plate having a portion with a plate shape or a fine wire shape that is conducted to be interconnected with an outside. Theoutside wiring members11 and the resin-sealedmembers1 to5, and8 are further sandwiched by a pair ofoutside cooling members13 with plate-shaped high thermalconductivity insulating substrates12 interposed therebetween. The resin-sealedmembers1 to5 and8, theoutside wiring members11, the high thermalconductivity insulating substrates12, and theoutside cooling members13 are fixed byvolts4 or the like screwed from theoutside cooling members13.
• The[0073]outside wiring members11 may be made of any materials provided that they are superior in thermal conductivity and electrical conductivity. The high thermalconductivity insulating substrates12 can be made of, for example, one of AlN (aluminum nitride), SiN (silicon nitride), Al₂O₃(aluminum dioxide), SiC (silicon carbide), BN (boron nitride), diamond or the like. Theoutside cooling members13 is constructed to include a radiation fin, or to be cooled by water.
• According to the constitution described above, as to an electrical path, current flow in the order of the[0074]outside wiring member11 contacting the firstside radiation member2, the firstside radiation member2, the Si chips1a,1b, the secondside radiation member3, theoutside wiring member11 contacting the secondside radiation member3 or in the inverse order. As to a thermal path, heat produced in the Si chips1a,1bis transferred to the first side and secondside radiation members2,3, theoutside wiring members11, the high thermalconductivity insulating substrates12, and theoutside cooling members13, and then is radiated.
• Next, a method for manufacturing the semiconductor device shown in FIGS. 2A and 2B is explained. First, the principal electrodes on the[0075]second surfaces6bof the Si chips1a,1bare bonded to the secondside radiation member3 through thebonding members4. Next, the control electrode of theSi chip1aand thecontrol terminal5 are electrically connected to each other by wire bonding. After that, the principal electrodes on thefirst surfaces6aof the Si chips1a,1bare bonded to the front ends of the protrudingportions2aof the firstside radiation member2 by bondingmembers4. Here, the protrudingportions2aof the firstside radiation member2 are formed by pressing or the like previously.
• Subsequently, a die (not show) is prepared, and the[0076]integrated Si chips1a,1band the first side and secondside radiation members2,3 are disposed in the die and is sealed with resin. Accordingly, electrical insulation between theradiation members2,3 can be attained. Successively, as described above, with respect to the radiation surfaces10, theoutside wiring members11, the high thermalconductivity insulating substrates12, and theoutside cooling members13 are disposed in this order. Then, theoutside cooling members13 are fastened with volts, so that themembers11 to13 are fixed. In consequence, the semiconductor device in the present embodiment is completed.
• According to the present embodiment, because the first side and second[0077]side radiation members2,3 are made of metallic material containing Cu or Al as a main component that is superior in thermal conductivity and electrical conductivity, the semiconductor device can be provided with improved radiation property and improved electrical conductivity. Further, because these members can be manufactured at lower cost as compared to a conventional case using W or Mo, the semiconductor device can be provided at low cost. Furthermore, the metallic material containing Cu or Al as the main component is so soft as compared to W or Mo that workability for forming the protrudingportions2aon the firstside radiation member2 is good.
• Besides, because the protruding[0078]portions2aare provided on the firstside radiation member2 and are connected to the respectivedifferent Si chips1a,1b, the connection, between therespective Si chips1a,1band theradiation member2 can be performed appropriately. Specifically, the protruding amounts and the shapes of the protrudingportions2 can be changed in accordance with the thicknesses of the Si chips1a,1band the shapes of the principal electrodes of the Si chips1a,1b. Because of this, thedifferent semiconductor chips1a,1bcan be easily accommodated in the semiconductor device.
• The radiation surfaces[0079]10 of theradiation members2,3 may have irregularities thereon or may not be parallel to each other. However, in this embodiment, the radiation surfaces10 are made flat and approximately parallel to each other. This is made possible because the surface step, i.e., the difference in thickness between the Si chips1a,1bcan be absorbed by the protrudingportions2aby controlling the protruding amounts thereof in accordance with the respective thicknesses of the Si chips1a,1b.
• As a result, in the present embodiment, because the radiation surfaces[0080]10 are generally flat and approximately parallel to each other, when the volts are fastened to the radiation surfaces10 with theoutside wiring members11, the high thermalconductivity insulating substrates12, and theoutside cooling members13 interposed therebetween, thesurfaces10 and thesemembers11 to13 can be brought in contact with each other securely and easily at the interfaces thereof.
• Moreover, because the radiation surfaces[0081]10 are approximately parallel to each other, a force produced by fastening the volts is uniformly applied to themembers1 to5,8,9, and11 to13. Therefore, thesemembers1 to5,8,9, and11 to13 are not damaged or destroyed by deviation of the force, and the assembling performance can be improved.
• In general, though the[0082]IGBT1aand theFWD1bare used as a pair, as the distance between theIGBT1aand theFWD1bis decreased; an operation on a circuit becomes more ideal. According to the present embodiment, because theIGBT1aand theFWD1bare disposed adjacently to each other in the integrally resin-sealed semiconductor device, the operation of theIGBT1acan approach the ideal state in the semiconductor device.
• When the object of the invention is limited to provide a semiconductor device capable of accommodating the[0083]different semiconductor chips1a,1beasily, the materials for forming the first side and secondside radiation members2,3 are not limited to the materials containing Cu or Al as a main component but may be other conductive materials having electrical conductivity. That is, when the prevention of breakage of thebonding members4 caused by thermal stress is of greater importance, the first side and secondside radiation members2,3 should be made of metallic material having a thermal expansion coefficient approximate to that of the Si chips1a,1b. On the other hand, when the radiation property and the electrical conductivity are of greater importance, theradiation members2,3 should be made of metallic material containing Cu or Al as a main component.
• The[0084]resin9 used in the present embodiment not only insulates theradiation members2,3 from each other but also reinforces the bonding between theradiation members2,3 and the Si chips1a,1bby connecting theradiation members2,3 to the Si chips1a,1b. Therefore, even when theradiation members2,3 are made of a metallic material containing Cu or Al as a main component, which has a thermal expansion coefficient different from that of the Si chips1a,1b, the breakage of thebonding members4 caused by thermal stress can be relaxed by theresin9.
• Especially when the[0085]resin9 has a thermal expansion coefficient approximate to that of theradiation members2,3, stress is applied to the Si chips1a,1bto promote expansion and contraction similar to those of theradiation members2,3 when temperature varies. Therefore, stress applied to thebonding members4 is relaxed and generation of strain is restricted, resulting in improvement of reliability at the connection portions.
• Incidentally, although the second[0086]side radiation member3 has no protruding portion thereon in the present embodiment, it may have a protruding portion. Thermal conductive grease or the like may be applied to the contact faces between theoutside wiring members11 and the high thermalconductivity insulating substrates12, and between the high thermalconductivity insulating substrates12 and theoutside cooling members13 to enhance thermal bonding further.
• The contact between each[0087]outside wiring member11 and each high thermalconductivity insulating substrate12 is preferable to be fixed by pinching as in the present embodiment in consideration of the difference in thermal expansion coefficient between themembers11 and12. However, eachradiation surface10 and each, outsidewiring member11 can be connected by solder, brazing filler metal or the like because these members can be made of materials having thermal expansion coefficient not largely different from each other.
• The body of the first[0088]side radiation member2 may be separated from the protrudingportions2a. For example, the protrudingportions2amay be bonded to a plate-shaped body of themember2 by soldering, welding, or the like. The material forming the firstside radiation member2 is not always necessary to be identical with that forming the secondside radiation member3. In the present embodiment, although the resin-sealing is performed by a die, the sealing may be performed by potting without any die.
• Although it is described that the[0089]resin9 for sealing has a thermal expansion coefficient approximate to those of the first side and secondside radiation members2,3, theresin9 is not limited to that, but may be other appropriate resin when there is no need to consider bonding strength between the Si chips1a,1band theradiation members2,3.
• Although it is described in the present embodiment that the[0090]IGBT1aand theFWD1bare used as the Si chips, in some cases such as that only one Si chip is used, or the same kind of Si chips are used, the connecting structure between the Si chip(s) and theradiation members2,3 is not complicated. In these cases, the protrudingportions2aneed not be formed on one of theradiation members2,3. As described above, the semiconductor device having improved radiation property and electrical conductivity can be provided by forming theradiation members2,3 from a metallic material containing Cu or Al as a main component having electrical conductivity and thermal conductivity higher than those of W or Mo.
• (Second Embodiment)[0091]
• A second preferred embodiment differs from the first embodiment in an inside shape of the first[0092]side radiation member2. FIG. 4A shows a semiconductor device in the second embodiment, and FIGS. 4B to4D are cross-sectional views partially showing various firstside radiation members2 andSi chips1a,1bfacing therespective radiation members2. FIGS. 5A to5C are cross-sectional views respectively taken along lines VA-VA, VB-VB, VC-VC in FIGS. 4B to4D.
• In. FIG. 4A, the first[0093]side radiation member2 is partially omitted, and the cross-sectional shapes shown in FIGS. 4B to4D are applicable to the omitted part. FIG. 4A also omits theoutside wiring members11, the high thermalconductivity insulating substrates12, and theoutside cooling members13. Hereinafter, different portions from those in FIG. 2A are explained. In FIGS. 4A to4D and5A to5C, the same parts as those in FIG. 2A are indicated with the same reference numerals, and those explanation is made simple.
• As shown in. FIGS. 4A to[0094]4D and5A to5C, the firstside radiation member2 has aspace15 at a portion connected to the Si chips1a,1b. Thespace15 can have a lattice shape as in an example shown in FIG. 5A, be composed of several concentric circles as in an example shown in FIG. 5B, and be composed of several concentric rectangles as in an example shown in FIG. 5C. The shape of thespace15 in a direction perpendicular to the connection surface between theradiation member2 and the Si chips1a,1bis as shown in FIG. 4B, 4C, or4D. That is, there are cases where thespace15 is open at the connecting portions with the Si chips1a,1b, is open at theradiation surface10, and is closed both at the connecting portions with the Si chips1a,1band theradiation surface10.
• The[0095]space15 can be formed by, for example, cutting work. When thespace15 is closed both at the connecting portions with the Si chips1a,1band theradiation surface10 as shown in FIG. 4D, it can be formed by forming the radiation member with the space opened at the connecting portions with the Si chips1a,1bby cutting first as shown in FIG. 4B, and then by bonding a metal plate to close the opening portions by welding or the like.
• According to the present embodiment, the same effects as those described in the first embodiment can be attained. In addition, the[0096]space15 formed in the firstside radiation member2 increases the rigidity of theradiation member2. As a result, stress applied to the Si chips1a,1band to thebonding members4 can be reduced, so that the breakage of the Si chips1a,1bcan be prevented and the reliability in the bonding between the Si chips1a,1band theradiation member2 can be enhanced.
• The other features not described in the second embodiment are substantially the same as those in the first embodiment. The[0097]space15 is exemplified in cases it extends in the thickness direction of the Si chips1a,1b; however, it may extend in a surface direction of thechips1a,1b. Further, thespace15 may be formed in the secondside radiation member3. Thespace15 needs not be formed uniformly at the portions contacting the Si chips1a,1b, and can be arranged appropriately at required positions.
• The shape of the[0098]space15 is not limited to the examples shown in the figures, provided that it can reduce the rigidity of the radiation member. When theradiation members2,3 are made of a metallic material including Cu or Al, it is easy to form thespace15 because theradiation members2,3 are easy to be processed.
• (Third Embodiment)[0099]
• FIG. 6 shows a semiconductor device in a third preferred embodiment, in which the[0100]outside wiring members11, the high thermalconductivity insulating substrates12, and theoutside cooling members13 shown in FIG. 2A are omitted. Hereinafter, different portions from those in the first embodiment are mainly explained, and in FIG. 6, the same parts as those in FIG. 2A are indicated with the same reference numerals.
• As shown in FIG. 6, in the third embodiment, metallic members (partially disposed metallic members)[0101]16 made of Mo, W, Cu-Mo, or the like having a thermal expansion coefficient approximate to that of Si chips are disposed at the portions of the first side and secondside radiation members2,3 facing the Si chips1a,1b. The partially disposedmetallic members16 can be previously formed on theradiation members2,3 by soldering, brazing, shrinkage fitting, or press-fitting. To position the partially disposedmetallic members16 with respect to the Si chips1a,1bwith high accuracy, the Si chips1a,1band the partially disposedmetallic members16 should be bonded by soldering, brazing, or the like, previous to the bonding between the partially disposedmetallic members16 and theradiation members2,3 by soldering, brazing, or the like.
• According to the present embodiment, the same effects as those in the first embodiment can be attained. In addition, because the thermal expansion coefficient at the connecting portions between the Si chips[0102]1a,1band the first side and secondside radiation members2,3 are approximated to each other, thermal stress produced by a change in temperature can be reduced at the connecting portions and the bonding strength can be enhanced. Also, the addition of themetallic members16 having the thermal expansion coefficient approximate to that of the Si chips1a,1bapproaches the strain of theradiation members2,3 as a whole to Si, so that stress applied to the Si chips1a,1bcan be lowered.
• Accordingly, the semiconductor device can be provided with high reliability to the bonding strengths between the Si chips[0103]1a,1band theradiation members2,3 and without breakage of the Si chips1a,1bwhile securing the same effects as those in the first embodiment. Incidentally, the other features not described in this embodiment are substantially the same as those in the first embodiment. The partially disposedmetallic members16 need not be provided at the entire region of eachradiation member2 or3 connected to the Si chips1a,1b. The partially disposedmetallic members16 should be disposed at necessary positions appropriately. Also, in this embodiment, thespace15 may be formed in at least one of the first side and secondside radiation members2,3 as in the second embodiment.
• (Fourth Embodiment)[0104]
• FIG. 7 shows a semiconductor device in a fourth preferred embodiment. This embodiment relates to a modification of the[0105]outside wiring members11 described in the first embodiment. Hereinafter, different portions from the first embodiment are mainly described, and in FIG. 7, the same parts as those in FIG. 2A are indicated by the same reference numerals. In FIG. 7, the high thermalconductivity insulating substrates12 and theoutside cooling members13 are omitted.
• As shown in FIG. 7,[0106]conductive terminals17 connected to the principal electrodes of the Si chips1a,1bare taken out of edges of the first side and secondside radiation members2,3 as main electrode terminals to be electrically connected to an outside. Theconductive members17 have the same function as that of theoutside wiring members11 shown in FIG. 2A.
• The[0107]conductive members17 protrude from therespective radiation members2,3 from approximately the same position with respect to therespective members2,3 and in an approximately identical direction that is perpendicular to the radiation surfaces10. That is, theconductive members17 are approximately parallel to each other, and accordingly can prevent a parasitic inductance described below. The root parts of theconductive members17 are adjacent to each other. The semiconductor device shown in FIG. 7 dispenses with theoutside wiring members11 shown in FIG. 2A, and the radiation surfaces10 contact theoutside cooling members13 with the high thermalconductivity insulating substrates12 interposed therebetween, although they are not shown.
• It is preferable that the[0108]respective radiation members2,3 and the respectiveconductive members17 are integrated with each other in consideration of electrical resistance. However, when theconductive members17 are separately formed and bonded to theradiation members2,3, screwing, welding, brazing, and soldering methods are conceivable for the bonding. At that time, theconductive members17 can be made of various materials as long as it is superior in electrical conductivity.
• According to the present embodiment, the same effects as those in the first embodiment can be exhibited. In addition, because electrical connection with the outside can be made via the[0109]conductive members17, it is not necessary to connect theoutside wiring members11 to the radiation surfaces10 of theradiation members2,3. As a result, as compared to the case where theoutside wiring members11 are used, the number of connecting interfaces in the direction in which heat is transferred is reduced to reduce heat resistance at the connecting interfaces. Therefore, the radiating property is further improved. In addition, the thickness of the semiconductor device in the thickness direction of the Si chips1a,1bcan be reduced, resulting in size reduction of the semiconductor device.
• As a more preferable configuration, in the present embodiment, the[0110]conductive members17 are provided to be approximately parallel to each other at adjacent positions, and in the semiconductor device, currents flow in the respectivelyconductive members17 with the same intensity in directions inverse to each other. When currents flow in the adjacent parallel conductive members in the inverse directions to each other, magnetic fields produced around the conductive members are canceled with each other. As a result, the parasitic inductance can be significantly suppressed.
• Also in the present embodiment, as in the first embodiment, the radiation members are made of a metallic material containing Cu or Al as a main component when the object of the invention is to improve the radiation property and the electrical conductivity. In this case, because workability of Cu and Al is good, the[0111]conductive members17 can be easily formed by pressing, cutting, or the like.
• The other features not described in the present embodiment are substantially the same as those in the first embodiment. In the present embodiment, although the[0112]conductive members17 are adjacent to and approximately parallel to each other, theconductive members17 are not limited to that, but may protrude from the respective radiation members in different directions from each other. Also when theradiation members2,3 use a material having high hardness such as W or Mo to easily seal the several semiconductor chips with resin, theconductive members17 are preferably formed as separate members because they are difficult to be integrally formed with theradiation members2,3.
• (Fifth Embodiment)[0113]
• FIGS. 8A and 8B show a semiconductor device in a fifth preferred embodiment, in which the[0114]outside wiring members11, the high thermalconductivity insulating substrates12, and theoutside cooling members13 shown in FIG. 2A are omitted. The present embodiment differs from the first embodiment in the connecting method between the Si chips1a,1band the firstside radiation member2. Hereinafter, different portions from the first embodiment are mainly explained and in FIGS. 8A and 8B the same parts as those in FIG. 2A are assigned to the same reference numerals.
• As shown in FIGS. 8A and 8B, bump-shaped[0115]bonding members4 are uniformly provided between the principal electrodes on theprincipal surfaces6aof the Si chips1a,1band the firstside radiation member2, and spaces provided among thebonding members4 are filled withresin18. Theresin18 has material properties similar to those of metal such as good wettability, and prevents stress concentration on the bump-shapedbonding members4. Hereinafter, the resin is referred to as RAB (Resist Assist Bonding)resin18. TheRAB resin18 is specifically composed of epoxy based resin mixed with silica fillers.
• To form the constitution described above, like the semiconductor device in the first embodiment, after the Si chips[0116]1a,1bare connected to the secondside radiation member3 and the wire bonding are carried out, thebonding members4 are formed in bump shapes on the principal electrodes of the Si chips1a,1bat the side of thefirst surfaces6a, and connected to the firstside radiation member2.
• Successively, the[0117]RAB resin18 is put in an injector, and is injected into the spaces provided among the bump-shapedbonding members4. At that time, even when the resin is not injected into all the spaces directly, the spaces can be filled with the resin due to a capillary tube phenomenon. After that, as described above, theintegrated Si chips1a,1band theradiation members2,3 are put in the die, and are sealed with theresin9 integrally.
• According to the present embodiment, the same effects as those in the first embodiment can be attained. Further, the[0118]RAB resin18 can restrict plastic deformation of thebonding members4. Furthermore, theRBA resin18 can prevent cracks, which are produced in thebonding members4 due to thermal stress, from progressing. That is, theRBA resin18 strengthens the bonding between the Si chips1a,1band the firstside radiation member2, and increases the reliability in connection.
• The features not described in the present embodiment are substantially the same as those in the first embodiment. Also in the present embodiment, small bumps are arranged uniformly; however, smaller number of bumps with larger size than those in the present embodiment may be arranged. Although the bump-shaped[0119]bonding members4 are adopted for bonding the Si chips1a,1bto the firstside radiation member2 in the present embodiment, they may be adopted for bonding the Si chips1a,1bto the secondside radiation member3. If themold resin9 can be injected into the spaces among the bumps to fill them completely, it is not necessary to inject theRBA resin18 previously. In this case, themold resin9 filling the spaces among the bumps works as theRBA resin18. The second to fourth embodiments can be applied to the present embodiment appropriately.
• (Sixth Embodiment)[0120]
• Hereinafter, sixth to ninth embodiments are described as first to fourth modified examples of the embodiments described above, which are applicable to the above respective embodiments, and some of which may be combined with each other to be applied to the above respective embodiments.[0121]
• First, the sixth embodiment is explained referring to FIGS. 9A to[0122]9C. In the above embodiments, the firstside radiation member2 is formed with the protrudingportions2a; however, as indicated by an arrow F in FIG. 2B, because the firstside radiation member2 is thickened at the protrudingportions2a, its rigidity is increased. The larger the rigidity of the firstside radiation member2 is, larger compressive stress is applied to the Si chips1a,1b.
• To reduce the rigidity, a method shown in FIG. 9C is conceivable, in which the first[0123]side radiation member2 is formed by embossing a sufficiently thinned metallic plate to have a protruding portion for avoiding an insulated region, and is bonded to the Si chips1a,1bwith a decreased rigidity. However, in this method, because theradiation surface10 of the firstside radiation member2 is not flat, it is difficult to contact theoutside wiring member11 and theoutside cooling member13.
• In this connection, in this embodiment, as shown in FIGS. 9A and 9B, an insulating[0124]film20 is formed on the firstside radiation member2, with anopening pattern19 opened at regions corresponding to the inner sides of the Si chips1a,1bthan the peripheral portions of thechips1a,1bwhere the guard rings7 are provided. In other words, the insulatingfilm20 is formed at regions corresponding to the insulated regions in FIG. 2B, and opened at regions corresponding to the principal electrodes of the Si chips1a,1bat the side of thefirst surfaces6a.
• The insulating[0125]film20 is preferable to be close without pinholes, and is necessary to withstand thermal contraction of theradiation member2. A film made of polyimide or glass is applicable to such an insulatingfilm20. When the semiconductor device in this embodiment is manufactured, after the insulatingfilm20 is formed on theradiation member2, the Si chips1a,1bare bonded to theradiation member2 at the side of thefirst surfaces6a. The other steps are substantially the same as those for the semiconductor device in the first embodiment.
• According to the method described above, the guard rings[0126]7 can be electrically insulated from the firstside radiation member2 by the insulatingfilm20. Theradiation member2 can be formed in a plate shape without a protrudingportion2afor avoiding the guard rings7 of the Si chips1a,1b. In this case, the rigidity of theradiation member2 can be reduced by the decreased thickness of theradiation member2 as far as the radiation property is allowed. As a result, the compressive stress applied to the Si chips1a,1bcan be mitigated.
• When the first side and second[0127]side radiation members2,3 do not have any protruding portions, it can be suitably adopted in cases of one Si chip, and several Si chips having an identical thickness with each other. Even when the several Si chips are different from one another in thickness, there is no problem if the difference in thickness can be absorbed by the amounts of thebonding members4.
• The other features not described in this embodiment are substantially the same as those in the first embodiment. In this embodiment, the insulating[0128]film20 is formed on the firstside radiation member2; however, it may be formed on the secondside radiation member3. If there is a region not filled with theresin9 for sealing, the insulation could not be securely attained by theresin9. However, the insulation can be securely provided by the insulatingfilm20 if it is formed on the region in advance. This prevention by the insulatingfilm20 can be applied to the case where theradiation member2 has the protrudingportions2aas well.
• (Seventh Embodiment)[0129]
• Next, the seventh embodiment is described as a second modified example referring to FIG. 10. In this embodiment, the electrical connecting method between the[0130]control terminal5 and the control electrode of theSi chip1adiffers, and FIG. 10 shows an example in which the present embodiment is applied to the fourth embodiment (FIG. 7). Hereinafter, different portions from those in FIG. 7 are mainly discussed, and in FIG. 10 the same parts as those in FIG. 7 are assigned to the same reference numeral.
• As shown in FIG. 10, the electrical connection between the control electrode and the[0131]control terminal5 is provided by abump21 that is made of, for example, solder, brazing filler metal, conductive adhesive, or the like. According to this modified example, the wire bonding step needs not be performed, and thecontrol terminal5 can be bonded simultaneously with the bonding between the Si chips1a,1band theradiation members2,3. Thus, the manufacturing process can be simplified. Also, wire flow of wire bond does not occur during the resin sealing.
• (Eighth Embodiment)[0132]
• Next, the eighth embodiment is described as a third modified example referring to FIG. 11. In this embodiment, the locations of the radiation surfaces[0133]10 differ. FIG. 11 is an example in which the present embodiment is applied to the semiconductor device that is provided by combining the first embodiment and the seventh embodiment being the second modified example. Hereinafter, different portions from those in FIGS. 2A and 10 are mainly described, and in FIG. 11 the same parts are assigned to the same reference numerals.
• As shown in FIG. 11, in this embodiment, each of the first side and second[0134]side radiation members2,3 has a wedge shaped cross-section, and the protrudingportions2aare formed on the firstside radiation member2. A side face of the firstside radiation member2 and a side face of the second side radiation member3 (disposed at a lower side in the figure) serve as the radiation surfaces10. The radiation surfaces10 of the first side and secondside radiation members2,3 are approximately perpendicular to the connecting surfaces of theradiation members2,3 being connected to the Si chips1a,1b, and are coplanar with each other. The radiation surfaces10 contact theoutside cooling member13 via the high thermalconductivity insulating substrate12, and are fixed by insulatingvolts22.
• According to the present embodiment, because there is no need to prepare two[0135]outside cooling members13, the flexibility for assembling the semiconductor device with theoutside cooling member13 is improved. For example, the semiconductor device of the present invention is replaceable with a conventional cooling system having a cooling part at only one side. In addition, because the number of the high thermalconductivity insulating substrates12 can be reduced to one, the cost of parts can be reduced.
• In the present embodiment, although the radiation surfaces[0136]10 are perpendicular to the connecting surfaces of theradiation members2,3 with the Si chips1a,1b, they can be attached to various types of outside cooling members by changing the angle appropriately. When the conductive members described in the fourth embodiment are used, the conductive members can be taken out of side faces of theradiation members2,3 different from the radiation surfaces10.
• (Ninth Embodiment)[0137]
• Next, the ninth embodiment is explained as a fourth modified example with reference to FIG. 12. This embodiment differs in the fixing method of the[0138]outside wiring members11. Hereinafter, different portions from those in FIG. 2A are mainly described, and the same parts as those in FIG. 2A are assigned to the same reference numerals in FIG. 12.
• As shown in FIG. 12, each four[0139]screw holes23aare formed in the respective first side and secondside radiation members2,3 from the radiation surfaces10 not to reach the Si chips1a,1b. Each of theoutside wiring members11 has fourscrew holes23bpenetrating it and corresponding to the screw holes23a. Then, screws (not shown) are inserted into the screw holes23a,23bfrom surfaces of theoutside wiring members11 at an opposite side of the respective radiation surfaces10. Accordingly, theradiation members2,3 and theoutside wiring members11 are fixed together. Here, the screw holes23a,23bare formed by a drill or the like.
• According to this embodiment, because the[0140]radiation members2,3 have the screw holes23anot penetrating them, the screws do not contact the Si chips1a,1b, and the screw holes23a,23bcan be formed at arbitrary positions. Also, because the fixation is achieved by the screws, even when the pressure for fixing theoutside wiring members11 to therespective radiation members2,3 is increased, no pressure is applied to the Si chips1a,1b. As a result, the contact resistances between theradiation members2,3 and theoutside wiring members11 can be reduced, and the radiation property and the electrical conductivity can be improved.
• Especially, the screw fixation can be performed at the positions of the second[0141]side radiation member3 immediately under the Si chips1a,1b. Therefore, thermal and electrical connection between the Si chips1a,1band the secondside radiation member3 can be secured. The thermal connections of the semiconductor device to which theoutside wiring members11 are screwed, and the high thermalconductivity insulating substrates12 and theoutside cooling members13 can be provided, for example, substantially in the same manner as in the first embodiment. Onescrew hole23aor23bis sufficient for each of themembers2,3, and11 to perform the fixation described above. This embodiment is applicable to the above embodiments except the third modified example.
• (Tenth Embodiment)[0142]
• A semiconductor device in a tenth preferred embodiment is explained with reference to FIG. 13. This embodiment is made to improve a degree of parallelization between two lead (radiation) members sandwiching a semiconductor element therebetween. Specifically, the semiconductor device includes an[0143]IGBT element101 and adiode102 that form a circuit as semiconductor elements. Thesemiconductor elements101,102 are bonded to asurface103aof a plate-shaped first lead member (first conductive member)103 made of, for example, cupper, throughfirst soldering members104 composed of 10 wt % Sn (tin) and 90 wt % Pb (lead) and having a fusing point of 320° C. Block-shapedheat sinks105 made of copper are respectively bonded to thesemiconductor elements101,102 through thefirst soldering members104.
• On the[0144]heat sinks105, a second lead member (second conductive member)107 made of copper or the like is bonded at asurface107athereof throughsecond soldering members106 having a fusing point lower than that of thefirst soldering members104. The second soldering members6 contain, for example, Sn at 90 wt % or more, and have the fusing point of 240° C.
• The[0145]surface103aof thefirst lead member103 and thesurface107aof thesecond lead member107 face each other with thesemiconductor elements101,102 interposed therebetween, and extend approximately in parallel with each other (for example, an inclination between thelead members103,107 is 0.1 mm or less). Also, in this semiconductor device, anouter lead108 and theIGBT element101 are electrically connected to each other by abonding wire109 made of Au or Al for electrical connection with an outside.
• The[0146]members101 to109 assembled as above are encapsulated and sealed withmold resin110 composed of, for example, epoxy resin, and accordingly are protected from external environment. Theother surfaces103b,107bof thelead members103,107 are exposed from themold resin110, and serve as radiation surfaces.
• Thus, in this semiconductor device, the circuit is composed of the two[0147]semiconductor elements101,102, and the twolead members103,107 serve as electrodes simultaneously. Signal communication between thesemiconductor elements101,102 and the outside is performed through thelead members103,107, thewire109, and theouter lead108. Thelead members103,107 also serve as radiation members, and facilitate heat radiation by, for example, disposing cooling members (not shown) on thesurfaces103b,107bthrough insulating members.
• Next, a method for manufacturing the semiconductor device in the present embodiment is explained with reference to FIGS. 14A to[0148]14C. First, thesemiconductor elements101,102 are bonded to thesurface103aof thefirst lead member103 through thefirst soldering members104. Next, theheat sinks105 are respectively bonded to the first andsecond semiconductor elements101,102, also through thefirst soldering members104. This state is shown in FIG. 14A. These integrated members are referred to as awork150.
• Next, the[0149]surface107aof thesecond lead member107 is bonded to thesemiconductor elements101,102 to which theheat sinks105 are bonded, through thesecond soldering members106 having a lower fusing point. Specifically, as shown in FIG. 14B, thesecond lead member107 is disposed on ajig160 with thesurface107afacing upward, and thesecond soldering members106 are disposed on predetermined positions of thesurface107a. Then, thework150 shown in FIG. 14A is turned over, and disposed on thesurface107aof thesecond lead member107 through thesecond soldering members106.
• Further, a plate-shaped[0150]weight161 made of stainless or the like is put on theother surface103bof thefirst lead member103. Thejig160 is equipped with aspacer162 having a specific height (for example, 1 mm) made of carbon or the like for determining the gap between the twolead members103,107. This state is shown in FIG. 14B. Then, the members are put in a heating furnace in this state, and only thesecond soldering members106 undergo reflow.
• Accordingly, the[0151]work150 is pressurized by theweight161, and as shown in FIG. 14C, thesecond soldering members106 are crushed and the gap between the twolead members103,107 is decreased to the height of thespacer162. Accordingly, the degree of parallelization between the twolead members103,107 is controlled. Incidentally, when the fusing points of thefirst soldering members104 and thesecond soldering members106 are respectively 320° C. and 240° C., a reflow temperature is 250° C., and a load imparted from theweight161 to thework150 is 0.08 g/mm²in this embodiment.
• The thickness of the[0152]second soldering members106 is preferably about 100 μm to 300 μm. When it is too thin, the thickness for controlling the degree of parallelization between the twolead members103,107 becomes insufficient. When it is too thick, the thermal conductivity between the semiconductor elements and the lead members becomes insufficient. Further, thesecond soldering members106 containing Sn at 90 wt % or more is advantageous to secure a sufficient thermal conductivity. Incidentally, after that, wire bonding with theouter lead108 and resin molding are performed. As a result, the semiconductor device shown in FIG. 13 is completed.
• According to the manufacturing method described above, in the[0153]work150 in which the both surfaces of thesemiconductor elements101,102 are sandwiched by the first and second lead members (radiation members)103,107 through the first andsecond soldering members104,106, because thesecond soldering members106 has a fusing point lower than that of thefirst soldering members104, reflow can be performed only to thesecond soldering members106.
• Then, in this state, pressure is applied from the upper side of the first lead member[0154]103 (or second lead member107), so that thesecond soldering members106 are deformed in the sate where thesemiconductor elements101,102 are supported by thefirst soldering members104. Accordingly, the degree of parallelization between the twolead members103,107 can be controlled. For example, the degree of parallelization between the twolead members103,107 can be made equal to or less than 0.1 mm.
• Thus, according to the present embodiment, the semiconductor device having an appropriate degree of parallelization between the two[0155]members103,107 can be provided. In FIG. 13, the semiconductor device can dispense with themold resin10. In such a case, the degree of parallelization between the twomembers103,107 can be controlled easily.
• Also, as shown in FIG. 15, the[0156]second lead member107 can haverecess portions107c(for example, having a depth of about 0.1 mm) on thesurface107a, and thesecond soldering members106 can be disposed in therecess portions107c. In this case, even when thesecond soldering members106 are crushed during the reflow and pressurization so as to extrude, therecess portions107cprevent thesoldering members106 from bulging out. Further, when thesoldering members106 are composed of soldering foils, the positioning becomes easy.
• The[0157]second lead member107 may be bonded to thesemiconductor elements101,102 through thesecond soldering members106 without the heat sinks105. The present embodiment relates to the semiconductor device in which the semiconductor element is sandwiched by the pair of conductive members through the soldering members, and the conductive members may have only one of a radiation function and an electrode function.
• (Eleventh Embodiment)[0158]
• In an eleventh preferred embodiment, the present invention is applied to a semiconductor device as an electronic instrument shown in FIG. 16. The semiconductor device is, as shown in FIG. 16, composed of a[0159]heating element201 and a pair ofradiation members202,203 for radiating heat from theheating element201. On asurface201aof theheating element201, a firstside radiation member202 is bonded through aradiation block204 and abonding member205, while on theother surface201bof theheating element201, a secondside radiation member203 is bonded through abonding member205. That is, theradiation members202,203 sandwich thesemiconductor element201 through thebonding members205.
• In this embodiment, the[0160]heating element201 is a power semiconductor element such as an IGBT or a thyrister. Thebonding members205 are made of solder. The first side and secondside radiation members202,203, and theradiation block204 are made of Cu. Each plane shape of themembers201 to204 is generally rectangular.
• Next, a method for manufacturing the semiconductor device is explained. First, the[0161]semiconductor element201, the first side and secondside radiation members202,203, and theradiation block204 are prepared. Each of the first side and secondside radiation members202,203 has an area in a plane direction larger than those of thesemiconductor element201 and theradiation block204.
• Then, after solder paste is coated to the vicinity of the center on the surface[0162]203aof the secondside radiation member203, thesemiconductor element201 is disposed thereon. Then, likewise, semiconductor paste is coated on thesemiconductor element201, and theradiation block204 is disposed thereon. Solder paste is further coated on theradiation block204.
• Next, as shown in FIG. 16, a[0163]jig206 for fixing the distance between the first side and secondside radiation members202,203 is prepared. Thejig206 has a pair of surfaces (parallel surfaces)206a,206bparallel with each other. Thejig206 is so disposed on the secondside radiation member203 that thesurface6acontacts the surface203aof the secondside radiation member203 where thesemiconductor element201 is not disposed. Here, thejig206 is made of a material such as Al, having a thermal expansion coefficient larger than that of the first side and secondside radiation members202,203 made of Cu.
• Then, the first[0164]side radiation member202 is disposed on the solder paste applied to theradiation block204 and on thesurface206bof thejig206, and a load is applied from theupper surface202bof the firstside radiation member202 by, for example, aweight208 as required. Accordingly, the firstside radiation member202 is externally pressurized so that thesurface202aof the firstside radiation member202 abuts thejig206.
• After that, the[0165]members201 to204 laminated as above undergo reflow in this state, so that the solder paste is hardened to besolder205, and thesemiconductor element201, theradiation block204, and the first side and secondside radiation members202,203 are bonded together. Successively, theweight208 is removed, and thejig206 is removed by pulling it in the lateral direction. As a result, the semiconductor device in the present embodiment is completed.
• According to the present embodiment, the distance between the surfaces (inner surfaces)[0166]202a,203aof the first side and secondside radiation members202,203 facing thesemiconductor chip201 can be controlled by the thickness of thejig206. As a result, when themembers201 to204 are assembled with each other by lamination, there is no need to consider dimensional tolerances of the first side and secondside radiation members202,203. Therefore, there is no need to thicken thesolder205 to absorb the dimensional tolerances of the first side and secondside radiation members202,203. In consequence, the semiconductor device can be provided with a solder thickness decreased as small as possible.
• Besides, in general, the respective members expand by heating during the reflow, and contract by cooling. The change in shape caused by this expansion and contraction becomes large as the thermal expansion coefficient becomes large. In this embodiment, because the thermal expansion coefficient of the[0167]jig206 is large as compared to those of the first side and secondside radiation members202,203 and theradiation block204, after themembers201 to204 are bonded together by thesolder205 hardened in the sate where therespective members201 to204 expand at the reflow, thejig206 contracts much more than theother members201 to204 when returned to a room temperature.
• As a result, the gap between the[0168]surfaces202a,203aof the first side and secondside radiation members202,203 becomes larger than that between theparallel surfaces206a,206bof thejig206. Because of this, thejig206 can be detached readily. Also, because the degree of parallelization between the first side and secondside radiation members202,203 can be controlled by theparallel surfaces206a,206bof thejig206, the degree of parallelization between the first side and secondside radiation members202,203 can be secured even when the thickness of thesolder205 is reduced.
• Although the present embodiment exemplifies the case where the thermal expansion coefficient of the[0169]jig206 is larger that those of theother members202 to204, if thejig206 can be detached after themembers201 to204 are bonded together, thejig206 is not limited in the thermal expansion coefficient. The shape of thejig206 is not limited to that shown in the figure, but may be other shapes so long as thejig206 can determine the distance between the first side and secondside radiation members202,203.
• The[0170]solder205 is used as the bonding member, and is formed by hardening solder paste at reflow. However, the bonding may be performed by interposing solder sheets between laminated members, and fusing and hardening the solder sheets. Conductive adhesive may be used alternatively.
• The order of disposals of the[0171]semiconductor element201, theradiation block204, solder paste, and thejig206 on the secondside radiation member203 are not limited to that described above, and is changeable provided that the constitution shown in the figure can be obtained. It is described that thejig206 has theparallel surfaces206a,206b; however, thesurfaces206a,206bneed not be always parallel to each other provided that thejig206 can fix the distance between thesurface202aof the firstside radiation member202 and the surface203aof the secondside radiation member203. For example, thejig206 can have at least three protrusions at portions contacting the first side and secondside radiation members202,203.
• Also, although it is not shown, in a case where a pad formed on the surface of the[0172]semiconductor element201 is wire-bonded to a lead frame, for example, the wire bonding can be performed after thejig206 is detached from the members bonded together. In this case, if thesemiconductor element201 is disposed in the vicinity of the edge portion of the secondside radiation member203, there is a case where the wire-bonding can be performed easily; however, the shape of the secondside radiation member203 can be modified appropriately so that the wire bonding to the pad becomes easier.
• Further, the following method can be considered. Specifically, after the pad of the[0173]semiconductor element201 is wire-bonded to the lead frame by a wire, thejig206 is disposed on the first side radiation member to avoid the wire and the lead frame, and then the second side radiation member is disposed. In this state, themembers201 to204 can be bonded. The semiconductor device in this embodiment may be sealed with resin. Also, theradiation members202 to204 may be made of ceramic substrates having metallized surfaces.
• (Twelfth Embodiment)[0174]
• FIG. 17 schematically shows a method for manufacturing a semiconductor device in a twelfth preferred embodiment. This embodiment is substantially identical with the eleventh embodiment in the constitution of the semiconductor device, but differs in the method for manufacturing the semiconductor device. Specifically, the method for controlling the dimension between the[0175]surfaces202a,203aof the first side and secondside radiation members202,203 differs form that in the first embodiment. The same parts as those in the eleventh embodiment are assigned to the same reference numerals.
• In this embodiment, first, the first side and second[0176]side radiation members202,203, theradiation block204, and thesemiconductor element201 are prepared. The first side and secondside radiation members202,203 are formed with throughholes221,231 penetrating in the thickness direction at the respective four corners on a plane. The throughholes221,231 receive first and second protrudingportions261,271 described below.
• Further, first and[0177]second jigs260,270 are prepared. Thejigs260,270 respectively have rectangular plate portions, and in thefirst jig260, four first protrudingportions261 protrude from asurface260aof the plate portion, and in thesecond jig270, four second protrudingportions271 protrude from asurface270aof the plate portion. The first and second protrudingportions261,271 are provided approximately symmetrically, at inner portions than edge portions of the plate portions.
• At the respective edge portions of the[0178]jigs260,270, protrudingportions262,272 for positioning respectively protrude from thesurfaces260a,270afor determining the distance between thefirst jig260 and thesecond jig270. The protrudingportions261,262,271,272 havefront end portions261a,262a,271a,272aeach of which is a generally flat face. The first andsecond jigs260,270 are made of, for example, C (carbon).
• Next, the[0179]surface202aof firstside radiation member202 is disposed on thesurface201aof thesemiconductor device201 through theradiation block204 and solder paste. On theother surface201bof thesemiconductor element201, the secondside radiation member203 is disposed at the side of the surface203a, through solder paste. That is, similarly to the eleventh embodiment, the secondside radiation member203, thesemiconductor element201, and theradiation block204 are mounted through soldering paste, and the firstside radiation member202 is further mounted on theradiation block204 through solder paste applied.
• Then, the[0180]first jig260 is disposed with thesurface260afacing upward, and aspring member290 composed of a coil spring and arectangular base291 bonded to the end of the coil spring is disposed on thesurface260a. The other end of thecoil spring290 may be bonded to thesurface260aof thefirst jig260, and may not be bonded thereto.
• Then, the[0181]laminated members201 to204 are disposed on thefirst jig260 so that thesurface203bof the secondside radiation member203 is supported by thebase290 of thecoil spring290 disposed on thesurface260aof thejig260 and so that the first protrudingportions261 are inserted into theholes231 formed in the secondside radiation member203. Then, theweight208 is put on thesurface202bof the firstside radiation member202. Thesecond jig270 is positioned with thesurface270afacing downward, is approached to thesurface202bof the firstside radiation member202, and is installed so that the second protrudingportions271 are inserted into theholes221 formed in the firstside radiation member202. Thus, the first side and secondside radiation members202,203, theradiation block204, and thesemiconductor element201 laminated as above are sandwiched by the first andsecond jigs260,270.
• Successively, the[0182]front end portions262aof the protrudingportions262 formed on thefirst jig260 for positioning are made abut thefront end portions272aof the protrudingportions272 formed on thesecond jig270 for positioning. Accordingly, a specific distance between the first andsecond jigs260,270 can be kept. That is, the distance becomes the sum of the lengths of the protrudingportions262,272.
• At that time, the[0183]front end portions261aof the first protrudingportions261 abut thesurface202aof the firstside radiation member202, and thefront end portions271aof the second protrudingportions271 abut the surface203aof the secondside radiation member203. Further, the first side and secondside radiation members202,203 are pressurized from thesurfaces202a,203aby the elastic force of thespring member290 and the gravitational force of theweight208.
• Then, in the state where the[0184]respective members201 to204 are fixed by the first andsecond jigs260,270, solder is hardened by reflow, and the first side and secondside radiation members202,203, theradiation block204, and thesemiconductor element201 are bonded together through thesolder205. After that, thefirst jig260 and thesecond jig270 are pulled in upper and lower direction so that themembers201 to204 bonded together can be detached from thejigs260,270. Thus, the semiconductor device is completed.
• According to the present embodiment, the protruding[0185]portions261,271 can respectively be made abut thesurfaces202a,203aof the first side and secondside radiation members202,203 while keeping a constant distance between the first andsecond jigs260,270. Accordingly, the distance between thesurfaces202a,203aof the first side and secondside radiation members202,203 can be controlled. That is, referring to FIG. 17, the overlapping length K of the first and second protrudingportions261,271 is kept constant. Also, thesurfaces202a,203aof the first side and secondside radiation members202,203 are respectively supported by the four first protrudingportions261, and the four second protrudingportions271. Therefore, the degree of parallelization between the first side and secondside radiation members202,203 can be secured by controlling the lengths of the protrudingportions261,271.
• Therefore, there are no need to consider the dimensional tolerances of the first side and second[0186]side radiation members202,203, and no need to thicken thesolder205 for absorbing the dimensional tolerances of the first side and secondside radiation members202,203. The manufacturing method in this embodiment can provide a semiconductor device in which the solder thickness is reduced as thin as possible.
• Also, because the[0187]holes221,231 are formed in the first side and secondside radiation members202,203, thefront end portions261a,271aof the first and second protrudingportions261,271 suitably abut thesurfaces202a,203aof the first side and secondside radiation members202,203 by penetrating theholes231,221. The insertions of the first and second protrudingportions261,271 into theholes231,221 formed in the second side and firstside radiation members203,202 can position the first side and secondside radiation members202,203 in the horizontal direction, i.e., the direction parallel to thesurfaces202a,203a.
• Because the second[0188]side radiation member203 is held by thespring member290, the secondside radiation member203 can be suitably pressurized by the elasticity of thespring member290 even when the dimensional error of the secondside radiation member203 is large. In addition, because the firstside radiation member202 is pressurized by themovable weight208, the firstside radiation member202 can be suitably pressurized even when the dimensional error of the firstside radiation member202 is large.
• Even when the[0189]radiation members202,203 are different from each other in thickness, thesame jigs260,270 as described above can be used because the pressurization can be controlled by thespring member290 and theweight208, and because of the same reasons as described above involving the employments of thespring member290 and theweight208.
• More specifically, for example, in the sate shown in FIG. 17, it is assumed that solid members having high rigidity are disposed in the gap between the first[0190]side radiation member202 and thesecond jig270, and in the gap between the secondside radiation member203 and thefirst jig260 with heights corresponding to the gaps. In this case, if the thicknesses of the first side and secondside radiation members202,203 are too thick, stresses applied to the first side and secondside radiation members202,203 can be increased by interposing them between thefront end portions261a,271aof the protrudingportions261,271 and the solid members. This might result in breakage of the first side and secondside radiation members202,203. On the other hand, if the thicknesses of the first side and secondside radiation members202,203 are too thin, thefront end portions261a,271aof the protrudingportions261,271 could not abut therespective radiation members202,203. To the contrary, in this embodiment, the first side and secondside radiation members202,203 can be pressurized suitably by adopting thespring member290 and theweight208.
• Also, because it is so constructed that the semiconductor device can be detached from the[0191]jigs260,270 by detaching thejigs260,270 respectively in the upper and lower directions, the detachment is easy. Thejigs260,270 need not have plate-like shapes, and can have various shapes as long as the first and second protrudingportions261,271 are provided. To support thesurfaces202a,203aof the first side and secondside radiation members202,203, it is sufficient to provide three protrudingportions261 or271 for each. Thefront end portions261a,262a,271a,272aof the protrudingportions261,262,271,272 may not be flat.
• The protruding[0192]portions262,272 for positioning may not be provided on therespective jigs260,270. For example, the second side radiation member may be formed with a long protruding portion for positioning with a front end portion that abuts thesurface260aof thejig260, without forming the protruding portion for positioning on thefirst jig260. Further, if an external apparatus or the like can fix the interval between thejigs260,270, there is no need to provide the protruding portions for positioning.
• In the figure, only one semiconductor device is shown to be manufactured; however, several semiconductor devices can be manufactured at the same time by using first and second jigs having several pairs of first and second protruding portions. Although the[0193]holes221,231 for receiving the protrudingportions261,271 are formed to penetrate the first side and secondside radiation members202,203, notches notched from the edge portions of theradiation members202,203 and allowing the protrudingportions261,271 to penetrate therein may be formed in place of theholes221,231.
• Otherwise, for example, the first protruding[0194]portions261 can pass through the outside of the secondside radiation member203 by decreasing the area of the secondside radiation member203. In this case, theholes231 are not formed in the secondside radiation member203. The firstside radiation member202 has the throughholes221 for allowing the second protrudingportions271 to be inserted therein.
• Otherwise, the[0195]respective radiation members202,203 may be warped or bent at edge portions so that the protrudingportions261,271 can pass through with thefront end portions261aof the first protrudingportions261 abutting thesurface202aof the firstside radiation member202, and thefront end portions271aof the second protrudingportions271 abutting the surface203aof the secondside radiation member203.
• Although the[0196]weight208 is disposed on the firstside radiation member202, thespring member290 may be disposed between thesurface202bof the firstside radiation member202 and thesurface270aof thesecond jig270. Although the spring member90 is composed of a coil spring in this embodiment, it may be composed of other elastic members. Further, thefront end portions261a,271aof the first and second protrudingportions261,271 may be brought in contact with theradiation members202,203 when the reflow is performed to bond themembers201 to204, by adopting a thermally deformable member such as a shape memory alloy, bimetal, or the like that deforms during the reflow.
• As shown in FIG. 18, dispensing with the[0197]weight208, thesecond jig270 may be formed with a throughhole273 extending in the thickness direction. In this case, after the laminated members are sandwiched by the first andsecond jigs260,270, amember281 for pressurization can be inserted into the throughhole273 from the side of thesurface270bof thejig270, and pressurize thesurface202bof the firstside radiation member202.
• Here, another method for manufacturing the semiconductor device in this embodiment is explained. In the method described above, after the[0198]respective members201 to204 are laminated using solder paste, they are sandwiched by the first andsecond jigs260,270. However, after thelaminated members201 to204 undergo reflow to be bonded bysolder205, the bonded members may be sandwiched by the first andsecond jigs260,270 and undergo the reflow again. At that time, the solder hardened is fused or softened to allow themembers201 to204 to move, and themembers201 to204 can be rearranged according to the dimensions determined by thejigs260,270. In this state, thesolder205 is hardened again.
• Alternatively, the state shown in FIG. 17 can be provided by disposing the[0199]spring member290, thebase291, the secondside radiation member203, a solder sheet, thesemiconductor element201, a solder sheet, theradiation block204, a solder sheet, the firstside radiation member202, theweight208, and thesecond jig270, on thefirst jig260 in this order, and by performing reflow to fuse and harden the solder sheets and to bond themembers201 to204 together.
• (Thirteenth Embodiment)[0200]
• Hereinafter, a thirteenth preferred embodiment of the present invention is explained with reference to FIG. 19. Semiconductor chips used in this embodiment are a semiconductor chip in which an IGBT is formed (IGBT chip)[0201]301 and a semiconductor chip in which a FWD (fly-wheel diode) is formed (FWD chip)302. The semiconductor chips301,302 are made of mainly Si and have a thickness of about 0.5 mm. In thesemiconductor chips301,302, element formation surfaces are referred to asmain surfaces301a,302a, and the opposite surfaces are referred to asback surfaces301b,302b. An emitter electrode is formed on themain surface301aof theIGBT chip301 and a collector electrode is formed on theback surface301bof theIGBT chip301, though they are not shown.
• To the[0202]main surfaces301a,302aof thesemiconductor chips301,302, back surfaces303bof heat sinks (E heat sinks)303 as first conductive members are bonded throughsolder304 as first bonding members having electrical conductivity. In the E heat sinks303, a bonding area between theIGBT chip301 and theE heat sink303 is approximately the same as the area of the emitter electrode of theIGBT chip301. Accordingly, theE heat sink303 can contact the emitter electrode at the area as large as possible, and be prevented from contacting a peripheral portion of the emitter electrode.
• On the[0203]main surface301aof theIGBT chip301, there exists a region such as a guard ring that might have a problem when it is made equipotential with the emitter electrode. If theheat sink303 contacts this region, the region would have the same potential as that of the emitter electrode through theheat sink303. Therefore, the contact area of theIGBT301 and theE heat sink303 is set to be approximately equal to the area of the emitter electrode of theIGBT chip301. Accordingly, theE heat sink303 can be bonded to theIGBT chip301 without causing any problems.
• To the[0204]back surfaces301b,302bof thesemiconductor chips301,302, amain surface305aof a secondconductive member305 is bonded (electrically connected) throughsolder304 as second bonding members. Tomain surfaces303aof theheat sinks303 at an opposite side of theback surfaces303b, aback surface306bof a thirdconductive member306 is bonded (electrically connected) throughsolder304 as third bonding members.
• The E heat sinks[0205]303, and the second and thirdconductive members305,306 can be made of metallic members having electrical conductivity. In this embodiment, theE heat sinks303 are made of Cu, and the second and thirdconductive members305,306 are made of Cu alloy. The second and thirdconductive members305,306 are plate-shaped members. TheE heat sinks303 also are plate-shaped members, but havestep portions303cas described below.
• Each of the E heat sinks[0206]303 is formed to protrude toward the thirdconductive member306 by thestep portion303c, and has athin portion303dat the side of thesemiconductor chips301,302. Thethin portion303dis thinned in the thickness direction of thesemiconductor chip301. Accordingly, in each of the E heat sinks303, the bonding area between theE heat sink303 and the third conductive member6 is smaller than that between theE heat sink303 and thesemiconductor chip301 or302.
• Besides, a surface treatment such as Ni plating is performed to the surface portions of the[0207]E heat sinks303 where it is bonded to therespective semiconductor chips301,302 and the thirdconductive members306 to improve wettability of thesolder304. The other outer surfaces of theE heat sinks303 for contacting a sealing member described below are oxidized. The second and thirdconductive members305,306 are plated with Ni at entire outer surfaces thereof. In the second and thirdconductive members305,306 and the E heat sinks303, the thickness of the thickest portion is about 1 mm, and the thickness of the thin portion is about 0.4 mm.
• A land (not shown) is formed on the main surface of the[0208]IGBT chip301, and is electrically connected to acontrol terminal307 of a lead frame via abonding wire308. Then, thesemiconductor chips301,302, the E heat sinks303, themain surface305aof the secondconductive member305, theback surface306bof the thirdconductive member306, and a part of thecontrol terminal307 are integrally sealed withresin309 as a sealing member. Used as theresin309 is, for example, epoxy based mold resin. Accordingly, a themembers301 to308 are integrally sealed to have theback surface305bof the secondconductive member305, themain surface306aof the thirdconductive member306, and a part of thecontrol terminal307 that are exposed from theresin9.
• Thus, the semiconductor device in this embodiment is constructed. In this semiconductor device, heat generated from the[0209]semiconductor chips301,302 is transferred to the E heat sinks303, and to the second and thirdconductive members305,306 through thesolder304, and then is radiated from theback surface305bof the secondconductive member305 and themain surface306aof the thirdconductive member306.
• When cooling members or the like are disposed to abut the[0210]back surface305bof the secondconductive member305 and themain surface306aof the thirdconductive member306, heat radiation can be further facilitated. Here, theE heat sinks303 and the second and thirdconductive members305,306 form electrical paths for therespective semiconductor chips301,302. That is, the electrical communication with the collector electrode of theIGBT chip301 is provided through the secondconductive member305, while the electrical communication with the emitter electrode of theIGBT chip301 is provided through the secondconductive member306 and theE heat sink303.
• As explained above, in the present embodiment, each of the[0211]E heat sinks303 bonded to thesurfaces301a,302aof thesemiconductor chips301,302 has thestep portion303cand accordingly has thethin portion303d. Because thethin portion303dhas small rigidity, thethin portion303dcan follow deformation of theresin309 surrounding it and can absorb thermal stress when the semiconductor device undergoes thermal cycle. Therefore, stress concentration on thesolder304 bonding thesemiconductor chips301,302, and theE heat sinks303 can be mitigated.
• In general, the smaller the bonding area of solder is, the smaller the bonding strength of the solder becomes. Therefore, in each of the E heat sinks[0212]303, the bonding area with the thirdconductive member306 is set to be smaller than that with thesemiconductor chip301 or302. Accordingly, cracks become liable to be produced in thesolder304 bonding theE heat sink303 and the thirdconductive member306.
• As a result, when thermal stress is increased, cracks are produced first in the[0213]solder304 bonding theE heat sink303 and the thirdconductive member306 to mitigate thermal stress, and accordingly thermal stress applied to thesolder304 bonding theE heat sink303 and thesemiconductor chip301 or302 can be lessened.
• Incidentally, even when cracks are produced in the[0214]solder304 bonding theE heat sink303 and the thirdconductive member306 as a result of stress concentration, because both theE heat sink303 and the thirdconductive member306 include Cu as a main component, those deformations caused by the thermal cycle are approximated to each other and cracks do not advance largely in thesolder304. Even if the cracks advance, because the current path is formed by the entire bonding surface between theE heat sink303 and the thirdconductive member306, significant problems do not occur.
• Further, because the surface portions of the[0215]E-heat sink303 for contacting theresin309 are oxidized, adhesion with theresin309 can be improved. As a result, the deformation of theresin309 caused by thermal stress and the deformation of theE heat sink303 synchronize with each other, and stress concentration on thesolder304 bonding theE heat sink303 and thesemiconductor chip301 or302 can be mitigated. Incidentally, adhesion between Cu alloy and theresin309 is improved by plating the Cu alloy with Ni. Therefore, the surfaces of the second and thirdconductive members305,306 are plated with Ni instead of oxidation.
• Thus, thermal stress concentration to the[0216]solder304 bonding therespective semiconductor chips301,302 and theE heat sinks303 can be suppressed, so that cracks can be prevented to reach thissolder304. Even when several cells are formed on the main surface (element formation surface)301aof theIGBT chip301, current is prevented from concentrating on a cell provided at the center, and breakage of the cell is prevented.
• Also, because each of the E heat sinks[0217]303 has thestep portion303c, as compared with a case of adopting a prism shape heat sink without a step portion, a creepage distance from the interface between the thirdconductive member306 and theresin309 to the bonding portion between thesemiconductor chip301 or302 and theE heat sink303 is long. Because of this, it can be retarded that cracks produced at the interface between the thirdconductive member306 and theresin309 reach the bonding portion between the semiconductor chip and theE heat sink303.
• With respect to the semiconductor device according to this embodiment, a thermal shock cycle test was performed, in which the semiconductor device was exposed to environments of −40° C. and 125° C. respectively for 60 minutes, a resistance between the third[0218]conductive member306 and thecontrol terminal307 was measured, and a rate of change in resistance was calculated using an initial value as a reference. Then, it was confirmed that the rate of change in resistance did not increase largely even at 200 cycles. It was further confirmed that the rate in change of resistance of the semiconductor device in this embodiment was small as compared to a case where the heat sink had no step portion.
• Next, a method for manufacturing the semiconductor device in this embodiment is explained with reference to FIGS. 20A to[0219]20C. First, the second and thirdconductive members305,306 are formed from plates made of cupper alloy or the like by punching. After that, the entire outer surfaces of the second and thirdconductive members305,306 are plated with Ni.
• Cu plates are prepared for forming the E heat sinks[0220]303. Ni plating is performed to both the main and back surfaces of each Cu plate. After that, Cu members having a size corresponding to theE heat sinks303 are formed from the Cu plates plated with Ni, by punching or the like. Then, each of the Cu members is pressed to have thestep portion303c. Thus, theE heat sinks303 are completed. Each of the E heat sinks303 has portions plated with Ni for being bonded to thesemiconductor chip301 or302 and to the thirdconductive member306, and portions exposed by punching and not plated with Ni. At the exposed portions, plating is peeled off by pressing.
• As shown in FIG. 20A, the[0221]semiconductor chips301,302 are bonded to themain surface305aof the secondconductive member305 through thesolder304. Next, theE heat sinks303 are bonded to therespective semiconductor chips301,302 through thesolder304. Thesolder304 used for bonding thesemiconductor chips301,302 and the secondconductive member305, and the E heat sinks303 has a relatively high fusing point. For example, solder composed of 10 wt % Sn (tin) and 90 wt % Pb (lead) and having a fusing point of 320° C. (high temperature solder) can be used as thesolder304. Accordingly, the state shown in FIG. 20A is provided, which is referred to as awork310.
• Next, as shown in FIG. 20B, the third[0222]conductive member306 is put on ajig311 with theback surface306bfacing upward, andsolder4 is disposed on desirable regions of theback surface306b. Then, thework310 shown in FIG. 20A is turned over, and is disposed on the thirdconductive member306. Thesolder4 interposed between the thirdconductive member306 and thesemiconductor chips301,302 has a fusing point lower than that of the high temperature solder described above. For example, solder containing Sn at 90 wt % or more and having a fusing point of 240° C. can be used as thesolder4. Hereinafter, this solder is referred to as low temperature solder.
• Further, a plate-shaped[0223]weight312 is disposed on theback surface305bof the secondconductive member305. Here, thejig311 has aspacer313 having a predetermined height for fixing the distance between the second and thirdconductive members305,306. This state is shown in FIG. 20C. In this state, it is put into a heating furnace, and reflow is performed only to thelow temperature solder4. As a result, thework310 is pressurized by theweight312, and as shown in FIG. 20C, thelow temperature solder4 is crushed so that the distance between theback surface306bof the thirdconductive member306 and themain surface305aof the secondconductive member305 corresponds to the height of thespacer313. Accordingly, the degree of parallelization between the second and thirdconductive members305,306 can be adjusted.
• Also, the[0224]E heat sinks303 are bonded to therespective semiconductor chips301,302 in the state where theE heat sink303 contacts only the emitter electrode on theIGBT chip301 by thehigh temperature solder304, and are bonded to the thirdconductive member306 by thelow temperature solder304. Therefore, when theheat sinks303 are bonded to the thirdconductive member306, thehigh temperature solder304 does not fuse, and the bonding positions of theE heat sinks303 to thesemiconductor chips301,302 can be appropriately maintained. Incidentally, when the fusing points of thehigh temperature solder304 and thelow temperature solder304 are respectively 320° C. and 240° C., the reflow temperature for thelow temperature solder304 is preferably 250° C.
• After that, although it is not shown, the[0225]control terminal307 and theIGBT chip301 are electrically connected to each other by thebonding wire308, and themembers301 to308 are sealed withresin309 as shown in FIG. 19. This resin sealing is performed by injecting theresin309 having a temperature of about 180° C. into spaces provided among themembers301 to308. At that time, the surface portions of theE heat sinks303 exposing copper and not bonded to either of thesemiconductor chips301,302 and the thirdconductive member306 are oxidized. Thus, the semiconductor device is completed.
• In general, when Ni plating is performed to the E heat sink, after the E heat sink is formed into the shape capable of being disposed between the semiconductor chip and the third conductive member, the E heat sink is put in a plating machine, and an entire area of the outer surface of the E heat sink is plated. Therefore, the solder disposed on the E heat sink can easily wet and expand to the region other than the bonding portions with the semiconductor chip and the third conductive member.[0226]
• In addition, the thickness of the[0227]E heat sink303 is thin, i.e., about 1 mm, thelow temperature solder304 and thehigh temperature solder304 are located at close positions to each other. If the Ni plating is performed to the entire outer surface of theE heat sink303, there arises a case where thelow temperature solder304 and thehigh temperature solder305 are mixed with each other. As a result, eutectic solder having a fusing point much lower than that of thelow temperature solder304 might be formed, which can fuse at the temperature (for example, 180° C.) for sealing themembers301 to308 with theresin309.
• As opposed to this, in the present embodiment, Ni plating is performed only to the portions of the[0228]E heat sink303 for bonding thesemiconductor chip301 or302 and the thirdconductive member306. Thelow temperature solder304 and thehigh temperature solder304 are disposed with the oxide surface of Cu interposed therebetween. Because the wettability of the oxide surface of Cu to thesolder304 is low, thehigh temperature solder304 and thelow temperature solder304 do not expand to other regions than the bonding portions, and do not mix with each other. Incidentally, although solder is used as the bonding members (first to third bonding members) in this embodiment, Ag paste or the like can be used alternatively. The bonding members need not be always an identical material with one another.
• (Fourteenth Embodiment)[0229]
• FIG. 21 shows a semiconductor device in a fourteenth preferred embodiment. The fourteenth embodiment differs from the thirteenth embodiment in the shape of the third[0230]conductive member306. Hereinafter, different portions from the thirteenth embodiment are mainly explained. In FIG. 21, the same parts as those in FIG. 19 are assigned to the same reference numerals, and the same explanations are not reiterated.
• As shown in FIG. 21, a[0231]step portion306cis formed on themain surface306aof the thirdconductive member306. Then, thestep portion306cis covered with theresin309 for sealing. Accordingly, creepage distances from the interface between theresin309 and the thirdconductive member306 to the bonding portions of theE heat sinks303 with thesemiconductor chips301,302 on the surface of the semiconductor device can be further increased as compared to those in the first embodiment. As a result, cracks are further suppressed from being produced in thesolder4 bonding thesemiconductor chips301,302 and the E heat sinks303.
• Incidentally, the creepage distances can be further increased as the area covered with the[0232]resin309 on thesurface306aof the thirdconductive member306 is increased. However, the decreased exposed area of the thirdconductive member306 deteriorates the radiation property. Therefore, the thirdconductive member306 should be covered with theresin309 at a degree not to deteriorate the radiation property.
• (Fifteenth Embodiment).[0233]
• FIG. 22 shows a semiconductor device in a fifteenth preferred embodiment. This embodiment differs from the thirteenth embodiment in a point that conductive members are disposed between the[0234]respective semiconductor chips301,302 and the secondconductive member305. Hereinafter, portions different from the thirteenth embodiment are mainly described. In FIG. 22, the same parts as those in FIG. 19 are assigned to the same reference numerals.
• As shown in FIG. 22, collector heat sinks (C heat sinks)[0235]314 are disposed between the secondconductive member305 and therespective semiconductor chips301,302, at the side of theback surfaces301b,302bof thesemiconductor chips301,302. The C heat sinks314 has areas approximately the same as those of thecorresponding semiconductor chips301,302 in a direction perpendicular to the thickness direction of thesemiconductor chips301,302.
• Specifically, surfaces (main surfaces)[0236]314aof the C heat sinks314 are respectively bonded to theback surfaces301b,302bof thesemiconductor chips301,302 through thesolder304. Back surfaces314bof the C heat sinks314 are bonded to themain surface305aof the secondconductive members305 through thesolder304.
• The second[0237]conductive member305 has a relatively large area with respect to its thickness, and therefore has a possibility that it is bent (warped). On the other hand, when the injection of theresin309 is performed, theback surface305bof the secondconductive member305 and themain surface306aof the thirdconductive member306 are pinched under relatively large pressure to prevent leakage of theresin309. Therefore, if the secondconductive member305 holding thesemiconductor chips301,302 is bent, the pressure pinching the second and thirdconductive members305,306 during the sealing can mechanically cause damages to thesemiconductor chips301,302.
• As opposed to this, in this embodiment, the C heat sinks[0238]314 are disposed on theback surfaces301b,302bof thesemiconductor chips301,302, and the C heat sinks314 are smaller than the secondconductive member305 in size. Therefore, the bending can be suppressed and thesemiconductor chips301,302 can be securely prevented from being damaged. Thus, this embodiment can prevent the mechanical damage to thesemiconductor chips301,302, in addition to the effects as attained in the thirteenth embodiment. Incidentally, in the constitution described in the fourteenth embodiment in which the thirdconductive member306 has thestep portion306cthat is covered with theresin309, theC heat sinks314 can be disposed as well.
• In the thirteenth to fifteenth embodiments described above, the[0239]E heat sinks303 respectively have thethin portions303dat the side of thesemiconductor chips301,302; however, as shown in FIG. 23, thestep portions303dmay be provided at the side of the thirdconductive member306. Also in this constitution, thermal stress can be prevented from concentrating on thesolder4 at the bonding portions between thesemiconductor chips301,302 and theheat sinks303 by the low rigiditythin portions303dthat can absorb the thermal stress, as compared to the case where the E heat sinks have a prism-like shape.
• In the thirteenth to fifteenth embodiments described above, in each of the E heat sinks[0240]303, thestep portion303cis provided at an entire portion contacting theresin309; however, with respect to thesolder304 bonding thesemiconductor chips301,302 and the E heat sinks303, cracks progress from the periphery side of theresin309 toward the center. Therefore, thestep portion303cmay be provided only at the portion facing the outer periphery of theresin309. Here, the periphery of theresin309 means a periphery of a portion surrounding the second and thirdconductive members305,306, and in FIG. 19 it corresponds a surface approximately parallel to the thickness direction of thesemiconductor chips301,302.
• (Sixteenth Embodiment)[0241]
• FIG. 24 shows a semiconductor device in a sixteenth preferred embodiment. In this embodiment, an[0242]IGBT411 and a FWD (free-wheel diode)412 each of which is made of a Si substrate are used as semiconductor chips. At a side of each element formation surface (first surface)401aof theIGBT411 and theFWD412, first side and secondside radiation members421,422 are bonded throughsolder431. Athird radiation member423 is further bonded to the first side and secondside radiation members421,422 throughsolder432 at an opposite side of thechips411,412. The first tothird radiation members421 to423 are made of, for example, Cu and constitute a firstside radiation member420.
• The[0243]third radiation member423 is a plate having a protrudingportion423b, and has a generally L-shape cross-section with the protrudingportion423bas a short side in a thickness direction thereof. The first side and secondside radiation members421,422 are bonded to a long side of the L-shape of thethird radiation member423. The protrudingportion423bhas afront end portion423atat is approximately coplanar withsecond surfaces401bof thechips411,412 at an opposite side of thefirst surfaces401a.
• Besides, a DBC (Direct Bonding Cupper)[0244]substrate404 is disposed as a high thermal conductivity insulating substrate at a side of thesecond surfaces401bof thechips411,412. TheDBC substrate404 is composed of an AlN (aluminum nitride)substrate405 both first andsecond surfaces405a,405bof which are patterned with copper foils451 to454. Thesecond surfaces401bof thechips411,412 are respectively bonded to afirst copper foil451 on thefirst surface405aof theDBC substrate404, throughsolder433. Further, thefront end portion423aof the protrudingportion423bof thethird radiation member423 is bonded to thesecond copper foil452 of theDBC substrate404, throughsolder434.
• Next, the electrode (wiring) portion of the[0245]IGBT411 is explained with reference to FIG. 25 showing a part surrounded by a broken line in FIG. 24. As shown in FIG. 25, abarrier metal111 is formed on asubstrate100 of theIGBT411 at the side of thefirst surface401a. Anemitter electrode112 and aland113 for wire bonding are further formed from pure Al. Thebarrier metal111 is composed of Ti (titanium) and TiN (titanium nitride) which are formed on thesubstrate100 at this order, and has a thickness of about 0.1 μm. The thickness of theelectrode112,113 is about 5 μm.
• Further, a[0246]metallic film114 is formed on theemitter electrode112 to be suitably connected with thesolder431. Themetallic film114 is composed of Ti, Ni (nickel), and Au (gold) formed from the side of theemitter electrode112 sequentially, and has a total thickness of about 0.6 μm. To thismetallic film114, as described above, the firstside radiation member421 is bonded through thesolder431. Here, the thicknesses of thesolder431 and the firstside radiation member421 are, for example, about 0.1 mm and about 1.5 mm respectively.
• On the other hand, at the side of the[0247]second surface401bof thesubstrate100, acollector electrode115 made of pure Al is formed without barrier metal. Thecollector electrode115 is, for example, about 0.2 μm in thickness. Ametallic film116 is then formed on thecollector electrode115, similarly to theemitter electrode112. Themetallic film116 is bonded to thefirst cupper foil451 on thefirst surface405aof theDBC substrate404 through thesolder433. Incidentally, the electrode portion of theFWD412 has a structure substantially the same as that of theIGBT411.
• Further, as shown in FIGS. 24 and 25, the[0248]third radiation member423 is electrically connected to alead461 by aconnection terminal406afor electrically connecting theemitter electrode112 and the lead (emitter terminal)461 as an outside terminal. On theDBC substrate404, aland453 is formed, and is wire-bonded to theland113 on thesurface401aof theIGBT411 by awire407. Theland453 of theDBC substrate404 is further wire-bonded to agate terminal408 by anotherwire407. As thewires407, Au, Al, or the like used generally for wire bonding can be used. Theland453 of theDBC substrate404 is provided for an intermediation between theland113 and thegate terminal308.
• To the[0249]copper foil454 formed on theback surface405bof theDBC substrate404, a fourth radiation member (second side radiation member)424 is bonded throughsolder435. That is, the firstside radiation member420 and the secondside radiation member424 are joined together with theDBC substrate404 interposed therebetween, and electrical insulation and electrical conductivity of therespective radiation members420,424 can be secured respectively.
• Then, the members described above are sealed with[0250]resin400 so that thefourth radiation member424 has aradiation surface409 exposed at an opposite side of the surface bonding theDBC substrate404. For example, epoxy based mold resin can be used as theresin400.
• Next, the electrical connection in each part of the semiconductor device in this embodiment is explained in more detail, referring to FIG. 26 that shows the semiconductor device in a direction indicated by arrow XXVI in FIG. 24. Incidentally, FIG. 24 shows a cross-section taken along line XXIV-XXIV in FIG. 26. The semiconductor device holds two pairs of the[0251]IGBT411 and theFWD412 in this embodiment.
• The first side radiation member[0252]420 (421 to423) is indicated with a one-dot chain line in the figure, and as described above, is electrically connected with theemitter terminal461 through theconnection terminal406a. Thefirst copper foil451 of theDBC substrate404 is bonded to all of the electrodes on thesurfaces401bof theIGBTs411 and theFWDs412, and has a protrudingportion451aprotruding not to contact thesecond cupper foil452 of theDBC substrate404. The protrudingportion451ais electrically connected to thecollector terminal462 as a lead through aconnection terminal406b.
• In this semiconductor device, the[0253]radiation surface409 is fixed to a radiation fin (not shown) as a cooling member (outside radiator) by screwing or the like. Accordingly, heat generated from thefirst surfaces401aof thechips411,412 is radiated from theradiation surface409 through the firstside radiation member420, theDBC substrate404, and the secondside radiation member424. That is, the radiation direction from thefirst surfaces401aof thechips411,412 corresponds to the direction extending from thefirst surfaces401ato thesecond surfaces401bin the,respective chips411,412 (from the upper side to the lower side in FIG. 24).
• On the other hand, heat generated from the[0254]second surfaces401bof thechips411,412 is also radiated from theradiation surface409 through theDBC substrate404 and the secondside radiation member424. Thus, in the semiconductor device in which the chips are mounted, radiation of heat from both thesurfaces401a,401bof thechips411,412 is performed mainly by thesame radiation surface409.
• Next, a method for manufacturing the semiconductor device in this embodiment is explained. First, as describe above, the[0255]IGBT411 having thebarrier metal111, theemitter electrode112, thecollector electrode115, themetallic films114,116, and the like and theFWD412 are prepared. Theelectrodes112,115, thebarrier metal111, themetallic films114,116, and the like are formed by sputtering or the like. Then, the first side and secondside radiation members421,422 are soldered to thefirst surfaces401aof thechips411,412.
• Next, the[0256]DBC substrate404 having the first andsecond surfaces405a,405bon which the cupper foils451 to454 are patterned is prepared, and theIGBT411, and theFWD412 are soldered to predetermined portions of theDBC substrate404. After that, thethird radiation member423 is soldered not only to the first side and secondside radiation members421,422 but also to theDBC substrate404. When soldering thethird radiation members423, a thickness of solder is thickened at the bonding portion with theDBC substrate404 as compared to that with the first side and secondside radiation members421,422, and accordingly, variations in thickness by soldering is absorbed.
• These soldering can be performed by reflow or the like. When kinds of solder used in this method are changed so that fusing points of solders are decreased in the order of the soldering, the soldering can be sufficiently performed without affecting the solder that has been soldered first. Then, the[0257]emitter terminal461 and thecollector terminal462 are connected to thethird radiation member423, and theIGBT411 and thegate terminal408 are wire-bonded to each other. Successively, thefourth radiation member424 is soldered to theDBC substrate404, and finally resin sealing is performed.
• According to the present embodiment, because an elastic modulus of pure Al is small, thermal stress produced due to differences among the[0258]chips411,412 and theradiation members421 to424 can be mitigated. Specifically, the elastic modulus of pure Al is 72 GPa, and an elastic modulus of Al containing Si at 1% is about 75 GPa. When the Al containing Si is used, Si may be segregated. In such a case, because the elastic modulus of Si is 130 GPa, the capability for mitigating thermal stress is locally but significantly decreased.
• As opposed to this, in this embodiment, especially because the[0259]emitter electrode112 of theIGBT411 is made of pure Al, stress is prevented from concentrating on the emitter cell, and fluctuation in electrical characteristics such as Vt can be suppressed. Therefore, the chip and the semiconductor device can be provided with high electrical reliability. Also, because the electrodes on thesecond surfaces401bof thechips411,412 are made of pure Al, thechips411,412 are prevented from being warped due to thermal stress.
• Also, because Si is not contained in the[0260]electrodes112,113,115, deposition of Si nodule can be prevented. This is especially effective for theland113 for wire bonding because Si nodule can cause cracks in the device by vibrations (stress) produced by wire-bonding. Thus, externally applied stress can be mitigated by forming theelectrodes112,113,115 from pure Al.
• However, when the pure Al is brought in direct contact with the[0261]substrate100 made of Si, ally spikes are produced. Therefore, thebarrier metal111 is disposed between theelectrodes112,113 and thesubstrate100, and prevents the generation of alloy spikes. Incidentally, the barrier metal is not formed on theother surface401bof theIGBT411. This is because even when alloy spikes are produced on theother surface401b, the alloy spikes do not reach the device formed at the side of thesurface401a.
• In the semiconductor device in which a chip is sandwiched by a pair of radiation members respectively having radiation surfaces, cooling members sandwich the semiconductor device to contact the radiation surfaces respectively. However, in this constitution, stress produced when the cooling members sandwiched the semiconductor device is liable to be concentrate on the chip.[0262]
• As opposed to this, in this embodiment, the[0263]radiation surface409 for radiating heat to the outside of the semiconductor device is formed at one side (the side of thesecond surfaces401b) of thechips411,412. In this constitution, the semiconductor device needs not be sandwiched by the cooling members for radiating heat. Therefore, even when theradiation surface409 is firmly bonded to the outside cooling member, large stress is not applied to thechips411,412.
• Especially, because the[0264]radiation surface409 is provided at the side of thesecond surfaces401bof thechips411,412, stress is prevented from concentrating on thefirst surfaces401aof thechips411,412, and the fluctuations in electric characteristics of the device provided at the first surface side can be securely prevented.
• Further, because both[0265]surfaces401a,401bof thechips411,412 are bonded to theradiation members421,422,424, respectively, the radiation of heat is performed from bothsurfaces401a,401bof thechips411,412. Therefore, the radiation property is also sufficient.
• Furthermore, the[0266]radiation surface409 is electrically insulated from thechips411,412 by theDBC substrate404 that is an insulating substrate disposed inside the semiconductor device. Therefore, there is no need to consider electrical insulation when theradiation surface409 is bonded to the outside cooling member. Also, the one insulatingsubstrate404 can secure electrical insulation from both the first andsecond surfaces401a,401bof the chips.
• In this embodiment, although the[0267]radiation surface409 is provided at the side of thesecond surfaces401bof thechips411,412, the other portion can assist the radiation of heat. For example, thethird radiation member423 may be partially exposed from theresin400 to assist the radiation of heat. Theelectrode115 formed on thesecond surfaces401bof thechips411,412 needs not be made of pure Al to protect the devices of thechips411,412. The first tothird radiation members421 to423 are separate members, and are integrally bonded to form the firstside radiation member420 by soldering in this embodiment; however, they may be formed as an integrated member.
• The electrodes for the[0268]FWD412 need not be formed from pure Al if no problem occurs concerning thermal stress or the like. When the firstside radiation member420 needs not be electrically insulated from the secondside radiation member424, theDBC substrate404 made of AlN can be omitted. TheDBC substrate404 can dispense with theland453 if theland113 of theIGBT411 can be wire-bonded to thegate terminal408 directly.
• (Seventeenth Embodiment)[0269]
• A semiconductor device in a seventeenth preferred embodiment is shown in FIGS. 27, 28A and[0270]28B. As shown in the figures, in this embodiment, first side and secondside radiation members503,504 are bonded to twoSi chips501a,501b, which are arranged on a plane, through abonding member502 having thermal conductivity to sandwich thechips501a,501b.
• The first[0271]side radiation member503 is boned to surfaces (first surfaces)505aof the Si chips501a,501bto which wire bonding is performed, and the secondside radiation member504 is bonded to the other surfaces (second surfaces)505bof the Si chips501a,501bat an opposite side of thesurfaces505a. In FIG. 27, portions of the secondside radiation member504 where it overlaps with other members are indicated with two-dot chain lines, and portions of the Si chips501a,501bwhere they overlap with other members are indicated with one-doe chain lines.
• In this embodiment, the Si chip wire-bonded in FIG. 27 is an IGBT chip[0272]501a, and the other Si chip is a fly-wheel diode chip501b. In the IGBT chip501a, the firstside radiation member503 serves as an emitter terminal, and the secondside radiation member504 serves as a collector terminal. On the surface of the IGBT chip501afacing the firstside radiation member503, a control electrode (not shown) for giving or receiving electrical signals to or from an external is formed, and is wire-bonded to aninner lead510.
• An equivalent circuit of the IGBT chip[0273]501ais, for example as shown in FIG. 29, which is composed of a collector C, an emitter E, a gate G, a current detection terminal Is, an anode A that is a diode terminal for thermosensitivity, and a cathode K.
• As shown in FIGS. 27, 28A, and[0274]28B, the plane shape of the firstside radiation member503 is substantially a rectangle and hasstrip portions503a,503brespectively extending from opposite corners of the rectangle in opposite directions to each other. Besides, the firstside radiation member503 has convex portions (protruding portion)506 respectively protruding in a thickness direction thereof to face principal electrodes of the Si chips501a,501bat the side of thesurfaces505a. Front ends of theconvex portions506 are flat at a level that does not interfere with bonding with the Si chips501a,501b, and the shapes of the flat front ends correspond to plane shapes of the principal electrodes of the Si chips501a,501b.
• Besides, on the surface of the first[0275]side radiation member503 facing the Si chips501a,501b, protrudingportions507aare provided at three locations that are at thestrip portions503a,503band at an inside of one side parallel to the directions in which thestrip portions503a,503bextend. The protrudingportions507aprotrude toward the side of the Si chips501a,501b.
• The second[0276]side radiation member504 is approximately the same as the firstside radiation member503, but has two strip portions504athat are provided at different locations from those of the strip portions503aof the firstside radiation member503. In the thickness direction,concave portions508 are provided to fitly accommodate the Si chips501a,501b. The depths of theconcave portions508 are about 0.1 to 0.3 mm.
• Further, the surface of the second[0277]side radiation member504 facing the Si chips501a,501bhas protrudingportions507bprotruding toward the side of the Si chips501a,501bat three locations that are at thestrip portions504a,504b, and at an inside of one side parallel to the directions in which thestrip portions504a,504bextend. The protrudingportions507bof the secondside radiation member504 are positioned not to overlap with the protrudingportions507aof the firstside radiation member503 when they are observed in an upper direction as shown in FIG. 27.
• The first side and second[0278]side radiation members503,504 are, for example, made of Cu (copper). Thebonding members502 are made of material having high thermal conductivity, such as solder, or brazing filler metal. Then, thesurfaces505bof the Si chips501a,501bare fit in therecess portions508 and bonded to the secondside radiation member504 through thebonding members502. Theconvex portions506 of the firstside radiation member503 are bonded to the principal electrodes of thesurfaces505aof the Si chips501a,501b.
• Further, the control electrode of the Si chips[0279]501a,501bis electrically connected to theinner lead510 of alead frame509 through awire511 by wire bonding. In FIG. 27, portions of thelead frame509 overlapping with other portions are indicated with dotted lines. As described later, thelead frame509 has sixfixation portions509a,509brespectively havingholes512a,512bfor receiving the protrudingportions507a,507bof the first side and secondside radiation members503,504. Here, Al (aluminum), Au (gold), or the like can be used for thewire511, and Cu, Cu alloy, 42-alloy, or the like can be used for thelead frame509.
• Then, as shown in FIG. 28B, the protruding[0280]portions507bformed on the secondside radiation member504 are fit in theholes512bformed in thefixation portions509bof thelead frame509, and are caulked. On the other hand, each of the protrudingportions507aformed on the firstside radiation member503 is fit in each of theholes512aformed in thefixation portion509aand caulked in a state where aspacer513 is interposed between the firstside radiation member503 and thelead frame509.
• The[0281]spacer513 is a columnar or prismatic metal such as Cu, and has a hole for allowing the protrudingportion507ato penetrate it. Thespacer513 positions the firstside radiation member503 with respect to the Si chips501a,501bin the thickness direction of the Si chips501a,501b. When thespacer513 is a prism, for example, it has a square cross-section with a side of 2 mm, and a thickness of about 0.6 mm.
• Further, as shown in FIGS. 27, 28A, and[0282]28B, the Si chips501a,501b, and theradiation members503,504 fixed as described above are so sealed withresin514 that each surface of the first side and secondside radiation members503,504 at an opposite surfaces facing the Si chips501a,501bare exposed from theresin514. In FIG. 27, the contour of theresin514 is indicated with a broken line. Of thestrip portions503a,503b,504a,504bof the first side and secondside radiation members503,504, thestrip portions503a,504b, which extend in the direction opposite to the side where theinner lead510 is connected, protrude to the outside of theresin514, and the externally protrudingstrip portions503a,504brespectively serve as outer electrodes of the Si chips501a,501b.
• Next, a method for manufacturing the semiconductor substrate is explained. First, the[0283]lead frame509, and the first side and secondside radiation members503,504, as shown in FIGS. 27, 28A,28B are prepared. Thelead frame509 is formed into a desirable shape by, for example, punching.
• FIGS. 30A to[0284]30D schematically show a method for forming the first side and secondside radiation members503,504. As shown in FIG. 30A, the first side and secondside radiation members503,504 are cut out of a reel-shapedmember515 made of Cu or the like, theconvex portions506 are formed on the firstside radiation member503, and theconcave portions508 are formed on the secondside radiation member504, by press working using apunch516 and adie517 while moving thepunch516 in a direction indicated by an arrow F. FIGS. 30B to30D show a process for forming the protrudingportions507a,507b. As shown in the figures, extruding working is performed to form the protrudingportions507a,507bby using apunch518 and adie519 that has a recess at a center thereof, and by moving thepunch518 in a direction indicated by arrows H.
• Next, the Si chips[0285]501a,501bare assembled with thelead frame509 and the first side and secondside radiation members503,504 processed as described above. FIG. 31 schematically shows constitutions of therespective members501a,501b,502 to504, and509 viewed in a side face direction at this assembling step. As shown in FIG. 31, the protrudingportions507bof the secondside radiation member504 are inserted into theholes512bof thefixation portions509bof thelead frame509, and are caulked. In theconcave portions508, the Si chips501a,501bare fitly disposed at the side of thesurface505bthrough solder foils502 as bonding members.
• Besides, solder foils[0286]502 having shapes corresponding to those of the respective principal electrodes are disposed on thesurfaces505aof the Si chips501a,501b. Thespacers513 are respectively attached to the protrudingportions507aof the firstside radiation member503. Then, the protrudingportions507aare inserted into theholes512aof thefixation portions509aof thelead frame509, and then caulked. Incidentally, theconvex portions506 of the firstside radiation member503 are omitted in FIG. 7.
• The caulking fixation at this assembling step is specifically explained below. FIGS. 32A to[0287]32C schematically shows the step for caulking fixation. As shown in FIGS. 32A and 32B, after the protrudingportions507a,507bof the first side and secondside radiation members503,504 are fit in theholes512a,512bof thefixation portions509a,509bof thelead frame509, the protrudingportions507a,507bprotruding from theholes512a,512bare crushed by moving apunch520 in a direction indicated by arrows I. Accordingly, as shown in FIG. 32C, the first side and secondside radiation members503,504 and thelead frame509 are fixed to each other.
• Successively, the Si chips[0288]501a,501b, theradiation members503,504 and thelead frame509 caulked together undergo solder reflow in a hydrogen furnace or the like, so that themembers501a,501b,503,504 are integrally fixed by soldering. After that, after wire bonding is performed between the control electrode on thesurface505aof theIGBT chip501 and thelead frame509, sealing by theresin514 is performed by transfer mold. Accordingly, the insulation between the first side and secondside radiation members503,504 are achieved, and the semiconductor device in the present embodiment is completed.
• According to the present embodiment, because the first side and second[0289]side radiation members503,504 are respectively bonded to the bothsurfaces505a,505bof the Si chips501a,501bthrough thebonding member502, the radiation property can be improved. Further, thebonding member502 is made of adhesive material having high thermal conductivity such as solder or brazing filler metal. This further improves the radiation property.
• Besides, the Si chips[0290]501a,501bcan be fixed to the secondside radiation member504 by being installed in therecess portions508 of the secondside radiation member504. Further, and the first side and secondside radiation members503,504 can be fixed with thelead frame509 by inserting the protrudingportions507a,507bof theradiation members503,504 into theholes512a,512bof thefixation portions509a,509bof thelead frame509 and caulking them. As a result, the relative positions of these members can be fixed in a direction parallel to the surfaces of the Si chips501a,501b.
• Also, the protruding[0291]portions507aof the firstside radiation member503 are fit in theholes512aof thefixation portions509aof thelead frame509 with thespacers513 interposed between the firstside radiation member503 and thelead frame509. Because of this, the firstside radiation member503 can be fixed to thelead frame509 while providing a mounting space for the Si chips501a,501b, and further can be positioned relatively in the thickness direction of the Si chips501a,501b. Accordingly, the relative positions of the respective members can be fixed in both the surface direction and the thickness direction of the Si chips501a,501b. The semiconductor device can be provided with decreased variations in mounting positions of the members.
• When a power element such as an IGBT is used as a semiconductor chip as in the present embodiment, there may arise the following problem regarding insulation. FIG. 33 shows an example of an IGBT.[0292]
• As shown in FIG. 33, a power element such as an IGBT is formed with a[0293]guard ring521 and an EQR (equipotential ring)522 at an edge portion thereof, and theguard ring521 and theEQR522 are formed to have approximately the same potential as that of acollector electrode523. Theguard ring521 and theEQR522 are further formed on the surface of the power element where anemitter electrode524 is formed. That is, theguard ring521 and theEQR522 equipotential with thecollector electrode523 exist in the vicinity of theemitter electrode524.
• Therefore, in a case of the power element in which a potential difference between the[0294]emitter electrode524 and thecollector electrode523 is, for example, about 600 V, the potential difference between theguard ring521, theEQR522, and theemitter electrode524 becomes also about 600 V. Because of this, if aradiation member525 is positioned erroneously and shifted from an accurate position to the side of theguard ring521 and theEQR522 as shown in an arrow J in FIG. 33, theguard ring521 and theEQR522 might electrically communicate with theemitter electrode524 through a bonding,member526 such as solder and theradiation member525 directly or by discharge. Even if theguard ring521 and theEQR522 are covered with aprotective film527 made of polyimide or the like, the thickness of the film is about 1 to 2 μm at most, and the withstand voltage to 600 V cannot be secured.
• To the contrary, in the semiconductor device of the present embodiment, as described above, in the state where the relative positions of the Si chips[0295]501a,501b, thelead frame509, and the first side and secondside radiation members503,504 are fixed, theconvex portions506 of the firstside radiation member503 are bonded to the principal electrodes on thesurfaces505aof the Si chips501a,501b. Because of this, the firstside radiation member503 can be brought in contact with only the principal electrodes by controlling the shape of theconvex portions506. This can also solve the problem concerning the insulation, caused by the deviation of the relative position of theradiation member503 from the Si chips501a,501b.
• The present embodiment exemplifies the example in which the[0296]spacers513 are fitly attached to the protrudingportions507aof the firstside radiation member503; however, the protrudingportions507a,507bmay be formed in a stepped shape on therespective radiation members503,504 by, for example, forming the die519 used for extruding processing shown in FIGS. 32B and 32C to have a stepped portion in the recess portion thereof. Thus, the spacers may be integrated with the protruding portions.
• Besides, the[0297]spacers513 are not limited to be attached to the protrudingportions507aof the firstside radiation member503, but may be attached to the protrudingportion507bof the secondside radiation member504 to fix the relative positions of the Si chips501a,501b, theradiation members503,504, and thelead frame509 in the thickness direction of the Si chips501a,501b.
• As in the present embodiment, when both the first side and second[0298]side radiation members503,504 are respectively fixed to thelead frame509 by caulking, the variations in mounting positions of the semiconductor chips can be securely suppressed. However, only one of theradiation members503,504 may be fixed by caulking so long as the positioning accuracy of theradiation members503,504 is improved and the variations in mounting positions of the semiconductor chips are suppressed.
• Each of the[0299]radiation members503,504 has a surface externally exposed at an opposite side of the Si chips501a,501b. The exposed surface may be brought in contact with a cooling member for accelerating the radiation of heat. The present embodiment exemplified the IGBT chip501aas a semiconductor chip, and is so constructed that the variations in mounting position of the semiconductor chip is suppressed. Even when theradiation members503,504 are not used as electrodes, the constitution of the present invention is effective to improve the radiation property and to prevent the variations in mounting position of the semiconductor chip.
• The[0300]spacers513 are attached to all (three in the present embodiment) of the protrudingportions507aformed on the firstside radiation member503; however, the spacers provided at two locations are sufficient to fix the relative positions between the firstside radiation member503 and the Si chips501a,501bin the thickness direction of the Si chips501a,501b. Thebonding members502 are not limited to the solder foils, but may be solder paste or the like. The semiconductor device needs not always have the twosemiconductor chips501a,501b, and have only to have one chip.
• (Eighteenth Embodiment)[0301]
• When the current capacity of the IGBT chip[0302]501aexceeds100A, the chip size is increased, and there is a case the chip size becomes 10 to 16 mm. When theradiation members503,504 are made of Cu in such a case, since the linear expansion coefficient of Cu is 5 to 6 times larger than that of Si constituting the IGBT chip501a, solder constituting thebonding member502 is thermally fatigued in a thermal cycle. This may results in occurrence of cracks, increase in thermal resistance, and deterioration in the heat radiation property.
• In this connection, an eighteenth preferred embodiment of the present invention has been made as follows. In this embodiment, the first side and second[0303]side radiation members503,504 are made of material different from that of the first embodiment. Hereinafter, different portions from those in the seventeenth embodiment are mainly described, and the same parts as those in the seventeenth embodiment are assigned to the same reference numerals.
• As shown in FIG. 34, as the first side and second[0304]side radiation members503,504, metal having a leaner expansion coefficient similar to that ofSi chips501a,501bis used. Specifically, as an example, clad members (CICS) each of which is so constructed that a member (invar member)528 made of invar is sandwiched by members (Cu members)529 made of Cu are adopted. The linear expansion coefficient of each CIC is approached to that of Si as close as possible by controlling the ratio in thickness between theinvar member528 and theCu members529, and the total thickness. The other members and features such as shapes are substantially the same as those in the seventeenth embodiment.
• According to the eighteenth embodiment, because the linear expansion coefficient of the first side and second[0305]side radiation members503,504 is approximated to that of the Si chips501a,501b, even when each size of thechips501a,501bis large, thermal stress that is caused by the difference in thermal expansion coefficient between the Si chips501a,501band theradiation members503,504 can be suppressed, and concentration of strain on thebonding members502 can also be prevented. This prevents the deterioration in bonding property between theradiation members503,504 and the Si chips501a,501b. In consequence, the deterioration in radiation property and the decrease in electrical conductivity when theradiation members503,504 are used as electrodes can also be prevented.
• The same effects as described above can be exhibited when Mo (molybdenum) is used in place of invar. In the[0306]radiation members503,504, themembers528 sandwiched by theCu members529 need not be unified to the invar or Mo member, and may be different from each other. Theradiation members503,504 are not limited to the clad members, but may be other members such as Cu-Mo alloy having a linear expansion coefficient approximated to that of Si.
• Incidentally, the eighteenth embodiment indicates an example using metal having a linear expansion coefficient approximated to that of Si, for the[0307]radiation members503,504, and adopts the clad members such as CIC as an example. However, thermal conductivities of invar and Mo are inferior to that of Cu, and the invar orMo members528 lower the radiation property in the thickness direction of the Si chips501a,501b. The following modified embodiment solves this problem.
• In this modified embodiment, as shown in FIGS. 35A and 35B, several[0308]invar members528 are partially layered in theCu member529. FIG. 35A shows a cross-sectional view showing theradiation member503,504 cut in a direction parallel to the layer where it includes theinvar members528, while FIG. 35B shows a cross-sectional view showing theradiation member503,504, cut in a direction perpendicular to the layer where it includes theinvar members528.
• As shown in FIGS. 35A and 35B, in this modified embodiment, the[0309]invar members528 are provided at several (four) positions inside theCu member529. Accordingly, theradiation member503,504 has portions that are composed of only theCu member529 in the thickness direction thereof, so that the thermal conductivity in the thickness direction of theradiation member503,504 are not lessened. Thus, the radiation member approximated to Si in thermal expansion coefficient can be provided with sufficient radiation property. In this modified embodiment, although theinvar members528 are provided at four positions inside theCu member529, theinvar members528 may be formed into a fine mesh by, for example, providing many small sized invar parts. Mo members can be used in place of the invar members. Otherwise, the invar members and the Mo members are used simultaneously.
• FIG. 36 shows a semiconductor device as another modified embodiment. In the seventeenth and eighteenth embodiment described above, the control electrode on the[0310]surface505aof the IGBT chip501ais electrically connected to theinner lead510 by wire bonding; however, as shown in FIG. 36, the connection may be made by a bump-shapedbonding member530 made of solder or the like. Accordingly, when soldering is performed between the first side and secondside radiation members503,504 and the Si chips501a,501b, the connection between theinner lead510 and the control electrode can be formed simultaneously. This results in simplification of the manufacturing process.
• While the present invention has been shown and described with reference to the foregoing preferred embodiments, it will be apparent to those skilled in the art that changes in form and detail may be made therein without departing from the scope of the invention as defined in the appended claims.[0311]

Claims (65)

What is claimed is:

1. A semiconductor device comprising:

a semiconductor chip:

first and second radiation members thermally and electrically connected to the semiconductor chip interposed therebetween, and having a radiation surface for radiation heat from the semiconductor chip; and

first and second bonding members respectively interposed between the first radiation member and the semiconductor chip and between the semiconductor chip and the second radiation member, wherein:

the first and second radiation members are made of a metallic material that is superior to tungsten and molybdenum in at least one of an electrical conductivity and a thermal conductivity.

2. The method according toclaim 1, further comprising an insulating film provided on a surface of one of the first and second radiation members at a side of the semiconductor chip, at a region other than a region where the one of the first and second radiation members are bonded to the semiconductor chip through one of the first and second bonding members.

3. The method according toclaim 2, wherein:

the semiconductor chip has a guard ring at an edge portion thereof, the guard ring facing the insulating film provided on the one of the first and second radiation members; and

the insulating film has an opening facing an inner portion of the semiconductor chip than the edge portion where the guard ring is provided.

4. The semiconductor device according toclaim 1, wherein the radiation surface is composed of first and second radiation surfaces that are respectively side faces of the first and second radiation members, and are coplanar with each other.

5. The semiconductor device according toclaim 1, further comprising a conductive member protruding from a surface of one of the first and second radiation members other than the radiation surface, for electrically connecting the semiconductor chip to an outside.

6. The semiconductor device according toclaim 5, wherein the conductive member has first and second conductive members respectively protruding from first and second positions of the first and second radiation members in parallel with each other, the first and second positions being approximately identical with each other in a direction perpendicular to the radiation surface.

7. The semiconductor device according toclaim 1, wherein the first and second radiation members respectively have first and second radiation surfaces each of which is provided at an opposite side of the semiconductor chip, and exposed to an outside for radiating heat.

8. The semiconductor device according toclaim 7, further comprising an outside wiring member disposed on the first radiation surface, wherein:

the first radiation member has a screw hole opened on the first radiation surface and having a closed bottom;

the outside wiring member has a through hole at a position corresponding to the screw hole; and

a screw is inserted into the through hole and the screw hole to fix the outside wiring member to the first radiation member.

9. The semiconductor device according toclaim 1, wherein each of the first and second radiation members has a space at an inside thereof for reducing rigidity thereof.

10. The semiconductor device according toclaim 1, wherein the metallic material contains one of copper and aluminum as a main component.

11. The semiconductor device according toclaim 1, wherein the semiconductor chip and the first and second radiation members are sealed with a resin having a thermal expansion coefficient approximate to that of the first and second radiation members.

12. The semiconductor device according toclaim 1, wherein:

each of the first and second bonding members is composed of a plurality of bumps that form a plurality of spaces therebetween; and

the plurality of spaces provided among the plurality of bumps are filled with a resin.

13. The semiconductor device according toclaim 1, wherein each of the first and second radiation members has a metallic portion at least as a part of a portion thereof facing the semiconductor chip, the metallic portion having a thermal expansion coefficient approximate to that of the semiconductor chip.

14. A semiconductor device, comprising:

first and second semiconductor chips: and

first and second radiation members thermally and electrically connected to the first and second semiconductor chips interposed therebetween through a bonding member, and having a radiation surface for radiation heat from the first and second semiconductor chips, wherein:

the first radiation member has first and second protruding portions protruding toward the first and second semiconductor chips; and

first and second front end portions of the first and second protruding portions are thermally and electrically connected to the first and second semiconductor chips through the bonding member.

15. The semiconductor device according toclaim 14, wherein the radiation surface is composed of first and second radiation surfaces of the first and second radiation members, the first and second radiation surfaces being respectively provided at an opposite side of the first and second semiconductor chips and being approximately parallel to each other.

16. The semiconductor device according toclaim 14, wherein the radiation surface is composed of first and second radiation surfaces that are side faces of the first and second radiation members, and are approximately coplanar with each other.

17. The semiconductor device according toclaim 14, further comprising an insulating film provided on one of the first and second radiation members at a side facing the first and second semiconductor chips, and at a portion other than portions connected to the first and second semiconductor chips through the bonding member.

18. The semiconductor device according toclaim 14, further comprising a conductive member protruding from one of the first and second radiation members other than the radiation surface, for electrically connecting at least one of the first and second semiconductor chips to an outside.

19. The semiconductor device according toclaim 18, wherein the conductive member has first and second conductive members respectively protruding from first and second positions of the first and second radiation members in parallel with each other, the first and second positions being approximately identical with each other in a direction perpendicular to the radiation surface.

20. The semiconductor device according toclaim 14, further comprising an outside wiring member disposed on the radiation surface that is provided on a surface of one of the first and second radiation members at an opposite side of the first and second semiconductor chips, wherein:

the one of the first and second radiation members has a screw hole opened on the radiation surface and having a closed bottom;

the outside wiring member has a through hole at a position corresponding to the screw hole; and

a screw is inserted into the through hole and the screw hole to fix the outside wiring member to the one of the first and second radiation members.

21. The semiconductor device according toclaim 14, wherein each of the first and second radiation members has a space at an inside thereof for reducing rigidity thereof.

22. The semiconductor device according toclaim 14, wherein at least one of the first and second radiation members is made of a metallic material containing one of copper and aluminum as a main component.

23. The semiconductor device according toclaim 14, wherein the first and second semiconductor chips and the first and second radiation members are sealed with a resin having a thermal expansion coefficient approximate to that of the first and second radiation members.

24. The semiconductor device according toclaim 14, wherein:

the bonding member is composed of a plurality of bumps that form a plurality of spaces therebetween; and

the plurality of spaces provided among the plurality of bumps are filled with a resin.

25. A semiconductor device, comprising:

a semiconductor chip having an element formation surface and a back surface:

a first conductive member bonded to the element formation surface of the semiconductor chip through a first bonding member having electrical conductivity;

a second conductive member bonded to the back surface of the semiconductor chip through a second bonding member having electrical conductivity; and

a third conductive member bonded to the first conductive member through a third bonding member having electrical conductivity, at an opposite side of the semiconductor chip,

wherein a bonding area between the first conductive member and the third conductive member is smaller than that between the first conductive member and the semiconductor chip.

26. The semiconductor chip according toclaim 25, wherein the semiconductor chip, the first, second, and third conductive members are sealed with a sealing member to expose at least a surface part of one of the second and third conductive members from the sealing member.

27. The semiconductor device according toclaim 26, wherein the first conductive member has a step portion facing an outer periphery of the resin, the step portion forming a thin thickness portion of the first conductive member.

28. The semiconductor device according toclaim 27, wherein the step portion of the first conductive member is covered with the sealing member.

29. The semiconductor device according toclaim 27, wherein the first conducive member partially protrudes toward the third conductive member with the thin thickness portion facing the semiconductor chip.

30. The semiconductor device according toclaim 26, wherein an outer surface portion of the first conductive member contacting the sealing member is oxidized.

31. The semiconductor device according toclaim 25, further comprising an electrode provided on the element formation surface of the semiconductor chip, wherein:

an area of the electrode is approximately equal to the bonding area between the first conductive member and the semiconductor chip.

32. A semiconductor device, comprising:

a semiconductor chip having an element formation surface and a back surface at an opposite side of the element formation surface;

a first conductive member electrically connected to the element formation surface of the semiconductor chip;

a second conductive member electrically connected to the back surface of the semiconductor;

a third conductive member electrically connected to the first conductive member at an opposite side of the semiconductor chip; and

a sealing member sealing the element formation surface and the back surface of the semiconductor chip respectively electrically connected to the first and second conductive members, and a face of the third conductive member electrically connected to the first conductive member, wherein:

the first conductive member has a step portion at a portion facing an outer periphery of the sealing member, the first conductive member having a thin thickness portion by providing the step portion.

33. The semiconductor device according toclaim 32, wherein the step portion of the first conductive member is covered with the sealing member.

34. The semiconductor device according toclaim 32, wherein the first conducive member partially protrudes toward the third conductive member with the thin thickness portion facing the semiconductor chip.

35. The semiconductor device according toclaim 32, wherein an outer surface portion of the first conductive member contacting the sealing member is oxidized.

36. The semiconductor device according toclaim 32, further comprising an electrode provided on the element formation surface of the semiconductor chip, wherein:

an area of the electrode is approximately equal to a bonding area between the first conductive member and the semiconductor chip.

37. A semiconductor device, comprising:

a substrate made of Si, having an element formation surface and a back surface at an opposite side of the element formation surface;

an electrode formed on the element formation surface of the substrate and made of pure Al excluding an impurity; and

a barrier metal disposed between the electrode and the substrate, for preventing Si from being dissolved in the electrode.

38. The semiconductor device according toclaim 37, further comprising a back side electrode formed on the back surface of the substrate and made of pure Al excluding an impurity;

39. The semiconductor device according toclaim 37, further comprising a first radiation member bonded to the main surface of the substrate through the electrode to radiate heat generated from a semiconductor chip composed of the substrate and the electrode.

40. The semiconductor device according toclaim 39, wherein a direction in which the heat is radiated by the first radiation member corresponds to a direction progressing from the element formation surface to the back surface of the substrate.

41. The semiconductor device according toclaim 39, further comprising:

a second radiation member bonded to the back surface of the substrate, and having a radiation surface; and

an outside cooling member contacting the radiation surface of the second radiation member at an opposite side of the substrate for facilitating radiation of the heat to an outside, wherein;

the first radiation member is connected to the second radiation member so that the heat generated from the element formation surface is radiated from the radiation surface of the second radiation member.

42. The semiconductor device according toclaim 41, further comprising a high thermal conductivity substrate having high thermal conductivity and disposed between the first radiation member and the second radiation member.

43. A semiconductor device, comprising:

a semiconductor chip having a first surface and a second surface:

a first radiation member bonded to the first surface of the semiconductor chip through a first bonding member having thermal conductivity; and

a second radiation member bonded to the second surface of the semiconductor chip through a second bonding member having thermal conductivity, the second radiation member having a concave portion for holding therein the semiconductor chip therein.

44. The semiconductor device according toclaim 43, wherein:

the first radiation member has a convex portion protruding toward the semiconductor chip; and

the convex portion is bonded to the semiconductor chip through the first bonding member.

45. The semiconductor device according toclaim 43, further comprising:

a control electrode provided on the first surface of the semiconductor chip; and

a lead frame electrically connected to the control electrode.

46. The semiconductor device according toclaim 45, wherein one of the first radiation member and the second radiation member has a protruding portion at a side of the semiconductor chip, the protruding portion being inserted into a hole formed in the lead frame to fix the one of the first radiation member and the second radiation member to the lead frame.

47. The semiconductor device according toclaim 45, wherein one of the first radiation member and the second radiation member has a protruding portion at a side of the semiconductor chip, the protruding portion being inserted into a hole formed in the lead frame with a spacer interposed between the lead frame and the one of the first radiation member and the second radiation member, the spacer positioning the one of the first radiation member and the second radiation member with respect to the semiconductor chip in a thickness direction of the semiconductor chip.

48. The semiconductor device according toclaim 43, wherein one of the first radiation member and the second radiation member is composed of a copper member and a plurality of portions disposed partially inside the copper member and made of one of invar and molybdenum.

49. The semiconductor device according toclaim 43, wherein the first radiation member, the semiconductor chip, and the second radiation member are sealed with a resin member in a state where each of the first radiation member and the second radiation member has a surface exposed from the resin member at an opposite side of the semiconductor chip.

50. A semiconductor device, comprising:

a semiconductor chip having a first surface and a second surface:

a first radiation member having a convex portion that is bonded to the first surface of the semiconductor chip through a first bonding member having thermal conductivity; and

a second radiation member bonded to the second surface of the semiconductor chip through a second bonding member having thermal conductivity;

a control electrode provided on the first surface of the semiconductor chip;

a lead frame electrically connected to the control electrode, wherein:

one of the first radiation member and the second radiation member has a protruding portion at a side facing the semiconductor chip;

the protruding portion is fixedly inserted into a hole formed in the lead frame to fix the one of the first radiation member and the second radiation member; and

a spacer is disposed in a space defined between the one of the first radiation member and the second radiation member to position the one of the first radiation member and the second radiation member, and the semiconductor chip in a thickness direction of the semiconductor chip.

51. The semiconductor device according toclaim 50, wherein the first radiation member and the second radiation member are made of a metallic material having a linear thermal expansion coefficient approximate to that of the semiconductor chip.

52. The semiconductor device according toclaim 50, wherein one of the first radiation member and the second radiation member is composed of a copper member and a plurality of portions disposed partially inside the copper member and made of one of invar and molybdenum.

53. The semiconductor device according toclaim 50, wherein the first radiation member, the semiconductor chip, and the second radiation member are sealed with a resin member in a state where each of the first radiation member and the second radiation member has a surface exposed from the resin member at an opposite side of the semiconductor chip.

54. A semiconductor device, comprising:

a semiconductor chip having a first surface and a second surface;

a first conductive member bonded to the first surface of the semiconductor chip through a first soldering member; and

a second conductive member bonded to the second surface of the semiconductor chip through a second soldering member, a fusing point of which is lower than that of the first soldering member.

55. The semiconductor device according toclaim 54, wherein the second soldering member contains Sn at 90 wt % at least.

56. The semiconductor device according toclaim 54, wherein the second conductive member has a recess portion in which the second soldering member is disposed.

57. The semiconductor device according toclaim 54, wherein each of the first radiation member and the second radiation member serves simultaneously as an electrode and a radiation member for the semiconductor chip.

58. A method for manufacturing a semiconductor device, comprising:

bonding a semiconductor chip to a first conductive member with a first soldering member interposed therebetween;

bonding a second conductive member to the semiconductor chip with a second soldering member interposed therebetween, the second soldering member having a fusing point lower than that of the first soldering member;

performing a reflow treatment only to the second soldering member; and

applying a pressure to the second conductive member from a side opposite to the semiconductor chip to control a degree of parallelization between the first conductive member and the second conductive member.

59. The method according toclaim 58, wherein the second conductive member contains Sn at 90 wt % or more.

60. A method for manufacturing an electronic instrument, comprising:

interposing a heating element between first and second radiation members through a bonding member;

interposing a jig in a space defined between the first and second radiation members so that the jig contacts the first and second radiation members, the jig being for fixing a distance between the first and second radiation members;

externally pressurizing the first and second radiation members to bond the first and second radiation members and the heating element with the bonding member.

61. The method according toclaim 60, wherein the jig has a thermal expansion coefficient larger than those of the first and second radiation members.

62. A method for manufacturing an electronic instrument, comprising:

interposing a heating, element between first surfaces of first and second radiation members with a first bonding member interposed between the first surface of the first radiation member and the heating element, and a second bonding member interposed between the first surface of the second radiation member and the heating element;

preparing a first jig having a first protruding portion on a first jig surface thereon, and a second jig having a second protruding portion on a second jig surface thereon;

disposing the first jig with the first jig surface facing a second surface of the second radiation member, and the second jig with the second jig surface facing a second surface of the first radiation member;

making a front end portion of the first protruding portion abut the first surface of the first radiation member, and making a front end portion of the second protruding portion abut the first surface of the second radiation member while keeping a distance between the first jig and the second jig constant; and

pressuring the first and second radiation members from the second surfaces of the first and second radiation members to bond the first and second radiation members and the heating element with the first and second bonding members.

63. The method according toclaim 62, wherein the first radiation member has a through hole through which the second protruding portion passes.

64. The method according toclaim 63, wherein the second radiation member has a through hole through which the first protruding portion passes.

65. The method according toclaim 62, wherein the first and second radiation members are pressurized by an elastic force of a spring member.

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