US20030222147A1 - Optical reader having a plurality of imaging modules - Google Patents

Abstract

The invention is an optical reader having a plurality of imaging modules. In one method for operating a multiple imaging module reader of the invention, a second frame of image data captured via actuation of a second imaging module is automatically captured and subjected to decoding in the case an attempt to decode using a frame of image data captured via actuation of a first imaging module fails. In another embodiment, a frame of image data captured via actuation of an image sensor of a first module and actuation of illumination of a second imaging module is subjected to decoding. In another embodiment, frames of image data captured via actuation of image sensors of spaced apart modules are combined. The various modules of a multiple imaging module reader can be adapted to have different best focus positions so that a field depth of the reader is improved.

Description

BACKGROUND OF THE INVENTION
• 1. Field of the Invention[0001]
• The invention relates to optical readers in general and particularly to an optical reader having multiple image sensor devices.[0002]
• 2. Background of the Prior Art[0003]
• Decodable indicia such as bar codes and OCR decodable characters are finding increased use in an ever expanding variety of applications. Bar codes are being applied not only to paper substrate surfaces but other surfaces as well such as plastic bags, glass, and directly on finished articles. The affixing of a decodable indicia directly to an article is referred to as “direct part marking.” Where decodable symbols or characters have been applied to particularly reflective “shiny” surfaces (glass, plastic, metallic surfaces), “specular reflection” decode failures have been observed.[0004]
• “Specular reflection” occurs where a light ray incident on a highly reflective (mirror) surface is reflected substantially at an angle measured from the surface that is substantially normal with respect to the incident ray. In optical readers, light sources are positioned to emit light along a path closely adjacent a centrally located imaging axis. An optical reader light is directed at a reflective target and, therefore, the illumination light tends to be reflected specularily in the direction of the reader's photodetector elements. Specular reflection can result in the captured image data failing to exhibit adequate contrast between dark and light markings of a decodable indicia. With the increased miniaturization of optical readers, light sources for illuminating a target are being positioned in closer proximity with a photodetector element of the reader, thereby rendering the modern reader more susceptible to specular reflection read failures.[0005]
• The proliferation of the use of decodable markings has brought to light additional problems with presently available optical readers. It has become more common to encode more information into single decodable indicia, e.g. with use of “high density” bar codes, to affix more than one decodable indicia onto an article or package in need of decoding, and to make bar codes wider so that they can encode more information. “High density” bar codes are best decoded with the use of a high resolution optical reader which is configured to have a short “best focus” position. Extra wide code bar codes and scenes having more than one bar code are best decoded with use of readers having a longer best focus position. Commercially available optical readers cannot easily read high density extra wide decodable symbols or multiple symbols from a scene which are encoded in high density.[0006]
• There is a need for an optical reader which is impervious to decode failures resulting from specular reflection, and which is adapted to read large or multiple high density decodable symbols formed on a target.[0007]
SUMMARY OF THE INVENTION
• The invention in one major aspect relates to an optical reader having more than one imaging module, wherein each imaging module typically includes a combination of a support assembly, an image sensor, imaging optics, and at least one illumination light source.[0008]
• In one embodiment the reader includes a gun style housing which houses a pair of 2D imaging modules. In another embodiment, the reader includes a gun style housing having three 2D imaging modules. The modules may have imaging axes that are in parallel, diverging or converging relation. One or more of the 2D imaging modules can be replaced with a 1D imaging module.[0009]
• In another embodiment the reader module may include a “dumbbell” style housing having a central handle portion and a pair of laterally disposed head portions, each of the head portions housing an imaging module. The head portions can be made adjustable so that the relative position of the imaging axes of the two imaging modules can be adjusted. The dumbbell reader can be mounted on a presentation stand which further includes a third head portion which houses a third imaging module.[0010]
• In another aspect, an optical reader of the invention can be operated using a control circuit which comprises a multi-functional processor IC chip which, in addition to having a central processing unit (CPU) includes a programmable integrated frame grabber block.[0011]
• A control circuit of the invention can be adapted to carry out a variety of routines involving coordinated capture of image data utilizing more than one imaging module. In one example of the invention, a frame of image data is captured by actuation of a first imaging module and light sources from a first imaging module. The frame is then subjected to a decoding attempt. If the decoding attempt involving the first captured frame fails, a second frame of image data is captured by actuation of an image sensor of the first imaging module and actuation of a light source from a second imaging module and subjected to decoding. The second frame of image data captured utilizing a spaced apart illumination light source and image sensor from two spaced apart imaging modules can be expected to be free of image degradation problems attributable to specular reflection.[0012]
• In another aspect of the invention, a control circuit can be configured to combine image data captured by a reader of the invention having more than one imaging module. Because the relative positions of imaging modules in a multiple imaging module reader of the invention are known, first and second frames of image data captured via actuation of first and second imaging modules of a reader of the invention can readily be combined according to an image frame combination method.[0013]
• In a still further aspect of the invention, various imaging modules of a multiple imaging module optical reader can be configured to have different best focus positions. Configuring different imaging modules of a multiple imaging module optical reader to have different best focus positions improves the overall depth of field of the multiple imaging module optical reader.[0014]
• These and other details and advantages will become apparent from the detailed description of the preferred embodiment hereinbelow.[0015]
DETAILED DESCRIPTION OF THE INVENTION
• Embodiments of optical readers having more than one imaging module are shown in FIGS. 1[0016]a-11. In FIGS. 1a-1ba gun style optical reader5-1 is shown including first andsecond imaging modules10aand10bincorporated inhousing7.Imaging modules10 can be of the type shown in FIGS. 3a-3d.Imaging module10,10-1 as shown in FIGS. 3aand3cincludes asupport assembly80 having acontainment section81 and aretainer section82, afirst circuit board14acarrying animage sensor32, asecond circuit board14b,illumination LEDs16 aimingLEDs18, anoptical plate26 carrying aiming andillumination optics25,27, andsupport posts84 holding the various components of the module together. Further details of imaging module10-1 are described in application Ser. No. 10/092,789, filed Mar. 7, 2002, entitled “Optical Reader Imaging Module,” incorporated herein by reference. As indicated by FIGS. 3aand3bimaging modules10 can be built as a modularly installable self-contained unit. That is,module10 can be assembled into the packaged form shown in FIGS. 3aand3bat an assembly location prior to being installed in a cavity defined byreader housing7.
• [0017]Imaging module10 can be screw mounted on any rigid member withinhousing7 in the manner described in application Ser. No. 10/092,789 filed Mar. 7, 2002, entitled “Optical Reader Imaging Module,” incorporated herein by reference hereinabove.Module10 can includescrew holes810 for facilitating mounting ofmodule10 on a rigid member. As indicated bysupport assembly80 of FIG. 3d,support assembly80 can include wings80whavingscrew holes810. Reader5 can include amain circuit board15 or “mother board” which includes control circuit circuitry as described in detail in connection with FIGS. 2a-2f. In one embodiment, as indicated by reader5-2 of FIG. 1d, a plurality ofimaging modules10 can be mounted to a rigid member provided by a commonmain circuit board15.Imaging modules10 can be interfaced withmother board15 with use standardly knownflex strip connectors17.
• [0018]Module10aandmodule10bare disposed in acommon cavity6. Awall8 formed inhousing7dividing cavity6 into two spaces would not create two separate cavities sincecavity6 of reader5-1 would still be delimited by the common outer peripheral wall ofhousing7.
• Incorporating more than one[0019]imaging module10 in anoptical reader housing7 yields a number of advantages. For example, if an attempt to decode a decodable indicia by capturing and subjecting to decoding an image captured via actuation offirst module10afails, a second decoding an attempt can be made by capturing and subjecting to decoding image captured via actuation ofsecond imaging module10b. Further, reader5 can be actuated to capture and subject to decoding a frame of image data captured by actuation of animage sensor32 of afirst module10aandillumination LEDs16 of asecond imaging module10b. The spacing betweenillumination LEDs16 of asecond module10band animage sensor32 of afirst imaging module10arenders the frame of image data capture by the described method substantially impervious to specular reflection image degradation.
• In addition, image data of several frames captured by actuation of several different imaging modules can be combined, by one of several possible image frame combination methods, to yield a larger frame of image data. The larger image representation is yielded by combining multiple frames of image data and can be subjected to decoding, thereby facilitating decoding of larger decodable indicia or multiple decodable indicia printed over a large area of a target substrate. Specular reflection avoidance and frame image combination methods will be described in greater detail herein.[0020]
• In the embodiment of FIGS. 1[0021]cand1d, reader5-2 comprises three imaging modules including afirst imaging module10a,second imaging module10bandthird imaging module10ceach having arespective imaging axis11a,11b, and11c. Like reader5-1 (FIGS. 1aand1b) the imaging axes of reader5-2 of FIGS. 1cand1dare in converging relation. Configuring reader5-2 so thatmodules10 are in converging relation assures that each of a reader's imaging modules (10a,10b, and10cin reader5-2) are positioned to capture images corresponding to substantially the same area of a target substrate. Accordingly, as will be explained in further detail herein readers5-1 and5-2 as shown in FIGS. 1a-1dare particularly well suited for reducing specular reflection misreads.
• In FIGS. 1[0022]e-1hmultiple imaging module optical readers5 are shown which are particularly well-suited for applications wherein frames of image data generated by actuation of several imaging modules are configured to develop large field image representations. In the embodiment of FIGS. 1eand if, reader5-3 includinggun style housing7 has installed therein threeimaging modules10a,10b, and10cwherein the imaging axes11a,11b, and11c, of the three modules are in substantially parallel relation.
• In the embodiment of FIGS. 1[0023]gand1hreader5-4 comprisinggun style housing7 has installed therein three imaging modules, wherein the imaging axes11a,11b, and11cof the three modules are in diverging relation. Reader5-3 and reader5-4 are especially well suited for applications requiring an enlarged field of view. By way of routines which will be described in greater detail herein, frames of image data captured by actuation of three modules can be combined to yield a larger frame of image data comprising an image representation of an enlarged decodable symbol or character or of multiple decodable indicia.
• Referring now to FIGS. 1[0024]iand1j, dumbbell style multiple imaging module optical reader5-5 is described. Dumbell reader5-5 is a reader including threehousing portions7 and each defining acavity6. Reader5-5 of FIGS. 1iand1jincludes acentral handle19 which supports a pair of laterally disposedhead sections20.Handle19 may include a thumb-actuatedtrigger13t. Installed in eachhead section20 is animaging module10 which may be of the type described in connection with FIGS. 3a-3d.Imaging module10 of reader5-5 as in the case of readers5-1,5-2,5-3, and5-4 may be screw mounted on any rigid member withinhead sections20.Head sections20 ofhousing7 are mounted to the major body ofhousing7 by ball andsocket type connectors21. Ball andsocket connectors21 may be provided, for example, by a ball and socket connector of a type available from R-A-M Mounting Systems, Inc. of Chandler Ariz. Ball andsocket connectors21 may include mechanical detent mechanisms providing feel feedback as to the position ofhead section20 so that a user may clickhead sections20 into one or more normally defined positions.Flexible cable18 as shown in FIGS. 1iand1jcan be disposed to provide electrical communication betweenmodules10 and amain circuit board15 within a cavity defined by a handle portion ofhousing7.Main circuit board15 of reader5-5 may carry components of a multiple module electrical circuit,e.g. circuit105 described with reference to FIG. 2f.
• In the embodiment of FIG. 1K, handle[0025]19 of dumbbell style reader5-7 includes acentral aperture19awhich is fittable aboutpost45.Handle19 includes knob actuatedbolt46 for securing dumbbell style reader5-6 againstpost45.Post45 in the embodiment of FIG. 1kis part of a presentation style reader5-7 which, in addition to including detachable dumbbell style reader5-6 further includes stand47 including knob actuatedbolt48 for enabling a vertical position ofpost45 to be adjusted, andtop head section20adisposed at a top ofpost45.Head section20amay be mounted to post45 with use of ball andsocket connector21. Dumbbell style optical reader5-6 may be removed frompost45 so that dumbbell style reader5-6 can be used in a hand held mode. For realization of a hand held mode, knob actuatedbolt48 is loosened and post45 is removed from stand47. Knob actuatedbolt46 is then loosened and dumbbell style reader5-6 is removed frompost45 to allow hand held use.
• A dumbbell style reader e.g.[0026]5-5 and5-6 is particularly well suited for use in applications wherein specular reflection read failures can be expected. In the example of FIG. 1j, dumbbell style reader5-5 is shown in a mode whereinhead sections20 are canted in a position such that imaging axes11aand11bofmodule10aandmodule10bare in converging relation and positioned so theimaging modules10aand10bgenerate image data corresponding to substantially the same scene at a target substrate, S, when reader5-5 is at certain reader-to-target distance. Ifmodule10ais positioned with respect to a reflective target T such that specular reflection from target T results in a decode failure, a frame of image data captured by actuation ofillumination light sources16 and animage sensor32 ofsecond module10bcan be subjected to a second decoding attempt. In addition, an expectedly specular reflection-free frame of image data can be captured by actuation ofimage sensor32 offirst imaging module10ain combination with actuation of illumination ofsecond imaging module10bin place of illumination from first imaging module. The term “target” herein refers to subject matter (e.g. decodable indicia) presently in a field or view of at least one module of reader5. The term “target substrate” refers to a member (e.g. a piece of paper, an equipment part) bearing subject matter to which reader may be directed.
• The multiple imaging module optical readers as shown in FIGS. 1[0027]a-1kinclude 2D imaging modules, which may be for example Model IT 4200, Model IT 4250, or Model IT 4000 imaging modules of the type available from HHP, Inc. of Skaneateles Falls, N.Y. It will be understood that a 2D imaging module of any of the readers shown could be replaced by a 1D imaging module having a 1D image sensor. An example of a 1D imaging module which can be incorporated in any one of readers5-1,5-2,5-3,5-4,5-5,5-6, and5-7 is shown in FIG. 3e. Imaging module10-2 includes a1D image sensor32, a support assembly orframe80,imaging optics40,illumination light sources18, and illuminationoptics including lens25 carried byplate26 and aimingapertures43. Further details of an exemplary 1D imaging module are described in U.S. Pat. No. 6,119,939, entitled “Optical Assembly For Bar Code Scanner” incorporated herein by reference. In an image sensor array based 1D imaging module e.g. module10-2 illumination and aiming light sources are normally provided by the same light sources which project a single illumination pattern which also serves as an aiming pattern. However, a 1D imaging module can also include light sources which project different illumination and aiming patterns. An imaging module of the invention can also comprise a laser diode based 1D imaging engine including a single photodetector, a laser diode and means for sweeping the laser beam projected by the laser diode across a target area.
• Referring now to reader[0028]5-9 of FIG. 1m,center module10cof reader5-9 is a 1D imaging module while laterally disposedmodules10aand10bare 2D modules. Configuring reader5-9 so that reader5-9 includes a center1D imaging module10c,10-2 and laterally disposed 2D imaging modules10-1 provides certain advantages. Reader5-9 can be programmed in accordance with a decode operation control program wherein a reader (1) first captures and subjects to decoding an image captured via actuation offirst imaging module10c, and if the decoding attempt fails, (2) automatically captures and subjects to decoding a second image captured via actuation of an image sensor and illumination of one of laterally disposed2D modules10aand10b.
• One-dimensional bar code symbols are more common than 2D bar code symbols. Further, 1D bar code symbols are generally decoded more quickly and more accurately by capturing and processing 1D slice image data captured via actuation of a 1D image sensor than capturing and[0029]processing 2D image data captured via actuation of a 2D image sensor. Still further, animaging axis 11c ofcenter imaging module10cdisposed in a gun-style housing7 can more readily be aligned with an indicia of a target, T, thanlateral imaging modules10aand10b. Accordingly, it can be seen that reader5-9 programmed in accordance with the above-described decode program is a reader which is both mechanically configured and programmed for optimization of the decoding of 1D symbols, while still having the capacity to decodematrix 2D symbols wherematrix 2D symbols are present within a target, T.
• Various[0030]electrical circuits100,101,102,103,104, and105 which can be utilized to control optical readers are shown and described with reference to FIGS. 2a,2b,2c,2d,2e, and2f. While the present invention relates in a major aspect to optical readers having more than one imaging module, FIGS. 2aand2bshow electrical circuits for operating optical readers having a single imaging module. Numerous principles of circuit operation discussed in relation tocircuits100,101 are incorporated into multiple imaging moduleelectrical circuits102,103,104,105 discussed in relation to FIGS. 2c-2f.
• In FIG. 2[0031]aa block diagram of an optical reader electrical circuit is shown having a multi-functionalprocessor IC chip180 including an integrated frame grabber block148.Electrical circuit100 shown in FIG. 2acan be utilized for control of a single 2D imaging module optical reader as is shown for example in U.S. Ser. No. 09/954,081 filed Sep. 17, 2001, entitled “Optical Reader Having Image Parsing Mode,” incorporated herein by reference.
• In the specific embodiment of FIG. 2[0032]a,electrical circuit100 includes acontrol circuit140 comprisingCPU141, system RAM142 and system ROM143 and frame grabber block148.Electrical circuit100 further includes animage sensor32 typically provided by a photosensitive array and anillumination block160 havingillumination LEDs16 and aimingLEDs18 as shown in the physical form view of FIGS. 3a-3c.Image sensor32 of FIG. 2ais shown as being provided by a 2D photo diode array. Ifimage sensor32 is replaced by a 1D image sensor, then aimingLEDs18 andillumination LEDs16 may be constituted by one set of LEDs. In the embodiment shown,image sensor32 incorporated in an imagesensor IC chip182 which typically further includes an image sensorelectrical circuit block134. Image sensorelectrical block134 includescontrol circuit135 for controllingimage sensor32, an A/D conversion circuit136, for converting analog signals received fromimage sensor32 into digital form andintegrated clock137 sometimes referred to as an oscillator.
• In the embodiment shown in FIG. 2[0033]a,CPU141 and frame grabber block148 are incorporated in amulti-functional IC chip180 which in addition to includingCPU141 includes numerous other integrated hardware components. Namely,multifunctional IC chip180 may include adisplay control block106, several general purpose I/O ports116, several interface blocks such as aUSB circuit block107 and aUART block108 for facilitating RS 232 communications, aUART block109 for facilitating Irda communications, and a pulse width modulation (PWM)output block110. Multi-functionalprocessor IC chip180 can also have other interfaces such as aPCMCIA interface111, acompact flash interface112, and amultimedia interface113. If reader5 includes adisplay13d, display13dmay be in communication withchip180 viadisplay interface106.Trigger13tandkeypad13kmay be in communication withchip180 via general purpose I/O interface116. Physical form views of readers having displays and keyboards are shown for example in U.S. application Ser. No. 10/137,484, filed May 2, 2002, entitled “Optical Reader Comprising Keyboard,” incorporated herein by reference. Multi-functionalprocessor IC chip180 may be one of an available type of multifunctional IC processor chips which are presently available such as a Dragonball IC processor chip available from Motorola, an Anaconda IC processor chip available from Motorola, a DSC IC chip of the type available from Texas Instruments, an O-Map IC chip also of the type available from Texas Instruments or a multifunctional IC processor chip of a variety available from Clarity, Inc.
• Frame grabber block[0034]148 ofIC chip180 replaces the function of a frame grabbing field programmable gate array (FPGA) as discussed in commonly assigned application Ser. No. 09/954,081, filed Sep. 17, 2001, entitled “Imaging Device Having Indicia-Controlled Image Parsing Mode,” incorporated herein by reference and Ser. No. 09/904,697, filed Jul. 13, 2001, entitled “An Optical Reader Having a Color Imager” incorporated herein by reference. More particularly, frame grabber block148 is specifically adapted collection of hardware elements programmed to carry out, at video rates or higher, the process of receiving digitized image data fromimage sensor chip182 and writing digitized image data to system RAM142 which in the embodiment shown is provided on a discreet IC chip. Frame grabber block148 includes hardware elements preconfigured to facilitate image frame capture. Frame grabber block148 can be programmed by a user to capture images according to a user's system design requirements. Programming options for programming frame grabber block148 include options enabling block148 to be customized to facilitate frame capture that varies in accordance with image sensor characteristics such as image sensor resolution, clockout rating, and fabrication technology (e.g. CCD, CMOS, CID), dimension (1D or 2D) and color (monochrome or color).
• Aspects of the operation of[0035]circuit100 whencircuit100 captures image data intoRAM140 are now described. Whentrigger13tis pulled,CPU141, under the operation of a program stored in system ROM143, writes an image capture enable signal to imagesensor chip182 viacommunication line151.Line151, like the remainder of communication lines described herein represents one or more physical communication lines. In the embodiment shown, whereinimage sensor chip182 is of a type available from IC Media Corp., I²C interface115 ofchip180 is utilized to facilitate communication with chip182 (if another image sensor chip is selected another type ofinterface e.g. interface116 may be utilized). Other types of signals may be sent overline151 during the course of image capture.Line151 may carry, for example, timing initialization, gain setting and exposure setting signals.
• When control block[0036]135 ofimage sensor chip182 receives an image capture enable instruction,control block135 sends various signals to frame grabber block148. Imagesensor control block135 typically sends various types of synchronization signals to frame grabber block148 during the course of capturing frames of image data. In particular, control block135 may send to frame grabber block148 “start of frame signals” which inform frame grabber block148 thatchip182 is ready to transmit a new frame of image data, “data valid window” signals which indicate periods in which a row of image data is valid and “data acquisition clock” signals as established byclock137 controlling the timing of image data capture operations. In the embodiment described,line152 represents three physical communication lines, each carrying one of the above types of signals. In an alternative embodiment, vertical and horizontal synchronization signals are processed by frame grabber148 to internally generate a data valid window signal. Frame grabber block148 appropriately responds to the respective synchronization signals, by establishing buffer memory locations withinintegrated RAM149 of block148 for temporary storage of the image data received fromimage sensor chip182 overdata line159. At any time during the capture of a frame of image data into system RAM142,buffer RAM149 of frame grabber block148 may store a partial (e.g about 0.1 to 0.8) or a full line of image data.
• Referring to further aspects of[0037]electrical circuit100,circuit100 includes asystem bus150.Bus150 may be in communication withCPU141 via a memory interface such asEIM interface117 ofIC chip180. System RAM142 and system ROM143 are also connected tobus150 and in communication withCPU141 viabus150. In the embodiment shown, RAM142 and ROM143 are provided by discreet IC chips. System RAM142 and system ROM143 could also be incorporated intoprocessor chip180.
• In addition to having system RAM[0038]142, sometimes referred to as “working” RAM,electrical circuit100 may include one or more long term storage devices.Electrical circuit100 can include for example a “flash”memory device120. Several standardized formats are available for such flash memory devices including: “Multimedia” (MMC), “Smart Media,” “Compact Flash,” and “Memory Stick.” Flash memory devices are conveniently available in card structures which can be interfaced toCPU141 via an appropriate “slot” electromechanical interface in communication withIC chip180. Flash memory devices are particularly useful when reader5 must archive numerous frames of image data.Electrical circuit100 can also include other types of long term storage such as a hard drive which may be interfaced tobus150 or to an appropriate I/O interface ofprocessor IC chip180.
• In a further aspect of[0039]electrical circuit100,control circuit140 is configured to control the turning off and turning on ofLEDs16,18 ofillumination block160.Control circuit140 preferably controlsillumination block160 in a manner that is coordinated with the capturing of the frames of image data.Illumination LEDs16 are typically on during at least a portion of frame capture periods. Configuringcircuit140 so thatLEDs16,18 have off periods significantly reduces the power consumption ofcircuit100.
• In a further aspect of the[0040]electrical circuit100,electrical circuit100 can be configured so thatPWM output interface114 ofIC chip180 controls illumination LEDs of an imaging module such asillumination LEDs16 of module10-1 or aiming/illumination LEDs18 of module10-2.
• In one embodiment,[0041]illumination block160 is in communication withPWM output interface114 and configured in such manner thatLEDs16 are turned on at a leading edge of PWM pulses output atPWM interface114, and are turned off at falling edges of PWM pulses output atPWM interface114.PWM interface114 should be configured so that several pulses are generated and sent overcommunication line153iduring the time that a single row of pixels of image data are exposed to light prior to clocking out of pixel values corresponding to that row. Thus,illumination LEDs16 would be turned on and off several times during the exposure period for exposing a row of pixels to light. Further, the number of pulses output byPWM output114 during the time that a single row of pixels are exposed should not vary substantially from row to row. The pixel clock signal received at frame grabber block148 ofIC chip180 can be utilized to generate the PWM output. It can be seen, therefore, thatmultifunctional IC chip180 including frame grabber block148 andPWM output114 greatly simplifies the task of developing PWM signals for use in controllingillumination LEDs16 ofmodule10.
• In another embodiment,[0042]PWM output114 andillumination block160 are configured so thatPWM output114 controls the intensity of illumination, not the on time/off time of illumination.Illumination LED block160 in such an embodiment can include a power supply circuit which is interfaced toPWM output114 such that the PWM signal output atPWM output114 varies the voltage or current supplied toLEDs16.
• In a further aspect of[0043]electrical circuit100, aimingLEDs18 ofcircuit100 can be controlled by a signal transmitted by a general purpose I/O port116 ofIC chip180 overcommunication line153a. Multifunctionalprocessor IC chip180 can be programmed so that an aimingLED control signal168, as is shown in the timing diagram of FIG. 2g, is caused to change to an “on” state when frame grabber block148 completes the process of capturing a complete frame of image data. In the time line of FIG. 2g, frame exposure periods P1, P2, and P3 are plotted against an aimingLED control signal168. Frame grabber block148 may be configured to generate an “end of acquisition” or “end of frame” signal when frame grabber block148 completes the process of capturing a complete frame of image data into RAM142. WhenCPU141 receives an “end of acquisition” signal,CPU141 controls I/O port116 to change the state ofLED control signal168.Control circuit140 may also change the state ofLED control signal168 when generating a start of frame signal. As indicated by the time line of FIG. 2g,control circuit140 may execute a delay prior to changing the state ofsignal168.Control circuit140 is programmed so thatLED control signal168 remains in an “ON” state known to be sufficiently short duration so as not to cause actuation of an aimingLED18 during a succeeding frame exposure period. Configured in the manner described, aimingLEDs18 are selectively pulsed on for a short duration during intermediate successive frame exposure periods, e.g. frame exposure periods P1 and P2.
• Referring now to FIG. 2[0044]b,electrical circuit101 is described.Electrical circuit101 controls operation of a single imaging module optical reader comprising a low cost 1DCCD image sensor32 incorporated onIC chip183.Image sensor32 of FIG. 2bmay be provided for example by a Toshiba Model TCD 1304 AP linear image sensor. Further aspects of an exemplary 1D imaging module are described, for example, in application Ser. No. 09/658,811, filed Sep. 11, 2000, entitled “Optical Assembly for Barcode Scanner,” incorporated herein by reference.
• Referring to aspects of[0045]electrical circuit101 in detail,electrical circuit101 includes acontrol circuit140 which, likecontrol circuit140 ofcircuit100 is partially incorporated in a multifunctionalprocessor IC chip180 includingCPU141 and a frame grabber block148.Control circuit140 ofcircuit101 further includes system RAM142 system ROM143 and supplementary central processor unit (CPU)147, integrated onprocessor IC chip179. System RAM142 and system RAM143 are in communication withEIM interface117 ofIC chip180 viabus150.
• [0046]Processor IC chip179 provides control and timing operations similar to that provided byelectrical block134 ofimage sensor chip182 described in FIG. 1a.Processor IC chip179, in general, sends synchronization signals and digital clocking signals toIC chip180, and sends digital clocking signals to A/D conversion circuit136 andimage sensor32.Processor IC chip179 ofcircuit101 may be a relatively low power processor IC chip such as an 8 BIT Cyprus PSOC CY8C26Z33-24PZI Microcontroller processor IC chip.
• Aspects of the operation of[0047]IC chip179 in during the course of capturing slice image data will now be described in detail. Whentrigger13tis pulled,CPU141 transmits enable image capture instructions overcommunication line151. In response to receipt of an image capture enable instructions received fromchip180,processor IC chip179 performs a variety of operations. Viacommunication line152,processor IC chip179 may send synchronization signals, such as “start of scan,” “data valid window,” and “data acquisition clock” signals to frame grabber block148.Processor IC chip179 may also send timing signals and digital clocking signals (e.g. master clock, integration clear gate, and shift gate pulse) toimage sensor32.Processor IC chip179 typically also transmits a master clock signal to A/D conversion circuit136. Referring to further aspects ofIC chip180 ofcircuit101,CPU141 ofchip180, may also send e.g. gain setting, exposure setting, and timing initialization signals vialine151 toIC chip179. Communication betweenIC chip180 andIC chip179 may be made via an SPI interface or I/O interface116 ofchip180 andchip179.
• As will be explained with reference to[0048]circuit104, shown in FIG. 2e,processor IC chip179 may be replaced by a programmable logic circuit, e.g. a PLD, CPLD, or an FPGA.IC chip179 could also be replaced by an ASIC.Electrical circuit101 of FIG. 2b, includes what may be termed a “digital digitizer” in that analog voltage levels transmitted byCCD image sensor32 online155 are converted into gray scale pixel values by A/D converter136 and transmitted vialine159 to frame grabber block148.Circuit101 could also include an analog digitizer which processes an analog signal generated byimage sensor32 to generate a two-state output signal that changes state in accordance with light-to-dark and dark-do-light transitions of the image sensor analog output signal.
• [0049]Processor IC chip179 also controlsLED bank160.LED bank160 of a 1D image sensor reader typically includes a single bank of LEDs which simultaneously illuminates a target area and provides an aiming pattern facilitating aligning of the reader with a target indicia.LEDs18 of 1D imaging module10-2 likeLEDs16 of module10-1 can be pulsed so as to reduce energy consumption byLEDs18.
• [0050]Electrical circuit100 andelectrical circuit101 form a family of 1D and 2D optical readers electrical circuits, which may be manufactured by a single manufacturing entity wherein both of the 1D and 2D readers include the same main processor chip, namely, multifunctionalprocessor IC chip180. Multifunctionalprocessor IC chip180 ofcircuit100 andcircuit101 can both be provided by e.g. a Dragonball IC chip or an Anaconda IC chip of the type available from Motorola, Inc. Multifunctionalprocessor IC chip180 ofelectrical circuit101 includes far more processing power than is necessary to provide the functionality of a 1D optical reader. Nevertheless, the inventors discovered that the overall cost ofelectrical circuit101 would be reduced by incorporating frame grabbingmultifunctional IC chip180 incircuit101 in that such incorporation reduces overall engineering cost relative to that which would ensue from the development of two different 1D and 2D electrical circuits comprising two different main processor types.
• Various electrical circuit architectures for operating a reader having more than one[0051]imaging module10 are shown in FIGS. 2c-2f.
• In the architecture of FIG. 2[0052]c,electrical circuit102 includes a pair ofimaging modules10 and acontrol circuit140.Control circuit140 includes a field programmable gate array (FPGA)161, a multifunctionalprocessor IC Chip180 including aCPU141 and frame grabber block148, a system RAM142 and a system ROM143.Processor IC chip180 may be, for example, a Dragonball or Anaconda processor chip of the type available from Motorola, Inc.Imaging modules10aand10bshown in block form in FIG. 2ccorrespond to the physical 2D imaging module10-1 shown in FIGS. 3a-3c. System RAM142 and system ROM143 are in communication withprocessor IC Chip180 viasystem bus150. In general,FPGA161 ofcircuit102 is programmed to execute a multiplexer function indicated byblock155. In response to module select signals received from multifunctionalprocessor IC chip180,multiplexer155 receives image data over one ofdata lines159a,159bfrom a selected one ofmodule10aandmodule10band sends the data to frame grabber block148 ofprocessor IC chip180.Multiplexer155 can be deleted ifimaging modules10 are selected to include image sensor IC chips which generate high impedance (tri-statable) synchronization signals when not actuated.FPGA161, like all other FPGAs described herein could be replaced by another programmable circuit such as a programmable logic device (PLD), or a complex programmable logic device (CPLD) or another device such as an ASIC or processor chip (e.g. such aschip179 or chip180).
• Referring to the operation of[0053]electrical circuit102 in further detail,processor IC chip180 sends an image capture enable signal to FPGA161 vialine170 whentrigger13tis actuated and to an appropriate one ofmodules10aand10bvia one oflines151a,151b. The selected module,10aor10b, then sends synchronization signals, and the digital clocking signals as described previously to FPGA161 andIC chip180, over the appropriate one oflines152a,152b.
• [0054]FPGA161 transmits image data to multifunctionalprocessor IC Chip180 overdata line171 which in turn transmits image data to RAM142 oversystem bus150.Lines151a,151bmay carry PWM interface illumination control signals as described previously in connection withelectrical circuit100.
• In the architecture of FIG. 2[0055]d,electrical circuit103 includes a plurality ofN imaging modules10, which may be incorporated in asingle housing7.Electrical circuit103 includes acontrol circuit140 having anFPGA162, aprocessor IC Chip179, a system RAM142 and a system ROM143.FPGA162 is in communication withprocessor IC Chip179 viasystem bus150.Processor IC chip179 andFPGA162 are also in communication via busarbitration communication line167 which carries bus hand shaking (e.g. bus request, bus grant) signals.
• Various embodiments of[0056]FPGA162 are described with reference to FIGS. 2hand2i. In the embodiment of FIG. 2h,FPGA162cis programmed to includemultiplexer block162m, control register162c, and a solitary frame grabber block162f. Image capture enable signals for actuating image capture via one of modules e.g.10aare received atcontrol register162 in response to an actuation oftrigger13t.Control register162con receipt of an image capture enable signal sends the image capture enable signal to the selected onemodule10 and utilizes the signal to associate frame grabber block162fto the selected module e.g.10a. It will be understood that control register162ccan be adapted to send during one type of frame capture method, e.g. illumination actuation signals to a second imaging module,10cwhile actuating animage sensor32 of a first module, e.g.10awithout sending illumination actuation signals tofirst module10a.
• In the embodiment of[0057]FPGA162 illustrated in FIG. 2i,multiplexer block162mis deleted.FPGA162 of FIG. 2iincludes N frame grabber blocks162f. With use ofFPGA162 configured as shown in FIG. 2i,electrical circuit103 can be operated to capture several frames of image data contemporaneously by contemporaneous actuation of each of several imaging modules e.g.10aand10c.
• Referring to further aspects of[0058]electrical circuit103, of FIG. 2dprocessor IC chip179 can be provided by general purpose processor IC chip such as a Power PC IC chip of the type available from Motorola. Other suitable IC chips for providing the function ofIC chip179 ofcircuit103 include, for example, an Intel SA1110 chip and an Xscale family of processor IC chips, also available from Intel.
• Referring now to FIG. 2[0059]e,electrical circuit104 controls a pair of imaging modules wherein a first imaging module10-1 is a 2D imaging module and a second imaging module10-2 is a 1D imaging module.Control circuit140 includesCPU141, 2D frame grabber block148,FPGA164, system RAM142 and system ROM143. Frame grabber block148 andCPU141 are both incorporated on multifunctional processor IC chip180 (e.g. a Motorola Dragonball IC chip), as described previously in connection with FIG. 2a. A main program executed byCPU141 of multifunctionalprocessor IC chip180 controls operation of both first imaging module10-1 and second imaging module10-2.
• For capture of a 2D image,[0060]processor IC chip180 in response to actuation oftrigger13tsends an image capture enable signal to module10-1 via acommunication line151. During image capture, 2D imaging module10-1 sends synchronization and digital clocking signals to frame grabber block148 viacommunication line152 which as explained previously and like all lines represented herein may represent a plurality of physical lines. Further, 2D imaging module10-1 sends digitized image data to frame grabber block148 viadata line159a.Processor IC chip180 stores image data in RAM142 by writing image data stored in buffer memory locations of frame grabber block148 to RAM142 viasystem bus150. An illumination control signal communication line is also typically interposed betweenIC chip180 and module10-1. An illumination signal communication line can be considered to be represent byline151.
• For capture of a 1D “slice” image representation,[0061]processor IC chip180 sends a 1D image capture enable signal to FPGA164 viasystem bus150.Processor IC chip180 andFPGA164 are further in communication viacommunication line167 which carries bus handshaking (e.g. bus request and bus grant) signals. On receipt of an image capture enable signal fromprocessor IC chip180,FPGA164 sends digital clocking signals to A/D converter136 vialine156, to imagesensor32 vialine154, and illumination control signals toillumination LEDs18 as shown in the physical form view of FIG. 3evialine153.Image sensor32 sends analog image signals to A/D converter136 viaoutput line155 and A/D converter136 in turn converts the signals into N (typically 8) bit grey scale pixel values. A/D converter136 sends the digitized image data to FPGA164 which stores the image data to RAM142.
• As indicated by the block diagram of FIG. 2[0062]j,FPGA164 ofelectrical circuit104 includes frame grabber block164ffor fast transfer of image data into system RAM142, image sensor illumination and control block164cfor controllingLEDs18 and for developing synchronization signals, andclock164kfor generating digital clocking pulses.
• Another electrical circuit for controlling a plurality of imaging modules is described with reference to FIG. 2[0063]f.Electrical circuit105 includes a pair of frame grabbing FPGAs165,166. First FPGA165 is dedicated for frame capture of image data generated byfirst imaging module10awhile second frame grabbing FPGA166 is dedicated for capture of image data generated bysecond imaging module10b. The architecture of FIG. 2fis especially well suited for contemporaneous capture of multiple frames of image data via contemporaneous actuation of image sensors of twoseparate imaging modules10aand10b.
• [0064]Control circuit140 ofelectrical circuit105 includesCPU141 which may be incorporated on ageneral purpose32 bitprocessor IC chip179, frame grabbing FPGAs165 and166, system RAM142 and system ROM143.Processor IC chip179 may transmit image capture enable instruction viacommunication lines151aand151b.Processor IC chip179 may also send illumination control signals vialines151aand151b. For example, in a mode of operation that will be described herein processor IC chip may send an image capture enable signal tomodule10aoverline151a(and an illumination disabling signal overline151a), and an illumination control signal tomodule10boverline151bwith use of a specific image capture method wherein images are captured in such a manner so as to be substantially impervious to specular reflection decode failures.
• In a further aspect of[0065]electrical circuit105,imaging modules10aand10bsend synchronization and digital clocking signals to FPGAs165 and166 respectively, vialines152aand152b, and image data to FPGAs165 and166 respectively over,data lines159aand159b.Processor IC chip179 is in communication with frame grabbing FPGAs165 and166 viasystem bus150 and via busarbitration communication lines167aand167bover which bus handshaking signals (e.g. bus request, bus grant) are sent.
• While the invention in a major aspect relates to optical readers having multiple imaging modules, another commercial optical product according to another aspect of the invention is described with reference to FIGS. 5[0066]a-5e.
• In FIG. 5[0067]aan optical reader is shown having anelectrical circuit100 as described in FIGS. 2awherein animaging module10 is incorporated on acompact flash card510.Compact flash card510 carryingcircuit100 as will be explained herein may be interfaced with a host processor assembly such as a personal data assistant (PDA)540 or a personal computer (PC)550.
• As best seen in FIGS. 5[0068]cor5d,PDA540 can include acompact flash slot544 for receiving acompact flash card510, which incorporates animaging module10.
• Various features of[0069]compact flash card510 incorporatingmodule10 are described with reference to FIG. 5a. As seen in FIG. 5a,electrical circuit100 including multifunctional frame grabbingIC chip180, system RAM142, and system ROM143 are incorporated oncompact flash card510 which further carriesimaging module10.Imaging module10 may be a 2D imaging module as described with reference to FIG. 3a-3c, or a 1D module, e.g. as described with reference FIG. 3e.Card510 typically further comprises a protective cover (not shown).
• [0070]Compact flash card510 includingelectrical circuit100 as indicated by block diagram FIG. 5b, is interfaced to ahost processor system68. As will be explained further herein,host processor system68 can be included in e.g. a personal data assistant (PDA)540 as shown in FIG. 5bor a personal computer (PC)550 as shown in FIG. 5e.
• Referring to further aspects of the block diagram of FIG. 5[0071]b,circuit515 includesFPGA520 which facilitates communication betweenelectrical circuit100 andhost system68. A physical form view ofFPGA520 is shown in physical form diagram of FIG. 5a.FPGA520 may be programmed to perform a variety of functions.FPGA520 may be programmed to (1) communicate withhost68 to informhost68 thatcompact flash card510 is connected to host68 when it is first connected, (2) to perform all compact flash bus timing, and (3) to provide all buffer interfaces required to receive fromcircuit100 data in a form supported byelectrical circuit100 and to allow that data to be received in a compact flash format as is required byhost68.
• [0072]FPGA520 can be connected via acommunication line504 toUART interface108 of multifunctionalprocessor IC chip180.UART interface108 may transmit data in e.g. an RS232 format whileFPGA520, appropriately programmed, converts that data into a compact flash format. Further connected to FPGA520 vialine526 is a compact flashfemale connector530, which is formed on an edge ofcompact flash card510, and comprises a plurality ofsockets530sas indicated in the exploded section view of FIG. 5a.
• [0073]Compact flash card510 including anelectrical circuit100 havingimaging module10 can operate in a first integrated mode or a second “free-standing” which in one specific embodiment can be considered a “tethered” mode. An integrated mode of operation ofcard510 is described with reference to FIGS. 5cand5d. In an integrated mode,card510 is integrated into a device such as aPDA540. To electrically and mechanically connectcard510 to a host, devicefemale end530 is connected to male endcompact flash connector531, comprising a plurality of pins, within a housing of the host device.
• A free-standing mode of operation is illustrated with reference to FIG. 5[0074]e. In a free-standing mode of operation,compact flash card510 includingmodule10 is positioned in a position spaced apart from a hostdevice e.g. device550.Compact flash card510 may rest on a table top or else may be mounted to a fixed member spaced apart from the hostdevice e.g. PC550. In a free-standing mode,card510 may be connected to a host device via aflexible cable connector560. Whencard510 is connected to a host assembly via a flexible connector,card510 may be considered to be operating in a “tethered” mode.Card510 may also be wirelessly connected to a host via e.g. a RF link. In the embodiment of FIG.5ecable connector560 is interfaced tohost device550 on one end and tocompact flash card510 on another end.Cable connector560 includes malecompact flash connector531 for facilitating communication betweenconnector560 andcard510.Card510 can further includefeet565 of height substantially the same asconnector531 disposed on an under surface therof so thatcard510 can rest substantially horizontally on a table surface when operating in a free-standing mode.Host device550 in the free-standing mode diagram illustrated by FIG. 5eis shown as a PC. It will be understood that a host device in a free-standing mode could also be provided byPDA540 or another mobile or non-mobile computer device.
• The multiple-module[0075]electrical circuits102,103,104, and105 described herein can be implemented for operation of imaging modules spread out over several housings or for operation of imaging modules incorporated in ahousing7 of multiple imaging module reader5-1,5-2,5-3,5-4,5-5,56, and5-7,5-8 and5-9 as shown inphysical form views1a-1m.
• Methods for operating a multiple imaging module optical reader according to the invention will now be described in greater detail. Flow diagrams of FIGS. 4[0076]a-4cillustrate operation of a multiple imaging module optical reader having at least twoimaging modules10a,10b.
• In the reader methods described herein “actuation of an image sensor” generally refers to at least one step in the process of sending appropriate signals to an[0077]image sensor32 to cause exposure of image sensor pixels image sensor to light and to cause clocking out of electrical signals corresponding to light received at pixels of the array. These steps are described in greater detail in for example, U.S. application Ser. No. 09/766,922, filed Jan. 22, 2001, entitled “Optical Reader Having Reduced Parameter Determination Delay,” incorporated herein by reference. “Actuation of illumination” herein generally refers to the step of sending electrical current to a light source e.g.16,18 to turn on the light source.
• Referring to the reader operating method of FIG. 4[0078]a, atblock404 after atrigger13tis pulled (block402)control circuit140 actuatesimage sensor32 offirst imaging module10aandillumination light sources16 offirst imaging module10aduring a frame capture period in which a first frame of image data is captured. Atblock406control circuit406 subjects the first captured frame of image data to a decode attempt. If the decode attempt is not successful (block408),control circuit140 executes block410 to capture a second frame of image data.Control circuit140 actuatesimage sensor32 andillumination light sources16 ofsecond imaging module10bwhen capturing a second frame of image data. Instead of capturing a second frame of image subsequent to subjecting a first frame to a decode attempt (406)control circuit140 can capture a second frame as described in connection withblock410 prior to the decode attempt ofblock406.Control circuit140 can capture a first frame as described in connection withblock404 and a second frame as described in connection withblock410 in any order and can capture the frames contemporaneously. Atblock412control circuit140 subjects the indicia representation of the second frame to a decode attempt, and atblock410 outputs a decoded out data message if decoding is successful (block414). The attempt to decode a decodable indicia may be in accordance with a method for decoding decodable indicia such as are described in U.S. Ser. No. 09/904,697, filed Jul. 13, 2001, entitled “Applying a Color Imager To A Hand Held Reader For Indicia Reading Image Capture,” incorporated by reference. The reader control method described with reference to the flow diagram of FIG. 4ais highly useful wherein specular reflection decode failures can be expected. Referring to the example of two module reader51 shown in FIGS. 1aand1bnote that if there may be a specular reflection decode failure when a first frame corresponding to a mirrored planar surface is captured via actuation offirst module10athen there likely will not be a specular reflection decode failure when a second frame captured via actuation ofsecond module10bis subjected to decoding.
• A “wait for trigger pull” control loop, as described in connection with[0079]block402, FIG. 4a, block420, FIG. 4b, block444, FIG. 4cwill now be described in greater detail. When atrigger13tof reader5 is actuated,control circuit140 generates a trigger signal to cause branching of program control as described in FIGS. 4a,4b, and4c. According to the invention, a trigger signal can also be generated automatically in response to a decodable indicia being presented in a field of view of a module of reader5. A method of automatically generating what can be considered a trigger signal based on detected edge transitions without a physical trigger pull is described in copending application Ser. No. 09/432,282, filed Nov. 2, 1999, entitled “Indicia Sensor System for Optical Reader,” incorporated by reference. It will be understood that any of the control loops indicated byblocks402,420, and440 can be substituted for by a control loop whereincontrol circuit140 waits for trigger signal automatically generated when adecodable indicia15 moved into a filed of view of a module of reader5.
• In one possible variation of the invention, first and[0080]second imaging modules10a,10b, and possibly all N modules of an N imaging module optical reader are configured so that each module has a different best focus distance. For example,module10cof reader5-2 can be configured to a best focus distance of about 3 inches,module10acan be configured to have a best focus distance of about 6 inches, whilemodule10bcan be configured to have a best focus distance of about 9 inches. It will be seen that configuring a reader of the invention so that each of the modules has a different best focus distance increases the overall depth of field of the reader.
• A multiple module reader of the invention wherein each module has a different best focus distance can be operated in accordance with the flow diagram of FIG. 4[0081]ato the end that the reader automatically reads target indicia disposed at a wide range of reader-to-target distance. If an object being read is disposed at a distance closer to the best focus distance of a second module but a substantial distance from a best focus distance of a first module, the reader operating in accordance with the flow diagram of FIG. 4amay successfully decode the indicia at block412 (second frame decode attempt) after failing to decode the indicia at block406 (first frame decode attempt).
• While[0082]block404 of the flow diagram of FIG. 4aand other operating blocks herein refers to capturing a “first” frame of image data, it will be understood that a “first” captured frame as referred to herein is not necessarily the initial frame captured by a reader subsequent to actuation oftrigger13t. For example, as explained in application Ser. No. 09/766,922, filed Jan. 22, 2001, entitled “Optical Reader Having Reduced Parameter Determination Delay,” and incorporated herein by reference, optical readers commonly process one or more “test” frames of image data to establish exposure levels and other operating parameters.
• Another method for operating a multiple imaging module optical reader is described with reference to the flow diagram of FIG. 4[0083]b. Aftertrigger13tis pulled atblock420control circuit140 captures a first frame of image data atblock422.Control circuit140 captures a first frame image data via actuation of animage sensor32 offirst module10aandillumination light source16 offirst imaging module10a. That is,image sensor32 offirst module10ais actuated to generate image signals while a target is illuminated byillumination light sources16 offirst imaging module10a. Atblock424control circuit140 subjects the first frame of capture image data to a decoding attempt. If decoding is not successful (block426), then controlcircuit140 automatically proceeds to block428 to capture a second frame of image data.Control circuit140 can also capture a second frame of image data as described in connection withblock428 prior to subjecting a first frame of image data to a decode attempt (block424).Control circuit140 can capture a first frame as described in connection withblock422, a second frame as described inblock428, and a third frame (block434) in any order.Control circuit140 can capture first, second, and third frames of image data (blocks422,428 and434) contemporaneously. Whencontrol circuit140 captures a second frame of image data atblock428control circuit140 once again actuatesimage sensor32 offirst imaging module10aas in the step ofblock422. However, when capturing a second frame of image data via actuation of first image sensor,control circuit140 actuatesillumination light sources16 ofsecond imaging module10bwithout actuatingillumination sources16 offirst imaging module10a. Becauseimage sensor32 offirst module10aandillumination sources16 ofsecond module10bare substantially spaced apart, the frame of image data captured atblock428 is substantially impervious to specular reflection read failures. The operating method described with reference to FIG. 4bcan be utilized with any use of readers5-1,5-2,5-3,5-4,5-5,5-6,5-7,5-8, and5-9. As indicated by block434 a reader having threeimaging modules10a,10b, and10ce.g. of reader5-2 can be further configured so that thecontrol circuit140 captures a third frame of image by actuation ofimage sensor32 of first module e.g.,10atogether with actuation of illumination light sources ofthird module10c.
• A still further method for operating an optical reader having a plurality of imaging modules is described with reference to the flow diagram of FIG. 4[0084]c. Referring to the flow diagram of FIG.4ccontrol circuit140 atblock446 captures first and second frames of image data. The first frame of image data captured atblock446 may be captured via actuation of image sensor and illumination light sources of first imaging module e.g.,module10aof reader503, FIG. 1e. The second frame of image data captured atblock446 may be captured via actuation ofimage sensor32 andillumination light sources16 of second imaging module loc. Referring to further aspects ofimage capture block446,control circuit140 may capture first and second frames atblock446 sequentially (the first frame is captured in its entirety and then the second frame is captured) or contemporaneously (the capture of the second frame begins before capture of the first frame is complete). Atblock448control circuit140 subjects the first captured frame to a decode attempt. If decoding fails,control circuit140 proceeds to block456 to combine the first captured frame captured by actuation of an image sensor of afirst module10awith a second captured frame of image data captured via actuation of asecond imaging module10cto generate a third image representation. Atblock458control circuit140 subjects the third image representation derived from the first and second frames to a decoding attempt. If decoding is successful,control circuit140 outputs the decoded out message atblock462.
• At several stages of the operating methods described herein, multiple imaging module reader[0085]5 executes the steps of attempting to decode decodable indicia and branching control of an operating program if the decoding attempt is not successful. In a further aspect of the invention, the step of attempting to decode in any one of the operating programs described with reference to FIGS. 4a,4b, and4ccan be substituted for or supplemented with the step of preliminarily evaluating image data to determine whether decoding will likely be successful. A step of preliminarily evaluating image data can eliminate the need to actually launch decoding processing to determine whether indicia representation(s) within a frame of image data can be decoded.
• The step of preliminarily evaluating image data to determine whether decoding will be successful can take on a variety of forms. In one example of the preliminary image data evaluating step, a preliminary image data evaluating step can include the step of examining gray scale values of a frame of image data to determine if the image data has become saturated. If a saturation condition (sometimes referred to as a “white out” condition) is present there is a substantial likelihood of specular reflection misread or other type of misread attributable to excessive illumination. A saturated condition can be considered to be present for example if a sum total of all gray scale values exceeds a predetermined value, or if an average gray scale value exceeds a predetermined threshold white level. All pixel values may be evaluated during the preliminary evaluation step. More typically, however, a sample of pixel values comprising less than all pixel values of a frame are evaluated to speed processing. The sampling of pixels may be predetermined and/or adaptive.[0086]
• The step of preliminarily evaluating image data to determine whether decoding will be successful can also include the step of estimating a module-to-target distance. If an estimated module-to-target distance exceeds a best focus distance by a threshold amount (which may be a predetermined threshold),[0087]control circuit140 may preliminarily determine that decoding will likely not be successful without actually subjecting image data of a frame to a decode attempt. A method for generating a signal that varies with module to target distance is described in commonly assigned U.S. Pat. No. 5,773,810, entitled “Method of Generating Real Time Degree of Focus Signal For Hand Held Imaging Device,” incorporated herein by reference.
• Referring to the operating method described with reference to FIG. 4[0088]cin further detail, a number of different methods may be utilized to execute block456 (combining the first and second frame of image data).
• In one method for combining a first frame and a second frame of image data, cross correlation image combination methods can be utilized. In a cross correlation image combination method statistical analyses are executed to compare two or more frames of image data and frames of image data are shifted relative to one another until correlation is optimized.[0089]
• In another method for combining first and second frames of image data, areas of overlap between two frames of image data e.g.[0090]610,614 are determined and then the image data contribution from one of the frames corresponding to the overlapping area is deleted or modified in a manner depending on the overlapping region image data of the other frame to generate athird image representation630. In the example of FIG. 4d, showing first, second, and third frames ofimage data610,612, and614, overlappingregions619 and621 are defined between the first andthird frames610 and614 and between the third andsecond frames614 and612. Overlapping regions ofimage data619,621 are regions e.g. of image data from two separate frames of image data that correspond to a common region of a target substrate, s.
• The area of overlap between frames of image data captured via actuation of the image sensors of neighboring imaging modules can be determined based on known characteristics of the neighboring[0091]imaging modules10 of reader5, such as the spacing between imaging modules of reader5 (e.g. modules10aand10cof reader5-3), power ofimaging optics40 of theparticular imaging module10, and the respective module-to-target distances of the neighboring modules. A distance of a module to a target can be estimated via analysis of captured image data, for example by a method for developing a degree of focus signal as is described in commonly assigned U.S. Pat. No. 5,773,810, entitled “Method For Generating Real Time Degree of Focus Signal For Hand Held Imaging Device,” incorporated herein by reference. It can be seen that the image frame diagram of FIG. 4dmay correspond to parallel-axis reader5-3 as shown in FIG. 1ehaving a plurality of imaging modules comprising parallel imaging axes while the image frame diagram of FIG. 4e(wherein frames652 and654 are distorted) may correspond to the diverging axis three module reader5-4 as shown in FIGS. 1gand1h.
• Referring to the frame diagram of FIG. 4[0092]ein further detail, overlappingregions659 and661 are defined betweenfirst frame652 andthird frame656 and betweenthird frame656 andsecond frame654. When combining two frames of image data in the example of FIG. 4e, it is particularly important to correct for skew errors (sometimes referred to as distortion errors) when combining frames of image data and when calculating regions of overlap between two frames of image data. In the example of FIG. 4e, skew errors can readily be corrected for by, in part, utilizing a skew correction factor determined from the known relative angles between two imaging axes of a multiple module readersuch axes11aand11cof reader5-4, and the spacing between modules of a multiple module reader such as reader5-4. Further skew correction of a frame of image data can be carried out in a manner described in copending application Ser. No. 09/954,081, filed Sep. 17, 2001, entitled “Imaging Device Having Indicia-Controlled Image Parsing Mode,” incorporated herein by reference. In that application, a method is described wherein graphical analysis and interpolation processing are employed to determine a distortion factor affecting a frame of image data, and further wherein the determined distortion factor is utilized to back out distortion from an image.
• Still further, graphical feature analysis can be utilized in combining frames of image data. If a common graphical feature (e.g. a straight line, a bulls eye, a circle, a character) is found in two frames of image data, the common graphical feature can be utilized to establish a common orientation, spacing, and skew basis between the frames of image data to be combined.[0093]
• While the present invention has been explained with reference to the structure disclosed herein, it is not confined to the details set forth and this invention is intended to cover any modifications and changes as may come within the scope of the following claims.[0094]

Claims (30)

What is claimed:

1. An optical reader comprising:

a housing defining at least one cavity;

a first imaging module mounted in said at least one cavity;

a second imaging module mounted in said at least one cavity;

wherein each of said first and second modules includes an image sensor, a support assembly, and at least one illumination LED;

a control circuit in communication with each of said first and second imaging modules;

wherein said control circuit is programmed, in response to receipt of a trigger signal, to:

(a) capture a first frame of image data via actuation of said at least one illumination LED and said image sensor of said first imaging module;

(b) determine whether said first frame of image data includes decodable indicia;

(c) automatically subject to a decode attempt a second frame of image data if said determination step (b) indicates that decodable indicia is not or is likely not represented in said first frame of image data, wherein said second frame of image data is captured via actuation of said at least one LED and said image sensor of said second imaging module.

2. The reader ofclaim 1, wherein said control circuit in determining whether decodable indicia is represented in said first frame of image data attempts to decode decodable indicia represented in said first frame of image data.

3. The reader ofclaim 1, wherein said control circuit140 captures said second frame of image data contemporaneously while capturing said first frame of image data.

4. The reader ofclaim 1, wherein said control circuit in determining whether decodable indicia is represented in said first frame of image data preliminarily evaluates image data of said first frame without attempting to decode decodable indicia represented therein.

5. The reader ofclaim 4, wherein said control circuit in preliminarily evaluating said image data evaluates said image data to determine whether a saturation condition is present.

6. The reader ofclaim 1, wherein said first imaging module is a 1D imaging module and wherein said second imaging module is a 2D imaging module.

7. The reader ofclaim 1, wherein said first and second imaging modules are configured to have first and second best focus distances, wherein said first best focus distance is at least 1 inch apart from said second best focus distance.

8. The reader ofclaim 1, wherein said trigger signal is an automatically generated trigger signal generated by decodable indicia being moved in a field of view of said reader.

9. The reader ofclaim 1, further comprising a trigger, wherein said trigger signal is generated when said trigger is pulled.

10. An optical reader comprising:

a housing defining at least one cavity;

a first imaging module mounted in said at least one cavity,

a second imaging module mounted in said at least one cavity;

wherein each of said first and second modules includes an image sensor, a support assembly, and at least one illumination LED;

a control circuit in communication with each of said first and second imaging modules;

wherein said control circuit is programmed, in response to receipt of a trigger signal to:

(a) capture a first frame of image data via actuation of said illumination LED and said image sensor of said first imaging module;

(b) determine whether said first frame of image data includes decodable indicia;

(c) automatically subject to a decode attempt a second frame of image data if said determination step (b) indicates that decodable indicia is not or is likely not represented in said first frame, wherein said second frame of image data is captured via actuation of said at least one LED of said second imaging module and said image sensor of said first imaging module, wherein no illumination LED of said first imaging module is actuated when said second frame of image data is captured.

11. The reader ofclaim 10, wherein said control circuit in determining whether decodable indicia is represented in said first frame of image data attempts to decode decodable indicia represented in said first frame of image data.

12. The reader ofclaim 10, wherein said control circuit captures said second frame of image data contemporaneously while capturing said first frame of image data.

13. The reader ofclaim 10, wherein said control circuit in determining whether decodable indicia is represented in said first frame of image data preliminarily evaluates image data of said first frame without attempting to decode decodable indicia represented therein.

14. The reader ofclaim 13, wherein said control circuit in preliminarily evaluating said image data evaluates said image data to determine whether a saturation condition is present.

15. The reader ofclaim 10, wherein said first imaging module is a 1D imaging module and wherein said second imaging module is a 2D imaging module.

16. The reader ofclaim 10, wherein said first and second imaging modules are configured to have first and second best focus distances, wherein said first best focus distance is at least 1 inch apart from said second best focus distance.

17. The reader ofclaim 10, wherein said trigger signal is an automatically generated trigger signal generated by decodable indicia being moved in a field of view of said reader.

18. The reader ofclaim 10, further comprising a trigger, wherein said trigger signal is generated when said trigger is pulled.

19. An optical reader comprising:

a housing defining a cavity;

a first imaging module mounted in said cavity;

a second imaging module mounted in said cavity;

wherein each of said first and second imaging modules includes an image sensor, a support assembly, and at least one illumination LED;

a control circuit in communication with each of said first and second imaging modules;

wherein said control circuit is programmed, in response to receipt of a trigger signal, to:

(a) capture a first and second frame of image data, wherein said first frame of image data is captured via actuation of said at least one LED and said image sensor of said first imaging module, and said second frame of image data is captured via actuation of said at least one LED and said image sensor of said second imaging module;

(b) determine whether said first and second frames include decodable indicia;

(c) automatically combine said first frame and said second frame to generate a third image representation if said determination step (b) indicates that decodable indicia is not or is likely not represented in said first and second frames of image data; and to

(d) subject said third image representation to a decode attempt.

20. The reader ofclaim 19, wherein said control circuit in determining whether decodable indicia is represented in said first and second frames of image data attempts to decode decodable indicia represented in said first and second frames of image data.

21. The reader ofclaim 19, wherein said control circuit captures said second frame of image data contemporaneously while capturing said first frame of image data.

22. The reader ofclaim 19, wherein said control circuit in determining whether decodable indicia is represented in said first and second frames of image data preliminarily evaluates image data of said first and second frames of image data without attempting to decode decodable indicia represented therein.

23. The reader ofclaim 22, wherein said control circuit in preliminarily evaluating said image data evaluates gray scale pixel values of said image data to determine whether a saturation condition is present.

24. The reader ofclaim 19, wherein said control circuit in combining said first and second frames of image data determines an area of overlap between said first and second frames of image data.

25. The reader ofclaim 19, wherein said control circuit in combining said first and second frames of image data generates a signal indicative of a module-to-target distance of at least one of said modules.

26. The reader ofclaim 19, wherein said control circuit in combining said first and second frames of image data combines said first and second frames in a manner dependent on an angle between imaging axes of said first and second imaging modules.

27. The reader ofclaim 19, wherein said control circuit in combining said first and second frames of image data identifies a common graphical element commonly represented in said first and second frames of image data.

28. The reader ofclaim 19, wherein said first and second imaging modules are configured to have first and second best focus distances, wherein said first best focus distance is at least 1 inch apart from said second best focus distance.

29. The reader ofclaim 19, wherein said trigger signal is an automatically generated trigger signal generated by decodable indicia being moved in a field of view of said reader.

30. The reader ofclaim 19, further comprising a trigger, wherein said trigger signal is generated when said trigger is pulled.

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