FIELD OF INVENTIONThis invention relates generally to semiconductor wafer manufacture, and more particularly to methods for providing an electrical contact from one surface of a silicon wafer to the opposite surface, more particularly to methods for filling a through-via in a silicon wafer with a conductive material.[0001]
BACKGROUND OF THE INVENTIONA method is needed to make the most direct electrical connection from an interconnect's contact tip to the substrate upon which the interconnect is mounted. Currently, electrical continuity from an interconnect contact tip to the mounting substrate is by use of thin film aluminized traces that are wire bonded to the substrate. However, inductance, capacitance, and resistance increase with trace length and can degrade the electrical performance of the interconnect. Additionally, wire bond loop height must be kept at very low profile above the interconnect chip to prevent the wire bonds from touching the device under test.[0002]
A more direct and robust electrical contact from the interconnect contact tip to the mounting substrate would be to form a via in the vicinity of the interconnect contact tip through the full thickness of the wafer to the underside of the wafer. However, due to the thickness of the wafer, and/or the high aspect ratio of the via, conventional plating of the sides of such a “through-via” with metal is not practical, requiring other means of filling the via. A hallmark of this invention is to provide a process for filling a through-via that is formed through the thickness of a wafer with a conductive material.[0003]
SUMMARY OF THE INVENTIONThe invention disclosed is a process for filling a through-via that is formed through the full thickness of a semiconductor wafer. In one embodiment, the process comprises the steps of: (i) providing a silicon wafer with at least one through-via formed through the thickness of the wafer; (ii) mounting the silicon wafer to a mounting substrate; (iii) positioning a solder jet nozzle in line with the through-via; and (iv) extruding a liquid conductive material through the solder jet nozzle such that the conductive material fills the through-via to form a conductive via.[0004]
In another embodiment, the process comprises the steps of: (i) providing a silicon wafer with at least one through-via; (ii) mounting the silicon wafer onto a surface of a mounting substrate, the mounting substrate surface having at least one cavity, wherein the silicon wafer is positioned with the through-via located in line with the cavity; (iii) positioning a solder jet nozzle in line with the through-via; and (iv) extruding a liquid conductive material through the solder jet nozzle such that the conductive material fills the through-via and the cavity in the mounting substrate to form a conductive via.[0005]
A further embodiment of the invention is a process comprising the steps of: (i) providing a silicon wafer with at least one through-via; (ii) mounting the silicon wafer onto a surface of a mounting substrate wherein the mounting substrate comprises a circuit substrate, the mounting substrate surface having at least one interconnect, wherein the silicon wafer is positioned such that the through-via is located in line with the interconnect; (iii) positioning a solder jet nozzle in line with the through-via; and (iv) extruding a liquid conductive material through the solder jet nozzle such that the conductive material fills the through-via in electrical contact with the interconnect.[0006]
Another embodiment of the invention is a process comprising the steps of: (i) providing a silicon wafer with at least one through-via; (ii) mounting the silicon wafer to a mounting substrate; (iii) providing a one or more conductive material balls; (iv) depositing the one or more conductive material balls in the through-via by means of a vacuum nozzle or tube, such that sufficient conductive material is deposited in the via to fill the via; and (v) reflowing the conductive material in the through-via to form a conductive via.[0007]
BRIEF DESCRIPTION OF THE DRAWINGSPreferred embodiments of the invention are described below with reference to the following accompanying drawings, which are for illustrative purposes only. Throughout the following views, reference numerals will be used in the drawings, and the same reference numerals will be used throughout the several views and in the description to indicate same or like parts.[0008]
FIG. 1 is a cross-section of a conventional silicon wafer having a through-via formed therethrough.[0009]
FIG. 2 is a cross-section of an assembly consisting of the silicon wafer of FIG. 1 mounted to a mounting substrate showing an optional cavity in the mounting substrate.[0010]
FIG. 3 shows the assembly of FIG. 2 at a processing step subsequent to that in FIG. 2.[0011]
FIG. 4 shows the wafer of FIG. 2 at a processing step subsequent to that shown in FIG. 3.[0012]
FIG. 5 is a cross sectional view of an assembly comprising the silicon wafer of FIG. 1 mounted on a mounting substrate showing an optional contact pad on the mounting substrate.[0013]
FIG. 6 shows the assembly of FIG. 5 at a processing step subsequent to FIG. 5.[0014]
FIG. 7 shows the assembly of FIG. 5 at a processing step subsequent to that shown in FIG. 6.[0015]
FIG. 8 shows the assembly of FIG. 2 at a processing step subsequent to FIG. 2.[0016]
FIG. 9 shows the assembly of FIG. 8, and a vacuum nozzle depositing balls of conducting material in an embodiment of the method of the invention, whereby the silicon wafer is heated while the balls of the conductive material are deposited.[0017]
FIG. 10 shows the assembly of FIG. 5 at a processing step subsequent to FIG. 5.[0018]
FIG. 11 shows the assembly of FIG. 10, and a vacuum nozzle depositing balls of conductive material in an embodiment of the method of the invention whereby the wafer is heated while depositing of the balls of conducting material.[0019]
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTSIn the following detailed description, references made to the accompanying drawings which form a part hereof, and in which is shown by way of illustration specific embodiments in which the invention may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the invention, and it is to be understood that other embodiments may be utilized and that structural, logical and electrical changes may be made without departing from the spirit and scope of the present invention.[0020]
The terms “wafer” or “substrate” used in the following description include any semiconductor-based structure having a silicon surface. Wafer and substrate are to be understood as including silicon-on-insulator (SOI) or silicon-on-sapphire (SOS) technology, doped and undoped semiconductors, epitaxial layers of silicon supported by a base semiconductor foundation, and other semiconductor structures. Furthermore, when references made to a wafer or substrate in the following description, previous process steps may have been used to form regions or junctions in the base semiconductor structure or foundation.[0021]
The term “interconnect” refers to a device for making an electrical connection. Such devices include, inter alia, contacts, wires, electrically conductive pathways as well as more complicated structures.[0022]
FIG. 1 shows an[0023]exemplary silicon wafer10, having a conventional thickness of about 28 mil, which can be about 8 to about 32 mil. In one example of a wafer suitable for use in this invention, an 8 in, diameter wafer having a thickness of 28 mil is fabricated and then background to a thickness of about 12.5 mil. The wafer includes a contact opening or viahole11 which has been formed through the entire thickness of the wafer. Preferably, thevia hole11 has a diameter (width) of at least about 4 mil up to about 12 mil, preferably up to about 6 mil.
The[0024]wafer10 comprises afirst surface80 and asecond surface81 which are generally opposed to each other. Typically,first surface80 includes at least oneinterconnect82 mounted thereon. Atypical interconnect82 is an interconnect for testing a semiconductor wafer. Such aninterconnect82 includes a substrate (not shown), conductive vias in the substrate (not shown), and first and second contacts (not shown) on either side of the conductive vias for making temporary electrical connectons between the wafer and test circuitry. More preferably interconnect82 is in electrical contact with viahole11. The electrical contact may be by any means but is typically by means of a metallized trace(s), preferably an aluminum or copper trace. Optionally, thesecond surface81 ofwafer10 comprises metallized traces or pads (not shown) that act as capture pads to increase or enhance the conduction between thevia11 and thesubstrate12.
The through-via can be formed in the wafer by laser machining, such as disclosed in copending U.S. patent application Ser. No. 09/475,546, filed Dec. 20, 1999, incorporated herein by reference. The method of U.S. patent application Ser. No. 09/475,546, generally stated, comprises laser machining conductive vias for interconnecting contacts on a component, using a laser beam that is focused to produce a desired via geometry. A via having an hour glass geometry (not shown) can be produced by focusing the laser beam proximate to a midpoint of the via. The hour glass geometry includes enlarged end portions having increased surface areas for depositing a conductive material into the via, and for forming contacts on the via. A via having an inwardly tapered geometry (not shown) can be produced by focusing the laser beam proximate to an exit point of the beam from the substrate. A via having an outwardly tapered geometry can be produced by focusing the laser beam proximate to an entry point of the beam into the substrate. A representative diameter of the via hole formed by the method of U.S. patent application Ser. No. 09/475,546 is from about 10 □m to about 2 mils or greater. A representative fluence of the laser beam suitable for forming such a via hole through an about 28-mil thick, silicon wafer is from about 2 to about 10 watts/per opening at a pulse duration of about 20-25 ns, and at a repetition rate of up to several thousand per second. The wavelength of the laser beam can be a standard infrared or green wavelength (e.g., 1064 nm-532 nm), or any wavelength that will interact with and heat silicon.[0025]
As shown in FIG. 2, the[0026]wafer10 is mounted to a substrate that functions to hold the wafer in a specified position, such asmounting substrate12.Mounting substrate12 can be an assembly chuck to contain the solder within the via hole during the process of this invention, or could be a circuit substrate to which the traces of thesilicon wafer10 are to be electrically connected. Optionally,mounting substrate12 may include acavity15 in thesurface22 over which the wafer is mounted, as shown in FIG. 2. When mountingsubstrate12 includes acavity15,wafer10 is mounted so thatcavity15 is in line with the through-viahole11. Thecavity15 in mountingsubstrate12 provides a containment area in which excess solder protrudes fromsilicon wafer10 to allow thesilicon wafer10 to be surface mounted to a substrate. In other words, the presence ofcavity15 provides for the formation of asolder bump24 on thesecond surface81 of thesilicon wafer10.
Referring to FIG. 3, after[0027]silicon wafer10 is mounted to mountingsubstrate12, a device for depositing balls of liquid conductive material is positioned over the mountedwafer10. Typically, the device for depositing balls of liquid conductive material comprises asolder jet nozzle13. As shown in FIG. 3, thesolder jet13 is positioned in line with through-viahole11. A moltenconductive material14 is then supplied tosolder jet nozzle13. The molten conductive material may be solder or an uncured conductive polymer, preferably solder.
The[0028]conductive material14 is readily wettable to the substrate's metallized trace materials along with the metallized traces of the contact substrate. The term “readily wettable” means that the material makes good electrical and mechanical contact. Theconductive material14 can comprise any suitable readily wettable material, such as a solder alloy, typically a lead/tin (Pb/Sn), lead/tin/silver (Pb/Sn/Ag), or indium/tin (In/Sn) alloy. Example solder alloys include, inter alia, 95%Pb/5%Sn, 60%Pb/40%Sn, 63%In/37%Sn, or 62%Pb/36%Sn/2%Ag. Alternately, theconductive material14 can comprise a relatively hard metal such as nickel, copper, beryllium copper, alloys of nickel, alloys of copper, alloys of beryllium copper, nickel-cobalt-iron alloys and iron-nickel alloys. In addition, theconductive material14 can comprise a conductive polymer such as a metal-filled silicone, a carbon filled ink, or an isotropic or anisotropic adhesive in an uncured free-flowing state.
Next, the molten conductive material is forced through[0029]solder jet nozzle13 to form an extrudate. Preferably, the extrudate comprises small molten balls that are preferably about 25-125 μm in diameter. Thesolder jet nozzle13 is aligned with through-via11 and one or moremolten balls26 are deposited into through-via11, as shown in FIG. 3. A sufficient quantity of moltenconductive material14 is extruded throughsolder jet nozzle13 and into via11 to at least fill through-via11. In the case where mountingsubstrate12 comprises acavity15, the quantity of molten conductive material extruded throughsolder jet nozzle13 is sufficient to fill both thecavity15 and the through-via11, as shown in FIG. 4. The conductive material deposited into through-via11 will eventually solidify as it cools to form filled via28 andsolder bump24.
A preferred method of providing the[0030]balls26 of moltenconductive material14 is through the use of solder jet technology modified from ink jet printing technology. One suitable example of this is solder jet technology available from MicroFab which is based on piezoelectric demand-mode ink-jet printing technology (i.e., piezoelectric pressure inducer) and is capable of placing molten solder droplets, 25-125 micrometers in diameter, at rates up to 400/sec (not shown). Operating temperatures of 220° C. are normally used, and temperatures up to 300° C. have been feasible.
Another suitable solder jet device is disclosed in U.S. Pat. No. 6,082,605, incorporated herein by reference. The solder jet apparatus disclosed in U.S. Pat. No. 6,082,605 (not shown) is a continuous-mode solder jet that includes a blanking system and a raster scan system. In general, the solder droplets are formed from melted metal held in liquid reserve. A temperature controller is connected to the liquid metal reservoir to maintain the liquid metal held in the reservoir at a desired temperature that facilitates optimum droplet formation and release. The solder droplets are formed by the application of the driving pressure at a sufficient vibration force. The driving pressure is be provided by a pressure inducer, which is comprised of a piezoelectric crystal driven by a tuning frequency sufficient to cause pressure to build up in the liquid metal reservoir. The mechanical vibration is generated by a vibrator, which comprises a second piezoelectric crystal driven by another tuning frequency, which causes the liquid metal reservoir to vibrate. Once the solder droplets are formed, the vibration releases the droplets from the liquid metal reservoir and the force of gravity draws the droplets down on a predictable velocity. The[0031]solder jet nozzle13 is opened and closed by means of a solenoid.
Optionally, the conductive material filling in via[0032]28 can be reflowed to wet any connections located on thefirst surface80 or thesecond surface81 of the wafer, such asinterconnect82.
The deposition of the balls of[0033]conductive material14, and optional reflow of the conductive material, is preferably performed in an inert atmosphere such as nitrogen, especially when theconductive material14 comprises solder. Such an inert environment reduces the formation of metal oxides, some of which can increase the electrical resistance of the interconnects. Alternatively, if the deposition or reflow process is conducted in an ambient atmosphere, a shielding gas, such as nitrogen, can be directed around the extruding nozzle. Themolten solder balls14 would then be shielded from possible oxidation as they travel from the nozzle into the via.
In another embodiment, mounting[0034]substrate12 can comprise a circuit substrate (not shown) to whichinterconnect82 is to be electrically connected, and which comprises at least onemetal contact pad16, as shown in FIG. 5.Metal pad16 may comprise a conductive metal, such as copper or gold. Conveniently,metal pad16 comprises gold to enhance solderability to the pad. In the case where mountingsubstrate12 comprises acopper contact pad16,silicon wafer10 is preferably mounted so thatcopper contact pad16 is in line with through-viahole11.
In a preferred embodiment, the circuit substrate of mounting[0035]substrate12 comprises the testing circuitry of a testing apparatus. The testing apparatus can be, for example, a conventional wafer probe handler, or a probe tester, modified for use with filled via28. Wafer probe handlers, and associated test equipment, are commercially available, for example, from Electroglass, Advantest, Teradyne, Megatest, Hewlett-Packard, and others.
Next,[0036]solder jet13deposits balls26 of moltenconductive material14 are deposited into viahole11, as shown in FIG. 6. Theballs26 of moltenconductive material14 are deposited as previously described.
The molten[0037]conductive material14 is then allowed to cool, resulting in a filled via28 as shown in FIG. 7. Optionally, theconductive material14 within filled via28 can be reflowed to wet the top and bottom connections such asinterconnect82.
In another embodiment of the method of the invention, a[0038]silicon wafer10 is provided having a through-viahole11, as shown in FIG. 1. Thewafer10 is mounted onto mountingsubstrate12 as shown in FIG. 2. The mountingsubstrate12 can be, for example, an assembly chuck to contain the solder during fabrication, or a circuit substrate to which traces on thewafer10 are to be electrically connected.
Optionally, the mounting[0039]substrate12 can include one or more onecavities15 in thesurface22 onto which thewafer10 is mounted. In this option,wafer10 is mounted such that thecavity15 in mountingsubstrate12 is in line with through-viahole11. Optionally,cavity15 in mountingsubstrate12 may be partially filled withconductive material14 prior to mounting thewafer10 tosubstrate12. This option advantageously reduces the quantity ofconductive material14 that must be deposited bynozzle13.
Next, one or more[0040]discrete portions30, preferably in the shape of balls, of a meltableconductive material14 are provided. Theconductive material14 may be solder or a conductive polymer, preferably solder, as previously described.
Next, a vacuum nozzle or[0041]tube113 of a vacuum device is used to transfer aball30 ofconductive material14 to the opening of through-viahole11, as shown in FIG. 8. Using the vacuum nozzle ortube113, theball30 ofconductive material14 into viahole11. The deposit may be made either by placing, dropping or pressing theball30 into viahole11. These steps are continued untilsufficient balls30 ofconductive material14 are deposited into viahole11 to provide enoughconductive material14 to fill viahole11. In the case where mountingsubstrate12 comprises acavity15, the process is continued untilsufficient balls30 are deposited into viahole11 to provide enough conductive material to at least fillcavity15 and viahole11. As stated above,advantageously cavity15 is partially filled withconductive material14 prior to mountingwafer10 tosubstrate12.
The vacuum nozzle or[0042]tube113 is preferably a component of a vacuum pick-and-place system. Vacuum pick-and-place systems have been used to deposit solder balls in the semiconducting industry and any such system may be suitable for use in this invention. One such method is disclosed in U.S. Pat. No. 5,788,143, the disclosure of which is incorporated by reference herein, which discloses an apparatus comprising a reservoir for containing solder particles, means for producing a vacuum, a pick-up head having a connection for the vacuum producing member and a plurality of apertures smaller in size than the solder particles, a control member causing the head to transport the particles from the reservoir, a member for aligning the apertures and member for controlling the vacuum to the pick-up head. Another system is taught in U.S. Pat. No. 5,088,639, the disclosure of which is incorporated by reference herein, which discloses a multipoint soldering process in which a vacuum pick-up tool attached to a robot gripper and simultaneously picks up a plurality of solder balls from an oscillating reservoir. A vision system determines that each pickup element has a solder ball, then the balls are dipped in sticky flux and deposited onto a circuitboard and interconnection locations by releasing the vacuum. Furthermore, U.S. Pat. No. 4,462,534, the disclosure of which is incorporated herein by reference, describes a suction device, which suctions up moving solder balls and contains a vibrating ball and dispenses the balls to a previously fluxed substrate.
Next, heat is applied to the[0043]wafer10 mounted on the mountingsubstrate12 in order to melt theballs30 ofconductive material14 and cause theconductive material14 to reflow, thereby forming filled via28 and wetting any contact metalization on theupper surface80 andlower surface81 of thewafer10, such asinterconnect82 as shown in FIG. 4.
Optionally, as shown in FIG. 9, the[0044]silicon wafer10 may be heated while theballs30 ofconductive material14 are deposited into viahole11, thereby melting and reflowing theconductive material14 as theballs30 are deposited.
Optionally, the melting and reflow of[0045]conductive material14 occurs under an ambient atmosphere or under a shielding gas as described for embodiment one. This option is particularly advantageous when theconductive material14 comprises solder.
In another embodiment of the method of the invention, mounting[0046]substrate12 comprises a circuit substrate (not shown) to which theinterconnect82 ofsilicon wafer10 is to be electrically connected, and comprises at least onecopper pad16 as shown in FIG. 5.Wafer10 is mounted to mountingsubstrate12 such that thecopper pad16 is in line with through-viahole11.
Next, one or more discrete particles, preferably in the form of[0047]balls30 of a meltableconductive material14 is provided. Theconductive material14 may be solder or a conductive polymer as previously described.Balls30 typically have a diameter of about 25 to about 125 microns.
Next, a vacuum nozzle or[0048]tube113 of a vacuum device, such as the pick-and-place systems described earlier, is used to transfer aball30 ofconductive material14 to the opening of through-via11 as shown in FIG. 10. Vacuum nozzle ortube113 is used to deposit theball30 ofconductive material14 into viahole11. The deposit may be made either by placing, dropping or pressing the ball into viahole11. These steps are continued untilsufficient balls30 ofconductive material14 are deposited into viahole11 to provide enoughconductive material14 to fill viahole11.
Next, heat is applied to the[0049]wafer10 mounted on the mountingsubstrate12 in order to melt theballs30 ofconductive material14 and cause theconductive material14 to reflow thereby forming filled via28 and wetting any contact metalization such asinterconnect82 on theupper surface80 andlower surface81 of the wafer as shown in FIG. 4.
Optionally, as shown in FIG. 11, the[0050]silicon wafer10 may be heated while theballs30 ofconductive material14 are deposited into viahole11, thereby melting and reflowing theconductive material14 as theballs30 are deposited.
In compliance with the statute, the invention has been described in language more or less specific as to structural and methodical features. It is to be understood, however, that the invention is not limited to the specific features shown and described, since the means herein disclosed comprise preferred forms of putting the invention into effect. The invention is, therefore, claimed in any of its forms or modifications within the proper scope of the appended claims appropriately interpreted in accordance with the doctrine of equivalents.[0051]