BACKGROUND OF THE INVENTION1. Field of the Invention[0001]
The present invention relates to a semiconductor device and tape carrier, and a method of manufacturing the same, to a circuit board, an electronic instrument, and a tape carrier manufacturing device.[0002]
2. Description of Related Art[0003]
In recent years, with the increasingly compact nature of electronic instruments, there has been a large demand for compact semiconductor devices in which CSP (Chip Scale/Size Package) technology is applied. For the manufacture of such compact semiconductor devices, TAB (Tape Automated Bonding) technology can be applied. Since TAB technology can be carried out using a tape carrier in a reel-to-reel process, it is appropriate to quantity production of semiconductor devices.[0004]
However, TAB technology was not developed with semiconductor devices as compact as those of today in mind, and there is therefore further room for improvement.[0005]
For example, a semiconductor device fabricated with the application of conventional TAB technology has outer leads as external electrodes, whereas in CSP, solder balls are used as external electrodes. A method which exploits the features of TAB technology, while efficiently providing solder balls has not yet been developed.[0006]
If there should be a fault in a part of the tape carrier, which requires a very fine interconnect pattern, it is necessary to remove the bad portion and join the remainder together. On a tape carrier with a dense interconnect pattern, the cutting must be carried out on the interconnect pattern, and at the join, adhesive tape or the like is provided for the joining. Therefore, the mounting of a semiconductor chip or the formation of solder balls cannot be carried out at the join, but a reel-to-reel process is carried out continuously, and as a result it has not been possible to avoid just this area.[0007]
SUMMARY OF THE INVENTIONThe present invention solves these problems, and has as its object the provision of a method of efficiently manufacturing a semiconductor device, a semiconductor device manufactured by this method, a tape carrier used in this method and a method of manufacture thereof, a circuit board, an electronic instrument, and a tape carrier manufacturing device.[0008]
(1) A method of manufacturing a tape carrier as one aspect of the present invention comprises:[0009]
an examination step in which a tape carrier having a bonding portion formed in a matrix form and at least one type of identification mark is examined;[0010]
a step of removing a portion which includes a defective location detected in the examination step, and then joining together remaining portions of the tape carrier after the removal; and[0011]
a step of forming a join mark delimiting a matrix in which a join formed in the joining step is positioned.[0012]
In this aspect of the present invention, to one bonding portion, one semiconductor chip is connected. A bonding portion refers to the portion to which an individual semiconductor chip is connected. For example, it may include lands for connecting the electrodes of the semiconductor chip, lands for forming external electrodes, and interconnects connecting these lands.[0013]
According to this aspect of the present invention, in the width direction of the tape carrier, a plurality of bonding portions is formed in a row, and therefore in the width direction a plurality of semiconductor chips can be mounted, and the semiconductor device can be fabricated in quantity. The manufacturing process can be advanced for each matrix delimited by the identification mark.[0014]
Further, in this aspect of the present invention, a defective location discovered by the examination of the tape carrier is cut out from the tape carrier, thus tape carrier is separated. The separated tape carrier is then rejoined again. As a result, a join is formed in the tape carrier, but the matrix in which this join is positioned is shown by a join mark. Therefore, by carrying out subsequent processes excluding the matrix delimited by the join mark, flowing of the solder balls by the adhesive tape or the like provided on the join can be prevented. In this way, efficient quantity production of the semiconductor device is possible.[0015]
(2) In this manufacturing method, the join mark may be formed by punching out the identification mark.[0016]
(3) In this manufacturing method, the identification mark may be formed simultaneously with the bonding portion, the identification mark being formed of the same material and by the same method as the bonding portion.[0017]
By this means, the identification mark can be formed simply, without increasing the number of steps.[0018]
(4) In this manufacturing method, the tape carrier may have at least two types of the identification mark of different forms which are detected by different examination means.[0019]
(5) A method of manufacturing a semiconductor device as another aspect of the present invention comprises:[0020]
an examination step in which a tape carrier having a plurality of bonding portions formed in a matrix form and at least two types of identification marks is examined;[0021]
a step of removing a portion which includes a defective location detected in the examination step, and then joining together remaining portions of the tape carrier after the removal;[0022]
a step of forming a join mark delimiting a matrix in which a join formed in the joining step is positioned; and[0023]
a step of electrically connecting each of the plurality of bonding portions to a corresponding of a plurality of semiconductor chips, excluding a region delimited by the join mark.[0024]
According to this aspect of the present invention, in the width direction of the tape carrier, a plurality of bonding portions is formed in a row. A semiconductor chip is mounted on each bonding portion, so that a plurality of semiconductor chips are mounted in the width direction, and the semiconductor device can be fabricated in quantity.[0025]
The manufacturing process can be advanced for each matrix delimited by the identification marks.[0026]
In this aspect of the present invention, a defective location discovered by the examination of the tape carrier is cut out from the tape carrier, thus tape carrier is separated. The separated tape carrier is then rejoined. As a result, a join is formed in the tape carrier, but the matrix in which this join is positioned, is indicated by a join mark. Then, excluding the matrix delimited by the join mark, a semiconductor chip is mounted on each bonding portion.[0027]
(6) This method of manufacturing a semiconductor device may further comprise:[0028]
a step of excluding the region delimited by the join mark, and forming a plurality of external electrodes simultaneously for the plurality of semiconductor chips for each matrix.[0029]
By means of this, for each matrix, a plurality of external electrodes is formed simultaneously for each of the plurality of semiconductor chips. By forming the external electrodes simultaneously for the plurality of semiconductor chips, the adaptability to quantity production is improved. This step is carried out excluding the region delimited by the join mark. Therefore, flowing of the solder balls by the adhesive tape or the like provided on the join can be prevented. In this way, efficient quantity production of the semiconductor device is possible.[0030]
(7) In this method of manufacturing a semiconductor device, the forms of the at least two types of identification marks may be different, and the identification marks may be detected by different examination means.[0031]
(8) A tape carrier as further aspect of the present invention has bonding portions formed in a matrix form on a substrate, and identification marks which delimit the bonding portions regularly in pluralities of rows and columns are formed.[0032]
According to this aspect of the present invention, in the width direction of the tape carrier, a plurality of bonding portions is formed in a row, and in the width direction a plurality of semiconductor chips can be mounted, and the semiconductor device can be fabricated in quantity. The manufacturing process can be advanced for each matrix delimited by the identification marks.[0033]
(9) In the tape carrier of this aspect of the present invention,[0034]
a join may be formed by connecting together remaining portions caused by cutting; and[0035]
a join mark may be formed in a delimited portion including the join.[0036]
Further, in this aspect of the present invention, a defective location discovered by the examination of the tape carrier is cut out from the tape carrier, thus tape carrier is separated. The separated tape carrier is then rejoined, so that a join is formed in the tape carrier. The matrix in which the join is positioned is indicated by a join mark. Therefore, by carrying out subsequent processes excluding the matrix delimited by the join mark, flowing of the solder balls by the adhesive tape or the like provided on the join can be prevented. In this way, efficient quantity production of the semiconductor device is possible.[0037]
(10) In the tape carrier of this aspect of the present invention, the join mark may be formed by punching out any of the identification marks.[0038]
By this means, a join mark can be formed easily, and the identification marks and join marks can be recognized simultaneously.[0039]
(11) In the tape carrier of this aspect of the present invention, there may be at least two types of the identification marks of different forms, and the identification marks may be detected by different examination means.[0040]
(12) A semiconductor device as yet further aspect of the present invention is manufactured by the above-described method.[0041]
(13) A circuit board as yet further aspect of the present invention has the above-described semiconductor device which is mounted thereon.[0042]
(14) An electronic instrument as yet further aspect of the present invention has the above-described circuit board.[0043]
(15) A tape carrier manufacturing device as yet further aspect of the present invention comprises:[0044]
carrying means for carrying a tape carrier having a plurality of identification marks; and[0045]
a plurality of detection means for detecting the plurality of identification marks,[0046]
wherein the plurality of detection means are detection devices detecting the identification marks by different detection methods.[0047]
(16) In this tape carrier manufacturing device:[0048]
one of the plurality of detection means may be a detection device for detecting by means of light.[0049]
(17) In this tape carrier manufacturing device:[0050]
one of the plurality of detection means may be a detection device for detecting by means of image processing.[0051]
By means of this, identification can be possible by means of an identification mark capable of visual recognition.[0052]
(18) In this tape carrier manufacturing device:[0053]
one of the plurality of detection means may be a detection device for detecting by means of a pin.[0054]
By means of this, identification can be possible by means of an identification mark capable of mechanical recognition.[0055]
BRIEF DESCRIPTION OF THE DRAWINGSFIG. 1 shows a step in the process up to the fabrication of a tape carrier in the method of manufacturing a semiconductor device of the present invention;[0056]
FIG. 2 shows a step in the process up to the fabrication of a tape carrier in the method of manufacturing a semiconductor device of the present invention;[0057]
FIG. 3 shows a step in the process up to the fabrication of a tape carrier in the method of manufacturing a semiconductor device of the present invention;[0058]
FIG. 4 shows a step in the process up to the fabrication of a tape carrier in the method of manufacturing a semiconductor device of the present invention;[0059]
FIG. 5 shows a step in the process up to the fabrication of a tape carrier in the method of manufacturing a semiconductor device of the present invention;[0060]
FIG. 6 shows a step in the process up to the fabrication of a tape carrier in the method of manufacturing a semiconductor device of the present invention;[0061]
FIG. 7 shows a step in the process after the fabrication of a tape carrier in the method of manufacturing a semiconductor device of the present invention;[0062]
FIGS. 8A and 8B shows a step in the process after the fabrication of a tape carrier in the method of manufacturing a semiconductor device of the present invention;[0063]
FIG. 9 shows a step in the process after the fabrication of a tape carrier in the method of manufacturing a semiconductor device of the present invention;[0064]
FIG. 10 shows a step in the process after the fabrication of a tape carrier in the method of manufacturing a semiconductor device of the present invention;[0065]
FIG. 11 shows a step in the process after the fabrication of a tape carrier in the method of manufacturing a semiconductor device of the present invention;[0066]
FIG. 12 shows a step in the process after the fabrication of a tape carrier in the method of manufacturing a semiconductor device of the present invention;[0067]
FIG. 13 shows a circuit board on which the semiconductor device of the embodiment of the present invention is mounted; and[0068]
FIG. 14 shows an electronic instrument equipped with the circuit board on which the semiconductor device of the embodiment of the present invention is mounted.[0069]
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTThe present invention is now described in terms of a preferred embodiment, with reference to the drawings. The present embodiment relates to the method of manufacturing a semiconductor device to which the present invention is applied, and is described divided into the process up to the fabrication of a tape carrier and the process after the fabrication of a tape carrier.[0070]
Process Up to the Fabrication of a Tape Carrier:[0071]
FIGS.[0072]1 to6 show steps in the process up to the fabrication of a tape carrier in the method of manufacturing a semiconductor device to which the present invention is applied.
In the present embodiment, a[0073]tape carrier10 shown in FIG. 1 is used. FIG. 2 is a section along the line II-II in FIG. 1, and FIG. 3 is a section along the line III-III in FIG. 1. In the drawings, the thickness and size of materials are not shown to scale, for the purposes of description, and the present invention is not limited by their proportions.
The[0074]tape carrier10 comprises asubstrate12 in a strip or tape form, and a plurality ofbonding portions14 formed on at least one surface of thesubstrate12, and is provided wound around a reel not shown in the drawings. It should be noted that thetape carrier10 may equally be a three-layer tape, in which thebonding portions14 are formed by etching or the like after adhering a conductive foil such as copper foil or the like to thesubstrate12 with adhesive, or a two-layer tape in which adhesive is not used. In a two-layer tape, a conductive film of copper or the like is deposited on the substrate by sputtering or the like. Then this is etched to form thebonding portions14, or alternatively, on a conductive foil such as a copper foil, a varnish such as a polyimide resin to form the substrate is applied and cured, after which thebonding portions14 are formed.
The[0075]substrate12 can be formed from an organic or resin material as generally used for a tape carrier, but the material is not limited as long as it has flexibility. Rather than a three-layer tape, a two-layer tape with no adhesive generally has superior flexibility. Further, to increase the flexibility, by utilizing TAB processing or the like, partial punching, overhang, or the like may be added.
At both side edges of the[0076]substrate12 in the width direction, sprocket holes16 are formed along continuously in the longitudinal direction. The sprocket holes16 are arranged so as to mesh with sprockets not shown in the drawings when thetape carrier10 is wound up or fed out.
As shown in enlargement in FIG. 2, through[0077]holes18 are formed in thesubstrate12. Normally, a part of the solder balls formed on the opposite surface to that on which thebonding portions14 are formed (the second surface) enters the through hole, providing an electrical conductivity between thebonding portions14, and the solder balls and second surface on which the solder balls are exposed. As another example, as shown in FIG. 2, on the inside surfaces of the throughholes18 an electrically conductingmaterial19 such as gold or copper is plated, and in the opening thebonding portions14 may be electrically connected to theelectrically conducting material19. By this means, an electrical connection is obtained from thebonding portions14 formed on the one surface of thesubstrate12 through theelectrically conducting material19 of the throughholes18, and solder balls38 (see FIG. 10) may be formed on the second surface. Together with this, bonding portions and lands to receive solder balls may also be formed on the second surface, thus adopting a double-sided substrate.
The[0078]bonding portions14 are formed with a plurality in the width direction of thesubstrate12, repeatedly in the longitudinal direction of thesubstrate12. To each bondingportion14, a semiconductor chip32 (see FIG. 8A) is connected. Thebonding portions14 are portions for connectingindividual semiconductor chips32, and for example, include lands for connectingelectrodes34 of asemiconductor chip32, lands for forming external electrodes38 (see FIG. 10), and interconnects connecting these lands. It should be noted that in FIG. 1, are shown only the region in whichbonding portions14 are formed, and further detail is omitted. Each of thesebonding portions14 has an interconnect pattern and lands formed for individual semiconductor chips32 (see FIG. 8A). Therefore, in the present embodiment, since a plurality of thebonding portions14 is formed in the width direction of thesubstrate12, a plurality of the semiconductor chips32 is mounted in the width direction of thesubstrate12. Since thebonding portions14 are formed repeatedly in the longitudinal direction of thesubstrate12, the semiconductor chips32 are mounted repeatedly in the longitudinal direction of thesubstrate12.
On the[0079]substrate12, as shown in FIG. 3, positioning holes20 are formed for the purpose of identifying the positions of thebonding portions14. In more detail, thebonding portions14 are aligned in a row in the width direction of thesubstrate12, and the positioning holes20 are formed further on the outside of both of the outermost of thesebonding portions14. Adjacent to two corners of abonding portion14 is formed a pair of the positioning holes20. By means of the thus-formed positioning holes20, the position of thebonding portions14 aligned in a row in the width direction of thesubstrate12 can be identified.
On the[0080]substrate12, as shown in FIG. 1, pairs of identification marks22 are formed. The identification marks22 are arranged to delimit amatrix13 formed of a plurality of rows and a plurality of columns of thebonding portions14, to allow identification. In the present embodiment, four in the longitudinal direction of thesubstrate12, and five in the width direction of thesubstrate12, that is, 4×5 of thebonding portions14 form thematrix13. To delimit thematrix13, a pair of L-shaped identification marks22 is formed.
The above-described identification marks[0081]22 can be detected visually (by imaging), but may be unsuitable for detection by a detecting device. In this case, identification marks27, which can be mechanically identified, may be formed. For example, by means of holes, identification marks27, which can be mechanically identified, may be formed. In this case, the presence of the identification marks27 can be detected by detection pins or the passage of a light beam.
A tape carrier manufacturing device preferably includes a carrying means for carrying the tape carrier[0082]10 (for example thereel24 shown in FIG. 4), a examination device for identifying the identification marks22 by image processing (for example a camera25), pins29 for detecting the identification marks27, an examination device for optically detecting the identification marks27 (for example a photoreceptor element31), and so forth.
A pair of identification marks[0083]22 delimits amatrix13 in a regularly repeated manner. For example, a pair of identification marks22 skips a row of thebonding portions14 extending in the width direction of thesubstrate12, to delimit thematrix13. In other words, between thematrix13 delimited by a pair of identification marks22 and theadjacent matrix13 delimited by another pair of identification marks22, a row of thebonding portions14 extending in the width direction remains. Taking any row of thebonding portions14 in the width direction of thetape carrier10 as the reference point, the rows of thebonding portions14 in the width direction which are outside this section are those rows numbered a natural number n multiplied by a constant k in the longitudinal direction. For example, in the present embodiment shown in FIG. 1:
k=5[0084]
Therefore, based on any one row of the[0085]bonding portions14, the rows ofbonding portions14 numbered5,10,15,20, and so on in the longitudinal direction are outside the delimit of the pairs of identification marks22.
These rows of the[0086]bonding portions14 outside the delimits can be used as cutting regions, but in the present embodiment, this is not in particular necessary. Therefore, thematrices13 may be delimited without skipping rows ofbonding portions14.
The number of[0087]bonding portions14 configuring thematrix13 delimited by a pair of the identification marks22 and the form of the identification marks22 can be determined freely. When a two-layer tape is used, the identification marks22 can be formed at the same time as the formation ofbonding portions14, of the same material as thebonding portions14.
Next, the above-described[0088]tape carrier10 is subjected to an examination process. In this examination process,defective bonding portions14 and so forth are detected. Then when a tape carrier defect spanning a number of products is detected, the defective locations are cut out.
FIG. 4 shows the process of cutting out a defective location which has been discovered in the examination. As shown in this figure, the[0089]tape carrier10 is wound around areel24. Then thetape carrier10 is unwound from thereel24, and by means of acutting tool26 such as a cutter, adefective location28 is cut out. In FIG. 5 is shown the step in which thedefective location28 is removed from thetape carrier10. As shown in FIG. 5, the defective location may be removed in a single operation using two cutting tools, or equally a single cutting tool may be used twice to remove the defective location.
In this cutting process, within the region delimited by a pair of identification marks[0090]22, thetape carrier10 is cut. In more detail, the cutting is carried out so that when thetape carrier10, which has been cut, is joined back together, the regular repetition of thematrix13 is preserved. That is to say, when thetape carrier10 is cut in two locations in order to remove thedefective location28, thetape carrier10 is cut so that theidentification mark22 closest to one cut edge and theidentification mark22 closest to the other cut edge delimit the above-describedmatrix13. Moreover, in the present embodiment, a row of thebonding portions14 is disposed betweenadjacent matrices13. By this means, while the regular repetition of thematrix13 is maintained, the subsequent regular processes, in particular the tape-to-reel process can be carried out.
Next, as shown in FIG. 6, the[0091]tape carrier10, which has been cut, is joined. In more detail, thedefective location28 shown in FIG. 5 is removed out from thetape carrier10. The edges of the remaining portions of thetape carrier10 are joined together, by applying an adhesive tape (not shown) or the like. By joining the remaining portions without overlapping, and applying adhesive tape to at least either the front or back surface, no step is created in thesubstrate12 of thetape carrier10. In general, the location where the adhesive tape is applied and the surroundings thereof no longer function as a mounting substrate.
With a[0092]tape carrier10 joined in this way, joins21 are formed. In the present embodiment, in order to make the joins21 easier to identify, joinmarks23 are formed. The join marks23 can be formed, for example, by punching out identification marks22. In this case, the join marks23 also function as identification marks22. It should be noted that the join marks23 may be formed after thetape carrier10 which has been cut has be joined, or may be formed first. For example, as shown in FIG. 5, after thedefective location28 has been cut away from thetape carrier10, before thetape carrier10 is joined back together, joinmarks23 may be formed. Alternatively, in the examination process, after a defective location has been found and before cutting, the position of the join may be determined and the join marks23 may be formed.
By attaching the join marks[0093]23 in this way, and detecting the join marks23 with for example an optoelectric sensor, and in subsequent processes the joins21 can be automatically and mechanically detected. In other words, a matrix, which cannot be used for mounting, can be recognized.
The[0094]tape carrier10 which has been joined back together has thematrix13 positioned at ajoin21 similar to theother matrices13, with a 4×5 array of thebonding portions14. Further, the formation of one row of thebonding portions14 between twoadjacent matrices13 ensures that no irregular intervals are formed. That is to say, thetape carrier10 is exactly the same as thetape carrier10 shown in FIG. 1, except that the joins21 connected by adhesive tape or the like are formed, and the presence of these joins21 is shown byjoin marks23 being formed.
It should be noted that the[0095]tape carrier10 may employ, in place of the above-described two-layer or three-layer tape, a double-sided interconnect tape, a built-up interconnect tape, a glass-epoxy tape, or any other means, provided that it is capable of being supplied from a reel. In other words, as long as the material of the tape has sufficient flexibility to be wound around a reel and is a material such that the interconnects can be formed, any material can be used.
Process After the Fabrication of a Tape Carrier[0096]
Next, FIGS.[0097]7 to13 show steps in the process after the fabrication of a tape carrier in the method of manufacturing a semiconductor device to which the present invention is applied.
First, on the[0098]tape carrier10 which has, as described above, been subject to examination, removal of defective locations28 (see FIG. 5), and rejoining, an anisotropic conductive film is provided.
FIG. 7 shows the step of providing the anisotropic conductive film on the tape carrier. The[0099]tape carrier10, as shown in FIG. 7, is wound around areel24, to be taken up on anotherreel24. That is to say, in the present embodiment, a reel-to-reel process is used. Then between the tworeels24, an anisotropicconductive film30 is adhered to thetape carrier10. In this case, the anisotropicconductive film30 is preferably provided in tape form, wound around areel124. Then when the anisotropicconductive film30 has been continuously applied to thetape carrier10, thetape carrier10 is temporarily wound up.
Here the anisotropic[0100]conductive film30 is an adhesive (binder) in which conductive particles (conductive filler) are dispersed, and may also include a dispersant additive. The anisotropicconductive film30 may first be made into sheet form, then adhered to thetape carrier10, or may be applied in liquid form. It should be noted that a thermosetting adhesive is commonly used as the adhesive of the anisotropicconductive film30. The anisotropicconductive film30 is provided at least on thebonding portions14. The anisotropicconductive film30 may be provided to avoid thebonding portions14 constituting amatrix13 for which presence of ajoin21 is indicated by join marks23.
Next, as shown in FIG. 8A, on the anisotropic[0101]conductive film30, a plurality of the semiconductor chips32 are mounted. As described above, on thetape carrier10,bonding portions14 are formed in a plurality of rows and a plurality of columns to constitute amatrix13, and on eachbonding portion14 is mounted anindividual semiconductor chip32. However, the semiconductor chips32 are not mounted onbonding portions14 constituting amatrix13 delimited by join marks23.
On the semiconductor chips[0102]32 are provided a plurality ofelectrodes34, and thesurface36 on which theelectrodes34 are provided is mounted on the anisotropicconductive film30. Thebonding portions14 are formed to correspond to the layout of theelectrodes34, and theelectrodes34 are positioned for mounting thesemiconductor chip32. For this positioning, the positioning holes20 can be utilized. It should be noted that on thebonding portions14, at positions corresponding to theelectrodes34, lands are preferably formed with greater width than other portions. on the anisotropicconductive film30, the semiconductor chips32 may be mounted one at a time, or a plurality of the semiconductor chips32 may be mounted simultaneously. For example, the number ofsemiconductor chips32 corresponding to the plurality ofbonding portions14 constituting thematrix13 may be mounted simultaneously.
It should be noted that the semiconductor chips[0103]32 may be such as to haveelectrodes34 formed on two edges only, or may be formed to haveelectrodes34 formed on four edges. Theelectrodes34 commonly employ projections of gold or solder or the like provided on aluminum pads, but projections may be provided on thebonding portions14, or thebonding portions14 may be etched to form projections.
By means of the above process, between the[0104]surface36 of thesemiconductor chip32 on which theelectrodes34 are formed and the surface of the rectangular substrate on which thebonding portions14 are formed is interposed with the anisotropicconductive film30. Even when the semiconductor chips32 are mounted one at a time, it is preferable to proceed to the next step in the process after all of the semiconductor chips32 have been mounted. It is preferable to proceed to the next step in the process once the above steps are completed, and after thetape carrier10 has been wound around thereel24.
Next, as shown in FIG. 8B, a[0105]jig40 is pressed against the surface opposite to thesurface36 of thesemiconductor chip32 on which theelectrodes34 are formed, and thesemiconductor chip32 is pressed in the direction of thebonding portions14. Thejig40 has an internal heater, not shown in the drawings, and heats thesemiconductor chip32. It should be noted that as shown in the drawing, a plurality of the semiconductor chips32 may be pressed in a single operation, or eachsemiconductor chip32 may be pressed individually.
In this way, the[0106]electrodes34 of thesemiconductor chip32 and thebonding portions14 are electrically connected by the interposition of the conductive particles of the anisotropicconductive film30. According to the present embodiment, at the same time that thebonding portions14 andelectrodes34 are electrically connected by the anisotropicconductive film30, filling between thesemiconductor chip32 andsubstrate12 with a resin is simultaneously carried out. As a result, a semiconductor device can be fabricated by a method having superior reliability and manufacturability.
Since the[0107]semiconductor chip32 is heated by thejig40, the adhesive of the anisotropicconductive film30 is cured at least in thecontact region36 of thesemiconductor chip32 with the surface. This assumes, however, that a thermosetting adhesive is used. If the curing mechanism of the anisotropicconductive film30 is different, a means for applying the appropriate form of energy is used to realize the anisotropic conductivity.
FIG. 9 shows the[0108]tape carrier10 on which the semiconductor chips32 are mounted. In this figure, as described above, nosemiconductor chips32 are mounted on thebonding portions14 constituting thematrix13 where join marks23 indicate the position ofjoin21. Betweenadjacent matrices13, nosemiconductor chips32 are mounted on one row of thebonding portions14 in the width direction of thesubstrate12. In this state, thetape carrier10 is wound around thereel24 and proceeds to the next step.
In this step, in locations where rejoining has taken place, for the purposes of step examination, semiconductor chips may be mounted, or with all of these locations as defective locations, semiconductor chips may not be mounted, or all defective semiconductor chips may be mounted. In any case, a means for detecting the join marks[0109]23 is first provided, and when the join marks23 are detected the procedure determines the action to be taken.
Next, as shown in FIG. 10, external electrodes are formed on the[0110]tape carrier10.Solder balls38 are used as the external electrodes. Thesolder balls38 are mounted on throughholes18 on the surface of thesubstrate12 of thetape carrier10 opposite to that of thebonding portions14, and are electrically connected to an electrically conductingmaterial19 formed on the internal surfaces of the through holes18. In this case, using the positioning holes20, the positioning of thesolder balls38 can be carried out. It should be noted that on thetape carrier10, lands connected to theelectrically conducting material19 may be formed on the surface on which thesolder balls38 are mounted.
In the present embodiment, for each[0111]matrix13 delimited by the identification marks22 shown in FIG. 9, thesolder balls38 of the corresponding plurality of the semiconductor chips32 are mounted simultaneously. That is to say, all of thesolder balls38 for the 4×5bonding portions14 forming thematrix13 are mounted simultaneously. By this means, the time required for mounting thesolder balls38 is reduced, and the adaptability to quantity production can be improved.
Thus in the present[0112]embodiment solder balls38 are mounted for each of thematrices13. But on thejoin21 shown in FIG. 9,solder balls38 cannot be mounted because of the presence of adhesive tape and the like. It is possible to consider mounting thesolder balls38 so as to avoid only the vicinity of thejoin21, but in this case, processing cannot be performed for each of thematrices13.
Tn the present embodiment, for the[0113]matrix13 positioned at thejoin21, a means for detecting the join marks23 is provided in the process, and solder balls are not mounted, not only on thebonding portions14 positioned at thejoin21, but also on the whole of thematrix13 defined by thejoin mark23. That is to say, for thematrix13 delimited by the join marks23 shown in FIG. 9,solder balls38 are not mounted. Then for thematrices13 other than thematrix13, in which thejoin21 is positioned,solder balls38 are mounted. By this means, the mounting ofsolder balls38 on the adhesive tape and the like provided on thejoin21 can be avoided. As a result, flowing of thesolder balls38 onto other portions, causing short-circuiting of thebonding portions14 can be prevented.
It should be noted that as external electrodes in place of the[0114]solder balls38, for example, cream solder may be provided by a printing method.
Thus, the[0115]tape carrier10 with thesolder balls38 provided as external electrodes is wound around thereel24 and advances to the next step. It should be noted that as necessary, after forming thesolder balls38, cleaning, marking and curing are carried out. In these steps also, as necessary, the positioning holes20 can be used for carrying out positioning.
As a result of the above process, as shown in FIG. 11, on the[0116]tape carrier10 are mounted the semiconductor chips32 for each of thebonding portions14. Theelectrodes34 of thesemiconductor chip32 and thebonding portions14 are electrically connected by the anisotropicconductive film30. On the opposite surface of thesubstrate12 from thebonding portions14, thesolder balls38 are provided, electrically connected to thebonding portions14 by theelectrically conducting material19 on the inside surfaces of the through holes18. Therefore, each of the plurality of rows and plurality of columns of the semiconductor chips32, hassolder balls38 electrically connected to theelectrodes34. Therefore, in respect of eachsemiconductor chip32, a semiconductor device is constituted. Therefore, when thetape carrier10 is cut for eachindividual semiconductor chip32, it forms a completed individual semiconductor device. When cutting out thetape carrier10, the positioning holes20 can be used to carry out positioning.
FIG. 12 shows the step of cutting out the[0117]tape carrier10. In this figure, a fixedjig44 such as a fixed blade is fixed to straddle around the periphery of eachsemiconductor chip32 on thesubstrate12. Then amovable jig46 such as a movable blade is used to punch out the periphery of thesemiconductor chip32. In this way,individual semiconductor devices50 are obtained.
The[0118]semiconductor devices50 may as necessary be subjected to visual examination, electrical characteristic testing examination, burn-in, and so forth.
According to the present embodiment, since the[0119]bonding portions14 are electrically connected to theelectrodes34 by the anisotropicconductive film30, thesemiconductor devices50 can be fabricated by a method having superior reliability and manufacturability. A plurality ofbonding portions14 are sequentially formed in the width direction of thetape carrier10, and asemiconductor chip32 is connected for eachbonding portion14. Therefore, since a plurality of the semiconductor chips32 is mounted in a matrix, the present embodiment is suitable for quantity production of thesemiconductor devices50.
The[0120]tape carrier10 is provided wound around thereel24, and application of the anisotropicconductive film30, the mounting and pressing of the semiconductor chips32, the formation of theexternal electrodes38, and the cutting out of individual devices is carried out reel-to-reel. It should be noted that instead of all of these steps being carried out reel-to-reel, at some point thetape carrier10 may be cut into rectangular sheets. The timing of this cutting may be, for example, any of the following: after the anisotropicconductive film30 is provided and before mounting the semiconductor chips32, after mounting the semiconductor chips32 and before pressing the semiconductor chips32, after pressing the semiconductor chips32 and before mounting thesolder balls38, after mounting the solder balls39 and before cutting out individual devices. A row ofbonding portions14 in the width direction formed betweenadjacent matrices13 may be selected as a position for cutting into rectangular sheets.
According to the present embodiment, the fabrication process can be advanced for each[0121]matrix13 delimited by identification marks22. For example, for eachmatrix13, a plurality ofsolder balls38 can be formed simultaneously for the plurality ofsemiconductor chips32. By forming thesolder balls38 simultaneously for the plurality ofsemiconductor chips32, the adaptability to quantity production is improved. By providing a means for detecting the join marks23, this process also can be carried out eliminating thematrix13 delimited by the join marks23. Therefore, flowing of thesolder balls38 by the adhesive tape and the like provided on thejoin21 can be prevented. In this way, thesemiconductor devices50 can be efficiently produced in quantity.
In FIG. 13 is shown a[0122]circuit board1000 on which is mounted asemiconductor device1100 fabricated by the method of the above-described embodiment. An organic substrate such as a glass epoxy substrate is generally used for the circuit board. On thecircuit board1000, a bonding portion of for example copper is formed to constitute a desired circuit. This bonding portion and external electrodes of thesemiconductor device1100 are mechanically connected, to achieve the electrical conduction.
It should be noted that since the[0123]semiconductor device1100 can be made as small in surface area as to be mounted as a bare chip on the mounting surface, the electronic instrument can be made compact by using thecircuit board1000 as the electronic instrument. Further, within the same area, more mounting space can be made available, and higher functionality can be achieved.
As an electronic instrument provided with this[0124]circuit board1000, FIG. 14 shows a notebookpersonal computer1200. It should be noted that regardless of whether active components or passive components, the present invention can be applied to various surface-mounted electronic components. As electronic components, for example, may be cited resistors, capacitors, coils, oscillators, filters, temperature sensors, thermistors, varistors, variable resistors, and fuses.