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US20020032719A1 - Method and system of dynamic memory management - Google Patents

Method and system of dynamic memory management
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Publication number
US20020032719A1
US20020032719A1US09/859,163US85916301AUS2002032719A1US 20020032719 A1US20020032719 A1US 20020032719A1US 85916301 AUS85916301 AUS 85916301AUS 2002032719 A1US2002032719 A1US 2002032719A1
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United States
Prior art keywords
code
thread
frame
compiled
execution
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US09/859,163
Inventor
Stephen Thomas
William Charnell
Stephen Darnell
Blaise Dias
Philippa Guthrie
Jeremy Kramskoy
Jeremy Sexton
Michael Wynn
Keith Rautenbach
Wayne Plummer
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ESMERTEC AG
RPX Corp
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Insignia Solutions PLC
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Assigned to INSIGNIA SOLUTIONS, PLCreassignmentINSIGNIA SOLUTIONS, PLCASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).Assignors: CHARNELL, WILLIAM THOMAS, DARNELL, STEPHEN, DIAS, BLAISE ABEL ALEC, GUTHRIE, PHILIPPA JOY, KRAMSKOY, JEREMY PAUL, PLUMMER, WAYNE, RAUTENBACH, KEITH, SEXTON, JEREMY JAMES, THOMAS, STEPHEN PAUL, WYNN, MICHAEL JOHN
Assigned to INSIGNIA SOLUTIONS, PLCreassignmentINSIGNIA SOLUTIONS, PLCTHIS IS A CORRECTION TO THE ADDRESS OF THE ASSIGNEE. IT SHOULD READ WOOBURN NOT WOOBUN.Assignors: CHARNELL, WILLIAM THOMAS, DARNELL, STEPHEN, DIAS, BLAISE ABEL ALEC, GUTHRIE, PHILIPPA JOY, KRAMSKOY, JEREMY PAUL, PLUMMER, WAYNE, RAUTENBACH, KEITH, SEXTON, JEREMY JAMES, THOMAS, STEPHEN PAUL, WYNN, MICHAEL JOHN
Publication of US20020032719A1publicationCriticalpatent/US20020032719A1/en
Assigned to ESMERTEC AGreassignmentESMERTEC AGASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).Assignors: INSIGNIA SOLUTIONS, PLC
Assigned to ESMERTEC AGreassignmentESMERTEC AGASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).Assignors: INSIGNIA SOLUTIONS, INC.
Priority to US11/771,629priorityCriticalpatent/US8127280B2/en
Priority to US13/365,936prioritypatent/US8631219B2/en
Assigned to RPX CORPORATIONreassignmentRPX CORPORATIONASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).Assignors: MYRIAD GROUP, AG
Abandonedlegal-statusCriticalCurrent

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Abstract

A method and system of dynamic memory management. The method of managing memory in a computer system includes accessing the activation stack with a first thread, accessing the activation stack with a second thread, pausing the first thread only during a portion of time that the activation stack is accessed by the second thread, and managing access of the activation stack to prevent access of the activation stack by the first and second threads at the same time. The activation stack includes a plurality of frames, and a processor is utilized to activate and deactivate the threads.

Description

Claims (24)

What is claimed is:
1. A method of managing memory in a computer system, the computer system having an activation stack, the method comprising:
accessing the activation stack with a first thread;
accessing the activation stack with a second thread;
pausing the first thread only during a portion of time that the activation stack is accessed by the second thread; and
managing access of the activation stack to prevent access of the activation stack by the first and second threads at the same time.
2. A method as claimed inclaim 1, wherein the activation stack includes a plurality of frames and the first and second threads access the activation stack one frame at a time, wherein access by the first thread of its current frame is paused only for the time it takes the second thread to access the current frame of the first thread.
3. A method as claimed inclaim 1, further comprising providing a barrier to prevent return of the first thread from the current frame to a parent frame when the second thread is accessing the parent frame.
4. A method as claimed inclaim 1, further comprising accessing the activation stack with a third thread.
5. A method as claimed inclaim 4, further comprising providing a barrier to prevent return of the first thread from the current frame to a parent frame when the third thread is accessing the parent frame.
6. A method as claimed inclaim 4, further comprising providing barriers associated with the second and third threads.
7. A method as claimed inclaim 6, wherein each barrier includes a descriptor block and further comprising linking each of the descriptor blocks.
8. A method as claimed inclaim 1, wherein the second thread is a garbage collector thread.
9. A computer system comprising:
an activation stack with a plurality of frames; and
a processor to activate and deactivate at least a first thread and a second thread, the first and second threads having access to the activation stack, the processor operable to pause the first thread during a portion of time that the activation stack is accessed by the second thread.
10. A system as claimed inclaim 9, wherein the activation stack includes a plurality of frames and the first and second threads access the activation stack one frame at a time, wherein access by the first thread of its current frame is paused only for the time it takes the second thread to access the current frame of the first thread.
11. A system as claimed inclaim 9, further comprising a first return barrier to prevent return of the first thread from the current frame to a parent frame when the second thread is accessing the parent frame.
12. A system as claimed inclaim 9, wherein the processor is operable to activate and deactivate a third thread, the third thread having access to the activation stack.
13. A system as claimed inclaim 12, further comprising a second return barrier to prevent return of the first thread from the current frame to a parent frame when the third thread is accessing the parent frame.
14. A system as claimed inclaim 13, wherein each return barrier includes a descriptor block.
15. A system as claimed inclaim 9, wherein the second thread is a garbage collector thread.
16. A method of operating a computer system having an activation stack with a plurality of frames, each frame having data, and the frames organized according to age, each frame having a return address, the method comprising:
enabling a second thread to access a first thread in the stack;
suspending execution of the first thread only for the time it takes the second thread to examine the youngest frame in the activation stack;
editing the return address of a frame of interest to refer to a return barrier code;
allowing execution of the first thread to continue once a garbage collection thread has examined the youngest frame in the activation stack;
examining additional frames in the activation stack using the second thread; and
editing the return address of each frame examined by the second thread to refer to the return barrier code.
17. A method as claimed inclaim 16, further comprising accessing the activation stack with a third thread.
18. A computer system comprising:
a dynamic compiler, the dynamic compiler including:
an execution history recorder configured to record the number of times a fragment of code is executed, the execution history recorder having a threshold;
an interpreter coupled to the execution history recorder;
a compiler manager coupled to the execution history recorder;
a compiler coupled to the compiler manager, the compiler arranged to create compiled fragments of code having dominant code blocks and at least one outlier;
cache coupled to the dynamic compiler and managed by the compiler manager such that dominant code blocks are stored in one portion of the cache and the at least one outlier is stored in another portion of the cache;
an activation stack with a plurality of frames; and
a processor to activate and deactivate at least a first thread and a second thread, the first and second threads having access to the activation stack, the processor operable to pause the first thread during a portion of time that the activation stack is accessed by the second thread.
19. A system as claimed inclaim 18, wherein the activation stack includes a plurality of frames and the first and second threads access the activation stack one frame at a time, wherein access by the first thread of its current frame is paused only for the time it takes the second thread to access the current frame of the first thread.
20. A system as claimed inclaim 19, further comprising a first return barrier to prevent return of the first thread from the current frame to a parent frame when the second thread is accessing the parent frame.
21. A system as claimed inclaim 20, wherein the processor is operable to activate and deactivate a third thread, the third thread having access to the activation stack.
22. A system as claimed inclaim 21, further comprising a second return barrier to prevent return of the first thread from the current frame to a parent frame when the third thread is accessing the parent frame.
23. A system as claimed inclaim 22, wherein each return barrier includes a descriptor block.
24. A system as claimed inclaim 18, wherein the second thread is a garbage collector thread.
US09/859,1631998-11-162001-05-16Method and system of dynamic memory managementAbandonedUS20020032719A1 (en)

Priority Applications (2)

Application NumberPriority DateFiling DateTitle
US11/771,629US8127280B2 (en)1998-11-162007-06-29Method and system for dynamic memory management
US13/365,936US8631219B2 (en)1998-11-162012-02-03Method and system for dynamic memory management

Applications Claiming Priority (3)

Application NumberPriority DateFiling DateTitle
GBGB9825102.8AGB9825102D0 (en)1998-11-161998-11-16Computer system
GBGB9825102.81998-11-16
PCT/GB1999/000788WO2000029937A2 (en)1998-11-161999-03-16Computer system, computer-readable storage medium and method of operating same, and method of operating that system

Related Parent Applications (1)

Application NumberTitlePriority DateFiling Date
PCT/GB1999/000788ContinuationWO2000029937A2 (en)1998-11-161999-03-16Computer system, computer-readable storage medium and method of operating same, and method of operating that system

Related Child Applications (1)

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US11/771,629ContinuationUS8127280B2 (en)1998-11-162007-06-29Method and system for dynamic memory management

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US20020032719A1true US20020032719A1 (en)2002-03-14

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Family Applications (13)

Application NumberTitlePriority DateFiling Date
US09/858,578Expired - LifetimeUS7069549B2 (en)1998-11-162001-05-16Multi-threaded fragment patching
US09/859,163AbandonedUS20020032719A1 (en)1998-11-162001-05-16Method and system of dynamic memory management
US09/859,072Expired - LifetimeUS6901587B2 (en)1998-11-162001-05-16Method and system of cache management using spatial separation of outliers
US09/859,135Expired - LifetimeUS7058929B2 (en)1998-11-162001-05-16Direct invocation of methods using class loader
US09/859,134Expired - LifetimeUS7039738B2 (en)1998-11-162001-05-16Method and system for handling device driver interrupts
US09/859,161Expired - LifetimeUS6766513B2 (en)1998-11-162001-05-16Method and system of memory management using stack walking
US09/858,426Expired - LifetimeUS7007005B2 (en)1998-11-162001-05-16Method and structure for reducing search times
US09/858,826Expired - LifetimeUS6925637B2 (en)1998-11-162001-05-16Low-contention grey object sets for concurrent, marking garbage collection
US09/859,133Expired - LifetimeUS6862728B2 (en)1998-11-162001-05-16Hash table dispatch mechanism for interface methods
US09/859,162Expired - LifetimeUS6691303B2 (en)1998-11-162001-05-16Method and system of testing and verifying computer code in a multi-threaded environment
US09/858,827Expired - LifetimeUS7080366B2 (en)1998-11-162001-05-16Dynamic compiler and method of compiling code to generate dominant path and to handle exceptions
US11/771,629Expired - Fee RelatedUS8127280B2 (en)1998-11-162007-06-29Method and system for dynamic memory management
US13/365,936Expired - Fee RelatedUS8631219B2 (en)1998-11-162012-02-03Method and system for dynamic memory management

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US09/858,578Expired - LifetimeUS7069549B2 (en)1998-11-162001-05-16Multi-threaded fragment patching

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US09/859,072Expired - LifetimeUS6901587B2 (en)1998-11-162001-05-16Method and system of cache management using spatial separation of outliers
US09/859,135Expired - LifetimeUS7058929B2 (en)1998-11-162001-05-16Direct invocation of methods using class loader
US09/859,134Expired - LifetimeUS7039738B2 (en)1998-11-162001-05-16Method and system for handling device driver interrupts
US09/859,161Expired - LifetimeUS6766513B2 (en)1998-11-162001-05-16Method and system of memory management using stack walking
US09/858,426Expired - LifetimeUS7007005B2 (en)1998-11-162001-05-16Method and structure for reducing search times
US09/858,826Expired - LifetimeUS6925637B2 (en)1998-11-162001-05-16Low-contention grey object sets for concurrent, marking garbage collection
US09/859,133Expired - LifetimeUS6862728B2 (en)1998-11-162001-05-16Hash table dispatch mechanism for interface methods
US09/859,162Expired - LifetimeUS6691303B2 (en)1998-11-162001-05-16Method and system of testing and verifying computer code in a multi-threaded environment
US09/858,827Expired - LifetimeUS7080366B2 (en)1998-11-162001-05-16Dynamic compiler and method of compiling code to generate dominant path and to handle exceptions
US11/771,629Expired - Fee RelatedUS8127280B2 (en)1998-11-162007-06-29Method and system for dynamic memory management
US13/365,936Expired - Fee RelatedUS8631219B2 (en)1998-11-162012-02-03Method and system for dynamic memory management

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US (13)US7069549B2 (en)
EP (1)EP1208425B1 (en)
JP (2)JP2003526135A (en)
AU (1)AU2846999A (en)
DE (1)DE69939495D1 (en)
GB (1)GB9825102D0 (en)
WO (1)WO2000029937A2 (en)

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