US20010028098A1 - Method and structure of manufacturing a high-q inductor with an air trench - Google Patents

Abstract

The structure of a high-Q inductor applied in a monolithic circuit according to the invention comprises a plurality of spiral metal lines and a plurality of dielectric layers, each dielectric layer formed between two adjacent spiral metal lines. Furthermore, via plugs are formed in each dielectric layer to electrically connect two adjacent spiral metal lines. A spiral air trench is formed along the spacing of the spiral metal lines in the dielectric layers. Therefore, the 3D-structure of the inductor of the invention can greatly reduce the series resistance thereof without widening the spiral metal lines. In addition, the spiral air trench, filled with air which has a lower dielectric constant, can efficiently reduce the parasitic capacitance between the spacing of the spiral metal lines. As a result, the inductor of the invention has a higher quality factor at a proper RF operating frequency region.

Description

CROSS-REFERENCE TO RELATED APPLICATION
• This application claims the priority benefit of Taiwan application serial no. 87113032, filed Aug. 7, 1998, the full disclosure of which is incorporated herein by reference.[0001]
BACKGROUND OF THE INVENTION
• 1. Field of the Invention[0002]
• The invention relates to a method and a structure of manufacturing an inductor in a monolithic circuit, and more particularly to a method and a structure of manufacturing an inductor with a high-quality factor and an air trench.[0003]
• 2. Description of the Related Art[0004]
• The continuous miniaturization of integrated circuits (ICs) is a main trend in the semiconductor industry for the purpose of not only obtaining smaller sizes and lighter weights but also reducing manufacturing costs. Today, many digital circuits and analog circuits, such as complicated microprocessors and operational amplifiers, have been successfully mass produced into ICs by very large scale integrated (VLSI) technology. In general, the above-mentioned circuits include active devices, such as bipolar junction transistors (BJTs), field effect transistors (FETs) and diodes, and passive devices, such as resistors and capacitors.[0005]
• However, miniaturization techniques have not been completely developed yet for certain circuits applied in specific areas, including, for example, radio frequency (RF) circuits, which are applied in communication equipment, such as cellular telephones (i.e. mobile telephones), cordless telephones, wireless modems and so on. Miniaturization of the RF circuits hinges on the ability to manufacture inductors with an appropriately high quality factor. Currently, the quality factor of inductors manufactured by semiconductor technology is less than 5, which does not meet desirable requirements. Although certain low-resistance metals, such as gold, can be used to increase the quality factor, it cannot be implemented by the current semiconductor technology.[0006]
• It is well known that the quality factor represents the qualities of produced inductors. It can be estimated by the following formula:[0007]$Q=K\frac{\omega L}{R}$

  
• wherein ω is angle frequency, L is inductance, and R[0008]_sis series resistance. Under an ideal condition, the quality factor Q of a non-loss inductor (that is, R=0) is approximately infinite. Even though it is impossible to manufacture the ideal inductor in the real world, an inductor with a high quality factor can be definitely obtained by decreasing the energy losses thereof.
• Referring to FIG. 1, an equivalent circuit of a real inductor is shown. It can be considered that the real inductor consists of an ideal inductor L, a resistor R[0009]_sand a capacitor C_d, wherein the ideal inductor L and the resistor R_sare connected to each other in series and then are coupled to the capacitor C_din parallel. Generally, the resistor R_sof a spiral metal line used for forming the real inductor is considered to be a main factor in reducing the quality factor thereof. One way to resolve this problem is to widen the metal line. However, this increases the area occupied by the metal line and the parasitic capacitance C_dthat follows. It is obvious that the increased area is opposed to the miniaturization of the inductor. The parasitic capacitance decreases the self-resonance frequency of the inductor, which, as a result, limits the range of the operating frequency thereof. On the other hand, the quality factor Q is directly proportional to the angle frequency and is inversely proportional to the series resistor, so the metal line cannot be optionally widened.
SUMMARY OF THE INVENTION
• In view of the above, an object of the invention is to provide a method and a structure of manufacturing an inductor with a high quality factor and an air trench in a monolithic circuit. The inductor manufactured by the invention has a lower series resistance and a lower parasitic capacitance. Therefore, the inductor of the invention has lower energy losses, a higher quality factor and a higher operating frequency.[0010]
• To attain the above-stated object, an inductor in a monolithic circuit according to the invention has the following structure. A plurality of spiral metal lines formed over a substrate. A plurality of dielectric layers, each of which is formed between two adjacent spiral metal lines. A plurality of via plugs formed in the dielectric layers to connect two adjacent spiral metal lines to each other. A spiral air trench formed along the spacing of the spiral metal lines in the dielectric layers. In such a structure having a plurality of spiral metal lines stacked on each other with the via plugs therebetween, the series resistance thereof is greatly decreased without widening the inductor. Moreover, air contained in the spiral air trench with a lower dielectric constant can efficiently reduce the parasitic capacitance of the inductor. Hence, the inductor manufactured based on the structure has a higher quality factor.[0011]
• A method of manufacturing an inductor according to the invention comprises the following steps. A plurality of spiral metal lines aligned with each other is formed over a substrate. A plurality of dielectric layers, each of which is located between two adjacent spiral metal lines, is formed over the substrate. A via plug is formed in each dielectric layer to connect two adjacent spiral metal lines. An upper dielectric layer is formed over the spiral metal lines. A spiral air trench is formed in the dielectric layers along the spacing of the spiral metal lines.[0012]
BRIEF DESCRIPTION OF THE DRAWINGS
• The invention will be more fully understood from the detailed description given hereinbelow and the accompanying drawings, which are given by way of illustration only, and thus do not limit the present invention, and wherein:[0013]
• FIG. 1 is a schematic circuit diagram illustrating an equivalent circuit of a real inductor;[0014]
• FIG. 2 is a top view illustrating an inductor manufactured by a preferred embodiment of the invention;[0015]
• FIGS.[0016]3A-3H are cross-sectional views illustrating a method of manufacturing an inductor according to the preferred embodiment of the invention;
• FIGS.[0017]4A-4C are cross-sectional views illustrating another method of forming a spiral air trench after the step shown in FIG. 3E; and
• FIGS.[0018]5A-5C are cross-sectional views illustrating a further method of forming a spiral air trench after the step shown in FIG. 3E.
DETAILED DESCRIPTION OF THE EMBODIMENTS
• FIG. 2 is a top view of an inductor manufactured by a preferred embodiment of the invention. In FIG. 2, an[0019]inductor20 formed on a semiconductor substrate includes a spiralconductive line22. One end of the spiralconductive line22 is electrically connected to afirst bonding pad26 via a firstconnective line24 while the other end thereof is electrically connected to asecond bonding pad29 via a secondconnective line28. Thebonding pads26 and29 are used to electrically connect other circuits. A spiral air trench23 (indicated by a dash line) is formed along the gap of the spiralconductive line22 to reduce the parasitic capacitance thereof and increase the quality factor thereof.
• Referring to FIGS.[0020]3A-3H, a method of manufacturing an inductor according to a preferred embodiment of the invention is shown. In FIG. 3A, alower metal line34, such as an aluminum line, is formed by sputtering and photolithography on aninsulator32. such as a silicon oxide layer, which is deposited on asubstrate30, such as a silicon substrate. Thelower metal line34 serves as a first connective line.
• Referring to FIG. 3B, a lower[0021]dielectric layer36, such as a silicon oxide layer, is formed on theinsulator32 and thelower metal line34 by, for example, chemical vapor deposition (CVD). It is then planarized by, for example, etch back or chemical mechanical polishing (CMP) to facilitate subsequent photolithography. The lowerdielectric layer36 is patterned to form via holes (not shown) by, for example, photolithography and etching until portions of the surface of thelower metal line34 are exposed. Next, a metal layer (not shown), such as a tungsten layer, is formed over thesubstrate30 by, for example, chemical vapor deposition; it completely fills the via holes to electrically connect the lower metal line34 (which serves as the first connective line). Then, part of the metal layer above the level of the lowerdielectric layer36 is removed by planarization to form first viaplugs38, such as tungsten plugs, by, for example, chemical mechanical polishing or etch back.
• Referring to FIG. 3C, a first[0022]spiral metal line40aand afirst metal line40b, such as a square spiral aluminum line and an aluminum line, are formed on the lowerdielectric layer36 by, for example, sputtering and photolithography. As shown in FIG. 3C, thefirst metal line40band the inner end of thespiral metal line40aare connected to the lower metal line34 (i.e., the first connective line) via the first via plugs38.
• Referring to FIG. 3D, a[0023]first dielectric layer42, such as a silicon oxide layer, is formed on thespiral metal line40a, thefirst metal line40band the lowerdielectric layer36 by, for example, chemical vapor deposition. It is then planarized by, for example, etch back or chemical mechanical polishing to facilitate subsequent photolithography. Next, thefirst dielectric layer42 is patterned to form via holes (not shown) by, for example, photolithography and etching, until the firstspiral metal line40aand thefirst metal line40bare exposed. A metal layer (not shown), such as a tungsten layer, is formed over thesubstrate30 and completely fills the via holes by, for example, chemical vapor deposition. Part of the metal layer above the level of thefirst dielectric layer42 is removed to form second viaplugs44 and a third viaplug44′, such as tungsten plugs, in the via holes by, for example, chemical mechanical polishing or etch back, thereby connecting the spiral-shapedmetal line40aand thefirst metal line40b, respectively.
• Referring to FIG. 3E, the steps shown in FIGS. 3C and 3D are repeated to form a second[0024]spiral metal line46aon the second viaholes44, a second metal line46bon the third viaplug44′, asecond dielectric layer48 on thefirst dielectric layer42, the secondspiral metal line46aand the second metal line46b, fourth viaplugs50 on the second spiral metal line46band a fifth viaplug50′ on the second metal line46b. Thereafter, a thirdspiral aluminum line52a, such as a square spiral metal line, is formed on the fourth viaplugs50; athird metal line52b, such as an aluminum layer, is formed on the fifth viaplug50′; and a secondconnective line52c, such as an aluminum layer, is formed on the fourth viaplug50 just above the outer end of the secondspiral metal line46aby, for example, sputtering, photolithography and etching. Moreover, thethird metal line52belectrically connects the lower metal line34 (i.e., the first connective line) and thefirst bonding pad26 as shown in FIG. 2, while the secondconnective line52cis electrically connected to thesecond bonding pad29 as shown in FIG. 2.
• Referring to FIG. 3F, an upper dielectric layer, consisting, for example, of a[0025]silicon oxide layer54 and asilicon nitride layer56, is formed on the thirdspiral metal line52a, thethird metal line52band the secondconnective line52cby, for example, chemical vapor deposition. Then, apositive photoresist58 having atrench60 just above thethird metal line52bis formed on thesilicon nitride layer56 by photolithography. Parts of thesilicon oxide layer54 and thesilicon nitride layer56 just below thetrench60 are removed to expose thethird metal line52bby etching for subsequently bonding.
• Referring to FIG. 3G, the[0026]positive photoresist58 is removed. Next, apositive photoresist62, having aspiral trench64 aligned with the gaps of the thirdspiral metal line52a, thethird metal line52band the secondconnective line52c, is formed on thesilicon nitride layer56 and thethird metal line52b. Thespiral trench64 keeps an appropriate distance from the thirdspiral metal line52aby using an original mask for the formations of thespiral metal lines40a,46aand52aand by adjusting its exposure dose to create a photo bias during development. This step can save a one-mask cost. Referring to FIG. 3H, parts of thesilicon nitride layer56, thesilicon oxide layer54 and thedielectric layers48 and42 uncovered by thepositive photoresist62 are removed to expose the lowerdielectric layer36 by etching, thereby forming aspiral air trench66. Thus, the inductor according to the invention is completely manufactured.
• Although the[0027]third metal line52bis first exposed, and then thespiral air trench66 is formed, it is obvious for those skilled in the art that the order of the above-stated two steps is exchangeable. That is, thespiral air trench66 can be first formed before thethird metal line52bis exposed. Moreover, to protect the sidewalls of thespiral air trench66, another silicon nitride layer (not shown) can be formed on the inner surfaces thereof.
• FIGS.[0028]4A-4C show another method of forming an air trench after the step shown in FIG. 3E. Referring to FIG. 4A, anoxide layer68 is formed on the thirdspiral metal line52a, thethird metal line52b, the secondconnective line52cand thesecond dielectric layer48 by, for example, chemical vapor deposition. Thereafter, apositive photoresist70, having aspiral trench72 aligned with the spacing of the thirdspiral metal line52a, thethird metal line52band the secondconnective line52c, is formed on theoxide layer68 by photolithography. Thespiral trench72 keeps an appropriate distance from the thirdspiral metal line52aby using the original mask for the formations of thespiral metal lines40a,46aand52aand by adjusting its exposure dose to create a photo bias during development.
• Referring to FIG. 4B, using the[0029]positive photoresist70 as a mask, aspiral air trench74 is formed in theoxide layer68 and thedielectric layers42 and48 by etching. Then, asilicon nitride layer76, serving as a passivation, is formed on theoxide layer68 and the inner surfaces of thespiral air trench74. Referring to FIG. 4C, parts of thesilicon nitride layer76 and theoxide layer68 just above thethird metal line52bare removed to form atrench78 and to expose thethird metal line52bfor subsequent bonding, by photolithography and etching. Thus, an inductor of the invention is completely manufactured.
• FIGS.[0030]5A-5C show a further method of forming an air trench after the step of FIG. 3E. Referring to FIG. 5A, an upper dielectric layer, consisting, for example, of asilicon oxide layer80 and asilicon nitride layer82, is formed on the thirdspiral metal line52a. thethird metal line52band the secondconnective line52cby, for example, chemical vapor deposition. Then, apositive photoresist84, having aspiral trench86 aligned with the spacing of the thirdspiral metal line52a, thethird metal line52band the secondconnective line52c, is formed on thesilicon nitride layer82 by photolithography. Thespiral trench86 keeps an appropriate distance from the thirdspiral metal line52aby using the original mask for the formations of thespiral metal lines40a,46aand52aand by adjusting its exposure dose to create a photo bias during development.
• Referring to FIG. 5B, with the[0031]photoresist84 serving as a mask, an etching process is performed to form aspiral air trench88. Thephotoresist84 is removed. Next, asilicon nitride layer90, serving as a passivation, is formed on thesilicon nitride layer82 and the inner surfaces of thespiral air trench88. Referring to FIG. 5C, parts of thesilicon nitride layer90,silicon oxide layer82 andsilicon nitride layer80 just above thethird metal line52bare removed to form atrench92, thereby exposing thethird metal line52bfor subsequently bonding. Thus, an inductor according to the invention is completely manufactured.
• As can be seen from FIG. 3H, 4C or[0032]5C, an inductor with an air trench according to the invention at least comprises the substrate30: thespiral metal lines40a,46aand52a; and the dielectric layers including theinsulator32, the lowerdielectric layer36, thedielectric layers42 and48 and the upper dielectric layer. Furthermore, a plurality of viaplugs38,44 and50 are formed in the lowerdielectric layer36 and thedielectric layers42 and48, respectively, to connect themetal lines34,40a,46a, and52ato each other. Thespiral air trench66,74 or88 is formed in thedielectric layers42 and48. In addition, the inductor, which mainly includes thespiral metal lines40a,46aand52a, has the firstconnective line34 and the secondconnective line52c. A silicon nitride layer, serving as a passivation, is formed on the inner surfaces of the spiral air trench. Although the inductor is formed by 4 metal lines (including 3 spiral metal lines) and a plurality of via plugs, wherein there are only 3 turns for each spiral metal line, it is well known by those skilled in the art that the number of metal lines of the inductor and the number of the turns for each spiral metal line are not limited by the embodiment at all.
• Since the inductor according to the invention includes 3 spiral metal lines and a plurality of via plugs, the cross-sectional area of the inductor is increased, resulting in a decrease in the resistance thereof. Moreover, because no additional area is taken by the structure, it is much better for integration. The spiral air trench filled with air which has a lower dielectric constant (≅1) can efficiently reduce the parasitic capacitance of the inductor created. As a result, the inductor of the invention, suitable for RF circuits operating at a higher frequency, has a higher quality factor.[0033]
• While the invention has been described by way of example and in terms of the preferred embodiment, it is to be understood that the invention is not limited to the disclosed embodiments. To the contrary, it is intended to cover various modifications and similar arrangements as would be apparent to those skilled in the art. Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.[0034]

Claims (17)

What is claimed is:

1. A structure of an inductor with an air trench, comprising:

a substrate;

a plurality of spiral metal lines formed over the substrate;

a plurality of dielectric layers, each of which is formed between two adjacent spiral metal lines;

a plurality of via plugs formed in the dielectric layers to connect the spiral metal lines to each other;

a spiral air trench formed along the spacing of the spiral metal lines in the dielectric layers;

a first connective line connecting the inner end of a lower spiral metal line; and

a second connective line connecting the outer end of an upper spiral metal line.

2. The structure as recited in

claim 1

, wherein each spiral metal line is a spiral aluminum layer.

3. The structure as recited in

claim 1

, wherein each via plug, is a tungsten plug.

4. The structure as recited in

claim 1

, wherein each dielectric layer is a silicon oxide layer.

5. The structure as recited in

claim 1

, further comprising a first bonding pad connected to the first connective line and a second bonding, pad connected to the second connective line.

6. The structure as recited in

claim 1

, wherein each spiral metal line is a square spiral metal line.

7. A method of manufacturing an inductor with an air trench, which is applied in monolithic circuit processing, the method comprising the steps of:

(a) providing a substrate having at least one insulator formed thereon;

(b) forming a lower metal line, serving as a first connective line, on the insulator;

(c) forming a lower dielectric layer, which has at least one via hole, on the lower metal line, wherein the via hole is filled with a first via plug for connecting the lower metal line;

(d) forming a spiral metal line, one end of which is electrically connected to the first via plug, on the lower dielectric layer;

(e) forming a dielectric layer, which has at least one via hole, on the spiral metal line, wherein the via hole is filled with a second via plug for connecting the spiral metal line;

(f) repeating steps (a)-(e) to form a spiral inductor structure;

(g) forming an upper spiral metal line having a second connective line, which is aligned with and electrically connected to the spiral inductor structure, over the substrate;

(h) forming an upper dielectric layer on the upper spiral metal line and over the substrate;

(i) forming a mask on the upper dielectric layer with only the part just above the spacing of the spiral inductor exposed; and

(j) forming a spiral air trench in the upper dielectric layer and the dielectric layer by etching until the lower dielectric layer is exposed.

8. The method as recited in

claim 7

, wherein the lower metal line, the upper spiral metal line and the spiral metal line are made of aluminum by sputtering.

9. The method as recited in

claim 7

, wherein the lower dielectric layer and the dielectric layer are made of silicon oxide by chemical vapor deposition.

10. The method as recited in

claim 7

, wherein the via plug is a tungsten plug.

11. The method as recited in

claim 10

, wherein the steps of forming the via plug comprise:

forming a tungsten layer, which completely fills the via hole, on the dielectric layer; and

removing part of the tungsten layer to form a tungsten plug in the via hole.

12. The method as recited in

claim 11

, wherein the step of removing part of the tungsten layer is performed by chemical mechanical polishing.

13. The method as recited in

claim 11

, wherein the step of removing part of the tungsten layer is performed by etch back.

14. The method as recited in

claim 7

, wherein the upper dielectric layer consists of a silicon oxide layer and a silicon nitride layer, which are formed by chemical vapor deposition.

15. The method as recited in

claim 14

, further comprising forming a silicon nitride layer on the inner surface of the spiral air trench to cover the sidewalls and bottom thereof after the spiral air trench is formed.

16. The method as recited in

claim 7

, wherein the upper dielectric layer is a silicon oxide layer.

17. The method as recited in

claim 16

, further comprising forming a silicon nitride layer on the inner surface of the spiral air trench to cover the sidewalls and bottom thereof after the spiral air trench is formed.

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