TWI849525B - Processor controlling method and associated system on chip - Google Patents

Abstract

The invention discloses a processor controlling method, which includes the following steps: controlling a processor to execute a first operating system in a first state; when the processor executing the first operating system satisfies a specific condition, controlling the processor to switch from the first state to a second state; and controlling the processor to execute a second operating system in the second state, wherein an authority of the first state is higher than the authority of the second state.

Description

Translated fromChinese

處理器控制方法與相關的系統晶片Processor control method and related system chip

本發明係有關於可以執行兩個作業系統的系統晶片及其控制方法。The present invention relates to a system chip capable of executing two operating systems and a control method thereof.

目前嵌入式系統已廣泛地被應用在各種電子產品中，且所涵蓋的功能亦日益增加，而如何縮短系統啟動時間以讓應用功能可以盡快正常運作是各家廠商努力的目標之一。為了加速啟動作業系統，現有的做法是改用簡易型作業系統或是精簡版作業系統，然而，簡易型作業系統缺乏軟體功能與硬體支援，而精簡版作業系統則受限於原本作業系統的架構設計，故能夠縮短的開機時間很有限。Currently, embedded systems have been widely used in various electronic products, and the functions they cover are also increasing day by day. How to shorten the system startup time so that the application functions can operate normally as soon as possible is one of the goals that all manufacturers strive for. In order to speed up the startup of the operating system, the current practice is to use a simple operating system or a simplified operating system. However, the simple operating system lacks software functions and hardware support, and the simplified operating system is limited by the architecture design of the original operating system, so the startup time that can be shortened is very limited.

因此，本發明的目的之一在於提出一種可以分時多工運行於多個作業系統的系統晶片，以解決先前技術中所述的問題。Therefore, one of the purposes of the present invention is to propose a system chip that can be used to perform time-sharing multiple operating systems to solve the problems described in the prior art.

在本發明的一個實施例中，揭露了一種處理器控制方法，其包含有以下步驟：控制一處理器於一第一狀態中執行一第一作業系統；於該處理器執行該第一作業系統滿足一特定條件時，控制該處理器由該第一狀態切換為一第二狀態；以及控制該處理器於該第二狀態中執行一第二作業系統，其中該第一狀態的權限高於該第二狀態的權限。In an embodiment of the present invention, a processor control method is disclosed, which includes the following steps: controlling a processor to execute a first operating system in a first state; when the processor executes the first operating system and satisfies a specific condition, controlling the processor to switch from the first state to a second state; and controlling the processor to execute a second operating system in the second state, wherein the authority of the first state is higher than the authority of the second state.

在本發明的一個實施例中，揭露了一種處理器控制方法，其包含有以下步驟：控制一處理器於一第一狀態中執行一作業程序；於該處理器執行該作業程序滿足一特定條件時，控制該處理器由該第一狀態切換為一第二狀態；以及控制該處理器於該第二狀態中執行一作業系統；其中該第一狀態的權限高於該第二狀態的權限。In an embodiment of the present invention, a processor control method is disclosed, which includes the following steps: controlling a processor to execute an operating program in a first state; when the processor executes the operating program and satisfies a specific condition, controlling the processor to switch from the first state to a second state; and controlling the processor to execute an operating system in the second state; wherein the authority of the first state is higher than the authority of the second state.

在本發明的一個實施例中，揭露了一種系統晶片，其包含有一處理器，用以於一第一狀態中執行一第一作業系統及於一第二狀態中執行一第二作業系統。此外，於該處理器執行該第一作業系統滿足一特定條件時，該處理器由該第一狀態切換為該第二狀態；該第一狀態的權限高於該第二狀態的權限。In one embodiment of the present invention, a system chip is disclosed, which includes a processor for executing a first operating system in a first state and a second operating system in a second state. In addition, when the processor executes the first operating system and satisfies a specific condition, the processor switches from the first state to the second state; the authority of the first state is higher than the authority of the second state.

100:系統100:System

110:處理器110: Processor

120:非揮發性記憶體120: Non-volatile memory

122:第一程式碼122: First code

124:第二程式碼124: Second code

130:記憶體130: Memory

200~210:步驟200~210: Steps

300~308:步驟300~308: Steps

400:系統400:System

401~405:步驟401~405: Steps

410:第一處理器410: First processor

420:非揮發性記憶體420: Non-volatile memory

422:第一程式碼422: First code

424:第二程式碼424: Second code

430:記憶體430:Memory

440:第二處理器440: Second processor

500:電子裝置500: Electronic devices

510:影像傳感器510: Image sensor

520:影像訊號處理器520: Image signal processor

530:麥克風530: Microphone

540:聲音訊號處理器540: Sound signal processor

600:電子裝置600: Electronic devices

610:供電裝置610: Power supply device

620:物件移動偵測裝置620: Object movement detection device

第1圖為根據本發明一實施例之系統的示意圖。Figure 1 is a schematic diagram of a system according to an embodiment of the present invention.

第2圖所示之根據本發明一實施例之系統在上電後的操作流程圖。Figure 2 shows the operation flow chart of the system after power-on according to an embodiment of the present invention.

第3A圖為根據本發明一實施例之處理器進行狀態切換的示意圖。Figure 3A is a schematic diagram of a processor performing state switching according to an embodiment of the present invention.

第3B圖為根據本發明一實施例之由第一狀態切換至第二狀態的示意圖。Figure 3B is a schematic diagram of switching from the first state to the second state according to an embodiment of the present invention.

第3C圖為根據本發明一實施例之由第二狀態切換至第一狀態的示意圖。Figure 3C is a schematic diagram of switching from the second state to the first state according to an embodiment of the present invention.

第4A圖為根據本發明另一實施例之系統的示意圖。Figure 4A is a schematic diagram of a system according to another embodiment of the present invention.

第4B圖所示之根據本發明一實施例之第4A圖的系統在上電後的操作流程圖。FIG. 4B shows an operation flow chart of the system of FIG. 4A after power-on according to an embodiment of the present invention.

第5圖為根據本發明一實施例之電子裝置的示意圖。Figure 5 is a schematic diagram of an electronic device according to an embodiment of the present invention.

第6圖為根據本發明一實施例之電子裝置的示意圖。Figure 6 is a schematic diagram of an electronic device according to an embodiment of the present invention.

第1圖為根據本發明一實施例之系統100的示意圖。如第1圖所示，系統100包含了一處理器110、一非揮發性記憶體120以及一記憶體130，其中非揮發性記憶體120儲存了一第一程式碼122以及一第二程式碼124。在本實施例中，非揮發性記憶體120可以是一唯讀記憶體(Read-Only Memory，ROM)或是一快閃記憶體(flash memory)，記憶體130可以是一靜態隨機存取記憶體(Static Random Access Memory，SRAM)或是一動態隨機存取記憶體(Dynamic Random Access Memory，DRAM)，第一程式碼122係為一第一作業系統(Operating System，OS)的程式碼，第二程式碼124係為一第二作業系統的程式碼，其中第一作業系統是輕量級的作業系統，例如即時作業系統(real-time operating system)或是一作業程序；而第二作業系統是功能相對完整的作業系統，例如Linux、UNIX、Andriod、Windows...等作業系統。在本實施例中，處理器110係設置於一系統晶片之中，且記憶體130及/或非揮發性記憶體120亦可設置於該系統晶片內。此外，處理器110本身係為一單核心的處理器，而若是該系統晶片係為雙核心處理器，則處理器110指的是其中一個核心。FIG. 1 is a schematic diagram of asystem 100 according to an embodiment of the present invention. As shown in FIG. 1 , thesystem 100 includes aprocessor 110, anon-volatile memory 120 and amemory 130, wherein thenon-volatile memory 120 stores afirst program code 122 and asecond program code 124. In this embodiment, thenon-volatile memory 120 can be a read-only memory (ROM) or a flash memory, thememory 130 can be a static random access memory (SRAM) or a dynamic random access memory (DRAM), thefirst program code 122 is a program code of a first operating system (OS), and thesecond program code 124 is a program code of a second operating system, wherein the first operating system is a lightweight operating system, such as a real-time operating system or an operating program; and the second operating system is an operating system with relatively complete functions, such as Linux, UNIX, Andriod, Windows... and other operating systems. In this embodiment, theprocessor 110 is disposed in a system chip, and thememory 130 and/or thenon-volatile memory 120 may also be disposed in the system chip. In addition, theprocessor 110 itself is a single-core processor, and if the system chip is a dual-core processor, theprocessor 110 refers to one of the cores.

處理器110係被設計為具有多個權限模式以及狀態切換能力。具體來說，處理器110可以操作於一第一狀態與一第二狀態中的其一，例如處理器110可以基於分時多工的設計來具有第一狀態或是第二狀態，其中第一狀態的權限高於第二狀態的權限，詳細來說，系統一些特定的資源(如存取特定記憶體區段或特定周邊硬體)僅處理器110操作第一狀態時才能存取。於一實施例中，第一狀態為處理器110的安全模式，而第二狀態為處理器110的非安全模式。此外，當處理器110屬於第一狀態或是第二狀態時，其內部會具有不同的權限模式，例如高權限模式與低權限模式，以供執行不同的程式；而處理器110於一實施例中還另外具有一暫時狀態其屬於超高權限模式以供切換第一狀態與第二狀態。其中，暫時狀態設定為只用於進行處理器狀態的切換，只有當處理器處於暫時狀態的超高權限模式時，才具有切換處理器狀態的能力。於另一實施例中，處理器110的第一狀態和第二狀態可以直接進行切換而無須透過一暫時狀態(圖未示)。Theprocessor 110 is designed to have multiple privilege modes and state switching capabilities. Specifically, theprocessor 110 can operate in one of a first state and a second state. For example, theprocessor 110 can have the first state or the second state based on a time-division multiplexing design, wherein the privilege of the first state is higher than the privilege of the second state. Specifically, some specific resources of the system (such as access to a specific memory segment or specific peripheral hardware) can only be accessed when theprocessor 110 operates in the first state. In one embodiment, the first state is a secure mode of theprocessor 110, and the second state is a non-secure mode of theprocessor 110. In addition, when theprocessor 110 is in the first state or the second state, it will have different permission modes inside, such as high permission mode and low permission mode, for executing different programs; and theprocessor 110 also has a temporary state in an ultra-high permission mode in one embodiment for switching between the first state and the second state. Among them, the temporary state is set to be used only for switching the processor state, and only when the processor is in the ultra-high permission mode of the temporary state, it has the ability to switch the processor state. In another embodiment, the first state and the second state of theprocessor 110 can be switched directly without going through a temporary state (not shown).

在本實施例中，處理器110係可以基於不同權限的分時多工切換不同狀態的設計來分別於不同狀態中執行第一作業系統或是第二作業系統，例如處理器110在第一狀態時執行第一作業系統，並在第二狀態時執行第二作業系統，其中第一狀態的權限高於第二狀態的權限，以使得系統100可以在不同的時間點採用適合的作業系統，以增進系統100的效率。具體來說，參考第2圖所示之根據本發明一實施例之系統100在上電後的操作流程圖。在系統100開始被供電或是由睡眠模式被喚醒後，在步驟202，處理器110開始進行初始化操作，例如對非揮發性記憶體120與記憶體130進行初始化操作。在步驟204，處理器110自非揮發性記憶體120讀取第一程式碼122，並將第一程式碼122載入至記憶體130中。在步驟206，處理器110執行第一程式碼122並建立第一作業系統的環境，例如控制處理器110在第一狀態執行第一作業系統，並設定處理器110的狀態切換流程，例如狀態切換之中斷條件與切換流程。在一實施例中，狀態切換可包含兩種，一種是主動讓出處理器的使用權，另一種是產生系統中斷所引發的，第一種是根據程式碼的撰寫內容，另一種則是由第一狀態(高權限)在開機時設定好，在這個階段會決定哪些中斷發生時會導向第一狀態，哪些中斷發生時狀態會導向第二狀態，而這個層級的設定是在第二狀態所無法進行的。此外，在完成步驟206之建立第一作業系統的環境後，基於分時多工的設計，處理器110在第一狀態執行第一作業系統或是其下的應用程式。In this embodiment, theprocessor 110 can execute the first operating system or the second operating system in different states based on the design of time-division multiplexing switching different states with different permissions. For example, theprocessor 110 executes the first operating system in the first state and executes the second operating system in the second state, wherein the permissions of the first state are higher than the permissions of the second state, so that thesystem 100 can use a suitable operating system at different time points to improve the efficiency of thesystem 100. Specifically, refer to FIG. 2 for an operation flow chart of thesystem 100 after power-on according to an embodiment of the present invention. After thesystem 100 is powered on or awakened from the sleep mode, in step 202, theprocessor 110 starts to perform initialization operations, such as initializing thenon-volatile memory 120 and thememory 130. Instep 204, theprocessor 110 reads thefirst program code 122 from thenon-volatile memory 120 and loads thefirst program code 122 into thememory 130. Instep 206, theprocessor 110 executes thefirst program code 122 and establishes the environment of the first operating system, such as controlling theprocessor 110 to execute the first operating system in the first state, and setting the state switching process of theprocessor 110, such as the interrupt condition and switching process of the state switching. In one embodiment, the state switching may include two types, one is to actively give up the right to use the processor, and the other is caused by the generation of a system interrupt. The first type is based on the content of the program code, and the other is set by the first state (high authority) at boot time. At this stage, it will be determined which interrupts will lead to the first state and which interrupts will lead to the second state. This level of setting is not possible in the second state. In addition, after completingstep 206 of establishing the environment of the first operating system, based on the design of time-sharing multiplexing, theprocessor 110 executes the first operating system or its application in the first state.

此外，在處理器110執行第一作業系統或是其下應用程式的過程中，處理器110可以在某些條件下執行步驟208，例如處理器110可以在第一作業系統閒置時執行步驟208，以使得處理器110在第一狀態中以較低優先權的執行緒形式自非揮發性記憶體120讀取第二程式碼124，並將第二程式碼124載入至記憶體130中。接著，在步驟210，處理器110由第一狀態切換至第二狀態，開始執行第二程式碼124並建立第二作業系統的環境而且啟動基於該系統之應用程式，以基於分時多工的設計下在第二狀態執行第二作業系統或是其下的應用程式。In addition, when theprocessor 110 executes the first operating system or an application thereunder, theprocessor 110 may executestep 208 under certain conditions. For example, theprocessor 110 may executestep 208 when the first operating system is idle, so that theprocessor 110 reads thesecond program code 124 from thenon-volatile memory 120 in the form of a thread with a lower priority in the first state and loads thesecond program code 124 into thememory 130. Next, instep 210, theprocessor 110 switches from the first state to the second state, starts to execute thesecond program code 124 and establishes the environment of the second operating system and starts the application based on the system, so as to execute the second operating system or the application under it in the second state based on the time-sharing multiplexing design.

在第2圖的實施例中，由於系統100上電之後第一個所採用的是輕量級的第一作業系統，因此可以快速地進行初始化並執行相關的應用程式。此外，透過基於不同權限的分時多工設計以使得處理器110在部分時間從第一狀態切換至第二狀態執行功能相對完整的第二作業系統，可以讓系統100可以具有較多的功能。In the embodiment of FIG. 2, since thesystem 100 first uses a lightweight first operating system after powering on, it can quickly initialize and execute related applications. In addition, through a time-sharing multiplexing design based on different permissions, theprocessor 110 switches from the first state to the second state to execute a relatively complete second operating system at part of the time, so that thesystem 100 can have more functions.

第3A圖為根據本發明一實施例之處理器110進行狀態切換的示意圖。在步驟300，處理器110屬於第一狀態且執行第一作業系統。在步驟302，處理器110判斷是否符合切換至第二作業系統的一或多個條件，若是，流程進入步驟304；若否，流程回到步驟300。在本實施例中，符合切換至第二作業系統的一或多個條件可以是第一作業系統處於閒置狀態(idle)或是準備進入閒置狀態、第一作業系統的運作時間到達一預設時間...等等。在步驟304，處理器110先切換至暫時狀態的超高權限模式以將第一狀態切換至第二狀態，並開始在第二狀態下執行第二作業系統。在步驟306，處理器110判斷是否符合切換至第一作業系統的一或多個條件，若是，流程進入步驟308；若否，流程回到步驟304。在本實施例中，符合切換至第一作業系統的一或多個條件可以是接收到需要第一作業系統來處理的硬體中斷訊號，例如影像傳感器接收到影像資料、影像訊號處理器處理完一張圖像、或是影像編碼器編碼完一張圖像...等等；或是第二作業系統主動發出軟體中斷請求，以要求第一作業系統處理某些功能。在步驟308，處理器110先切換至暫時狀態的超高權限模式以將第二狀態切換至第一狀態，且流程回到步驟300。FIG. 3A is a schematic diagram of aprocessor 110 switching states according to an embodiment of the present invention. Instep 300, theprocessor 110 is in a first state and executes a first operating system. Instep 302, theprocessor 110 determines whether one or more conditions for switching to a second operating system are met. If so, the process proceeds to step 304; if not, the process returns to step 300. In this embodiment, the one or more conditions for switching to the second operating system may be that the first operating system is in an idle state or is about to enter an idle state, the operating time of the first operating system reaches a preset time, etc. Instep 304, theprocessor 110 first switches to a temporary ultra-high privilege mode to switch the first state to the second state, and starts to execute the second operating system in the second state. Instep 306, theprocessor 110 determines whether one or more conditions for switching to the first operating system are met. If so, the process entersstep 308; if not, the process returns to step 304. In this embodiment, the one or more conditions for switching to the first operating system can be receiving a hardware interrupt signal that needs to be processed by the first operating system, such as an image sensor receiving image data, an image signal processor processing an image, or an image encoder encoding an image, etc.; or the second operating system actively sends a software interrupt request to request the first operating system to process certain functions. Instep 308, theprocessor 110 first switches to a temporary ultra-high privilege mode to switch the second state to the first state, and the process returns to step 300.

第3B圖為根據本發明一實施例之由第一狀態切換至第二狀態的示意圖。如第3B圖所示，當處理器110判斷符合切換至第二作業系統的一或多個條件時，處理器110可以在第一狀態下的任何模式(例如，低權限模式與高權限模式)下透過特定指令先切換至暫時狀態的超高權限模式。在處理器110切換至暫時狀態的超高權限模式之後，在超高權限模式下處理器110將目前第一狀態的內容儲存至記憶體130，並將之前保存在記憶體130內之處理器110於第二狀態下的內容還原至處理器110中。接著，處理器110自暫時狀態的超高權限模式切換至第二狀態，並繼續之前處理器110於第二狀態時的操作。FIG. 3B is a schematic diagram of switching from the first state to the second state according to an embodiment of the present invention. As shown in FIG. 3B , when theprocessor 110 determines that one or more conditions for switching to the second operating system are met, theprocessor 110 can switch to a temporary ultra-high privilege mode through a specific instruction in any mode (e.g., low privilege mode and high privilege mode) in the first state. After theprocessor 110 switches to the temporary ultra-high privilege mode, in the ultra-high privilege mode, theprocessor 110 stores the content of the current first state to thememory 130, and restores the content of theprocessor 110 in the second state previously stored in thememory 130 to theprocessor 110. Then, theprocessor 110 switches from the temporary state of ultra-high privilege mode to the second state, and continues the previous operation of theprocessor 110 in the second state.

第3C圖為根據本發明一實施例之由第二狀態切換至第一狀態的示意圖。如第3C圖所示，當處理器110判斷符合切換至第一作業系統的一或多個條件時，處理器110可以在第二狀態下的任何模式(例如，低權限模式與高權限模式)下透過特定指令先切換至暫時狀態的超高權限模式。在處理器110切換至暫時狀態的超高權限模式之後，在暫時狀態的超高權限模式下處理器110將目前第二狀態的內容儲存至記憶體130，並將之前保存在記憶體130內之處理器110於第一狀態下的內容還原至處理器110中。接著，處理器110自暫時狀態的超高權限模式切換至第一狀態，並繼續之前處理器110於第一狀態時的操作。FIG. 3C is a schematic diagram of switching from the second state to the first state according to an embodiment of the present invention. As shown in FIG. 3C , when theprocessor 110 determines that one or more conditions for switching to the first operating system are met, theprocessor 110 can switch to the temporary state ultra-high privilege mode through a specific instruction in any mode (e.g., low privilege mode and high privilege mode) in the second state. After theprocessor 110 switches to the temporary state ultra-high privilege mode, theprocessor 110 in the temporary state ultra-high privilege mode stores the content of the current second state to thememory 130 in the temporary state ultra-high privilege mode, and restores the content of theprocessor 110 in the first state previously stored in thememory 130 to theprocessor 110. Then, theprocessor 110 switches from the temporary state of ultra-high privilege mode to the first state, and continues the previous operation of theprocessor 110 in the first state.

第4A圖為根據本發明另一實施例之系統400的示意圖。如第4A圖所示，系統400包含了一第一處理器410、一非揮發性記憶體420、一記憶體430以及一第二處理器440，其中非揮發性記憶體420儲存了一第一程式碼422以及一第二程式碼424。在本實施例中，非揮發性記憶體420可以是一唯讀記憶體或是一快閃記憶體，記憶體430可以是一靜態隨機存取記憶體或是一動態隨機存取記憶體，第一程式碼422係為一第一作業系統的程式碼，第二程式碼424係為一第二作業系統的程式碼，其中第一作業系統是輕量級的作業系統，而第二作業系統是功能相對完整的作業系統。在本實施例中，第一處理器410與第二處理器440可以是不同的處理器，或是一個多核心處理器中的兩個核心電路。FIG. 4A is a schematic diagram of asystem 400 according to another embodiment of the present invention. As shown in FIG. 4A, thesystem 400 includes afirst processor 410, anon-volatile memory 420, amemory 430, and asecond processor 440, wherein thenon-volatile memory 420 stores afirst program code 422 and asecond program code 424. In this embodiment, thenon-volatile memory 420 can be a read-only memory or a flash memory, thememory 430 can be a static random access memory or a dynamic random access memory, thefirst program code 422 is a program code of a first operating system, and thesecond program code 424 is a program code of a second operating system, wherein the first operating system is a lightweight operating system, and the second operating system is a relatively complete operating system. In this embodiment, thefirst processor 410 and thesecond processor 440 can be different processors, or two core circuits in a multi-core processor.

第4A圖之第一處理器410對於非揮發性記憶體420與記憶體430的操作同第1圖之處理器110，因此相關細節在此不再贅述。在本實施例中，第二處理器440可以具有以下三種不同的操作，在第一個例子中，第二處理器440可以如同第一處理器410基於不同權限的分時多工的設計來切換不同的狀態執行第一作業系統或是第二作業系統，例如第二處理器440在第一狀態時執行第一作業系統，並在第二狀態時執行第二作業系統；在第二個例子中，第二處理器440只讀取第一程式碼422以執行第一作業系統及相關的應用程式，而不會執行第二作業系統；在第三個例子中，第二處理器440只讀取第二程式碼424以執行第二作業系統及相關的應用程式，而不會執行第一作業系統。此外，在一實施例中，當第一處理器410在第一狀態中執行第一作業系統時，第二處理器440在第二狀態中執行第二作業系統；以及當第一處理器410在第二狀態中執行第二作業系統時，第二處理器440在第一狀態中執行第一作業系統。The operations of thefirst processor 410 in FIG. 4A on thenon-volatile memory 420 and thememory 430 are the same as those of theprocessor 110 in FIG. 1 , and thus the related details are not repeated here. In this embodiment, thesecond processor 440 can have the following three different operations. In the first example, thesecond processor 440 can switch between different states to execute the first operating system or the second operating system based on the time-division multiplexing design of different permissions like thefirst processor 410. For example, thesecond processor 440 executes the first operating system in the first state and executes the second operating system in the second state; in the second example, thesecond processor 440 only reads thefirst program code 422 to execute the first operating system and related applications, but does not execute the second operating system; in the third example, thesecond processor 440 only reads thesecond program code 424 to execute the second operating system and related applications, but does not execute the first operating system. Furthermore, in one embodiment, when thefirst processor 410 executes the first operating system in the first state, thesecond processor 440 executes the second operating system in the second state; and when thefirst processor 410 executes the second operating system in the second state, thesecond processor 440 executes the first operating system in the first state.

舉例來說，參考第4B圖所示之根據本發明一實施例之系統400在上電後的操作流程圖。在系統400開始被供電或是由睡眠模式被喚醒後，在步驟401，第一處理器410開始進行初始化操作，例如對非揮發性記憶體420與記憶體430進行初始化操作。在步驟402，第一處理器410自非揮發性記憶體420讀取第一程式碼422，並將第一程式碼422載入至記憶體430中。在步驟403，第一處理器410執行第一程式碼422並建立第一作業系統的環境，例如控制第一處理器410在第一狀態執行第一作業系統，並設定第一處理器410的狀態切換流程，例如狀態切換之中斷條件與切換流程。此外，在完成步驟403之建立第一作業系統的環境後，基於分時多工的設計，第一處理器410在第一狀態執行第一作業系統或是其下的應用程式。For example, referring to FIG. 4B , which is a flowchart of the operation of thesystem 400 according to an embodiment of the present invention after power-on, after thesystem 400 starts to be powered on or wakes up from the sleep mode, instep 401, thefirst processor 410 starts to perform initialization operations, such as initializing thenon-volatile memory 420 and thememory 430. Instep 402, thefirst processor 410 reads thefirst program code 422 from thenon-volatile memory 420 and loads thefirst program code 422 into thememory 430. Instep 403, thefirst processor 410 executes thefirst program code 422 and establishes the environment of the first operating system, such as controlling thefirst processor 410 to execute the first operating system in the first state, and setting the state switching process of thefirst processor 410, such as the interrupt condition and switching process of the state switching. In addition, after completingstep 403 of establishing the environment of the first operating system, based on the design of time-sharing multiplexing, thefirst processor 410 executes the first operating system or its application in the first state.

此外，在第一處理器410執行第一作業系統或是其下應用程式的過程中，於步驟404，第二處理器440可以在第一狀態中以較低優先權的執行緒形式自非揮發性記憶體420讀取第二程式碼424，並將第二程式碼424載入至記憶體430中。接著，於步驟405，第一處理器410由第一狀態切換至第二狀態，並開始執行第二程式碼424並建立第二作業系統的環境，以基於分時多工的設計下在第二狀態執行第二作業系統或是其下的應用程式。同時地，第二處理器440亦可以由第一狀態切換至第二狀態，並開始執行第二程式碼424，以基於分時多工的設計下在第二狀態執行第二作業系統或是其下的應用程式。In addition, during the process of thefirst processor 410 executing the first operating system or the application program thereunder, instep 404, thesecond processor 440 can read thesecond program code 424 from thenon-volatile memory 420 in the form of a thread with a lower priority in the first state, and load thesecond program code 424 into thememory 430. Then, instep 405, thefirst processor 410 switches from the first state to the second state, and starts to execute thesecond program code 424 and establish the environment of the second operating system, so as to execute the second operating system or the application program thereunder in the second state based on the design of time-division multiplexing. At the same time, thesecond processor 440 can also switch from the first state to the second state and start executing thesecond program code 424 to execute the second operating system or its application in the second state based on the time-division multiplexing design.

在一實施例中，第1圖所示之系統100可以應用在一影像聲音擷取系統中，例如可以進行影像與聲音擷取的相機、手機、平板電腦、筆記型電腦...等等。如第5圖所示，一電子裝置500包含了處理器110、非揮發性記憶體120、記憶體130、一影像傳感器510、一影像訊號處理器520、一麥克風530以及一聲音訊號處理器540，其中對應至第一作業系統的第一程式碼122包含了初始化影像傳感器510、影像訊號處理器520、麥克風530以及聲音訊號處理器540的功能，以及上述四個元件持續運作過程中處理器須介入的控制程序；以及對應至第二作業系統的第二程式碼124包含了對視訊或音訊資料進行處理、寫檔、傳輸(例如網路傳輸)的功能。In one embodiment, thesystem 100 shown in FIG. 1 can be applied to an image and sound capture system, such as a camera, a mobile phone, a tablet computer, a laptop computer, etc. that can capture images and sounds. As shown in FIG. 5 , anelectronic device 500 includes aprocessor 110, anon-volatile memory 120, amemory 130, animage sensor 510, animage signal processor 520, amicrophone 530, and anaudio signal processor 540, wherein thefirst program code 122 corresponding to the first operating system includes the functions of initializing theimage sensor 510, theimage signal processor 520, themicrophone 530, and theaudio signal processor 540, and the control procedures that the processor must intervene in during the continuous operation of the above four components; and thesecond program code 124 corresponding to the second operating system includes the functions of processing, writing files, and transmitting (e.g., network transmission) video or audio data.

在第5圖所示之電子裝置500的操作中，當電子裝置500上電後，由於第一狀態中輕量級的第一作業系統可以快速地完成初始化等相關操作，故處理器110可以在很短的時間內便控制影像傳感器510、影像訊號處理器520、麥克風530以及聲音訊號處理器540將所持續產生的視訊資料或音訊資料暫存於記憶體130中。接著，當處理器110執行上述第一作業系統的過程中有進入閒置狀態時，便切換至第二狀態以執行第二作業系統，並自記憶體130中取出視訊或音訊資料，對其進行處理、寫檔或網路傳輸等後續處理。此外，在處理器110執行第二作業系統的期間，若影像訊號處理器520或聲音訊號處理器540發出中斷通知，則處理器110會根據系統啟動時的設定立刻切換至第一狀態以執行第一作業系統，以執行相關作業(例如控制影像訊號處理器520下次執行運算時輸出資料到記憶體130的哪一個位置、或是計算影像亮度並控制影像傳感器510曝光長度)。In the operation of theelectronic device 500 shown in FIG. 5 , after theelectronic device 500 is powered on, theprocessor 110 can control theimage sensor 510, theimage signal processor 520, themicrophone 530, and thesound signal processor 540 to temporarily store the continuously generated video data or audio data in thememory 130 in a very short time because the lightweight first operating system in the first state can quickly complete the initialization and other related operations. Then, when theprocessor 110 enters an idle state during the execution of the first operating system, it switches to the second state to execute the second operating system, and fetches the video or audio data from thememory 130 to process, write files, or transmit over the network, and other subsequent processing. In addition, when theprocessor 110 is executing the second operating system, if theimage signal processor 520 or thesound signal processor 540 issues an interrupt notification, theprocessor 110 will immediately switch to the first state to execute the first operating system according to the settings when the system is started, so as to perform related operations (for example, controlling the position of thememory 130 to which theimage signal processor 520 outputs data when performing the calculation next time, or calculating the image brightness and controlling the exposure length of the image sensor 510).

第6圖為根據本發明一實施例之電子裝置600的示意圖。如第6圖所示，電子裝置600包含了處理器110、非揮發性記憶體120、記憶體130、影像傳感器510、影像訊號處理器520、麥克風530以及聲音訊號處理器540，一供電裝置610以及一偵測裝置(在本實施例中，係以物件移動偵測裝置620為例來進行說明)。在本實施例中，電子裝置600可以根據目前的操作狀態而選擇操作於正常或是休眠模式，而當電子裝置600處於一休眠模式時，供電裝置610會暫停供電給處理器110、非揮發性記憶體120、記憶體130、影像傳感器510、影像訊號處理器520、麥克風530以及聲音訊號處理器540中至少一部份的元件，而此時物件移動偵測裝置620會致能以偵測是否有物件移動。若是物件移動偵測裝置620偵測到有物件移動，則會產生一指令以觸發供電裝置610開始提供電源給相關的元件。而當電子裝置600被喚醒之後，則會根據第2圖所示的流程進行操作，亦即處理器110優先操作於第一狀態並執行第一作業系統。FIG. 6 is a schematic diagram of anelectronic device 600 according to an embodiment of the present invention. As shown in FIG. 6 , theelectronic device 600 includes aprocessor 110, anon-volatile memory 120, amemory 130, animage sensor 510, animage signal processor 520, amicrophone 530, and anaudio signal processor 540, apower supply device 610, and a detection device (in this embodiment, the objectmovement detection device 620 is used as an example for explanation). In this embodiment, theelectronic device 600 can choose to operate in a normal mode or a sleep mode according to the current operating state. When theelectronic device 600 is in a sleep mode, thepower supply device 610 will suspend the power supply to at least a part of the components of theprocessor 110, thenon-volatile memory 120, thememory 130, theimage sensor 510, theimage signal processor 520, themicrophone 530 and thesound signal processor 540, and the objectmovement detection device 620 will be enabled to detect whether an object moves. If the objectmovement detection device 620 detects that an object moves, a command will be generated to trigger thepower supply device 610 to start providing power to the relevant components. When theelectronic device 600 is awakened, it will operate according to the process shown in Figure 2, that is, theprocessor 110 will preferentially operate in the first state and execute the first operating system.

需注意的是，第6圖所示的物件移動偵測裝置620僅是一範例說明，而非是本發明的限制。在其他的實施例中，物件移動偵測裝置620可以被替換為任何可以用來觸發電源操作的機制。It should be noted that the objectmovement detection device 620 shown in FIG. 6 is only an example and is not a limitation of the present invention. In other embodiments, the objectmovement detection device 620 can be replaced by any mechanism that can be used to trigger power operation.

簡要歸納本發明，在本發明的實施例中，透過在系統上電後採用輕量級的第一作業系統，可以快速地進行初始化並執行相關的應用程式；此外，透過分時多工設計讓處理器在第一作業系統閒置時執行功能相對完整的第二作業系統，可以讓系統具支援較多功能。To briefly summarize the present invention, in an embodiment of the present invention, by using a lightweight first operating system after the system is powered on, it can quickly initialize and execute related applications; in addition, by using a time-sharing multiplexing design, the processor can execute a relatively complete second operating system when the first operating system is idle, so that the system can support more functions.

以上所述僅為本發明之較佳實施例，凡依本發明申請專利範圍所做之均等變化與修飾，皆應屬本發明之涵蓋範圍。The above is only the preferred embodiment of the present invention. All equivalent changes and modifications made according to the scope of the patent application of the present invention shall fall within the scope of the present invention.

200~210:步驟200~210: Steps

Claims (12)

Translated fromChinese

一種處理器控制方法，包含有：控制一處理器於一第一狀態中執行一第一作業系統；於該處理器執行該第一作業系統滿足一特定條件時，控制該處理器由該第一狀態切換為一第二狀態，其中該處理器由該第一狀態切換至該第二狀態的過程中，係先切換至具超高權限的一暫時狀態；以及控制該處理器於該第二狀態中執行一第二作業系統，其中該第一狀態的權限高於該第二狀態的權限。A processor control method includes: controlling a processor to execute a first operating system in a first state; when the processor executes the first operating system and satisfies a specific condition, controlling the processor to switch from the first state to a second state, wherein the processor is first switched to a temporary state with super high authority during the process of switching from the first state to the second state; and controlling the processor to execute a second operating system in the second state, wherein the authority of the first state is higher than the authority of the second state.如申請專利範圍第1項所述之處理器控制方法，其中該第一作業系統係為一即時作業系統(real-time operating system)。The processor control method as described in Item 1 of the patent application, wherein the first operating system is a real-time operating system.如申請專利範圍第1項所述之處理器控制方法，其中該特定條件係為於該第一作業系統閒置時。The processor control method as described in item 1 of the patent application scope, wherein the specific condition is when the first operating system is idle.如申請專利範圍第1項所述之處理器控制方法，其中該處理器係透過讀取一第一程式碼來執行該第一作業系統，透過讀取一第二程式碼來執行該第二作業系統，且該處理器係設置於一電子裝置中，且該方法另包含有：在該電子裝置電源啟動後，在讀取該第二程式碼以執行該第二作業系統之前，優先讀取該第一程式碼以執行該第一作業系統。As described in item 1 of the patent application scope, the processor executes the first operating system by reading a first program code and executes the second operating system by reading a second program code, and the processor is set in an electronic device, and the method further includes: after the electronic device is powered on, before reading the second program code to execute the second operating system, the first program code is preferentially read to execute the first operating system.如申請專利範圍第1項所述之處理器控制方法，其中該處理器係設置於包含一相機的一電子裝置中，且控制該處理器於該第一狀態中執行該第一作業系統的步驟包含有：執行該第一作業系統以控制該相機中的一影像傳感器，並暫存該影像傳感器所擷取的一影像資料；以及控制該處理器於該第二狀態中執行該第二作業系統的步驟包含有處理該影像資料並啟動一網路傳輸功能以傳送該處理後的影像資料。The processor control method as described in item 1 of the patent application scope, wherein the processor is disposed in an electronic device including a camera, and the steps of controlling the processor to execute the first operating system in the first state include: executing the first operating system to control an image sensor in the camera and temporarily storing an image data captured by the image sensor; and controlling the processor to execute the second operating system in the second state includes processing the image data and activating a network transmission function to transmit the processed image data.如申請專利範圍第1項所述之處理器控制方法，其中該處理器係設置於一電子裝置中，且該處理器控制方法另包含有：於該電子裝置處於一休眠狀態時，偵測該電子裝置是否接收到一觸發電源操作；以及若是偵測到該電子裝置接收到該觸發電源操作，於該處理器電源啟動之後，控制該處理器於該第一狀態中執行該第一作業系統。As described in item 1 of the patent application scope, the processor is set in an electronic device, and the processor control method further includes: when the electronic device is in a sleep state, detecting whether the electronic device receives a trigger power operation; and if it is detected that the electronic device receives the trigger power operation, after the processor is powered on, controlling the processor to execute the first operating system in the first state.如申請專利範圍第6項所述之處理器控制方法，其中該觸發電源操作係為一物件移動偵測操作。The processor control method as described in Item 6 of the patent application scope, wherein the trigger power operation is an object movement detection operation.如申請專利範圍第1項所述之處理器控制方法，其中該處理器係為一第一處理器，且該處理器控制方法另包含有：於該第一處理器於該第一狀態中執行該第一作業系統時，控制一第二處理器於該第二狀態中執行該第二作業系統；以及於該第一處理器於該第二狀態中執行該第二作業系統時，控制該第二處理器於該第一狀態中執行該第一作業系統。As described in item 1 of the patent application scope, the processor is a first processor, and the processor control method further includes: when the first processor executes the first operating system in the first state, controlling a second processor to execute the second operating system in the second state; and when the first processor executes the second operating system in the second state, controlling the second processor to execute the first operating system in the first state.一種處理器控制方法，包含有：控制一處理器於一第一狀態中執行一作業程序；於該處理器執行該作業程序滿足一特定條件時，控制該處理器由該第一狀態切換為一第二狀態，其中該處理器由該第一狀態切換至該第二狀態的過程中，係先切換至具超高權限的一暫時狀態；以及控制該處理器於該第二狀態中執行一作業系統；其中該第一狀態的權限高於該第二狀態的權限。A processor control method includes: Controlling a processor to execute an operating program in a first state; when the processor executes the operating program and satisfies a specific condition, controlling the processor to switch from the first state to a second state, wherein the processor is first switched to a temporary state with super high authority during the process of switching from the first state to the second state; and controlling the processor to execute an operating system in the second state; wherein the authority of the first state is higher than the authority of the second state.一種系統晶片，包含有：一處理器，用以於一第一狀態中執行一第一作業系統及於一第二狀態中執行一第二作業系統；其中，於該處理器執行該第一作業系統滿足一特定條件時，該處理器由該第一狀態切換為該第二狀態，其中該處理器由該第一狀態切換至該第二狀態的過程中，係先切換至具超高權限的一暫時狀態；該第一狀態的權限高於該第二狀態的權限。A system chip includes: a processor for executing a first operating system in a first state and a second operating system in a second state; wherein, when the processor executes the first operating system and satisfies a specific condition, the processor switches from the first state to the second state, wherein in the process of switching from the first state to the second state, the processor first switches to a temporary state with super high privileges; the privileges of the first state are higher than the privileges of the second state.如申請專利範圍第10項所述之系統晶片，其中該第一作業系統係為一即時作業系統(real-time operating system)。A system chip as described in item 10 of the patent application, wherein the first operating system is a real-time operating system.如申請專利範圍第10項所述之系統晶片，其中該特定條件係為於該第一作業系統閒置時。A system chip as described in item 10 of the patent application, wherein the specific condition is when the first operating system is idle.

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