TWI699747B - Drive current supply circuit, LED display drive device and LED display device - Google Patents

Abstract

Translated fromChinese

本發明主要提供一種驅動電流供應電路，其包括：一基準電流產生單元、一數位控制電流鏡單元和一驅動電流產生單元，其中該基準電流產生單元用以基於該第一參考電壓而產生一基準電流，且該數位控制電流鏡單元包括一第一數位控制電流鏡和一第二數位控制電流鏡。本發明通過設置內置電阻的值來決定該基準電流的值，並通過使用一第一數位控制碼和一第二數位控制碼分別控制所述第一數位控制電流鏡及所述第二數位控制電流鏡的方式，決定此驅動電流供應電路之一輸出電流的調變範圍。The present invention mainly provides a driving current supply circuit, which includes: a reference current generating unit, a digital control current mirror unit, and a driving current generating unit, wherein the reference current generating unit is used to generate a reference based on the first reference voltage The digital control current mirror unit includes a first digital control current mirror and a second digital control current mirror. The present invention determines the value of the reference current by setting the value of the built-in resistor, and controls the first digital control current mirror and the second digital control current by using a first digital control code and a second digital control code, respectively The way of the mirror determines the modulation range of the output current of one of the drive current supply circuits.

Description

Translated fromChinese

驅動電流供應電路、LED顯示驅動裝置及LED顯示裝置Drive current supply circuit, LED display drive device and LED display device

本發明係關於顯示器之技術領域，尤指一種驅動電流供應電路，其可應用於一LED顯示驅動裝置及/或一LED顯示裝置之中。The present invention relates to the technical field of displays, in particular to a driving current supply circuit, which can be applied to an LED display driving device and/or an LED display device.

LED顯示裝置為一種平板顯示裝置，其使用發光二極體(Light-emitting diode, LED)陣列作爲顯示像素。因具備色彩鮮艷、動態範圍廣、亮度高、壽命長、可靠度高等優點，LED顯示器已廣泛地應用於大型廣場、商業廣告、體育場館、信息傳播、新聞發布、證券交易場所，作為一種公眾顯示媒介。The LED display device is a flat panel display device that uses a light-emitting diode (LED) array as display pixels. Due to the advantages of bright colors, wide dynamic range, high brightness, long life, high reliability, LED displays have been widely used in large squares, commercial advertisements, stadiums, information dissemination, press releases, and securities trading venues, as a public display medium.

圖1為習知的一種LED顯示裝置的電路方塊圖。如圖1所示，習知的LED顯示裝置的架構包括：耦接外部的一主機處理器6a的一微控制器1a、一位元栓鎖器2a、一移位暫存器3a、一驅動電流(或定電流)產生器4a、以及一LED顯示面板5a。目前，由於LED顯示裝置的各個組成單元皆採模組化設計，因此，市面上也已經販售有所述驅動電流產生器4a的積體電路晶片，其英文名稱為:Constant-current LED sink driver。當然，市面上也有販售同時整合該位元栓鎖器2a、該移位暫存器3a、與該驅動電流產生器4a的積體電路晶片，其稱為LED顯示面板驅動晶片。Fig. 1 is a circuit block diagram of a conventional LED display device. As shown in FIG. 1, the structure of the conventional LED display device includes: amicrocontroller 1a coupled to anexternal host processor 6a, abit latch 2a, ashift register 3a, and a driving current (Or constant current)generator 4a and anLED display panel 5a. At present, since each component unit of the LED display device adopts a modular design, the integrated circuit chip of the drivingcurrent generator 4a has also been sold on the market. Its English name is: Constant-current LED sink driver . Of course, there are also integrated circuit chips that integrate thebit latch 2a, theshift register 3a, and the drivingcurrent generator 4a at the same time on the market, which are called LED display panel driving chips.

圖2為習知的驅動電流產生器的電路方塊圖，且圖3為習知的驅動電流產生器的電路拓樸圖。如圖2與圖3所示，習知的驅動電流產生器4a的電路架構主要包括：一基準電流產生單元41a、一電流鏡像單元42a和一驅動電流產生單元43a。其中，該電流鏡像單元42a包括一第一P型電晶體421a、一第二P型電晶體、‧‧‧、和一第NP型電晶體42Na。並且，該基準電流產生單元41a包括一第一運算放大器411a、該第一電晶體元件421a、及透過一外置電阻連接腳位412a連接的一外置電阻413a。另一方面，該驅動電流產生單元43a包括一第二運算放大器430a、一第一N型電晶體431a、一第二N型電晶體、‧‧‧  、和一第MP型電晶體43Ma。FIG. 2 is a circuit block diagram of a conventional driving current generator, and FIG. 3 is a circuit topology diagram of a conventional driving current generator. As shown in FIGS. 2 and 3, the circuit structure of the conventional drivingcurrent generator 4a mainly includes: a referencecurrent generating unit 41a, acurrent mirror unit 42a, and a drivingcurrent generating unit 43a. Wherein, thecurrent mirror unit 42a includes a first P-type transistor 421a, a second P-type transistor, ‧‧‧, and a NP-type transistor 42Na. In addition, the referencecurrent generating unit 41a includes a firstoperational amplifier 411a, thefirst transistor 421a, and anexternal resistor 413a connected through an externalresistor connection pin 412a. On the other hand, the drivingcurrent generating unit 43a includes a secondoperational amplifier 430a, a first N-type transistor 431a, a second N-type transistor, and an MP-type transistor 43Ma.

該第一運算放大器411a、該第一電晶體元件421a、與該外置電阻413a共同構成一負反饋系統，使得該基準電流產生單元41a所輸出的基準電流I0可由式(1):

計算而得。其中，V_REF為由一帶隙基準電壓電路所提供的一參考電壓，而R_EXT則為外置電阻413a的電阻值。值得注意的是，驅動電流產生器4a的輸出電流(或驅動電流)Iout是由外置電阻413a的電阻值和電流鏡像單元42a的比例所決定。更詳細地說明，由N個P型電晶體(421a, …,42Na)所組成的電流鏡像單元42a用以將基準電流I0轉換成第一電流I1，且第一電流I1會進一步地由M個N型電晶體(431a, …,43Ma)所組成的電流鏡像單元轉換成所述輸出電流Iout。相關的轉換方式可參考如下式(2)、(3)、和(4)。

…………………..…(2)

……………………(3)

………(4)The firstoperational amplifier 411a, thefirst transistor element 421a, and theexternal resistor 413a together form a negative feedback system, so that the reference current I0 output by the reference current generatingunit 41a can be expressed by equation (1):

Calculated. Wherein, V_REF is a reference voltage provided by a band gap reference voltage circuit, and R_EXT is the resistance value of theexternal resistor 413a. It should be noted that the output current (or driving current) Iout of the drivingcurrent generator 4a is determined by the ratio of the resistance value of theexternal resistor 413a and thecurrent mirror unit 42a. In more detail, thecurrent mirror unit 42a composed of N P-type transistors (421a, ..., 42Na) is used to convert the reference current I0 into the first current I1, and the first current I1 is further composed of M The current mirror unit composed of N-type transistors (431a, ..., 43Ma) is converted into the output current Iout. Related conversion methods can refer to the following equations (2), (3), and (4).

…………………..…(2)

……………………(3)

………(4)

就電流鏡像單元42a而言，其內部的每個P型電晶體(421a, …,42Na)的尺寸會被設計成相同，如此便可以基準電流I0與第一電流I1之間的比例便由所述P型電晶體(421a, …,42Na)的數量來決定。同樣的，第一電流I1與輸出電流Iout之間的比例也是所述N型電晶體(431a, …,43Ma)的數量來決定。然而，必須考慮到的是，MOSFET電晶體為一種半導體元件，而由半導體材料製成的電子元件必定受到製程誤差的影響而於電氣特性上造成變異或飄移。就電流鏡像單元42a而言，任兩個P型電晶體之間的閥值電壓失配會造成第一電流I1失配。其中，等效失配電流與P型電晶體的汲極電流的比值可由下式(5)推算。

………(5)For thecurrent mirror unit 42a, the size of each P-type transistor (421a, ..., 42Na) inside it will be designed to be the same, so that the ratio between the reference current I0 and the first current I1 can be determined by The number of P-type transistors (421a, …, 42Na) is determined. Similarly, the ratio between the first current I1 and the output current Iout is also determined by the number of N-type transistors (431a,...,43Ma). However, it must be considered that the MOSFET transistor is a type of semiconductor element, and electronic elements made of semiconductor materials must be affected by process errors and cause variations or drift in electrical characteristics. As for thecurrent mirror unit 42a, the mismatch of the threshold voltage between any two P-type transistors will cause the mismatch of the first current I1. Among them, the ratio of the equivalent mismatch current to the drain current of the P-type transistor can be calculated by the following formula (5).

………(5)

其中，

=

係用以表示閥值電壓失配。易於理解的，閥值電壓失配的大小是由製程工藝參數所決定。同樣的，就驅動電流產生單元43a而言，任兩個N型電晶體之間的閥值電壓失配也會造成輸出電流Iout失配。必須特別說明的是，在一些應用中，驅動電流產生器4a的輸出電流Iout必須調變控制0.5-20mA。可想而知，在調變所述輸出電流Iout之時，電流鏡的汲極電流失配也會跟著一起調變，造成電路的不穩定。among them,

=

It is used to indicate the threshold voltage mismatch. It is easy to understand that the size of the threshold voltage mismatch is determined by the process parameters. Similarly, with regard to the driving current generatingunit 43a, a mismatch in the threshold voltage between any two N-type transistors will also cause a mismatch in the output current Iout. It must be particularly noted that in some applications, the output current Iout of the drivingcurrent generator 4a must be modulated and controlled by 0.5-20 mA. It is conceivable that when the output current Iout is modulated, the mismatch of the drain current of the current mirror will also be modulated along with it, resulting in circuit instability.

由上述說明可知，習知的驅動電流產生器(Constant-current LED sink driver)4a具有以下實務應用上的缺陷:It can be seen from the above description that the conventional constant-currentLED sink driver 4a has the following practical application defects:

(1)需要額外設置一個外置電阻連接腳位412a以連接的外置電阻413a，造成電路晶片的成本增加。(1) It is necessary to additionally provide an externalresistor connecting pin 412a to connect theexternal resistor 413a, which causes the cost of the circuit chip to increase.

(2)僅能透過P型電晶體(421a, …,42Na)的數量及/或N型電晶體(431a, …,43Ma)的數量和外置電阻413a的電阻值來決定驅動電流產生器4a的輸出電流Iout的值，這對於電流的調變控制上顯然並不夠彈性。(2) The drivecurrent generator 4a can only be determined by the number of P-type transistors (421a, …,42Na) and/or the number of N-type transistors (431a, …,43Ma) and the resistance value of theexternal resistor 413a The value of the output current Iout is obviously not flexible enough for current modulation control.

(3)如前所述，在調變所述輸出電流Iout之時，電流鏡的汲極電流失配失配也會跟著一起調變，造成電路的不穩定。(3) As mentioned above, when the output current Iout is modulated, the mismatch of the drain current of the current mirror will also be modulated along with it, resulting in circuit instability.

因此，本領域亟需一種驅動電流供應電路。Therefore, there is an urgent need for a driving current supply circuit in the art.

本發明之一目的在於提供無需使用任何外置電阻來設置基準電流的驅動電流供應電路，因此減少了一個晶片腳位，降低了使用成本。An object of the present invention is to provide a driving current supply circuit that does not need to use any external resistor to set the reference current, thereby reducing one chip pin and reducing the use cost.

本發明之另一目的在於通過一內置電阻來設置基準電流的值，可以明顯的降低驅動電流供應電路的功耗。Another object of the present invention is to set the value of the reference current through a built-in resistor, which can significantly reduce the power consumption of the driving current supply circuit.

本發明之再一目的在於通過存寫寄存器的方式，使用一第一數位控制碼和一第二數位控制碼來控制驅動電流供應電路，以因應不同的適應場合而將輸出電流調變控制在0.5 mA ~ 20mA。Another object of the present invention is to use a first digital control code and a second digital control code to control the drive current supply circuit by storing and writing the register, so as to control the output current modulation to 0.5 according to different application situations. mA ~ 20mA.

本發明之又一目的令驅動電流供應電路之基準電流的產生及各電流鏡單元所貢獻的電流失配為恆定，不會依據輸出電流的調變範圍而跟著改變。Another object of the present invention is to make the generation of the reference current of the drive current supply circuit and the current mismatch contributed by each current mirror unit constant, and will not change according to the output current adjustment range.

為達成上述目的，本發明提出一種驅動電流供應電路，其包括：To achieve the above objective, the present invention provides a driving current supply circuit, which includes:

一基準電流產生單元，其耦接一第一參考電壓，用以基於該第一參考電壓而產生一基準電流；A reference current generating unit coupled to a first reference voltage for generating a reference current based on the first reference voltage;

一數位控制電流鏡單元，耦接該基準電流產生單元、一第一數位控制碼和一第二數位控制碼，並基於該第一數位控制碼和該第二數位控制碼的控制將該基準電流轉換成一第一電流；以及A digital control current mirror unit is coupled to the reference current generation unit, a first digital control code and a second digital control code, and the reference current is controlled based on the control of the first digital control code and the second digital control code Converted into a first current; and

一驅動電流產生單元，耦接該數位控制電流鏡單元以接收該第一電流，並將該第一電流轉換成一輸出電流。A drive current generating unit is coupled to the digital control current mirror unit to receive the first current and convert the first current into an output current.

在一實施例中，該數位控制電流鏡單元包括：In an embodiment, the digitally controlled current mirror unit includes:

一第一數位控制電流鏡，耦接該基準電流產生單元，用以依據一第一數位控制碼而對該基準電流進行第一次電流轉換處理，且包括一第一P型金氧半場效電晶體、2^N-1個第二P型金氧半場效電晶體和2^N-1個第一開關；其中，該第一P型金氧半場效電晶體的閘極與源極分別耦接該基準電流產生單元與一源極耦接一工作電壓，各所述第二P型金氧半場效電晶體的閘極耦接該第一P型金氧半場效電晶體的閘極，各所述第二P型金氧半場效電晶體的源極耦接該工作電壓；其中，各所述第一開關具有一第一電性端、一第二電性端、與一第一訊號接收端，各所述第一電性端對應耦接各所述第二P型金氧半場效電晶體的汲極，各所述第二電性端耦接第一P型金氧半場效電晶體的汲極，且該第一訊號接收端用以接收該第一數位控制碼；及A first digital control current mirror, coupled to the reference current generation unit, for performing a first current conversion process on the reference current according to a first digital control code, and includes a first P-type metal oxide half field effect voltage Crystal, 2^N -1 second P-type MOSFET and 2^N -1 first switch; wherein the gate and source of the first P-type MOSFET are respectively coupled to the The reference current generating unit and a source are coupled to a working voltage, the gate of each second P-type MOSFET is coupled to the gate of the first P-type MOSFET, and each of the The source of the second P-type MOSFET is coupled to the operating voltage; wherein each of the first switches has a first electrical terminal, a second electrical terminal, and a first signal receiving terminal, Each of the first electrical terminals is correspondingly coupled to the drain of each of the second P-type MOSFET, and each of the second electrical terminals is coupled to the drain of the first P-type MOSFET. Pole, and the first signal receiving terminal is used to receive the first digital control code; and

一第二數位控制電流鏡，耦接該第一數位控制電流鏡，用以依據一第二數位控制碼而對已完成所述第一次電流轉換處理的該基準電流進一步地進行第二次電流轉換處理，並輸出一第一電流；該第二數位控制電流鏡包括一第三P型金氧半場效電晶體、2^M-1個第四P型金氧半場效電晶體和2^M-1個第二開關；其中，各所述第四P型金氧半場效電晶體的閘極耦接該第二P型金氧半場效電晶體的閘極，各所述第四P型金氧半場效電晶體的源極耦接該工作電壓；各所述第二開關具有一第三電性端、一第四電性端、與一第二訊號接收端，各所述第三電性端對應耦接各所述第四P型金氧半場效電晶體的汲極，各所述第四電性端耦接第三P型金氧半場效電晶體的汲極，且該第二訊號接收端用以接收該第二數位控制碼；該第三P型金氧半場效電晶體的閘極與源極分別耦接所述第四P型金氧半場效電晶體的閘極和該工作電壓；以及A second digital control current mirror, coupled to the first digital control current mirror, for performing a second current on the reference current that has completed the first current conversion process according to a second digital control code Convert and process, and output a first current; the second digitally controlled current mirror includes a third P-type MOSFET, 2^M -1 fourth P-type MOSFET and 2^M -1 A second switch; wherein the gate of each of the fourth P-type MOSFET is coupled to the gate of the second P-type MOSFET, and each of the fourth P-type MOSFET The source of the effect transistor is coupled to the operating voltage; each of the second switches has a third electrical terminal, a fourth electrical terminal, and a second signal receiving terminal, each of the third electrical terminals corresponding to Each of the fourth electrical terminals is coupled to the drain of each of the fourth P-type MOSFETs, and each of the fourth electrical terminals is coupled to the drain of the third P-type MOSFETs, and the second signal receiving terminal For receiving the second digital control code; the gate and source of the third P-type MOSFET are respectively coupled to the gate of the fourth P-type MOSFET and the operating voltage; as well as

一驅動電流產生單元，耦接該數位控制電流鏡單元以接收該第一電流，並將該第一電流轉換成一輸出電流。A driving current generating unit is coupled to the digital control current mirror unit to receive the first current and convert the first current into an output current.

在一實施例中，該第一數位控制碼為一二進位碼，且該第二數位控制碼為一溫度計碼。In one embodiment, the first digital control code is a binary code, and the second digital control code is a thermometer code.

在一實施例中，該第一參考電壓由一帶隙參考電壓産生單元所提供。In one embodiment, the first reference voltage is provided by a band gap reference voltage generating unit.

在一實施例中，該基準電流產生單元包括：In an embodiment, the reference current generating unit includes:

一第一運算放大器，以其負輸入端與輸出端分別耦接該第一參考電壓和該第一P型金氧半場效電晶體的閘極；以及A first operational amplifier whose negative input terminal and output terminal are respectively coupled to the first reference voltage and the gate electrode of the first P-type metal oxide semi-field effect transistor; and

一內置電阻，其一端耦接該第一運算放大器的正輸入端，且其另一端耦接至一電路地端。A built-in resistor, one end of which is coupled to the positive input terminal of the first operational amplifier, and the other end of which is coupled to a circuit ground.

在一實施例中，該驅動電流產生單元包括：In an embodiment, the driving current generating unit includes:

一第二運算放大器，以其負輸入端與輸出端分別耦接一第二參考電壓和該第三P型金氧半場效電晶體的汲極；以及A second operational amplifier whose negative input terminal and output terminal are respectively coupled to a second reference voltage and the drain of the third P-type MOSFET; and

一電流鏡單元，包括一第一N型金氧半場效電晶體與一第二N型金氧半場效電晶體；其中，該第一N型金氧半場效電晶體的閘極與汲極分別耦接該第二運算放大器的輸出端與正輸入端，且該第一N型金氧半場效電晶體的源極耦接該電路地端；該第二N型金氧半場效電晶體的閘極與源極分別耦接該第一N型金氧半場效電晶體的閘極與該電路地端，且該第二N型金氧半場效電晶體的汲極作為所述驅動電流供應電路之一電流輸出端。A current mirror unit, including a first N-type MOSFET and a second N-type MOSFET; wherein the gate and drain of the first N-type MOSFET are respectively The output terminal and the positive input terminal of the second operational amplifier are coupled, and the source of the first N-type MOSFET is coupled to the circuit ground; the gate of the second N-type MOSFET The electrode and the source are respectively coupled to the gate of the first N-type MOSFET and the circuit ground, and the drain of the second N-type MOSFET is used as the driving current supply circuit A current output terminal.

在一實施例中，該第一運算放大器與該第二運算放大器皆為一誤差放大器。In one embodiment, the first operational amplifier and the second operational amplifier are both error amplifiers.

另外，本發明進一步提出一種LED顯示驅動裝置，其具有至少一組如前所述之驅動電流供應電路。In addition, the present invention further provides an LED display driving device, which has at least one set of driving current supply circuits as described above.

在可能的實施例中，該LED顯示驅動裝置更包括：In a possible embodiment, the LED display driving device further includes:

一微控制器，耦接外部的一主機處理器；A microcontroller, coupled to an external host processor;

至少一位元栓鎖器，耦接該微控制器，且各所述位元栓鎖器對應地耦接至一個LED顯示面板；At least one bit latch, coupled to the microcontroller, and each of the bit latches is correspondingly coupled to an LED display panel;

至少一移位暫存器，耦接該微控制器；以及At least one shift register coupled to the microcontroller; and

其中，各所述驅動電流供應電路對應地耦接於各所述移位暫存器和各所述LED顯示面板之間。Wherein, each of the driving current supply circuits is correspondingly coupled between each of the shift registers and each of the LED display panels.

再者，本發明又提出一種LED顯示裝置，其包括：Furthermore, the present invention provides an LED display device, which includes:

至少一LED顯示面板；At least one LED display panel;

至少一位元栓鎖器，對應地耦接至所述至少一LED顯示面板；At least one-bit latch, correspondingly coupled to the at least one LED display panel;

一微控制器，耦接所述至少一位元栓鎖器；A microcontroller coupled to the at least one-bit latch;

至少一組如前所述之驅動電流供應電路，其中各所述驅動電流供應電路對應地耦接於各所述位元栓鎖器和各所述LED顯示面板之間；以及At least one set of driving current supply circuits as described above, wherein each of the driving current supply circuits is correspondingly coupled between each of the bit latches and each of the LED display panels; and

至少一移位暫存器，耦接於該微控制器，且各所述移位暫存器對應地耦接各所述驅動電流供應電路。At least one shift register is coupled to the microcontroller, and each of the shift registers is correspondingly coupled to each of the driving current supply circuits.

為使  貴審查委員能進一步瞭解本發明之結構、特徵、目的、與其優點，茲附以圖式及較佳具體實施例之詳細說明如後。In order to enable your reviewer to further understand the structure, features, purpose, and advantages of the present invention, the drawings and detailed descriptions of preferred embodiments are attached as follows.

請參閱圖4，其顯示包含本發明之一種驅動電流供應電路的一LED顯示裝置的電路方塊圖。如圖4所示，LED顯示裝置的架構包括：耦接外部的一主機處理器6的一微控制器4、至少一位元栓鎖器3、至少一移位暫存器2、至少一本發明之驅動電流供應電路1、以及至少一LED顯示面板5。於此，所謂“至少一”指的是其數量為一個或一個以上。通常，一個LED顯示裝置會包含多個LED顯示面板5，因此，對應於該LED顯示面板5的設置數量，所述位元栓鎖器3、所述移位暫存器2、以及本發明之驅動電流供應電路1的數量也必須與LED顯示面板5的數量相同。易於理解的，模組化設計有助於LED顯示裝置的產線組裝與測試。因此，實務上可以將一組位元栓鎖器3、一組移位暫存器2、與一組本發明之驅動電流供應電路1整合成單一積體電路晶片，其稱為LED顯示驅動晶片。進一步地，一組LED顯示驅動晶片還可以與一組LED顯示面板5整合成一個LED顯示面板模組。Please refer to FIG. 4, which shows a circuit block diagram of an LED display device including a driving current supply circuit of the present invention. As shown in FIG. 4, the structure of the LED display device includes: amicrocontroller 4 coupled to an external host processor 6, at least onebit latch 3, at least oneshift register 2, at least one of the present invention The drivingcurrent supply circuit 1 and at least oneLED display panel 5. Here, the so-called "at least one" means that the number is one or more. Generally, an LED display device includes multipleLED display panels 5. Therefore, corresponding to the number of theLED display panels 5, thebit latch 3, theshift register 2, and the driver of the present invention The number ofcurrent supply circuits 1 must also be the same as the number ofLED display panels 5. It is easy to understand, the modular design is helpful for the production line assembly and testing of LED display devices. Therefore, in practice, a set of bit latches 3, a set ofshift registers 2, and a set of drivecurrent supply circuits 1 of the present invention can be integrated into a single integrated circuit chip, which is called an LED display drive chip. Further, a group of LED display driver chips can also be integrated with a group ofLED display panels 5 to form an LED display panel module.

圖5為本發明之驅動電流供應電路的電路方塊圖。本發明之驅動電流供應電路1主要包括一基準電流產生單元11、一數位控制電流鏡單元12、以及一驅動電流產生單元13。該基準電流產生單元11耦接一第一參考電壓VREF，用以基於該第一參考電壓VREF而產生一基準電流I0。並且，該數位控制電流鏡單元12耦接該基準電流產生單元11、一第一數位控制碼DR和一第二數位控制碼DI，並基於該第一數位控制碼DR和該第二數位控制碼DI的控制將該基準電流I0轉換成一第一電流I1。該驅動電流產生單元13，如圖5所示，其耦接該數位控制電流鏡單元12以接收該第一電流I1，並將該第一電流I1轉換成一輸出電流Iout。FIG. 5 is a circuit block diagram of the driving current supply circuit of the present invention. The drivingcurrent supply circuit 1 of the present invention mainly includes a referencecurrent generating unit 11, a digital controlcurrent mirror unit 12, and a drivingcurrent generating unit 13. The referencecurrent generating unit 11 is coupled to a first reference voltage VREF for generating a reference current I0 based on the first reference voltage VREF. Moreover, the digital controlcurrent mirror unit 12 is coupled to the referencecurrent generation unit 11, a first digital control code DR and a second digital control code DI, and is based on the first digital control code DR and the second digital control code The DI control converts the reference current I0 into a first current I1. The drivingcurrent generating unit 13, as shown in FIG. 5, is coupled to the digital controlcurrent mirror unit 12 to receive the first current I1, and convert the first current I1 into an output current Iout.

繼續地參閱圖5 ，並請同時參閱圖6，其為本發明之的驅動電流供應電路的電路拓樸圖。由圖6可知，該基準電流產生單元11主要包括一第一運算放大器111和一內置電阻112，該第一運算放大器111的負輸入端耦接一第一參考電壓V_REF。並且，該內置電阻112的一端耦接該第一運算放大器111的正輸入端，且其另一端耦接至一電路地端。補充說明的是，該第一參考電壓V_REF由一帶隙參考電壓産生單元所提供，且該帶隙參考電壓産生單元可以整合於本發明之驅動電流供應電路1之中，也可以是獨立的一個外部電路單元。Continue to refer to FIG. 5, and also refer to FIG. 6, which is a circuit topology diagram of the driving current supply circuit of the present invention. It can be seen from FIG. 6 that the referencecurrent generating unit 11 mainly includes a firstoperational amplifier 111 and a built-inresistor 112. The negative input terminal of the firstoperational amplifier 111 is coupled to a first reference voltage V_REF . Moreover, one end of the built-inresistor 112 is coupled to the positive input terminal of the firstoperational amplifier 111, and the other end thereof is coupled to a circuit ground. It is added that the first reference voltage V_{REF is} provided by a bandgap reference voltage generating unit, and the bandgap reference voltage generating unit can be integrated in the drivingcurrent supply circuit 1 of the present invention, or it can be an independent one. External circuit unit.

該數位控制電流鏡單元12包括一第一數位控制電流鏡121與一第二數位控制電流鏡122；其中，第一數位控制電流鏡121耦接該基準電流產生單元11，且包括一第一P型金氧半場效電晶體1210、2^N-1個第二P型金氧半場效電晶體1211和2^N-1個第一開關1212。必須特別說明的是，該第一運算放大器111、該內置電阻112和該第一P型金氧半場效電晶體1210組成一負反饋系統。在此負反饋系統的作用下，基準電流產生單元11係基於式(6):

產生基準電流I0；其中，V_REF為第一參考電壓的值，且R1為所述內置電阻112的電阻值。The digitally controlledcurrent mirror unit 12 includes a first digitally controlledcurrent mirror 121 and a second digitally controlledcurrent mirror 122; wherein, the first digitally controlledcurrent mirror 121 is coupled to the referencecurrent generating unit 11 and includes a first P Type metal oxide halffield effect transistor 1210, 2^N -1 second P type metal oxide halffield effect transistor 1211 and 2^N -1first switch 1212. It must be particularly noted that the firstoperational amplifier 111, the built-inresistor 112 and the first P-type MOSFET 1210 form a negative feedback system. Under the action of this negative feedback system, the referencecurrent generating unit 11 is based on formula (6):

A reference current I0 is generated; where V_REF is the value of the first reference voltage, and R1 is the resistance value of the built-inresistor 112.

依據本發明之設計，第一數位控制電流鏡121係基於一第一數位控制碼DR的控制而對該基準電流I0進行第一次電流轉換處理。如圖6所示，於所述第一數位控制電流鏡121的架構中，該第一P型金氧半場效電晶體1210的閘極與源極分別耦接該基準電流產生單元11與一源極耦接一工作電壓V_DD。並且，各所述第二P型金氧半場效電晶體1211的閘極耦接該第一P型金氧半場效電晶體1210的閘極，且各所述第二P型金氧半場效電晶體1211的源極耦接該工作電壓V_DD。另一方面，各所述第一開關1212具有一第一電性端、一第二電性端、與一第一訊號接收端；其中，各所述第一電性端對應耦接各所述第二P型金氧半場效電晶體1211的汲極，各所述第二電性端耦接第一P型金氧半場效電晶體1210的汲極，且該第一訊號接收端用以接收該第一數位控制碼DR。According to the design of the present invention, the first digital controlcurrent mirror 121 performs the first current conversion process on the reference current I0 based on the control of a first digital control code DR. As shown in FIG. 6, in the structure of the first digital controlcurrent mirror 121, the gate and source of the first P-type MOSFET 1210 are respectively coupled to the referencecurrent generating unit 11 and a source The pole is coupled to a working voltage V_DD . Moreover, the gate of each second P-type MOSFET 1211 is coupled to the gate of the first P-type MOSFET 1210, and each of the second P-type MOSFET 1210 is The source of thecrystal 1211 is coupled to the operating voltage V_DD . On the other hand, each of thefirst switches 1212 has a first electrical terminal, a second electrical terminal, and a first signal receiving terminal; wherein, each of the first electrical terminals is correspondingly coupled to each of the The drain of the second P-type MOSFET 1211, each of the second electrical terminals is coupled to the drain of the first P-type MOSFET 1210, and the first signal receiving terminal is used to receive The first digital control code DR.

再者，該第二數位控制電流鏡122耦接該第一數位控制電流鏡121，用以依據一第二數位控制碼DI而對已完成所述第一次電流轉換處理的該基準電流I0進一步地進行第二次電流轉換處理，最終輸出一第一電流I1。如圖6所示，該第二數位控制電流鏡122包括一第三P型金氧半場效電晶體1220、2^M-1個第四P型金氧半場效電晶體1221和2^M-1個第二開關1222。依據本發明之設計，各所述第四P型金氧半場效電晶體1221的閘極耦接該第二P型金氧半場效電晶體1211的閘極，且各所述第四P型金氧半場效電晶體1221的源極耦接該工作電壓V_DD。另一方面，各所述第二開關1222具有一第三電性端、一第四電性端、與一第二訊號接收端；其中，各所述第三電性端對應耦接各所述第四P型金氧半場效電晶體1221的汲極，各所述第四電性端耦接第三P型金氧半場效電晶體1220的汲極，且該第二訊號接收端用以接收該第二數位控制碼DI。補充說明的是，該第三P型金氧半場效電晶體1220的閘極與源極分別耦接所述第四P型金氧半場效電晶體1221的閘極和該工作電壓V_DD。Furthermore, the second digitally controlledcurrent mirror 122 is coupled to the first digitally controlledcurrent mirror 121 for further processing the reference current I0 that has completed the first current conversion process according to a second digital control code DI The second current conversion process is performed on the ground, and a first current I1 is finally output. As shown in FIG. 6, the second digital controlcurrent mirror 122 includes a third P-type MOSFET 1220, 2^M -1 and a fourth P-type MOSFET 1221 and 2^M -1 The second switch 1222. According to the design of the present invention, the gate of each fourth P-type MOSFET 1221 is coupled to the gate of the second P-type MOSFET 1211, and each of the fourth P-type gold The source of the oxygen halffield effect transistor 1221 is coupled to the operating voltage V_DD . On the other hand, each of the second switches 1222 has a third electrical terminal, a fourth electrical terminal, and a second signal receiving terminal; wherein, each of the third electrical terminals is correspondingly coupled to each of the The drain of the fourth P-type MOSFET 1221, each of the fourth electrical terminals is coupled to the drain of the third P-type MOSFET 1220, and the second signal receiving terminal is used for receiving The second digital control code DI. It is supplemented that the gate and source of the third P-type MOSFET 1220 are respectively coupled to the gate and the source of the fourth P-type MOSFET 1221 and the operating voltage V_DD .

簡單地說，第一數位控制電流鏡121包含2^N個P型MOSFET與2^N-1個第一開關1212，且所述2^N-1個第一開關1212係受控於第一數位控制碼DR。並且，第二數位控制電流鏡122包含2^M個P型MOSFET與2^M-1個第二開關1222，且所述2^M-1個第二開關1222係受控於第二數位控制碼DI。特別地，本發明令該第一數位控制碼DR與該第二數位控制碼DI分別為一二進位碼和一溫度計碼。如此設計，則基準電流I0與第一電流I1之間的比值便可以由下式(7)所決定。

……………(7)Simply put, the first digital controlcurrent mirror 121 includes 2^N P-type MOSFETs and 2^N -1first switches 1212, and the 2^N -1first switches 1212 are controlled by a first digital control code DR. In addition, the second digital controlcurrent mirror 122 includes 2^M P-type MOSFETs and 2^M -1 second switches 1222, and the 2^M -1 second switches 1222 are controlled by the second digital control code DI. In particular, in the present invention, the first digital control code DR and the second digital control code DI are respectively a binary code and a thermometer code. With this design, the ratio between the reference current I0 and the first current I1 can be determined by the following equation (7).

……………(7)

繼續地參閱圖5與圖6。該驅動電流產生單元13耦接該數位控制電流鏡單元12的該第二數位控制電流鏡122以接收所述第一電流I1，並將該第一電流I1轉換成一輸出電流Iout。該驅動電流產生單元13包括一第二運算放大器131和一電流鏡單元132。於本發明中，該第一運算放大器111與該第二運算放大器131皆為一誤差放大器。並且，如圖6所示，該第二運算放大器131以其負輸入端與輸出端分別耦接一第二參考電壓V_CRES和該第三P型金氧半場效電晶體1220的汲極。另一方面，該電流鏡單元132包括一第一N型金氧半場效電晶體1321與一第二N型金氧半場效電晶體1322；其中，該第一N型金氧半場效電晶體1321的閘極與汲極分別耦接該第二運算放大器131的輸出端與正輸入端，且該第一N型金氧半場效電晶體1321的源極耦接該電路地端。再者，該第二N型金氧半場效電晶體1322的閘極與源極分別耦接該第一N型金氧半場效電晶體1321的閘極與該電路地端，且該第二N型金氧半場效電晶體1322的汲極作為所述驅動電流供應電路之一電流輸出端。Continue to refer to Figures 5 and 6. The drivingcurrent generating unit 13 is coupled to the second digital controlcurrent mirror 122 of the digital controlcurrent mirror unit 12 to receive the first current I1 and convert the first current I1 into an output current Iout. The drivingcurrent generating unit 13 includes a secondoperational amplifier 131 and acurrent mirror unit 132. In the present invention, the firstoperational amplifier 111 and the secondoperational amplifier 131 are both error amplifiers. Moreover, as shown in FIG. 6, the negative input terminal and output terminal of the secondoperational amplifier 131 are respectively coupled to a second reference voltage V_CRES and the drain of the third P-type MOSFET 1220. On the other hand, thecurrent mirror unit 132 includes a first N-type MOSFET 1321 and a second N-type MOSFET 1322; wherein, the first N-type MOSFET 1321 The gate and drain are respectively coupled to the output and positive input of the secondoperational amplifier 131, and the source of the first N-type MOSFET 1321 is coupled to the circuit ground. Furthermore, the gate and source of the second N-type MOSFET 1322 are respectively coupled to the gate of the first N-type MOSFET 1321 and the circuit ground, and the second N The drain of theMOSFET 1322 is used as a current output terminal of the driving current supply circuit.

電流鏡單元132以電流比值(Current ratio)K對第一電流I1進行所述電流轉換處理，因此驅動電流產生單元13最終輸出的輸出電流

。如此，輸出電流Iout的值便可以由下式(8)所決定。

……………(8)Thecurrent mirror unit 132 performs the current conversion process on the first current I1 with a current ratio K, so that the output current finally output by the drivingcurrent generating unit 13

. In this way, the value of the output current Iout can be determined by the following equation (8).

……………(8)

由上式(6)已知可透過設置該內置電阻112的阻值以決定基準電流I0的值；接著，透過第一數位控制碼DR、第二數位控制碼DI和電流鏡單元132的電流比值(Current ratio)K可以最終決定此驅動電流供應電路1的輸出電流Iout的值。It is known from the above formula (6) that the value of the reference current I0 can be determined by setting the resistance of the built-inresistor 112; then, the current ratio of the first digital control code DR, the second digital control code DI and thecurrent mirror unit 132 can be determined The (Current ratio) K can finally determine the value of the output current Iout of the drivingcurrent supply circuit 1.

值得特別說明的是，第一數位控制電流鏡121與第二數位控制電流鏡122包括多個單位電流源，且各個單位電流源之中的金氧半場效電晶體都被操作在飽和區。在這種情況下，各個單位電流源的電流失配主要來自於金氧半場效電晶體的閥值電壓(或稱臨界電壓)的失配。對於每個金氧半場效電晶體而言，其等效失配電流與汲極電流的比可由下式(9)計算:

……………(9)It is worth noting that the first digital controlcurrent mirror 121 and the second digital controlcurrent mirror 122 include a plurality of unit current sources, and the MOSFETs in each unit current source are all operated in the saturation region. In this case, the current mismatch of each unit current source mainly comes from the mismatch of the threshold voltage (or critical voltage) of the MOSFET. For each MOSFET, the ratio of the equivalent mismatch current to the drain current can be calculated by the following formula (9):

……………(9)

其中，

=

係用以表示閥值電壓失配。進一步地，將金氧半場效電晶體的元件模型帶入上式(9)之後可獲得下式(10):

……………(10)among them,

=

It is used to indicate the threshold voltage mismatch. Furthermore, the following formula (10) can be obtained after the element model of the metal oxide half field effect transistor is brought into the above formula (9):

……………(10)

易於理解的，在輸出電流Iout為恆定的情況下，只要金氧半場效電晶體的元件長度L不變，則每個金氧半場效電晶體的等效失配電流與汲極電流的比

便會和元件寬度W無關。因此，熟悉電路設計的電子工程師可以進一步地推知，即使為了因應不同的適應場合而將本發明之驅動電流供應電路1的輸出電流Iout調變控制在0.5 mA ~ 20mA，由第一數位控制電流鏡121和第二數位控制電流鏡122所構成的數位控制電流鏡單元12的匹配是由最小電流源單元所決定，是以隨著電流範圍的增加，只要利用第一數位控制碼DR將構成第一數位控制電流鏡121的該些第二P型金氧半場效電晶體1211的數量減半，則

減半且

加倍；最終，等效失配電流不變。簡單地說，所述數位控制電流鏡單元12的失配並不會依據輸出電流Iout的調變範圍而跟著改變。It is easy to understand that when the output current Iout is constant, as long as the element length L of the MOSFET is unchanged, the ratio of the equivalent mismatch current to the drain current of each MOSFET is

It will be independent of the component width W. Therefore, electronic engineers familiar with circuit design can further infer that even if the output current Iout of the drivecurrent supply circuit 1 of the present invention is modulated and controlled at 0.5 mA ~ 20 mA in order to adapt to different applications, the current mirror is controlled by the first digit. The matching of the digital controlcurrent mirror unit 12 formed by 121 and the second digital controlcurrent mirror 122 is determined by the minimum current source unit, so as the current range increases, as long as the first digital control code DR is used, the first The number of the second P-type metal oxide halffield effect transistors 1211 of the digitally controlledcurrent mirror 121 is halved, then

Halved and

Double; finally, the equivalent mismatch current remains unchanged. Simply put, the mismatch of the digitally controlledcurrent mirror unit 12 does not change according to the adjustment range of the output current Iout.

如此，上述係已完整且清楚地說明本發明之驅動電流供應電路、LED顯示驅動裝置及LED顯示裝置；並且，經由上述可得知本發明係具有下列之優點：In this way, the above system has completely and clearly explained the driving current supply circuit, LED display driving device and LED display device of the present invention; and from the above, it can be seen that the present invention has the following advantages:

(1)本發明之驅動電流供應電路1無需使用任何外置電阻來設置基準電流I0的值，因此減少了一個晶片腳位，降低了使用成本。(1) The drivecurrent supply circuit 1 of the present invention does not need to use any external resistor to set the value of the reference current I0, thus reducing one chip pin and reducing the use cost.

(2)本發明之驅動電流供應電路1    通過內置電阻112來設置基準電流I0的值，可以明顯的降低此驅動電流供應電路1的功耗。(2) The drivecurrent supply circuit 1 of the present invention sets the value of the reference current I0 through the built-inresistor 112, which can significantly reduce the power consumption of the drivecurrent supply circuit 1.

(3)本發明通過 第一數位控制碼DR和第二數位控制碼DI控制數位控制電流鏡單元12，以因應不同的適應場合而將本發明之驅動電流供應電路1的輸出電流Iout調變控制在0.5 mA ~ 20mA；亦即，本發明之驅動電流供應電路1可以通過存寫寄存器的方式達到簡易調整輸出電流Iout之效果。(3) The present invention controls the digital controlcurrent mirror unit 12 through the first digital control code DR and the second digital control code DI, so as to adjust and control the output current Iout of the drivingcurrent supply circuit 1 of the present invention according to different applications. Between 0.5 mA and 20 mA; that is, the drivecurrent supply circuit 1 of the present invention can achieve the effect of simply adjusting the output current Iout by storing and writing registers.

(4)依據本發明之設計，基準電流I0的產生及第一數位控制電流鏡121和第二數位控制電流鏡122所貢獻的電流失配為恆定，不會依據輸出電流Iout的調變範圍而跟著改變。(4) According to the design of the present invention, the generation of the reference current I0 and the current mismatch contributed by the first digitally controlledcurrent mirror 121 and the second digitally controlledcurrent mirror 122 are constant and will not depend on the modulation range of the output current Iout. Follow the changes.

必須加以強調的是，前述本案所揭示者乃為較佳實施例，舉凡局部之變更或修飾而源於本案之技術思想而為熟習該項技藝之人所易於推知者，俱不脫本案之專利權範疇。It must be emphasized that the foregoing disclosures in this case are preferred embodiments, and any partial changes or modifications that are derived from the technical ideas of this case and are easily inferred by those who are familiar with the art will not deviate from the patent of this case. Right category.

綜上所陳，本案無論目的、手段與功效，皆顯示其迥異於習知技術，且其首先發明合於實用，確實符合發明之專利要件，懇請  貴審查委員明察，並早日賜予專利俾嘉惠社會，是為至禱。In summary, regardless of the purpose, means and effect of this case, it is shown that it is very different from the conventional technology, and its first invention is suitable for practicality, and it does meet the patent requirements of the invention. I sincerely ask the examiner to check it out and grant the patent as soon as possible. Society is for the best prayer.

＜本發明＞1:驅動電流供應電路2:移位暫存器3:位元栓鎖器4:微控制器5:LED顯示面板6:主機處理器11:基準電流產生單元12:數位控制電流鏡單元13:驅動電流產生單元111:第一運算放大器112:內置電阻121:第一數位控制電流鏡122:第二數位控制電流鏡1210:第一P型金氧半場效電晶體1211:第二P型金氧半場效電晶體1212:第一開關1220:第三P型金氧半場效電晶體1221:第四P型金氧半場效電晶體1222:第二開關131:第二運算放大器132:電流鏡單元1321:第一N型金氧半場效電晶體1322:第二N型金氧半場效電晶體<The present invention>1: Drive current supply circuit2: shift register3: bit latch4: Microcontroller5: LED display panel6: host processor11: Reference current generation unit12: Digital control current mirror unit13: Drive current generating unit111: The first operational amplifier112: Built-in resistance121: The first digital control current mirror122: The second digital control current mirror1210: The first P-type metal oxide half field effect transistor1211: The second P-type metal oxide half field effect transistor1212: First switch1220: The third P-type metal oxide half field effect transistor1221: The fourth P-type metal oxide half field effect transistor1222: second switch131: second operational amplifier132: Current mirror unit1321: The first N-type metal oxide half field effect transistor1322: The second N-type metal oxide half field effect transistor

＜習知＞6a:主機處理器1a:微控制器2a:位元栓鎖器3a:移位暫存器4a:驅動電流產生器5a:LED顯示面板＜Acquaintances＞6a:host processor1a:Microcontroller2a:Bit latch3a:shift register4a: drivecurrent generator5a: LED display panel

圖1為習知的一種LED顯示裝置的電路方塊圖； 圖2為習知的驅動電流產生器的電路方塊圖； 圖3為習知的驅動電流產生器的電路拓樸圖； 圖4為包含本發明之一種驅動電流供應電路的一LED顯示裝置的電路方塊圖； 圖5為本發明之驅動電流供應電路的電路方塊圖；以及 圖6為本發明之的驅動電流供應電路的電路拓樸圖。Fig. 1 is a circuit block diagram of a conventional LED display device; Fig. 2 is a circuit block diagram of a conventional drive current generator; Fig. 3 is a circuit topology diagram of a conventional drive current generator; A circuit block diagram of an LED display device of a driving current supply circuit of the present invention; FIG. 5 is a circuit block diagram of the driving current supply circuit of the present invention; and FIG. 6 is a circuit topology diagram of the driving current supply circuit of the present invention .

1:驅動電流供應電路1: Drive current supply circuit

11:基準電流產生單元11: Reference current generation unit

12:數位控制電流鏡單元12: Digital control current mirror unit

13:驅動電流產生單元13: Drive current generating unit

Claims (9)

Translated fromChinese

一種驅動電流供應電路，包括：一基準電流產生單元，耦接一第一參考電壓，用以基於該第一參考電壓而產生一基準電流；一數位控制電流鏡單元，耦接該基準電流產生單元、一第一數位控制碼和一第二數位控制碼，並基於該第一數位控制碼和該第二數位控制碼的控制將該基準電流轉換成一第一電流；以及一驅動電流產生單元，耦接該數位控制電流鏡單元以接收該第一電流，並將該第一電流轉換成一輸出電流；其中，該第一數位控制碼為一二進位碼，且該第二數位控制碼為一溫度計碼。A drive current supply circuit includes: a reference current generating unit coupled to a first reference voltage for generating a reference current based on the first reference voltage; a digital control current mirror unit coupled to the reference current generating unit , A first digital control code and a second digital control code, and based on the control of the first digital control code and the second digital control code, the reference current is converted into a first current; and a drive current generating unit, coupled The digital control current mirror unit is connected to receive the first current and convert the first current into an output current; wherein, the first digital control code is a binary code, and the second digital control code is a thermometer code .如申請專利範圍第1項所述之驅動電流供應電路，其中，該數位控制電流鏡單元，包括：一第一數位控制電流鏡，耦接該基準電流產生單元，用以依據該第一數位控制碼而對該基準電流進行第一次電流轉換處理，且包括一第一P型金氧半場效電晶體、2N-1個第二P型金氧半場效電晶體和2N-1個第一開關；其中，該第一P型金氧半場效電晶體的閘極與源極分別耦接該基準電流產生單元與一源極耦接一工作電壓，各所述第二P型金氧半場效電晶體的閘極耦接該第一P型金氧半場效電晶體的閘極，各所述第二P型金氧半場效電晶體的源極耦接該工作電壓；其中，各所述第一開關具有一第一電性端、一第二電性端、與一第一訊號接收端，各所述第一電性端對應耦接各所述第二P型金氧半場效電晶體的汲極，各所述第二電性端耦接第一P型金氧半場效電晶體的汲極，且該第一訊號接收端用以接收該第一數位控制碼；及一第二數位控制電流鏡，耦接該第一數位控制電流鏡，用以依據該第二數位控制碼而對已完成所述第一次電流轉換處理的該基準電流進一步地進行第二次電流轉換處理，並輸出一第一電流；該第二數位控制電流鏡包括一第三P型金氧半場效電晶體、2M-1個第四P型金氧半場效電晶體和2M-1個第二開關；其中，各所述第四P型金氧半場效電晶體的閘極耦接該第二P型金氧半場效電晶體的閘極，各所述第四P型金氧半場效電晶體的源極耦接該工作電壓；各所述第二開關具有一第三電性端、一第四電性端、與一第二訊號接收端，各所述第三電性端對應耦接各所述第四P型金氧半場效電晶體的汲極，各所述第四電性端耦接該第三P型金氧半場效電晶體的汲極，且該第二訊號接收端用以接收該第二數位控制碼；該第三P型金氧半場效電晶體的閘極與源極分別耦接所述第四P型金氧半場效電晶體的閘極和該工作電壓；以及一驅動電流產生單元，耦接該數位控制電流鏡單元以接收該第一電流，並將該第一電流轉換成一輸出電流。According to the driving current supply circuit described in claim 1, wherein the digital control current mirror unit includes: a first digital control current mirror coupled to the reference current generation unit for controlling according to the first digital Code and perform the first current conversion processing on the reference current, and include a first P-type MOSFET, 2N-1 second P-type MOSFET and 2N-1 first switch Wherein, the gate and source of the first P-type MOSFET are respectively coupled to the reference current generating unit and a source is coupled to a working voltage, each of the second P-type MOSFET The gate of the crystal is coupled to the gate of the first P-type MOSFET, and the source of each of the second P-type MOSFETs is coupled to the operating voltage; wherein, each of the first The switch has a first electrical terminal, a second electrical terminal, and a first signal receiving terminal. Each of the first electrical terminals is correspondingly coupled to the drain of each of the second P-type MOSFETs. Each of the second electrical terminals is coupled to the drain of the first P-type MOSFET, and the first signal receiving terminal is used to receive the first digital control code; and a second digital control current Mirror, coupled to the first digital control current mirror, for further performing a second current conversion process on the reference current that has completed the first current conversion process according to the second digital control code, and output a The first current; the second digitally controlled current mirror includes a third P-type metal oxide half field effect transistor, 2M-1 fourth P-type metal oxide half field effect transistor and 2M-1 second switch;Wherein, the gate of each fourth P-type MOSFET is coupled to the gate of the second P-type MOSFET, and the source of each of the fourth P-type MOSFET is Each of the second switches has a third electrical terminal, a fourth electrical terminal, and a second signal receiving terminal, each of the third electrical terminals is correspondingly coupled to each of the The drain of the fourth P-type MOSFET, each of the fourth electrical terminals is coupled to the drain of the third P-type MOSFET, and the second signal receiving terminal is used to receive the The second digital control code; the gate and source of the third P-type MOSFET are respectively coupled to the gate of the fourth P-type MOSFET and the operating voltage; and a driving current The generating unit is coupled to the digitally controlled current mirror unit to receive the first current and convert the first current into an output current.如申請專利範圍第1項所述之驅動電流供應電路，其中，該第一參考電壓由一帶隙參考電壓產生單元所提供。According to the driving current supply circuit described in item 1 of the scope of patent application, the first reference voltage is provided by a band gap reference voltage generating unit.如申請專利範圍第2項所述之驅動電流供應電路，其中，該基準電流產生單元包括：一第一運算放大器，以其負輸入端與輸出端分別耦接該第一參考電壓和該第一P型金氧半場效電晶體的閘極；以及一內置電阻，其一端耦接該第一運算放大器的正輸入端，且其另一端耦接至一電路地端。According to the driving current supply circuit described in item 2 of the scope of patent application, the reference current generating unit includes: a first operational amplifier whose negative input terminal and output terminal are respectively coupled to the first reference voltage and the first reference voltage The gate of the P-type MOSFET; and a built-in resistor, one end of which is coupled to the positive input terminal of the first operational amplifier, and the other end of which is coupled to a circuit ground.如申請專利範圍第4項所述之驅動電流供應電路，其中，該驅動電流產生單元包括：一第二運算放大器，以其負輸入端與輸出端分別耦接一第二參考電壓和該第三P型金氧半場效電晶體的汲極；以及一電流鏡單元，包括一第一N型金氧半場效電晶體與一第二N型金氧半場效電晶體；其中，該第一N型金氧半場效電晶體的閘極與汲極分別耦接該第二運算放大器的輸出端與正輸入端，且該第一N型金氧半場效電晶體的源極耦接該電路地端；該第二N型金氧半場效電晶體的閘極與源極分別耦接該第一N型金氧半場效電晶體的閘極與該電路地端，且該第二N型金氧半場效電晶體的汲極作為所述驅動電流供應電路之一電流輸出端。According to the driving current supply circuit described in item 4 of the scope of patent application, the driving current generating unit includes: a second operational amplifier whose negative input terminal and output terminal are respectively coupled to a second reference voltage and the third The drain of the P-type MOSFET; and a current mirror unit, including a first N-type MOSFET and a second N-type MOSFET; wherein, the first N-type The gate and drain of the MOSFET are respectively coupled to the output terminal and the positive input terminal of the second operational amplifier, and the source of the first N-type MOSFET is coupled to the circuit ground; The gate and source of the second N-type MOSFET are respectively coupled to the gate of the first N-type MOSFET and the circuit ground, and the second N-type MOSFET The drain of the transistor serves as a current output terminal of the drive current supply circuit.如申請專利範圍第5項所述之驅動電流供應電路，其中，該第一運算放大器與該第二運算放大器皆為一誤差放大器。According to the driving current supply circuit described in item 5 of the patent application, the first operational amplifier and the second operational amplifier are both error amplifiers.一種LED顯示驅動裝置，其具有至少一如申請專利範圍第1項至第6項所述之驅動電流供應電路。An LED display driving device has at least one driving current supply circuit as described in items 1 to 6 of the scope of patent application.如申請專利範圍第7項所述之LED顯示驅動裝置，其更包括：一微控制器，耦接外部的一主機處理器；至少一位元栓鎖器，耦接該微控制器，且各所述位元栓鎖器3對應地耦接至一個LED顯示面板；至少一移位暫存器，耦接該微控制器；以及其中，各所述驅動電流供應電路對應地耦接於各所述移位暫存器和各所述LED顯示面板之間。The LED display driving device described in item 7 of the scope of patent application further includes: a microcontroller coupled to an external host processor; at least a one-bit latch coupled to the microcontroller, and each The bit latch 3 is correspondingly coupled to an LED display panel; at least one shift register is coupled to the microcontroller; and wherein each of the drive current supply circuits is correspondingly coupled to each of the shift registers. Between the bit register and each of the LED display panels.一種LED顯示裝置，包括：至少一LED顯示面板；至少一位元栓鎖器，對應地耦接至所述至少一LED顯示面板；一微控制器，耦接所述至少一位元栓鎖器；至少一如申請專利範圍第1項至第6項所述之驅動電流供應電路，其中各所述驅動電流供應電路對應地耦接於各所述位元栓鎖器和各所述LED顯示面板之間；以及至少一移位暫存器，耦接於該微控制器，且各所述移位暫存器對應地耦接各所述驅動電流供應電路。An LED display device, comprising: at least one LED display panel; at least one-bit latch correspondingly coupled to the at least one LED display panel; a microcontroller coupled to the at least one-bit latch; at least A driving current supply circuit as described in items 1 to 6 of the scope of patent application, wherein each of the driving current supply circuits is correspondingly coupled between each of the bit latches and each of the LED display panels; And at least one shift register is coupled to the microcontroller, and each of the shift registers is correspondingly coupled to each of the driving current supply circuits.

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