本發明係關於一種線路佈局結構，尤指一種適用於觸控面板且可以減少訊號傳輸線數量之線路佈局結構。The present invention relates to a circuit layout structure, and more particularly to a circuit layout structure suitable for a touch panel and capable of reducing the number of signal transmission lines.
習知技術單層多點的觸控面板，其每一觸碰的感測元件係被設置於同一層當中，且利用黃光製程使感測元件連接至軟性印刷電路板(PCB)。A single-layer multi-point touch panel of the prior art, in which each touched sensing element is disposed in the same layer, and the sensing element is connected to a flexible printed circuit board (PCB) by a yellow light process.
然而，在現有觸碰面板的線路佈局結構中，每一感測元件透過訊號傳輸線連接至軟性印刷電路板，由於感測元件數量多時，其訊號傳輸線的數目亦隨著增加，相對應地，線路佈局過於複雜容易造成觸控面板的良率下降。However, in the circuit layout structure of the existing touch panel, each sensing component is connected to the flexible printed circuit board through the signal transmission line. Since the number of sensing components is large, the number of signal transmission lines also increases, correspondingly, The line layout is too complicated and the yield of the touch panel is degraded.
本發明之目的之一，是提供一種線路佈局結構，可以減少觸控面板的訊號傳輸線數目。One of the objects of the present invention is to provide a circuit layout structure that can reduce the number of signal transmission lines of the touch panel.
本發明之目的之一，是提供一種線路佈局結構，使感測元件之線路透過一電路連接晶片進行重新進行線路佈局。One of the objects of the present invention is to provide a circuit layout structure in which a circuit of a sensing element is re-transmitted through a circuit-connected wafer.Line layout.
本發明之目的之一，是提供一種線路佈局結構，其感測元件與線路均能佈局於同一層上。One of the objects of the present invention is to provide a line layout structure in which both sensing elements and lines can be laid out on the same layer.
本發明提供一種線路佈局結構，適用於一觸控面板，結構包含：一第一感測元件、複數個第二感測元件、一電路板、一電路連接晶片。第一感測元件用以進行一第一軸之感測；複數個第二感測元件，沿一方向排列，用以進行第二軸之感測；電路板，耦接第一感測元件與第二感測元件；電路連接晶片，設置於第一感測元件、第二感測元件、以及電路板之間，電路連接晶片係用以決定第二感測元件之耦接。The invention provides a circuit layout structure, which is applicable to a touch panel. The structure comprises: a first sensing component, a plurality of second sensing components, a circuit board, and a circuit connecting chip. The first sensing component is configured to perform sensing of a first axis; the plurality of second sensing components are arranged in a direction for sensing the second axis; and the circuit board is coupled to the first sensing component and The second sensing component is disposed between the first sensing component, the second sensing component, and the circuit board, and the circuit connecting chip is used to determine the coupling of the second sensing component.
100A、100B、200A~200H、300、400、500、600、700、800、900、1000、1100、1200‧‧‧線路佈局結構100A, 100B, 200A~200H, 300, 400, 500, 600, 700, 800, 900, 1000, 1100, 1200‧‧‧ line layout structure
X、Y‧‧‧軸X, Y‧‧‧ axis
x、y、(e,f,g)、(e,f,0)、(1,1,0)、(2,1,0)、(1,0,1)、(1,0,2)、(2,0,1)、(2,0,2)‧‧‧感測元件x, y, (e, f, g), (e, f, 0), (1, 1, 0), (2, 1, 0), (1, 0, 1),(1,0,2), (2,0,1), (2,0,2)‧‧‧ Sensing components
10‧‧‧觸控面板10‧‧‧Touch panel
103、203、303、403、503、703‧‧‧電路板103, 203, 303, 403, 503, 703‧‧‧ boards
104、204a~204d、304、404、504、604a~604d、704、804、904‧‧‧電路連接晶片104, 204a~204d, 304, 404, 504, 604a~604d, 704, 804, 904‧‧‧ circuit connection chip
L‧‧‧連結線L‧‧‧ connection line
t、r‧‧‧訊號傳輸線t, r‧‧‧ signal transmission line
D、D1、D2‧‧‧方向D, D1, D2‧‧‧ direction
(e,f)‧‧‧感測裝置(e,f)‧‧‧Sensing device
P0~Pj-1、N0~Nj-1‧‧‧節點P0~Pj-1, N0~Nj-1‧‧‧ nodes
第1A圖顯示本發明一實施例之示意圖。Fig. 1A is a schematic view showing an embodiment of the present invention.
第1B圖顯示本發明一實施例之示意圖。Fig. 1B is a view showing an embodiment of the present invention.
第1C圖顯示本發明一實施例之示意圖。Figure 1C is a schematic view showing an embodiment of the present invention.
第2A圖顯示本發明一實施例之示意圖。Fig. 2A is a view showing an embodiment of the present invention.
第2B圖顯示本發明一實施例之示意圖。Fig. 2B is a view showing an embodiment of the present invention.
第2C圖顯示本發明一實施例之示意圖。Fig. 2C is a view showing an embodiment of the present invention.
第2D圖顯示本發明一實施例之示意圖。Fig. 2D is a schematic view showing an embodiment of the present invention.
第2E圖顯示本發明一實施例之示意圖。Fig. 2E is a view showing an embodiment of the present invention.
第2F圖顯示本發明一實施例之示意圖。Fig. 2F is a schematic view showing an embodiment of the present invention.
第2G圖顯示本發明一實施例之示意圖。Fig. 2G is a schematic view showing an embodiment of the present invention.
第2H圖顯示本發明一實施例之示意圖。Fig. 2H is a schematic view showing an embodiment of the present invention.
第3圖顯示本發明一實施例之示意圖。Figure 3 is a schematic view showing an embodiment of the present invention.
第4圖顯示本發明一實施例之示意圖。Figure 4 is a schematic view showing an embodiment of the present invention.
第5圖顯示本發明一實施例之示意圖。Figure 5 is a schematic view showing an embodiment of the present invention.
第6圖顯示本發明一實施例之示意圖。Figure 6 is a schematic view showing an embodiment of the present invention.
第7圖顯示本發明一實施例之示意圖。Figure 7 is a schematic view showing an embodiment of the present invention.
第8圖顯示本發明一實施例之示意圖。Figure 8 is a schematic view showing an embodiment of the present invention.
第9圖顯示本發明一實施例之示意圖。Figure 9 is a schematic view showing an embodiment of the present invention.
第10圖顯示本發明一實施例之示意圖。Figure 10 is a schematic view showing an embodiment of the present invention.
第11圖顯示本發明一實施例之示意圖。Figure 11 is a schematic view showing an embodiment of the present invention.
第12圖顯示本發明一實施例之示意圖。Figure 12 is a schematic view showing an embodiment of the present invention.
請參考第1A圖，第1A圖為本發明一實施例之示意圖。在線路佈局結構100中，其線路佈局結構100A適用於一觸控面板10之感應層(圖未示)，其感應層為現有或未來發展之結構，本發明不應限制於銦錫氧化物(ITO)透明導電薄膜之結構。Please refer to FIG. 1A. FIG. 1A is a schematic diagram of an embodiment of the present invention. In the line layout structure 100, the line layout structure 100A is applied to a sensing layer (not shown) of a touch panel 10, and the sensing layer is a structure existing or future development, and the present invention should not be limited to indium tin oxide ( ITO) Structure of a transparent conductive film.
線路佈局結構100A包含第一感測元件x、複數個第二感測元件y、一電路板103、一電路連接晶片104。其中，電路板103係可由一軟性印刷電路板(PCB)所實現。The circuit layout structure 100A includes a first sensing element x, a plurality of second sensing elements y, a circuit board 103, and a circuit connection wafer 104. The circuit board 103 can be implemented by a flexible printed circuit board (PCB).
第一感測元件x用以進行一第一軸之感測；第二感測元件y，沿一方向D排列，用以進行第二軸之感測；電路板103耦接第一感測元件x與第二感測元件y；電路連接晶片104，設置於第一感測元件x、第二感測元件y、以及電路板103之間，電路連接晶片104係用以決定第二感測元件y之耦接。在本實施例中，第一感測元件x係用以感測X軸，第二感測元件y係用以感測Y軸。The first sensing component x is configured to perform sensing of a first axis;The second sensing element y is arranged along a direction D for sensing the second axis; the circuit board 103 is coupled to the first sensing element x and the second sensing element y; and the circuit connection chip 104 is disposed on the Between a sensing element x, a second sensing element y, and the circuit board 103, the circuit connection die 104 is used to determine the coupling of the second sensing element y. In this embodiment, the first sensing element x is used to sense the X axis, and the second sensing element y is used to sense the Y axis.
在此請注意，第二感測元件y連接至電路連接晶片104之線路，其線路透過電路連接晶片104重新進行線路佈局，故電路連接晶片104中之耦接方式與原第二感測元件y之線路具有差異。一實施例中，每一連接至感測元件x或y之訊號傳輸線t或r，與感測元件x及y係位於同一層。Please note that the second sensing element y is connected to the circuit of the circuit connection chip 104, and the line is re-routed through the circuit connection chip 104. Therefore, the coupling mode in the circuit connection wafer 104 and the original second sensing element y The lines have differences. In one embodiment, each of the signal transmission lines t or r connected to the sensing element x or y is in the same layer as the sensing elements x and y.
為了簡化說明，在本實施例中，每一組感測元件分別具有一個第一感測元件x與複數個第二感測元件y(0)~y(j-1)，意即第1圖係繪示第一感測元件x(0)~x(3)，且每一個第一感測元件x(0)~x(3)係搭配第二感測元件y(0)~y(j-1)，且感測元件y(0)~y(j-1)沿Y軸排列。In order to simplify the description, in this embodiment, each set of sensing elements has a first sensing element x and a plurality of second sensing elements y(0)~y(j-1), that is, FIG. The first sensing elements x(0)~x(3) are shown, and each of the first sensing elements x(0)~x(3) is matched with the second sensing element y(0)~y(j) -1), and the sensing elements y(0)~y(j-1) are arranged along the Y axis.
在電路連接晶片104中具有複數連結線L，每一連結線L係用以電性連結具有相同第二軸座標位置之第二感測元件y。意即在本實施例中，每一個第二感測元件y(0)係為耦接，每一個第二感測元件y(1)係為耦接，每一個第二感測元件y(2)係為耦接，每一個第二感測元件y(j-1)係為耦接。The circuit connection wafer 104 has a plurality of connection lines L, each of which is electrically connected to the second sensing element y having the same second axis coordinate position. That is, in this embodiment, each of the second sensing elements y(0) is coupled, and each of the second sensing elements y(1) is coupled, and each of the second sensing elements y (2) ) is coupled, each second sensing elementy(j-1) is coupled.
當相同第二軸座標位置之第二感測元件y(0)~y(j-1)連結後，第二感測元件y(0)~y(j-1)所輸出之訊號係分別由對應的同一條訊號傳輸線t(0)~t(j-1)傳輸至電路板103，意即同為第二感測元件y(0)所傳輸之訊號係透過訊號傳輸線t(0)傳輸至電路板103，其餘原理相同不再另行贅述。其中，j為訊號傳輸線之數目。When the second sensing elements y(0)~y(j-1) of the same second axis coordinate position are connected, the signals output by the second sensing elements y(0)~y(j-1) are respectively The corresponding signal transmission lines t(0)~t(j-1) are transmitted to the circuit board 103, that is, the signals transmitted by the second sensing element y(0) are transmitted to the signal transmission line t(0) to The circuit board 103 has the same principle and will not be further described. Where j is the number of signal transmission lines.
而在結構100A中每一個第一感測元件x(0)~x(3)係電性連接至電路連接晶片104，再分別由對應的訊號傳輸線r(0)~r(3)傳輸訊號至電路板103。如此一來，透過本發明電路連接晶片104，使第二感測元件y(0)~y(j-1)能在晶片中重新進行線路佈局，以減少訊號傳輸線t(0)~t(j-1)之數量，以降低觸控面板不可見區域。In the structure 100A, each of the first sensing elements x(0)~x(3) is electrically connected to the circuit connection chip 104, and then transmitted by the corresponding signal transmission lines r(0)~r(3) to Circuit board 103. In this way, the wafer 104 is connected through the circuit of the present invention, so that the second sensing elements y(0)~y(j-1) can be re-routed in the wafer to reduce the signal transmission line t(0)~t(j). -1) The number to reduce the invisible area of the touch panel.
請參考第1B圖，第1B圖為本發明一實施例之示意圖。在線路佈局結構100B與線路佈局結構100A之差異在於每一組第二感測元件y(0)~y(j-1)係可沿Y軸隨機排列，並不需要按第二感測元件y(0)~y(j-1)之順序進行排列；故每一連結線係L用以電性連結相對應之第二感測元件y(0)~y(j-1)，例如：所有第二感測元件y(0)係透過連結線係L電性連結、所有第二感測元件y(2)係透過連結線係L電性連結，其餘操作原理與前述相同，不再另行贅述。Please refer to FIG. 1B. FIG. 1B is a schematic diagram of an embodiment of the present invention. The difference between the line layout structure 100B and the line layout structure 100A is that each set of second sensing elements y(0)~y(j-1) can be randomly arranged along the Y axis, and does not need to be according to the second sensing element y. The order of (0)~y(j-1) is arranged; therefore, each connecting line L is electrically connected to the corresponding second sensing element y(0)~y(j-1), for example: all The second sensing element y(0) is electrically connected through the connecting line L, and all the second sensing elements y(2) are electrically connected through the connecting line L. The rest of the operation principle is the same as the above, and will not be described again. .
在本實施例中線路佈局結構100B，其第二感測元件y(0)~y(j-1)係為線路佈局結構100之逆向排列，但本發明不應以此為限。In the circuit layout structure 100B of the present embodiment, the second sensing elements y(0)~y(j-1) are arranged in the reverse direction of the line layout structure 100, but the invention should not be limited thereto.
請參考第1C圖，第1C圖為本發明一實施例之示意圖。在本實施例中線路佈局結構100C中可具有i個第一感測元件x(0)~x(i-1)，且每個第一感測元件x(0)~x(i-1)可搭配j個第二感測元件y(0)~y(j-1)，其餘操作原理與前述相同，不再另行贅述。Please refer to FIG. 1C, which is a schematic view of an embodiment of the present invention. In the present embodiment, the line layout structure 100C may have i first sensing elements x(0)~x(i-1), and each first sensing element x(0)~x(i-1) It can be matched with j second sensing elements y(0)~y(j-1), and the rest of the operation principle is the same as the foregoing, and will not be further described.
請參考第2A圖，第2A圖為本發明一實施例之示意圖。在線路佈局結構200A與線路佈局結構100A之差異在於，線路佈局結構200A具有複數個電路連接晶片204a~204d，每一組感測元件搭配一個電路連接晶片，故本實施例為簡化說明，繪示有四個電路連接晶片204a~204d。而每一個電路連接晶片係與鄰近的電路連接晶片電性連接，使得每一個相同第二軸座標位置之第二感測元件y(0)~y(j-1)能進行耦接。Please refer to FIG. 2A. FIG. 2A is a schematic diagram of an embodiment of the present invention. The difference between the line layout structure 200A and the line layout structure 100A is that the line layout structure 200A has a plurality of circuit connection chips 204a to 204d, and each group of sensing elements is combined with a circuit connection chip. There are four circuits connected to the wafers 204a-204d. Each of the circuit connection chips is electrically connected to the adjacent circuit connection chip such that the second sensing elements y(0)~y(j-1) of each of the same second axis coordinate positions can be coupled.
請注意，電路連接晶片204a~204d之間的電性連接線路可透過與感測元件在相同製程中預先進行線路佈局，或者透過導電材質之線路進行佈線，在本實施例係用虛線表示。Please note that the electrical connection lines between the circuit connection pads 204a-204d can be pre-wired in the same process as the sensing elements, or routed through a conductive material line, which is indicated by a dashed line in this embodiment.
最後，在結構200A中每一個第一感測元件x(0)~x(3)係直接電性連接至對應的電路連接晶片204a~204d，再分別由對應的訊號傳輸線r(0)~r(3)傳輸訊號至電路板203；而第二感測元件y(0)~y(j-1)所輸出之訊號係分別由對應的同一條訊號傳輸線t(0)~t(j-1)傳輸至電路板203，在本實施例中，其訊號傳輸線t(0)~t(j-1)係與電路連接晶片204a電性連接，其餘原理相同不再另行贅述。Finally, in the structure 200A, each of the first sensing elements x(0)~x(3) is directly electrically connected to the corresponding circuit connection chip.204a~204d, respectively, the signals are transmitted from the corresponding signal transmission lines r(0)~r(3) to the circuit board 203; and the signals output by the second sensing elements y(0)~y(j-1) are respectively The corresponding signal transmission lines t(0)~t(j-1) are transmitted to the circuit board 203. In this embodiment, the signal transmission lines t(0)~t(j-1) are connected to the circuit 204a. Electrical connection, the rest of the principle is the same and will not be described again.
請參考第2B圖，第2B圖為本發明一實施例之示意圖。線路佈局結構200B中，每一第二感測元件y(0)~y(j-1)與電路連接晶片204a~204d耦接分別具有節點P0~Pj-1，每一電路連接晶片204a~204d與電路板203耦接時係存在節點N0~Nj-1；其中節點P0係表示第二感測元y(0)與電路連接晶片204a~204一側邊之節點，節點N0係表示第二感測元y(0)與電路連接晶片204a~204另一側邊之節點。Please refer to FIG. 2B, which is a schematic diagram of an embodiment of the present invention. In the circuit layout structure 200B, each of the second sensing elements y(0)~y(j-1) and the circuit connection pads 204a-204d are coupled to have nodes P0~Pj-1, respectively, and each circuit is connected to the chips 204a~204d. When the circuit board 203 is coupled to the circuit board 203, there are nodes N0~Nj-1; wherein the node P0 represents the node of the second sensing element y(0) and the side of the circuit connection chip 204a-204, and the node N0 represents the second sense. The cell y(0) is connected to the node of the circuit on the other side of the wafers 204a-204.
在本實施例中，電路連接晶片204a~204d中之節點係分別與相鄰的電路連接晶片204a~204d中所對應的節點耦接，舉例說明：電路連接晶片204a之節點N0係與電路連接晶片204b之節點P0耦接；電路連接晶片204a之節點N1係與電路連接晶片204b之節點P1耦接；電路連接晶片204b之節點N3係與電路連接晶片204c之節點P3耦接；其耦接線路係與第二感測元y(0)~y(j-1)佈線(虛線表示)於同一層或同一製程預先佈線；透過此種佈線方式，電路連接晶片204a~204d不需要橫向之連結線L，其餘原理相同不再另行贅述。In this embodiment, the nodes in the circuit connection pads 204a-204d are respectively coupled to the corresponding nodes in the adjacent circuit connection chips 204a-204d. For example, the node N0 of the circuit connection die 204a and the circuit connection chip are connected. Node P0 of 204b is coupled; node N1 of circuit connection die 204a is coupled to node P1 of circuit connection die 204b; node N3 of circuit connection die 204b is coupled to node P3 of circuit connection die 204c; Interleaved with the second sensing element y(0)~y(j-1) wiring (indicated by a broken line) on the same layer or the same process; through such a clothIn the line mode, the circuit connecting chips 204a to 204d do not need the horizontal connecting line L, and the other principles are not repeated herein.
請參考第2C圖，第2C圖為本發明一實施例之示意圖。線路佈局結構200C與線路佈局結構200B之差異在於，第二組至第四組感測元件y(0)~y(j-1)係為第一組感測元件y(0)~y(j-1)之逆向排列。Please refer to FIG. 2C, which is a schematic diagram of an embodiment of the present invention. The difference between the line layout structure 200C and the line layout structure 200B is that the second to fourth sets of sensing elements y(0)~y(j-1) are the first group of sensing elements y(0)~y(j -1) Reverse alignment.
如此一來，電路連接晶片204a之節點P0係與電路連接晶片204b之節點P0耦接；電路連接晶片204a之節點P1係與電路連接晶片204b之節點P1耦接；電路連接晶片204b之節點N3係與電路連接晶片204c之節點P3耦接；其耦接線路係與第二感測元件y(0)~y(j-1)佈線(虛線表示)於同一層或同一製程預先佈線，其餘原理相同不再另行贅述。As such, the node P0 of the circuit connection die 204a is coupled to the node P0 of the circuit connection die 204b; the node P1 of the circuit connection die 204a is coupled to the node P1 of the circuit connection die 204b; and the node N3 of the circuit connection die 204b is connected. The node P3 is coupled to the node P3 of the circuit connection chip 204c; the coupling circuit is pre-wired on the same layer or the same process as the second sensing element y(0)~y(j-1) wiring (shown by a broken line), and the other principles are the same. It will not be repeated here.
請參考第2D圖，第2D圖為本發明一實施例之示意圖。結構200D具有兩個電路連接晶片204a、204b，電路連接晶片204a係對應i個第一感測元件x(0)~x(i-1)，而電路連接晶片204b則對應i個第一感測元件x(i)~x(2i-1)，並透過前述節點耦接方式，將i個RX與j個TX擴充為2×i個RX與j個TX，其餘原理相同不再另行贅述。Please refer to FIG. 2D, which is a schematic diagram of an embodiment of the present invention. The structure 200D has two circuit connection wafers 204a, 204b, the circuit connection chip 204a corresponds to i first sensing elements x(0)~x(i-1), and the circuit connection chip 204b corresponds to i first sensing The elements x(i)~x(2i-1) are expanded into 2×i RXs and j TXs through the foregoing node coupling manner, and the rest of the principles are not repeated herein.
請參考第2E圖，第2E圖為本發明一實施例之示意圖。結構200E與結構200D差異在於其節點耦接方式不同，但同樣能將i個RX與j個TX擴充為2×i個RX與j個TX，其餘原理相同不再另行贅述。Please refer to FIG. 2E, which is a schematic diagram of an embodiment of the present invention. The difference between structure 200E and structure 200D is that its nodes are coupledDifferent ways, but can also expand i RX and j TX to 2×i RX and j TX, and the other principles are not repeated here.
請參考第2F圖，第2F圖為本發明一實施例之示意圖。結構200F具有兩個電路連接晶片204a與204b，電路連接晶片204a係對應i個第一感測元件x(0)~x(i-1)，而電路連接晶片204b係對應i個第一感測元件x(0)~x(i-1)，故本實施例中係有兩組第一感測元件x(0)~x(i-1)；請注意，一組第一感應元件係對應第二感測元件y(0)~y(j-1)，而另一組第一感測元件則對應第二感測元件y(j)~y(2j-1)，並透過前述節點耦接方式，將i個RX與j個TX擴充為i個RX與2×j個TX，其餘原理相同不再另行贅述。Please refer to FIG. 2F, which is a schematic diagram of an embodiment of the present invention. The structure 200F has two circuit connection pads 204a and 204b, the circuit connection die 204a corresponds to i first sensing elements x(0)~x(i-1), and the circuit connection die 204b corresponds to i first sensings. The elements x(0)~x(i-1), so in this embodiment there are two sets of first sensing elements x(0)~x(i-1); please note that a set of first sensing elements corresponds to The second sensing element y(0)~y(j-1), and the other set of first sensing elements corresponds to the second sensing element y(j)~y(2j-1), and is coupled through the foregoing node In the connection mode, i RX and j TX are expanded into i RX and 2×j TX, and the other principles are the same and will not be further described.
請參考第2G圖，第2G圖為本發明一實施例之示意圖。結構200G與結構200F差異在於其節點耦接方式不同，但同樣能將i個RX與j個TX擴充為i個RX與2×j個TX，其餘原理相同不再另行贅述。Please refer to FIG. 2G. FIG. 2G is a schematic diagram of an embodiment of the present invention. The difference between the structure 200G and the structure 200F is that the node coupling manner is different, but the i RX and the j TXs can be expanded to i RX and 2×j TX, and the other principles are not repeated here.
請參考第2H圖，第2H圖為本發明一實施例之示意圖。結構200H與結構200G之差異在於，本實施例使用兩個電路連接晶片將i個RX與j個TX擴充為i個RX與2×j個TX，且讓TX走線位置集中至一特定區域，故電路連接晶片了簡化來自感測元件來線路，而且可電路連接晶片中任意變換訊號連接順序。Please refer to FIG. 2H, which is a schematic diagram of an embodiment of the present invention. The difference between the structure 200H and the structure 200G is that the present embodiment expands i RXs and j TXs into i RXs and 2×j TXs using two circuit connection chips, and concentrates the TX trace positions to a specific area. Therefore, the circuit is connected to the wafer to simplify the circuit from the sensing element, and the circuit can be connected to any converted signal connection sequence in the wafer.
請參考第3圖，第3圖為本發明一實施例之示意圖。在線路佈局結構300與線路佈局結構100A之差異在於，線路佈局結構300之每一連接至第一感測元件x(0)~x(3)之訊號傳輸線r(0)~r(3)，係不透過該電路連接晶片304耦接至電路板303，而是由第一感測元件x(0)~x(3)直接透過訊號傳輸線r(0)~r(3)耦接至電路板303。而訊號傳輸線r(0)~r(3)與第一感測元件x(0)~x(3)在同一製程中預先佈線，其餘原理相同不再另行贅述。Please refer to FIG. 3, which is a schematic diagram of an embodiment of the present invention. The difference between the line layout structure 300 and the line layout structure 100A is that each of the line layout structures 300 is connected to the signal transmission lines r(0)~r(3) of the first sensing elements x(0)~x(3), The circuit 304 is not coupled to the circuit board 303 through the circuit, but is directly coupled to the circuit board by the first sensing elements x(0)~x(3) through the signal transmission lines r(0)~r(3). 303. The signal transmission lines r(0)~r(3) are pre-wired in the same process as the first sensing elements x(0)~x(3), and the rest of the principles are the same and will not be further described.
請參考第4圖，第4圖為本發明一實施例之示意圖。在線路佈局結構400與線路佈局結構200A之差異在於，線路佈局結構400之每一連接至第一感測元件x(0)~x(3)之訊號傳輸線r(0)~r(3)，係不透過該電路連接晶片404耦接至電路板403，而是由第一感測元件x(0)~x(3)直接透過訊號傳輸線r(0)~r(3)耦接至電路板403。而訊號傳輸線r(0)~r(3)與第一感測元件x(0)~x(3)在同一製程中預先佈線，其餘原理相同不再另行贅述。Please refer to FIG. 4, which is a schematic diagram of an embodiment of the present invention. The difference between the line layout structure 400 and the line layout structure 200A is that each of the line layout structures 400 is connected to the signal transmission lines r(0)~r(3) of the first sensing elements x(0)~x(3), The circuit 404 is not coupled to the circuit board 403 through the circuit, but is directly coupled to the circuit board by the first sensing elements x(0)~x(3) through the signal transmission lines r(0)~r(3). 403. The signal transmission lines r(0)~r(3) are pre-wired in the same process as the first sensing elements x(0)~x(3), and the rest of the principles are the same and will not be further described.
請參考第5圖，第5圖為本發明一實施例之示意圖。在線路佈局結構500與線路佈局結構100A之差異在於，複數連結線L係與感測元件同一製程中預先佈線，本實施例之複數連結線L係不設置於電路連接晶片504中，每一連結線L係用以電性連結具有相同第二軸座標位置之第二感測元件y。訊號傳輸線t(0)~t(j-1)再透過穿孔與複數連結線L進行電性連接，以達到每一相同第二軸座標位置之第二感測元件y(0)~y(j-1)耦接，最後訊號可由訊號傳輸線t(0)~t(j-1)傳輸至電路板503，其餘原理相同不再另行贅述。Please refer to FIG. 5, which is a schematic diagram of an embodiment of the present invention. The difference between the line layout structure 500 and the line layout structure 100A is that the plurality of connection lines L are pre-wired in the same process as the sensing elements. The plurality of connection lines L of the present embodiment are not disposed in the circuit connection chip 504, and each connection is The line L is for electrically connecting the second sensing element y having the same second axis coordinate position. Signal transmission line t(0)~t(j-1)The through hole is electrically connected to the plurality of connecting lines L to couple the second sensing elements y(0)~y(j-1) of each of the same second axis coordinate positions, and finally the signal can be transmitted by the signal transmission line t(0) ~t(j-1) is transmitted to the circuit board 503, and the other principles are the same and will not be described again.
請參考第6圖，第6圖為本發明一實施例之示意圖。在線路佈局結構600與線路佈局結構200A之差異在於線路佈局結構600複數連結線L係與感測元件同一製程中預先佈線，本實施例之複數連結線L係不設置於電路連接晶片604a~604d中，其餘原理相同與前述相同不再另行贅述。Please refer to FIG. 6, which is a schematic diagram of an embodiment of the present invention. The difference between the line layout structure 600 and the line layout structure 200A is that the plurality of connection lines L of the line layout structure 600 are pre-wired in the same process as the sensing element. The plurality of connection lines L of the embodiment are not disposed on the circuit connection wafers 604a to 604d. The other principles are the same as the foregoing and will not be further described.
請參考第7圖，第7圖為本發明一實施例之示意圖。在線路佈局結構700包含一感測裝置(e,f)、一電路板703、複數個電路連接晶片704。感測裝置(e,f)是以陣列式同時沿方向D1與方向D2排列，如第7圖中虛框所示；感測裝置(e,f)具有第一感測元件(e,f,g)與第二感測元件(e,f,0)，第一感測元件(e,f,g)用以進行第一軸之感測，第二感測元件(e,f,0)用以進行一第二軸之感測，在本實施例中第一軸為X軸，第二軸為Y軸。Please refer to FIG. 7, which is a schematic diagram of an embodiment of the present invention. The line layout structure 700 includes a sensing device (e, f), a circuit board 703, and a plurality of circuit connection chips 704. The sensing devices (e, f) are arranged in an array simultaneously along the direction D1 and the direction D2, as indicated by the dashed box in FIG. 7; the sensing device (e, f) has the first sensing element (e, f, g) with a second sensing element (e, f, 0), the first sensing element (e, f, g) for sensing the first axis, the second sensing element (e, f, 0) For sensing the second axis, in the present embodiment, the first axis is the X axis and the second axis is the Y axis.
其中，當g等於0係表示該第二感測元件(e,f,0)於感測裝置(e,f)陣列中之位置；當g值為正整數時，係表示第一感測元件(e,f,g)於感測裝置(e,f)陣列中之位置；以及，當g值相同且不等於0時，該第一感測元件(e,f,g)耦接方向D2對應的第一感測元件(e,f,g)。Wherein, when g is equal to 0, the position of the second sensing element (e, f, 0) in the sensing device (e, f) array; when the g value is a positive integer, the first sensing element is represented. (e, f, g) at a position in the array of sensing devices (e, f); and, when the g values are the same and not equal to 0, the first sensing element (e, f, g) is coupledThe first sensing element (e, f, g) corresponding to the direction D2 is connected.
如第7圖舉例說明，第二感測元件(1,1,0)、第二感測元件(2,1,0)如圖面所標示；第一感測元件(1,0,1)、第一感測元件(1,0,2)、第一感測元件(2,0,1)、以及第一感測元件(2,0,2)如圖面所標示，其餘感測元件為求圖面簡潔，不再另行標示。As illustrated in FIG. 7, the second sensing element (1, 1, 0) and the second sensing element (2, 1, 0) are labeled as shown in the figure; the first sensing element (1, 0, 1) The first sensing element (1, 0, 2), the first sensing element (2, 0, 1), and the first sensing element (2, 0, 2) are labeled as shown on the surface, and the remaining sensing elements For the sake of simplicity, it will not be marked separately.
電路板703耦接第一感測元件(e,f,g)與第二感測元件(e,f,0)；電路連接晶片704a~704d設置於第一感測元件(e,f,g)、第二感測元件(e,f,0)、以及電路板703之間，電路連接晶片704a~704d係用以決定第二感測元件(e,f,0)之耦接。The circuit board 703 is coupled to the first sensing element (e, f, g) and the second sensing element (e, f, 0); the circuit connection chips 704a to 704d are disposed on the first sensing element (e, f, g) The second sensing element (e, f, 0) and the circuit board 703 are used to determine the coupling of the second sensing element (e, f, 0).
為了簡化說明，在本實施例中，每一個感測裝置(e,f,g)分別具有兩個第一感測元件(e,f,g)、一個第二感測元件(e,f,0)，但本發明不應以此為限。In order to simplify the description, in the present embodiment, each sensing device (e, f, g) has two first sensing elements (e, f, g) and one second sensing element (e, f, respectively). 0), but the invention should not be limited thereto.
另外，結構700包含複數連結線L，每一連結線L係用以電性連結具有相同e值第二感測元件(e,f,0)。在本實施例中，連結線L係設置於每一個電路連接晶片704中。In addition, the structure 700 includes a plurality of connecting lines L, each of which is used to electrically connect the second sensing elements (e, f, 0) having the same e value. In the present embodiment, the connection line L is provided in each of the circuit connection wafers 704.
請注意，感測裝置(e,f)陣列中，具有相同e值的第二感測元件(e,f,0)於對應電路連接晶片704a~704d中重新進行線路佈局，而每一電路連接晶片704a~704d係與鄰近的電路連接晶片704a~704d沿方向D1耦接。Please note that in the array of sensing devices (e, f), the second sensing elements (e, f, 0) having the same e value are re-routed in the corresponding circuit connection wafers 704a-704d, and each circuit connection Wafers 704a-704d are coupled to adjacent circuit connection wafers 704a-704d in direction D1.
透過電路連接晶片704並利用連結線L，使第二感測元件(e,f,0)分別於對應的電路連接晶片704中重新佈線，第二感測元件(e,f,0)所輸出之訊號係分別由對應的同一條訊號傳輸線x(0)~x(j-1)傳輸至電路板703。The second sensing element (e, f, 0) is re-routed in the corresponding circuit connection chip 704 by connecting the chip 704 through the circuit and using the connection line L, and the second sensing element (e, f, 0) outputs The signals are transmitted to the circuit board 703 by the corresponding same signal transmission lines x(0)~x(j-1).
而在結構700中每一個第一感測元件(e,f,g)係依前述方式耦接後，再分別由對應的訊號傳輸線t傳輸訊號至電路板703，其餘原理相同不再另行贅述。請注意，在本實施例中，每個電路連接晶片704具有兩條訊號傳輸線t用以分別與感測裝置(e,f)陣列中的第一感測元件(e,f,g)進行耦接。In the structure 700, each of the first sensing elements (e, f, g) is coupled to the circuit board 703 by the corresponding signal transmission line t, and the other principles are not described herein. Please note that in the present embodiment, each circuit connection chip 704 has two signal transmission lines t for coupling with the first sensing elements (e, f, g) in the array of sensing devices (e, f), respectively. Pick up.
如此一來，透過本發明電路連接晶片704，使第二感測元件(e,f,0)能在晶片中重新進行線路佈局，以減少耦接至第一感測元件(e,f,g)或第二感測元件(e,f,0)之訊號傳輸線之數量，以降低觸控面板不可見區域。In this way, the circuit 704 is connected through the circuit of the present invention, so that the second sensing element (e, f, 0) can re-route the line in the wafer to reduce coupling to the first sensing element (e, f, g). Or the number of signal transmission lines of the second sensing element (e, f, 0) to reduce the invisible area of the touch panel.
請參考第8圖，第8圖為本發明一實施例之示意圖。在線路佈局結構800與線路佈局結構700之差異在於，線路佈局結構800之每一連接至第一感測元件(e,f,g)之訊號傳輸線t，係不透過該電路連接晶片804耦接至電路板803，而是由第一感測元件(e,f,g)直接透過訊號傳輸線t耦接至電路板803。而訊號傳輸線t與第一感測元件(e,f,g)在同一製程中預先佈線，本實施例以虛線表示，其餘原理相同不再另行贅述。Please refer to FIG. 8. FIG. 8 is a schematic diagram of an embodiment of the present invention. The difference between the line layout structure 800 and the line layout structure 700 is that each of the line layout structures 800 connected to the signal transmission line t of the first sensing element (e, f, g) is not coupled through the circuit connection chip 804. To the circuit board 803, the first sensing component (e, f, g) is directly coupled to the circuit board 803 through the signal transmission line t. The signal transmission line t and the first sensing element (e, f, g) are pre-wired in the same process, and the embodiment is indicated by a broken line, and the other principles are the same and will not be further described.
請參考第9圖，第9圖為本發明一實施例之示意圖。在線路佈局結構900與線路佈局結構700之差異在於，複數連結線L與第一感測元件(e,f,g)在同一製程中預先佈線，電路連接晶片904再透過穿孔分別與訊號傳輸線x(0)~x(j-1)進行電性連接，其餘原理相同不再另行贅述。Please refer to FIG. 9. FIG. 9 is a schematic diagram of an embodiment of the present invention. The difference between the line layout structure 900 and the line layout structure 700 is that the plurality of connection lines L and the first sensing elements (e, f, g) are pre-wired in the same process, and the circuit connection wafer 904 is further transmitted through the perforations and the signal transmission line x. (0)~x(j-1) is electrically connected, and the other principles are the same and will not be described again.
請參考第10圖，第10圖為本發明一實施例之示意圖。在線路佈局結構1000與線路佈局結構700之差異在於，線路佈局結構1000為線路佈局結構700之鏡射，其餘原理相同不再另行贅述。Please refer to FIG. 10, which is a schematic diagram of an embodiment of the present invention. The difference between the line layout structure 1000 and the line layout structure 700 is that the line layout structure 1000 is a mirror of the line layout structure 700, and the rest of the principles are the same and will not be further described.
請參考第11圖，第11圖為本發明一實施例之示意圖。在線路佈局結構1100與線路佈局結構800之差異在於，線路佈局結構1100為線路佈局結構800之鏡射，其餘原理相同不再另行贅述。Please refer to FIG. 11, which is a schematic view of an embodiment of the present invention. The difference between the line layout structure 1100 and the line layout structure 800 is that the line layout structure 1100 is a mirror of the line layout structure 800, and the rest of the principles are the same and will not be further described.
請參考第12圖，第12圖為本發明一實施例之示意圖。在線路佈局結構1200與線路佈局結構900之差異在於，線路佈局結構1200為線路佈局結構900之鏡射，其餘原理相同不再另行贅述。Please refer to FIG. 12, which is a schematic diagram of an embodiment of the present invention. The difference between the line layout structure 1200 and the line layout structure 900 is that the line layout structure 1200 is a mirror of the line layout structure 900, and the rest of the principles are the same and will not be further described.
綜上所述，本發明之線路佈局結構利用電路連接晶片讓感測元件能重新佈局，減少訊號傳輸線的數量以減少觸控面板的不可見區域。In summary, the circuit layout structure of the present invention utilizes circuit-connected wafers to allow the sensing elements to be re-arranged, reducing the number of signal transmission lines to reduce the invisible area of the touch panel.
100A‧‧‧線路佈局結構100A‧‧‧Line layout structure
X、Y‧‧‧軸X, Y‧‧‧ axis
x、y‧‧‧感測元件x, y‧‧‧ sensing components
10‧‧‧觸控面板10‧‧‧Touch panel
103‧‧‧電路板103‧‧‧Circuit board
104‧‧‧電路連接晶片104‧‧‧Circuit connection chip
L‧‧‧連結線L‧‧‧ connection line
t、r‧‧‧訊號傳輸線t, r‧‧‧ signal transmission line
D‧‧‧方向D‧‧‧ Direction
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW105103781ATWI602093B (en) | 2016-02-04 | 2016-02-04 | Circuit layout structure |
| CN201610146046.3ACN107037902B (en) | 2016-02-04 | 2016-03-15 | Circuit layout structure |
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW105103781ATWI602093B (en) | 2016-02-04 | 2016-02-04 | Circuit layout structure |
| Publication Number | Publication Date |
|---|---|
| TW201729048A TW201729048A (en) | 2017-08-16 |
| TWI602093Btrue TWI602093B (en) | 2017-10-11 |
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|---|---|---|---|
| TW105103781ATWI602093B (en) | 2016-02-04 | 2016-02-04 | Circuit layout structure |
| Country | Link |
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| CN (1) | CN107037902B (en) |
| TW (1) | TWI602093B (en) |
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| CN103713781A (en)* | 2012-10-09 | 2014-04-09 | 联胜（中国）科技有限公司 | Touch panel |
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| TW201729048A (en) | 2017-08-16 |
| CN107037902A (en) | 2017-08-11 |
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