本發明是關於非揮發性記憶體的儲存裝置與控制器進行的控制方法，且特別是關於具有異常狀況後修復功能的非揮發性記憶體的儲存裝置與控制器。The present invention relates to a control method for a storage device and a controller of a non-volatile memory, and more particularly to a storage device and controller for a non-volatile memory having a repair function after an abnormal condition.
快閃記憶體等非揮發性記憶體近年來快速發展，並且出現在各式各樣的電子裝置。目前看來，接下來不管是容量或是技術的發展，還會繼續加強。一旦越來越多的資料被放在這類的非揮發性記憶體，為了確保儲存資料的正確性與安全性，如果發生異常現象，例如突然斷電等，提供有效而且可靠的修復機制也就越來越重要。Non-volatile memory such as flash memory has developed rapidly in recent years and has appeared in a wide variety of electronic devices. At present, it seems that the next step will continue to strengthen regardless of the development of capacity or technology. Once more and more data is placed in such non-volatile memory, in order to ensure the correctness and security of the stored data, if an abnormal phenomenon occurs, such as sudden power failure, etc., an effective and reliable repair mechanism is provided. more and more important.
在修復的過程中，有些時候會發現空間不足的現象，這時候就需要對於實體區塊進行重新的配置。為了存取的效率，有些時候並不會將實體區塊的每個資料頁填滿。因此，在實體區塊重新配置的操作時，就會將資料頁進行搬移以釋放出額外的空間。這樣的操作有時候也會稱為垃圾重整(Garbage Collection)。例如將多個實體區塊的資料頁搬移到到同一個實體區塊，以釋放出新的實體區塊。隨著使用者對於速度的要求越來越高，這些重新配置的操作往往被要求在很短的時間內完成。然而，要直接加快存儲速度通常會立刻增加成本。因此，如何能夠找出一個比較好的空間重置方法，就成了一件非常有價值的工作。In the process of repairing, sometimes there will be insufficient space. In this case, the physical block needs to be reconfigured. For the efficiency of access, sometimes each material page of the physical block is not filled. Therefore, when the physical block is reconfigured, the data page is moved to free up extra space. Such operations are sometimes referred to as Garbage Collection. For example, moving the data pages of multiple physical blocks to the same physical block to release new physical blocks. As users become more demanding on speed, these reconfiguration operations are often required to be completed in a short period of time.to make. However, speeding up storage directly increases costs immediately. Therefore, how to find a better space reset method becomes a very valuable job.
本發明提供一種非揮發性儲存裝置，包含一非揮發性存儲器，劃分成複數實體區塊，每一實體區塊包含複數實體頁；一連接界面，供連接至一主機；以及一控制器，連接到該連接界面，其中該控制器在進行一區塊重新配置時，重新調整資料存在於該複數實體區塊的位置，以取得可用實體區塊；並且該區塊重新配置的一部份資料搬移在該控制器初始運作時進行，該區塊重新配置的另一部份資料搬移在該控制器處理來自該主機的一讀取命令時進行。The present invention provides a non-volatile storage device, comprising a non-volatile memory, divided into a plurality of physical blocks, each physical block comprising a plurality of physical pages; a connection interface for connecting to a host; and a controller, connecting Go to the connection interface, wherein the controller re-adjusts the location of the data in the plurality of physical blocks to obtain an available physical block when performing a block reconfiguration; and a part of the data relocation of the block is reconfigured When the controller is initially operational, another portion of the data relocation of the block relocation is performed when the controller processes a read command from the host.
本發明提供一種控制器進行的控制方法，用於一非揮發性儲存裝置，該非揮發性儲存裝置包含一非揮發性存儲器與一連接界面，該非揮發性儲存器劃分成複數實體區塊，每一實體區塊劃分成複數實體頁，該連接界面連接一主機，該控制器控制該非揮發性儲存裝置時包含：該控制器在進行一區塊重新配置時，重新調整資料存在於該複數實體區塊的位置，以取得可用實體區塊；並且該區塊重新配置的一部份資料搬移在該控制器初始運作時進行，該區塊重新配置的另一部份資料搬移在該控制器處理來自該主機的一讀取命令時進行。The present invention provides a control method performed by a controller for a non-volatile storage device, the non-volatile storage device comprising a non-volatile memory and a connection interface, the non-volatile storage being divided into a plurality of physical blocks, each The physical block is divided into a plurality of physical pages, and the connection interface is connected to a host. When the controller controls the non-volatile storage device, the controller includes: when the controller performs a block reconfiguration, re-adjusting data exists in the plurality of physical blocks. a location to obtain an available physical block; and a portion of the data relocation of the block is relocated during initial operation of the controller, and another portion of the data relocation of the block is moved at the controller from the The host performs a read command.
10‧‧‧電腦10‧‧‧ computer
12‧‧‧隨身碟12‧‧‧USB flash drive
20‧‧‧主機20‧‧‧Host
22‧‧‧資料儲存裝置22‧‧‧Data storage device
24‧‧‧記憶體模組24‧‧‧ memory module
41‧‧‧系統區塊群組41‧‧‧System Block Group
43‧‧‧資料區塊群組43‧‧‧Data Block Group
45‧‧‧備用區塊群組45‧‧‧Substitute block group
102‧‧‧USB傳輸介面102‧‧‧USB transmission interface
201‧‧‧管理模組201‧‧‧Management module
203‧‧‧第一傳輸介面203‧‧‧First transmission interface
221‧‧‧微控制器221‧‧‧Microcontroller
223‧‧‧記憶體管理模組223‧‧‧Memory Management Module
225‧‧‧重組編碼模組225‧‧‧Reorganized coding module
227‧‧‧第二傳輸介面227‧‧‧Second transmission interface
229‧‧‧緩衝記憶體229‧‧‧ buffer memory
231‧‧‧第一模組介面231‧‧‧ first module interface
241‧‧‧第二模組介面241‧‧‧Second module interface
243‧‧‧控制電路243‧‧‧Control circuit
245‧‧‧記憶體區塊陣列245‧‧‧Memory block array
130~132P、B1~PB9‧‧‧實體區塊130~132P, B1~PB9‧‧‧ physical block
P1~P12‧‧‧頁P1~P12‧‧‧Page
LB0~LB3‧‧‧邏輯區塊LB0~LB3‧‧‧ logical block
1321、1322、P_1~P_N‧‧‧資料頁1321, 1322, P_1~P_N‧‧‧Information Page
1301、1301‧‧‧已寫入資料頁1301, 1301‧‧‧ has been written to the data page
VG_0~VG_N‧‧‧電壓VG_0~VG_N‧‧‧ voltage
M_1~M_K‧‧‧記憶單元M_1~M_K‧‧‧ memory unit
VT_1~VT_7、VT_1’~VT_7’‧‧‧操作電壓VT_1~VT_7, VT_1’~VT_7’‧‧‧ operating voltage
VLSB、VCSB1、VCSB2、VMSB1~VMSB4‧‧‧電壓VLSB, VCSB1, VCSB2, VMSB1~VMSB4‧‧‧ voltage
L0~L7‧‧‧區間L0~L7‧‧‧
1401、1403、1405、14011~14013、14031~14032、14051~14052‧‧‧步驟Steps 1401, 1403, 1405, 14011~14013, 14031~14032, 14051~14052‧‧
圖1舉例說明根據本發明第一實施例的使用方式。Figure 1 illustrates the manner of use in accordance with a first embodiment of the present invention.
圖2舉例說明根據發明第一實施例的一種實作示意圖。Figure 2 illustrates a schematic diagram of an implementation in accordance with a first embodiment of the invention.
圖3舉例說明實體區塊與頁之間的關聯。Figure 3 illustrates the association between a physical block and a page.
圖4舉例說明邏輯區塊被分成三種區域。Figure 4 illustrates that a logical block is divided into three regions.
圖5舉例說明邏輯區塊跟實體區塊之間的對應關係。Figure 5 illustrates the correspondence between logical blocks and physical blocks.
圖6舉例說明邏輯區塊和實體區塊之間的關聯。Figure 6 illustrates the association between a logical block and a physical block.
圖7例示一個NAND結構快閃記憶體的記憶元件的一個區塊。Figure 7 illustrates a block of a memory element of a NAND structured flash memory.
圖8是一個三層式儲存單元(TLC)的快閃記憶體儲存單元存放電量跟操作電壓的示意圖。FIG. 8 is a schematic diagram of the storage capacity and operating voltage of a flash memory storage unit of a three-layer storage unit (TLC).
圖9例示如果對儲存單元施加操作電壓VT_1所可能發生的情形。FIG. 9 illustrates a situation that may occur if an operating voltage VT_1 is applied to a storage unit.
圖10例示在一次的讀取操作時，依序使用7個不同的電壓對儲存單元進行讀取操作。Figure 10 illustrates the sequential read operation of the memory cell using seven different voltages during a single read operation.
圖11例示用來找CSB的方法。Figure 11 illustrates a method for finding a CSB.
圖12例示用來找MSB的方法。Figure 12 illustrates a method for finding an MSB.
圖13例示對於實體區塊進行空間重新配置的做法。Figure 13 illustrates the practice of spatial reconfiguration of a physical block.
圖14例示根據本發明實施例的一種空間配置做法。Figure 14 illustrates a spatial configuration approach in accordance with an embodiment of the present invention.
本發明提供的實施例包括能夠快速有效進行區塊重整配置的非揮發性儲存裝置以及其中的控制器。在異常狀況結束後，控制器會進入初始運作的階段。在初始設定的時候，控制器會設定對應的參數，檢查可能的錯誤。此外，控制器還會判斷是否有實體區塊的空間是否足夠進行後續的操作。在符合一定預設條件下，控制器便會開始啟動實體區塊的重整配置操作。將多個沒有用滿的實體區塊上的實體頁合併到新的實體區塊，並且釋放可用的實體區塊。Embodiments provided by the present invention include a non-volatile storage device capable of quickly and efficiently performing a block reforming configuration and a controller therein. After the abnormal condition is over, the controller will enter the initial operation phase. At the initial setting, the controller will set the corresponding parameters to check for possible errors. In addition, the controller also determines if there is enough space in the physical block for subsequent operations. InfuUnder certain preset conditions, the controller will start the reconfiguration operation of the physical block. Merging physical pages on multiple unfilled physical blocks into new physical blocks and releasing the available physical blocks.
相對於過去的做法，對於實體區塊的重整配置操作，或成為垃圾整理(Garbage Collection)，並不一定全部都要在初始階段就完成。有些比較耗時的資料搬移，可以在控制器後續進行其他讀取操作的時候，抓時間空檔予以進行。此外，控制器也可以將部份的資料搬移挪到處理一般寫入操作的時候進行。Relative to the past practice, the reconfiguration operation of the physical block, or the Garbage Collection, may not all be completed in the initial stage. Some time-consuming data movements can be performed while the controller is performing other reading operations. In addition, the controller can also move part of the data to the time of processing the general write operation.
透過這樣的方式，在異常狀態結束，並且控制器嘗試進行修復的操作時，就不用因為堅持要在初始階段要完成所有的資料搬移，而造成耗時過久的情況。In this way, when the abnormal state ends and the controller attempts to perform the repair operation, there is no need to take too long a time to insist on completing all the data movement in the initial stage.
以下將先介紹這些實施例所可適用的架構，之後透過圖示解釋這些實施例的概念。The architecture to which these embodiments are applicable will be described below, and the concepts of these embodiments will be explained later by way of illustration.
請參照圖1，其舉例示範根據本發明第一實施例的使用示意圖。Please refer to FIG. 1, which illustrates a schematic diagram of the use according to the first embodiment of the present invention.
電腦10具有USB傳輸介面102，並且電腦10透過USB傳輸介面102對隨身碟12進行資料存取的操作。這個例子只是作為說明，並非用於限制本發明的範圍。舉例來說，電腦10可替換成各種電子裝置，例如手機、平板電腦、電視、相機等各類需要資料儲存裝置的電子設備。隨身碟12可替換成連接在電腦10外部的其他類別外接儲存裝置，也可替換成固定安裝在電腦內部的內部儲存裝置。USB傳輸介面102可替換成各種資料傳輸介面，例如IEEE1394介面、SATA介面、MS介面、MMC介面、SD介面、CF介面、IDE介面、PCI介面等。The computer 10 has a USB transmission interface 102, and the computer 10 performs data access operations on the flash drive 12 via the USB transmission interface 102. This example is for illustrative purposes only and is not intended to limit the scope of the invention. For example, the computer 10 can be replaced with various electronic devices such as mobile phones, tablets, televisions, cameras, and the like that require data storage devices. The flash drive 12 can be replaced with other types of external storage devices connected to the outside of the computer 10, or can be replaced with internal storage devices that are fixedly mounted inside the computer. The USB transmission interface 102 can be replaced with various data transmission interfaces, such as an IEEE1394 interface, a SATA interface, an MS interface, and an MMC.Interface, SD interface, CF interface, IDE interface, PCI interface, etc.
以隨身碟、外接硬碟或是內接磁盤或是快閃盤為例，當這些資料儲存裝置經由傳輸介面被連接到電腦等電子裝置時，電腦等電子裝置會對這些資料儲存裝置進行資料讀取，以判斷這些資料儲存裝置是否已經格式化。如果尚未格式化，電腦等電子裝置通常會詢問使用者是否對資料儲存裝置進行格式化操作。當使用者決定對資料儲存裝置進行格式化，電腦等電子裝置可發出命令給資料儲存裝置，由資料儲存裝置自行按照命令進行格式化。另一種做法是，電腦等電子裝置會提供格式化所需的細節控制指令，例如在資料儲存裝置中建立檔案對照表、預設數值填寫等等。Taking a portable disk, an external hard disk, or an internal disk or a flash disk as an example, when these data storage devices are connected to an electronic device such as a computer via a transmission interface, electronic devices such as computers will read the data storage devices. Take to determine if these data storage devices have been formatted. If it has not been formatted, an electronic device such as a computer usually asks the user whether to format the data storage device. When the user decides to format the data storage device, the electronic device such as the computer can issue a command to the data storage device, and the data storage device formats the data according to the command. Alternatively, electronic devices such as computers may provide detailed control commands required for formatting, such as creating a file comparison table in a data storage device, filling in preset values, and the like.
請參照圖2，其舉例示範圖1對應的裝置內部架構的一種實作方式。Please refer to FIG. 2 , which illustrates an implementation manner of the internal architecture of the device corresponding to FIG. 1 .
主機20具有管理模組201與第一傳輸介面203。主機20透過管理模組201的硬體或軟體或軟體硬體的組合，經由第一傳輸介面203存取資料儲存裝置22。這裡提到的主機20可以對應到圖1的電腦10。其中管理模組201的範例包括在主機上執行，負責檔案與資料儲存的作業系統、對應的驅動程式以及相關的控制電路的組合。The host 20 has a management module 201 and a first transmission interface 203. The host 20 accesses the data storage device 22 via the first transmission interface 203 through a combination of hardware or software or software hardware of the management module 201. The host 20 mentioned here may correspond to the computer 10 of FIG. Examples of the management module 201 include a combination of an operating system responsible for archival and data storage, a corresponding driver, and associated control circuitry.
資料儲存裝置22則具有第二傳輸介面227、微控制器221、緩衝記憶體229、記憶體管理模組223、重組編碼模組225以及第一模組介面231。資料儲存裝置22更具有記憶體模組24，而記憶體模組24則具有第二模組介面241、控制電路243與記憶體區塊陣列245。The data storage device 22 has a second transmission interface 227, a microcontroller 221, a buffer memory 229, a memory management module 223, a reassembly coding module 225, and a first module interface 231. The data storage device 22 further has a memory module 24, and the memory module 24 has a second module interface 241, a control circuit 243 and a memory block array 245.
在這個範例中，第二傳輸介面227與主機20的第一傳輸介面203對應，提供例如機械、電子跟相關的信號傳輸處理。緩衝記憶體227作為資料儲存裝置22在讀出跟寫入資料時，作為信號傳輸過程的緩衝或是建構快取架構使用。整個資料儲存裝置22的運作則主要由微控制器221執行預定的指令碼，在適當的時候產生適當的控制信號來控制各個元件的操作。記憶體管理模組223與重組編碼模組225可透過電路硬體來實作，或透過電路配合給微控制器221執行的指令碼進行運作，也可全部透過對應的指令碼實作，由微控制器221執行。In this example, the second transmission interface 227 corresponds to the first transmission interface 203 of the host 20, providing, for example, mechanical, electronic, and related signal transmission processing. The buffer memory 227 is used as a buffer for the signal transmission process or as a construction cache structure when the data storage device 22 reads and writes data. The operation of the entire data storage device 22 is primarily performed by the microcontroller 221 executing predetermined instruction codes, and appropriate control signals are generated as appropriate to control the operation of the various components. The memory management module 223 and the re-encoding module 225 can be implemented by using a circuit hardware, or by using a command code that is executed by the microcontroller 221 through the circuit, or can be implemented by using the corresponding instruction code. The controller 221 executes.
第一模組介面231用來跟記憶體模組24進行溝通。記憶體模組24內的第二模組介面241跟第一模組介面231對應，控制電路243根據微控制器221的指令對記憶體區塊陣列245進行存取。記憶體區塊陣列245可包括複數個快閃記憶體實體區塊。The first module interface 231 is used to communicate with the memory module 24. The second module interface 241 in the memory module 24 corresponds to the first module interface 231, and the control circuit 243 accesses the memory block array 245 according to the instruction of the microcontroller 221. The memory block array 245 can include a plurality of flash memory physical blocks.
記憶體管理模組223包括處理邏輯跟對照表格，用來將記憶體區塊陣列245的實體區塊跟邏輯區塊進行比對紀錄。此外，資料儲存裝置22也可以包括錯誤更正模組(未圖示)等。The memory management module 223 includes a processing logic and a comparison table for comparing the physical blocks of the memory block array 245 with the logical blocks. Further, the data storage device 22 may include an error correction module (not shown) or the like.
其中，重組編碼模組225負責對寫入記憶體模組24的原始資料進行重組編碼，產生對應的重組編碼資料，以及對於從記憶體模組24讀出的重組編碼資料進行反重組編碼，以還原回原始資料的數值。這包括對於特定位置的位元進行位置交換、反相部分位置的位元、對於奇數位址跟偶數位址的資料用不同的方式進行反重組編碼等等。The recombination coding module 225 is responsible for recombining and encoding the original data written in the memory module 24, generating corresponding recombination coded data, and performing inverse recombination coding on the recombined coded data read from the memory module 24. Restore back to the value of the original data. This includes position swapping for bits at specific locations, bits for inverting partial locations, data for odd and even addresses, anti-recombination encoding in different ways, and so on.
重組編碼的目的可以包括資料的穩定性。舉例來說，在快閃記憶體中，假如相鄰單元存放的數值相同，例如都是0或都是1，有可能會因為電子特性，影響到儲存資料存放的穩定性。換言之，透過進行重組編碼，是相鄰單元存放的數字可以盡量是0與1交錯，就能增加資料存放的穩定性。因此，具有重組編碼功能，就能使用成本更低的快閃記憶體，而仍能維持一定的儲存品質。The purpose of the recombination code may include the stability of the data. For exampleIn the flash memory, if the values stored in adjacent units are the same, for example, both are 0 or both, it may affect the stability of stored data storage due to electronic characteristics. In other words, by performing recombination coding, the numbers stored in adjacent units can be interlaced as much as possible, and the stability of data storage can be increased. Therefore, with the recombination coding function, it is possible to use a lower cost flash memory while still maintaining a certain storage quality.
重組編碼也可以基於各種其他的目的，例如避免存在資料儲存裝置的資料被未經授權者讀取等等。重組編碼也可以使用任何目前已經知道或日後開發的各種編碼方式，只要能夠將原始資料進行編碼、解碼後再還原回原始資料，都算是重組編碼的範圍。The recombination code can also be based on various other purposes, such as avoiding the presence of data stored in the data storage device from being read by unauthorized persons, and the like. The recombination code can also use any of the various encoding methods that are currently known or later developed, as long as the original data can be encoded, decoded, and then restored back to the original data, which is considered to be the scope of the recombination coding.
請參照圖3，其舉例說明在快閃記憶體中，實體區塊與頁之間的關係。Please refer to FIG. 3, which illustrates the relationship between a physical block and a page in a flash memory.
在圖3中，總共有四個實體區塊PB1、PB2、PB3跟PB4。每個實體區塊裡頭進一步區隔成複數個頁，P1、P2、P3到P12。在這個範例中，一個實體區塊對應到12個頁，當然，在實際的設計中，一個實體區塊包括的頁數目可以作各種不同的調整。在不同的應用環境中，有可能對於實體區塊、頁給予不同的名稱，或甚至對於實體區塊跟頁進行分組。這些都是熟悉此項技術領域的人所熟悉的，所以在此不再贅述。In Fig. 3, there are a total of four physical blocks PB1, PB2, PB3 and PB4. Each physical block is further divided into a plurality of pages, P1, P2, P3 to P12. In this example, one physical block corresponds to 12 pages. Of course, in the actual design, the number of pages included in one physical block can be variously adjusted. In different application environments, it is possible to give different names to physical blocks, pages, or even to group physical blocks. These are familiar to those skilled in the art and will not be described here.
對於快閃記憶體來說，例如NAND快閃記憶體或是NOR快閃記憶體，對於沒有使用過的快閃記憶體要進行資料寫入動作前，實體區塊必須先進行抹除動作。抹除動作以實體區塊作為基本單位，而寫入則可以頁作為基本單位。經過抹除過的實體區塊接著就能對想寫入的頁進行資料寫入。然而，如果某個頁已經被進行寫入操作，要再進行寫入操作的話，就必須先對包括這個頁的實體區塊進行抹除的處理。For flash memory, such as NAND flash memory or NOR flash memory, the physical block must be erased before the data write operation is performed on the unused flash memory. The erase action uses the physical block as the basic unit, while the write can be the page as the basic unit. ErasedThe physical block can then write data to the page that you want to write. However, if a page has been written, and the write operation is to be performed, the physical block including the page must be erased first.
由於實體區塊的範圍大於頁的範圍，所以，如果要進行上述曾經寫入過的頁再進行寫入時，就必須先進行資料的搬移。換言之，對於邏輯上同樣位址的資料，可能在資料寫入跟重新寫入的過程，從一個實體區塊被搬移到另一個實體區塊。Since the range of the physical block is larger than the range of the page, if the page that has been written above is to be written again, the data must be moved first. In other words, for data that is logically the same address, it may be moved from one physical block to another in the process of data writing and rewriting.
接著，請參照圖4，其示範一種將實體區塊進行分類的做法。Next, please refer to FIG. 4, which illustrates an approach of classifying physical blocks.
所有的實體區塊被區分成三類，系統區塊群組41、資料區塊群組43跟備用區塊群組45。系統區塊群組41包括用來存放邏輯區塊跟實體區塊的對照表、微控制器的指令碼、各種指標等系統資料。除了系統區塊群組41，資料區塊群組43則指那些用來實際存放資料的實體區塊。備用區塊群組45則用來存放用來作資料搬移與備用的實體區塊。All physical blocks are divided into three categories, system block group 41, data block group 43 and spare block group 45. The system block group 41 includes system data for storing a logical table and a physical block, a command code of the microcontroller, and various indicators. In addition to the system block group 41, the data block group 43 refers to the physical blocks used to actually store the data. The spare block group 45 is used to store physical blocks for data transfer and backup.
如上所述，當進行對曾經寫過的頁要再進行寫入時，需要先進行抹除操作才能進行。換言之，這個頁所處的實體區塊的其他頁的資料也要一起先複製到別的實體區塊，這個實體區塊就從備用區塊群組45中挑選。等資料複製到這個備用區塊群組45的實體區塊後，這個實體區塊被分類到資料區塊群組43，而原先的實體區塊則經過抹除操作被分類到備用區塊群組45。As described above, when a page to be written is to be rewritten, it is necessary to perform an erase operation first. In other words, the data of other pages of the physical block in which the page is located is also copied to other physical blocks together, and the physical block is selected from the spare block group 45. After the data is copied to the physical block of the spare block group 45, the physical block is classified into the data block group 43, and the original physical block is classified into the spare block group by the erasing operation. 45.
換言之，不但對應到邏輯位址的實體區塊可能一直在改變，甚至哪個實體區塊對應到哪個區域也在改變。因此系統必須紀錄邏輯區塊與實體區塊之間的對應關係。In other words, not only the physical block corresponding to the logical address may beIt changes directly, and even which physical block corresponds to which area is also changing. Therefore, the system must record the correspondence between logical blocks and physical blocks.
請參照圖5，其例示邏輯區塊與實體區塊的對應關係。在這個例子中，邏輯區塊LB0對應到實體區塊PB5，邏輯區塊LB1對應到實體區塊PB0，邏輯區塊LB3對應到實體區塊PB6，而邏輯區塊LB3則對應到實體區塊PB9。Please refer to FIG. 5, which illustrates the correspondence between logical blocks and physical blocks. In this example, the logical block LB0 corresponds to the physical block PB5, the logical block LB1 corresponds to the physical block PB0, the logical block LB3 corresponds to the physical block PB6, and the logical block LB3 corresponds to the physical block PB9. .
資料儲存裝置可以透過對照表或其他方式來儲存這些對應關係。The data storage device can store these correspondences through a look-up table or other means.
圖6舉例示範用一個對照表來紀錄邏輯區塊跟實體區塊之間的對應關係。在圖6的例子中，邏輯區塊435對應到實體區塊221，邏輯區塊212對應到實體區塊779，邏輯區塊112對應到實體區塊832，並且邏輯區塊554對應到實體區塊21。Figure 6 illustrates the use of a look-up table to record the correspondence between logical blocks and physical blocks. In the example of FIG. 6, logical block 435 corresponds to physical block 221, logical block 212 corresponds to physical block 779, logical block 112 corresponds to physical block 832, and logical block 554 corresponds to physical block. twenty one.
請參考圖6，其例示一個NAND結構快閃記憶體的記憶元件的一個區塊(block)。在這個區塊中具有一定數目的資料頁(page)，亦即P_0、P_1、P_2到P_N。每一個資料頁則具有M_0、M_1、M_2到M_K個記憶單元(cell)。透過對每資料頁設定適當的電壓VG_0、VG_1、VG_2到VG_N，可讀取存於每個儲存單元的浮動閘(Floating Gate)的電位，進而得到每個儲存單元所存放的資料。Please refer to FIG. 6, which illustrates a block of a memory element of a NAND structure flash memory. There are a certain number of pages in this block, namely P_0, P_1, P_2 to P_N. Each data page has M_0, M_1, M_2 to M_K memory cells. By setting the appropriate voltages VG_0, VG_1, VG_2 to VG_N for each data page, the potential of the floating gate stored in each storage unit can be read, and the data stored in each storage unit can be obtained.
對於單層式儲存單元(SLC)快閃記憶體來說，每個儲存單元只存放一個位元的資料，也就是0或1。此時，理論上，只要給每資料頁適當的一個設定電壓VG_0、VG_1、VG_2到VG_N，就可以偵測出到底儲存單元存放的電量，而得出對應的資料值。For single-layer storage unit (SLC) flash memory, each storage unit stores only one bit of data, which is 0 or 1. At this time, in theory, as long as the appropriate set voltage VG_0, VG_1, VG_2 to VG_N is given to each data page, the amount of power stored in the storage unit can be detected, and the corresponding data value is obtained.
相對的，假如是多層式儲存單元(MLC)快閃記憶體，針對一次的讀取動作就需要施加多個不同的設定電壓，以判斷到底儲存單元裡頭存放的電量到底是多少，而換算出實際存放的資料內容。In contrast, if it is a multi-layer storage unit (MLC) flash memory, it is necessary to apply a plurality of different set voltages for a single read operation to determine what the amount of power stored in the storage unit is, and convert the actual The content of the data stored.
圖7是一個三層式儲存單元(TLC)的快閃記憶體儲存單元存放電量跟操作電壓的示意圖。在這個示意圖中可看到，一個儲存單元根據儲存的電量落在L0、L1、L2...L7區間，而代表存放的位元資料分別為111,011,001,...110。FIG. 7 is a schematic diagram of a three-layer storage unit (TLC) flash memory storage unit for storing power and operating voltage. As can be seen in this diagram, a storage unit falls within the L0, L1, L2, ... L7 interval according to the stored power, and the stored bit data is 111, 011, 001, ... 110, respectively.
對於這樣的儲存單元，理論上，在施加VT_1的操作電壓時，偵測電路可以判斷到底儲存單元存放的電量是屬於L0這一邊，也就是資料111，或是L1,L2,L3，L4,L5,L6,L7那一邊，也就是資料為111,011,001,101,100,000或110。For such a storage unit, in theory, when the operating voltage of VT_1 is applied, the detecting circuit can determine whether the amount of electricity stored in the storage unit belongs to the side of L0, that is, the data 111, or L1, L2, L3, L4, L5. On the side of L6, L7, that is, the data is 111, 011, 001, 101, 100, 000 or 110.
透過有次序的施加多個不同的電壓組合，理論上就可以判斷出所有三個位元的資料，也就是最大位元MSB(Most Significant Bit)、CSB(Central Significant Bit)與LSB(Least Significant Bit)的資料內容。By sequentially applying a plurality of different voltage combinations, it is theoretically possible to determine the data of all three bits, that is, the Most Significant Bit (MSB), the Central Significant Bit (CSB), and the LSB (Least Significant Bit). ) the content of the information.
但是，如上所述，隨著半導體製程持續朝密集化以及微小化的方向發展，以及快閃記憶體為了降低成本或是使用時間越來越長，相關的電路以及記憶體儲存單元的穩定性的問題越來越大。However, as described above, as the semiconductor process continues to develop toward miniaturization and miniaturization, and the flash memory is used to reduce cost or use time, the related circuits and the stability of the memory storage unit are The problem is getting bigger and bigger.
圖8例示一種可能的狀況，也就是如果對儲存單元施加操作電壓VT_1，有可能因為位元狀態間出現部分重疊或甚至位移，導致解讀出的資料發生不正確的情形。在這樣的情況下，就需要透過各種不同錯誤校驗方法，或是動態調整操作電壓來解決資料判斷不準確的問題。Fig. 8 illustrates a possible situation, that is, if the operating voltage VT_1 is applied to the storage unit, there is a possibility that the read data is incorrect due to partial overlap or even displacement between the bit states. In such cases, it is necessary to use various error verification methods or dynamically adjust the operation power.Press to solve the problem of inaccurate data judgment.
圖9例示在一次的讀取操作時，依序使用7個不同的電壓對儲存單元進行讀取操作，偵測儲存單元內浮動閘的電量，以判讀儲存單元存放的資料的LSB數值到底是0還是1。FIG. 9 illustrates that in a read operation, seven different voltages are sequentially used to read the storage unit, and the amount of the floating gate in the storage unit is detected to determine the LSB value of the data stored in the storage unit. Still 1.
從圖10可以清楚看到，如果儲存單元儲存的電量分佈落在VLSB的左側L0,L1,L2,L3，代表LSB的內容是0。相反的，如果是落在VLSB的右側L4,L5,L6,L7，則代表LSB的內容是1。As can be clearly seen from FIG. 10, if the power distribution stored in the storage unit falls on the left side of the VLSB, L0, L1, L2, and L3, the content representing the LSB is 0. Conversely, if it falls on the right side of the VLSB, L4, L5, L6, and L7, the content representing the LSB is 1.
由於在狀態間有重疊的問題，因此，可依序施加不同的電壓VLSB，VLSB+D,VLSB-D,VLSB+2D，VLSB-2D,VLSB+3D,VLSB-3D。藉此，假如儲存單元的電量分佈剛好落在例如VLSB+D與VLSB之間，就可以從偵測的結果得到一定的情報。Due to the overlap between states, different voltages VLSB, VLSB+D, VLSB-D, VLSB+2D, VLSB-2D, VLSB+3D, VLSB-3D can be applied sequentially. Thereby, if the power distribution of the storage unit falls just between, for example, VLSB+D and VLSB, certain information can be obtained from the detection result.
每次施加一個電壓可以得到一個位元結果，因此7次電壓就可以得到7個位元。這7個位元總共有八種可能的組合。由這7個位元對應的位元序(bit sequence)，可配合LDPC的解碼電路跟方法，用來計算校驗碼以及用來找出正確的位元資料，也就是利用所取得之軟資訊(soft information)搭配LDPC與BCH等方法，用來進行錯誤校驗。Each time a voltage is applied, one bit result can be obtained, so 7 voltages can get 7 bits. There are a total of eight possible combinations of these seven bits. The bit sequence corresponding to the 7 bits can be combined with the decoding circuit and method of the LDPC to calculate the check code and find the correct bit data, that is, to use the obtained soft information. (soft information) with LDPC and BCH and other methods for error checking.
圖11例示用來找CSB的方法。由於CSB代表第二個位元，在圖5中可看到如果儲存單元的電量是落在L2,L3,L4,L5則代表儲存單元儲存的CSB是0。另一方面，如果儲存單元的電量落在L0,L1,L6,L7區間，則代表儲存單元儲存的CSB是1。在這樣的配置下，可以理解的是需要使用VCSB1與VCSB2兩個操作電壓來過濾出到底儲存單元的電量是落在哪個區間。Figure 11 illustrates a method for finding a CSB. Since CSB represents the second bit, it can be seen in Figure 5 that if the power of the storage unit falls to L2, L3, L4, and L5, the CSB stored in the storage unit is 0. On the other hand, if the power of the storage unit falls within the L0, L1, L6, and L7 intervals, the CSB stored on behalf of the storage unit is 1. Under such a configuration, it can be understood that VCSB1 needs to be used.The VCSB2 operates two voltages to filter out which area of the storage unit is in the range.
相似於上述的說明，VCSB1與VCSB2也可以施加多個步進調整量，依序多次用不同的電壓進行讀取的動作。每次讀取的結果產生位元序，可搭配LDPC與BCH等方法，用來進行錯誤校驗。Similar to the above description, VCSB1 and VCSB2 can also apply a plurality of step adjustment amounts, and sequentially perform reading operations with different voltages. The result of each reading produces a bit sequence, which can be used with LDPC and BCH to perform error checking.
圖12例示用來找MSB的方方法。由於MSB代表最高的位元，在圖6中可看到如果儲存單元的電量是落在L0,L3,L4,L7區間，則代表儲存單元存放的MSB位元為1。相對的，假如儲存單元的電量是落在L1,L2,L5,L6區間，則代表儲存單元存放的MSB位元為0。Figure 12 illustrates a method for finding an MSB. Since the MSB represents the highest bit, it can be seen in FIG. 6 that if the power of the storage unit falls within the L0, L3, L4, and L7 intervals, the MSB bit stored in the storage unit is 1. In contrast, if the power of the storage unit falls within the L1, L2, L5, and L6 intervals, the MSB bit stored in the storage unit is 0.
相似於上述的說明，VMSB1，VMSB2,VMSB3,VMSB4也可以施加多個步進調整量，依序多次用不同的電壓進行讀取的動作。每次讀取的結果產生位元序，可搭配LDPC與BCH等方法，用來進行錯誤校驗。Similar to the above description, VMSB1, VMSB2, VMSB3, and VMSB4 can also apply a plurality of step adjustment amounts, and sequentially perform reading operations with different voltages in sequence. The result of each reading produces a bit sequence, which can be used with LDPC and BCH to perform error checking.
在上述的各種架構說明後，以下配合圖示進一步說明本發明實施例在異常狀態後，進行修復操作時，對於實體區塊重新進行配置的做法。當然，這樣的配置方法不限於一定要在異常狀態後才可以執行。After the various architectures described above, the following describes the practice of reconfiguring the physical block when the repair operation is performed after the abnormal state in the embodiment of the present invention. Of course, such a configuration method is not limited to being executed after an abnormal state.
請參考圖13。在圖13中，有兩個實體區塊130跟131。這兩個實體區塊130、131並沒有寫滿所有的資料頁。斜線區域的已寫入資料頁1301、1302代表有寫入有效資料的部份。為了更有效利用實體區塊的空間，已寫入資料頁1301跟1302被合併寫到新的實體區塊132，構成資料頁1321、1322。當資料搬移完成後，實體區塊130、131就可以釋放出來，給之後的寫入操作進行使用。Please refer to Figure 13. In Figure 13, there are two physical blocks 130 and 131. These two physical blocks 130, 131 are not filled with all the data pages. The written data pages 1301, 1302 of the slash area represent the portion where the valid data is written. In order to make more efficient use of the physical block space, the written data pages 1301 and 1302 are merged and written to the new physical block 132 to constitute data pages 1321, 1322. When the data is movedUpon completion, the physical blocks 130, 131 can be released for use in subsequent write operations.
換言之，在這樣的實體區塊資料重新配置後，浪費的空間可以被減少，資料頁也能被有效的利用。但這樣的資料配置需要進行比較耗時的資料搬移。因此，在以下的實施例中，在控制器進行讀取或寫入的操作時，利用空檔，將未完成的資料搬移繼續完成。In other words, after such physical block data is reconfigured, the wasted space can be reduced and the data pages can be effectively utilized. However, such data configuration requires relatively time-consuming data movement. Therefore, in the following embodiments, when the controller performs an operation of reading or writing, the unfinished data transfer is continued using the neutral.
請參考圖14，其例示根據發明的實體空間重新配置的一種做法。控制器在異常狀態結束後，會先進入初始階段(步驟1401)，在初始階段下，控制器會進行一些基本的其他初始設定(步驟14011)、控制器也會根據一些參數與統計數字判斷是否需要開始進行空間重新配置的操作(步驟14012)。如果需要的話，控制器就會開始進行規劃與資料搬移的操作(步驟14013)。在這些空間重新配置的操作中，最耗時的常常是資料搬移的過程。為了避免使用者需要進行過度漫長的等待。控制器會在一預定時間結束時，就先離開初始階段。換言之，使用者就可以開始對於存儲裝置進行讀寫的操作。Please refer to FIG. 14, which illustrates one approach to physical space reconfiguration in accordance with the present invention. After the abnormal state ends, the controller first enters the initial phase (step 1401). In the initial phase, the controller performs some basic other initial settings (step 14011), and the controller also determines whether according to some parameters and statistics. An operation to start spatial reconfiguration is required (step 14012). If necessary, the controller will begin the operation of planning and data movement (step 14013). Of these space reconfiguration operations, the most time consuming process is often the process of data movement. In order to avoid the user needs to wait for a long time. The controller will leave the initial phase at the end of a predetermined time. In other words, the user can begin the operation of reading and writing to the storage device.
接著，當控制器收到主機(例如所連接的電腦)傳來的讀取命令的時候(步驟1403)，控制器除了處理讀取命令以外(步驟14031，控制器還會找空檔，繼續進行之前未完成的資料搬移操作(步驟14032)。Then, when the controller receives the read command from the host (for example, the connected computer) (step 1403), the controller processes the read command (step 14031, the controller also finds a neutral file and continues). A previously uncompleted material transfer operation (step 14032).
此外，當控制器收到主機傳來的讀取命令的時候(步驟1405)，控制器除了進行寫入的操作(步驟14051)，也會利用空檔，繼續進行之前未完成的資料搬移操作(步驟14053)。In addition, when the controller receives the read command from the host (step 1405), in addition to the write operation (step 14051), the controller also uses the neutral to continue the previously uncompleted data transfer operation ( Step 14053).
透過這樣的做法，包括在異常狀態結束後，控制器就能儘快完成初始操作，讓使用者開始使用存儲裝置，而不需要等待過長的時間。By doing this, the controller can complete the initial operation as soon as possible after the abnormal state is over, allowing the user to start using the storage device without waiting too long.
綜上所陳，本發明無論就目的、手段及功效，在在均顯示其迥異於習知技術之特徵，懇請 貴審查委員明察，早日賜准專利，俾嘉惠社會，實感德便。惟應注意的是，上述諸多實施例僅係為了便於說明而舉例而已，本發明所主張之權利範圍自應以申請專利範圍所述為準，而非僅限於上述實施例。To sum up, the present invention, regardless of its purpose, means and efficacy, shows its distinctive features of the prior art. You are requested to review the examination and express the patent as soon as possible. It should be noted that the various embodiments described above are merely illustrative for ease of explanation, and the scope of the invention is intended to be limited by the scope of the claims.
1401、1403、1405、14011~14013、14031~14032、14051~14052‧‧‧步驟Steps 1401, 1403, 1405, 14011~14013, 14031~14032, 14051~14052‧‧
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