本發明係有關於一種發光元件，特別是關於一種發光二極體元件。The present invention relates to a light-emitting element, and more particularly to a light-emitting diode element.
由於固態照明及液晶顯示器背光源的重要應用，近來半導體發光二極體元件的發展吸引了很多的注意，極有機會取代現有光源設備，如日光燈、白熾燈泡等，其中，以氮化銦鎵(InGaN)為基礎的發光二極體更為眾所矚目的焦點。Due to the important applications of solid-state lighting and liquid crystal display backlights, the recent development of semiconductor light-emitting diode components has attracted a lot of attention, and has the opportunity to replace existing light source devices, such as fluorescent lamps, incandescent bulbs, etc., among which indium gallium nitride ( InGaN-based light-emitting diodes are the focus of attention.
第1圖顯示一習知氮化銦鎵(InGaN)為基礎之發光二極體結構，其於基板102上依序形成晶核層104、N型氮化鎵(n-GaN)層106、氮化銦鎵(InGaN)/氮化鎵(GaN)量子井結構108、電流阻擋層110、P型氮化鎵(p-GaN)層111和透明電流擴散層112，並且形成一P型電極114經由透明電流擴散層112電性連接P型氮化鎵層111，一N型電極116電性連接N型氮化鎵層106。藉由外部施加電流驅動，使此發光二極體元件之N型氮化鎵層106注入電子，P型氮化鎵層111注入電洞，電子電洞對在氮化銦鎵/氮化鎵量子井結構108結合，發射出光子。然而，由於光子在氮化鎵材料內的全反射物理特性，大部分的光子係侷限於發光二極體內，只有少部份的光子可以輻射出發光二極體，因此，提升發光二極體之汲光效率變成發展的重要趨勢。FIG. 1 shows a conventional InGaN-based light-emitting diode structure in which a nucleation layer 104, an N-type gallium nitride (n-GaN) layer 106, and nitrogen are sequentially formed on a substrate 102. Indium gallium nitride (InGaN)/gallium nitride (GaN) quantum well structure 108, current blocking layer 110, P-type gallium nitride (p-GaN) layer 111, and transparent current diffusion layer 112, and a P-type electrode 114 is formed via The transparent current diffusion layer 112 is electrically connected to the P-type gallium nitride layer 111, and the N-type electrode 116 is electrically connected to the N-type gallium nitride layer 106. The N-type gallium nitride layer 106 of the light-emitting diode element is injected into the electron by externally applied current driving, and the P-type gallium nitride layer 111 is implanted into the hole, and the electron hole is implanted in the indium gallium nitride/gallium nitride quantum. The well structure 108 combines to emit photons. However, due to the total reflection physical properties of photons in gallium nitride materials, most of the photonic systems are limited to the light-emitting diodes, and only a small number of photons can radiate the light-emitting diodes. Therefore, the light-emitting diodes are lifted. Light efficiency has become an important trend in development.
根據上述問題，本發明提出一種利用量子井與表面電漿波耦合以增強發光二極體發光效率之方法，特別是有關於使發光二極體中量子井與表面電漿波耦合單元間之距離接近，提高耦合強度，以有效增加發光二極體之發光效率之技術。According to the above problems, the present invention provides a method for enhancing the luminous efficiency of a light-emitting diode by coupling a quantum well with a surface plasma wave, in particular, relating to making a light-emitting diode.The distance between the quantum well and the surface plasma wave coupling unit is close, and the coupling strength is increased to effectively increase the luminous efficiency of the light-emitting diode.
本發明提供一種發光元件，包括一主動層，位於一N型半導體層和一P型半導體層間，及一表面電漿波耦合單元，鄰接N型半導體層。The invention provides a light-emitting element comprising an active layer between an N-type semiconductor layer and a P-type semiconductor layer, and a surface plasma wave coupling unit adjacent to the N-type semiconductor layer.
本發明提供一種發光元件之製造方法，包括以下步驟：提供一基板，依序形成一N型半導體層、一主動層和一P型半導體層於基板上，雷射剝離基板，蝕刻以薄化N型半導體層，及形成一表面電漿波耦合單元，連接於N型半導體層上。The invention provides a method for manufacturing a light-emitting device, comprising the steps of: providing a substrate, sequentially forming an N-type semiconductor layer, an active layer and a P-type semiconductor layer on the substrate, laser stripping the substrate, etching to thin the N The semiconductor layer is formed and a surface plasma wave coupling unit is formed and connected to the N-type semiconductor layer.
第2圖顯示一利用量子井與表面電漿波耦合以增加發光二極體效率之元件剖面圖，如圖所示，基板202上依序設置一晶核(nucleation)層204、一N型氮化鎵層206、一主動層208、一電流阻擋層210和一P型氮化鎵層212。一條狀之電流擴散層214位於P型氮化鎵層212上，另外，一絕緣層216位於P型氮化鎵層212上。一N型電極222直接接觸N型氮化鎵層206，一P型電極220藉由絕緣層216和P型氮化鎵層212隔絕，而經由電流擴散層214與P型氮化鎵層212電性連接。一介電層217設置於條狀電流擴散層214和P型氮化鎵層212上，一金屬層218設置於介電層217上。此元件除了於主動層208之量子井中藉由電子電洞結合發光，尚藉由表面電漿波的消散場(evanescent field)與主動層208內的電偶極耦合，吸取量子井中電子電洞結合之能量，將電子電洞對的能量交給介電層217和金屬層218間的表面電漿波，以發射出光子，提升發光元件200之發光效率，介電層217之設置係用以減少表面電漿波能量經由歐姆接觸而損耗，以更有效地藉由量子井與表面電漿波耦合來提升發光二極體200的發光效率。Figure 2 shows a cross-sectional view of a device utilizing a quantum well coupled with a surface plasma wave to increase the efficiency of the light-emitting diode. As shown, a nucleation layer 204 and an N-type nitrogen are sequentially disposed on the substrate 202. A gallium layer 206, an active layer 208, a current blocking layer 210, and a P-type gallium nitride layer 212 are formed. A strip of current spreading layer 214 is on the P-type gallium nitride layer 212, and an insulating layer 216 is on the P-type gallium nitride layer 212. An N-type electrode 222 is in direct contact with the N-type gallium nitride layer 206. The P-type electrode 220 is isolated by the insulating layer 216 and the P-type gallium nitride layer 212, and is electrically connected to the P-type gallium nitride layer 212 via the current diffusion layer 214. Sexual connection. A dielectric layer 217 is disposed on the strip current diffusion layer 214 and the P-type gallium nitride layer 212, and a metal layer 218 is disposed on the dielectric layer 217. In addition to the electron-hole fusion in the quantum well of the active layer 208, the element is coupled to the electric dipole in the active layer 208 by the evanescent field of the surface plasma wave to absorb the electron hole combination in the quantum well. The energy of the electron hole pair is transferred to the surface plasma wave between the dielectric layer 217 and the metal layer 218 to emit photons, thereby improving the luminous efficiency of the light-emitting element 200, and the setting of the dielectric layer 217 is used to reduce Surface plasma wave energy is lost through ohmic contact toThe luminous efficiency of the light-emitting diode 200 is improved more efficiently by coupling the quantum well with the surface plasma wave.
值得注意的是，此發光二極體中量子井結構208與金屬層218間之距離需小於表面電漿波的消散場深度，才能有效率的藉由消散場將量子井中的電子電洞對能量耦合，形成表面電漿波。然而，表面電漿波之消散場深度小於傳統發光二極體200內之P型氮化鎵層212的厚度，故製作此種量子井表面電漿波耦合之發光二極體時需將P型氮化鎵層212之厚度減少，然而，由於一般P型氮化鎵層內之電洞濃度都小於1018cm-3，太薄之P型氮化鎵層212會造成電洞擴散不易以及電阻上升等問題。It is worth noting that the distance between the quantum well structure 208 and the metal layer 218 in the light-emitting diode needs to be smaller than the depth of the surface of the surface plasma wave, so that the electron hole in the quantum well can be efficiently dissipated by the field. Coupling to form a surface plasma wave. However, the depth of the surface plasma wave dissipating field is smaller than the thickness of the P-type gallium nitride layer 212 in the conventional light-emitting diode 200. Therefore, the P-type is required to fabricate the light-emitting diode of the quantum wave surface of the quantum well. The thickness of the gallium nitride layer 212 is reduced. However, since the hole concentration in the general P-type gallium nitride layer is less than 1018 cm-3 , the too thin P-type gallium nitride layer 212 may cause hole diffusion and resistance. Raise and other issues.
因此，本發明改於N型氮化鎵層上製作表面電漿波耦合單元，以提升發光元件之發光效率，因為N型氮化鎵層之多數載子濃度遠高於P型氮化鎵層內之多數載子濃度，將N型氮化鎵層厚度減少對於載子擴散不易或電阻上升之問題較不明顯。本發明把N型氮化鎵層之厚度減少，於其上形成表面電漿波耦合單元，藉以提升發光二極體之發光效率，且可避免上述載子擴散不易等問題。Therefore, the present invention changes the N-type gallium nitride layer to form a surface plasma wave coupling unit to improve the luminous efficiency of the light-emitting element, because the majority carrier concentration of the N-type gallium nitride layer is much higher than that of the P-type gallium nitride layer. The majority of the carrier concentration within the N-type gallium nitride layer is less pronounced for the problem that the carrier diffusion is not easy or the resistance is increased. The invention reduces the thickness of the N-type gallium nitride layer, forms a surface plasma wave coupling unit thereon, thereby improving the luminous efficiency of the light-emitting diode, and avoiding the problem that the above-mentioned carrier diffusion is not easy.
以下配合第3A圖~第3D圖描述本發明一實施例穿透式發光元件之製造方法。首先，請參照第3A圖，提供一例如藍寶石(sapphire)之基板302，並以有機金屬化學沉積製程(metalorganic chemical vapor deposition，MOCVD)於基板302上沉積一晶核層304。接著，以有機金屬化學氣相沉積製程，在溫度為1000℃左右，矽摻雜濃度為1020/cm-3之條件下沉積厚度約為2μm之N型氮化鎵(n-GaN)，作為N型半導體層306。在溫度為760℃，氮氣流速為1000sccm，氨氣流速為1500sccm之條件下沉積氮化銦鎵/氮化鎵量子井，作為主動層308，其中氮化銦鎵井層厚度為3奈米，氮化鎵阻障層厚度約為10奈米，而銦濃度約為10%。後續，沉積約20奈米之氮化鋁鎵(Al0.2Ga0.8N)作為電流阻擋層311。沉積約200奈米之P型氮化鎵(p-GaN)作為P型半導體層310。沉積鎳金之堆疊層於P型半導體層310上，314層為鎳金之堆疊層，為P型電流擴散層。312層為P型電極層，P型電極層接合於銅之支撐構件316。Hereinafter, a method of manufacturing a transmissive light-emitting device according to an embodiment of the present invention will be described with reference to FIGS. 3A to 3D. First, referring to FIG. 3A, a substrate 302 such as sapphire is provided, and a nucleation layer 304 is deposited on the substrate 302 by metalorganic chemical vapor deposition (MOCVD). Next, an N-type gallium nitride (n-GaN) having a thickness of about 2 μm is deposited by an organometallic chemical vapor deposition process at a temperature of about 1000 ° C and a germanium doping concentration of 1020 /cm-3 . N-type semiconductor layer 306. An indium gallium nitride/gallium nitride quantum well is deposited as a active layer 308 at a temperature of 760 ° C, a nitrogen flow rate of 1000 sccm, and an ammonia gas flow rate of 1500 sccm, wherein the indium gallium nitride well layer has a thickness of 3 nm, nitrogen. The gallium barrier layer has a thickness of about 10 nm and an indium concentration of about 10%. Subsequently, about 20 nm of aluminum gallium nitride (Al0.2 Ga0.8 N) was deposited as the current blocking layer 311. P-type gallium nitride (p-GaN) of about 200 nm is deposited as the P-type semiconductor layer 310. A stacked layer of nickel gold is deposited on the P-type semiconductor layer 310, and a layer 314 is a stacked layer of nickel gold, which is a P-type current diffusion layer. The 312 layer is a P-type electrode layer, and the P-type electrode layer is bonded to the copper support member 316.
請參照第3B圖，將上述元件倒置，並利用雷射剝離技術(laser lift-off technique)將基板302從晶核層304上剝離。請參照第3C圖，利用感應耦合電漿反應式離子蝕刻設備(ICP-RIE)，依序蝕刻晶核層304和N型半導體層306，將N型半導體層306蝕刻至約5~200奈米之厚度(厚度更佳為10~40奈米)，其目的是薄化N型半導體層306，使後續形成之表面電漿波耦合元件與主動層308間之距離可小於表面電漿波之消散波深度，以提升量子井與表面電漿波耦合之強度，增加元件之發光效率。Referring to FIG. 3B, the above components are inverted, and the substrate 302 is peeled off from the nucleation layer 304 by a laser lift-off technique. Referring to FIG. 3C, the nuclei layer 304 and the N-type semiconductor layer 306 are sequentially etched by an inductively coupled plasma reactive ion etching apparatus (ICP-RIE) to etch the N-type semiconductor layer 306 to about 5 to 200 nm. The thickness (more preferably 10 to 40 nm) is to thin the N-type semiconductor layer 306 so that the distance between the subsequently formed surface plasma wave coupling element and the active layer 308 can be smaller than the dissipation of the surface plasma wave. The wave depth increases the intensity of the coupling between the quantum well and the surface plasma wave, increasing the luminous efficiency of the component.
請參照第3D圖，以電漿輔助化學氣相沉積(PECVD)設備沉積厚度約為10奈米之氧化矽或氮化矽之介電層318於蝕刻後之N型半導體層306上，接著，於介電層318上沉積一金、銀或鋁之金屬層320，在本實施例中，介電層318和金屬層320係用作表面電漿波耦合單元322，介電層318之設置係用來減少表面電漿波之歐姆接觸損耗，以有效地藉由表面電漿波與量子井耦合提升發光二極體的發光效率。後續，使用快速熱退火系統(rapid thermal annealing，RTA)對金屬層320進行一熱處理步驟，使金屬層320形成奈米結構，並使用蒸鍍技術於N型半導體層306上形成一N型電極324。Referring to FIG. 3D, a dielectric layer 318 of yttrium oxide or tantalum nitride having a thickness of about 10 nm is deposited on the etched N-type semiconductor layer 306 by a plasma assisted chemical vapor deposition (PECVD) apparatus. A metal layer 320 of gold, silver or aluminum is deposited on the dielectric layer 318. In this embodiment, the dielectric layer 318 and the metal layer 320 are used as the surface plasma wave coupling unit 322, and the dielectric layer 318 is disposed. It is used to reduce the ohmic contact loss of the surface plasma wave to effectively improve the luminous efficiency of the light-emitting diode by coupling the surface plasma wave with the quantum well. Subsequently, a heat treatment step is performed on the metal layer 320 using a rapid thermal annealing (RTA) to form the metal layer 320 into a nanostructure, and an N-type electrode 324 is formed on the N-type semiconductor layer 306 using an evaporation technique. .
本實施例之穿透式發光元件300之N型電極324和P型電極312分別位於元件之兩側，當例如電流之注入或雷射之激發於發光二極體產生電子和電洞對，電子電洞對會於主動層308之量子井結合，部份電子電洞對直接產生輻射性結合(radiative recombination)放光，部份電子電洞對則非輻射性結合，轉換成熱能。本實施例設置有表面電漿波耦合單元322，藉由表面電漿波的消散場與量子井內的電偶極耦合，將部份電子電洞對的能量耦合至介電層318和N型半導體層306之間的表面電漿波，表面電漿波藉由金屬之奈米結構，達成相位匹配條件(phase-matching condition)而發光。The N-type electrode 324 and the P-type electrode 312 of the transmissive light-emitting element 300 of the present embodiment are respectively located on both sides of the element, for example, when an electric current is injected or a laser is excited.The photodiode generates electron and hole pairs. The electron hole is combined with the quantum well of the active layer 308. Some of the electron holes directly emit radiation recombination, and some electron holes are not. Radiative combination, converted into heat. This embodiment is provided with a surface plasma wave coupling unit 322 for coupling the energy of a portion of the electron hole pair to the dielectric layer 318 and the N-type by coupling the dissipative field of the surface plasma wave with the electric dipole in the quantum well. The surface plasma waves between the semiconductor layers 306, the surface plasma waves are illuminated by a phase-matching condition of the metal nanostructure.
值得注意的是，本實施例之表面電漿波耦合單元322係形成在N型半導體層306上，且本實施例另外蝕刻N型半導體層306，減少N型半導體層306之厚度，使發光二極體中量子井與表面電漿波耦合單元322間之距離小於表面電漿波之消散場深度，因此可有效率的藉由消散場將量子井中的電子電洞對能量耦合，形成表面電漿波，增加發光二極體之發光效率。It should be noted that the surface plasma wave coupling unit 322 of the present embodiment is formed on the N-type semiconductor layer 306, and the N-type semiconductor layer 306 is additionally etched in this embodiment to reduce the thickness of the N-type semiconductor layer 306, so that the light-emitting two is The distance between the quantum well and the surface plasma wave coupling unit 322 in the polar body is smaller than the depth of the dissipative field of the surface plasma wave, so that the electron hole in the quantum well can be efficiently coupled to the energy by the dissipation field to form a surface plasma. Wave, increasing the luminous efficiency of the light-emitting diode.
以下配合第4A圖~第4E圖描述本發明另一實施例反射式發光元件之製造方法。首先提供一藍寶石之基板402，並以有機金屬化學氣相沉積製程沉積一晶核層404於基板402上，沉積溫度可為535℃，晶核層404之厚度可約為25奈米。接著，以有機金屬化學氣相沉積製程，在溫度為1000℃左右，矽摻雜濃度為1020/cm-3之條件下沉積厚度約為2μm之N型氮化鎵(n-GaN)，作為N型半導體層406。在溫度為760℃，氮氣流速為1000sccm，氨氣流速為1500sccm之條件下沉積氮化銦鎵/氮化鎵量子井，作為主動層408，其氮化銦鎵井層厚度約為3奈米，氮化鎵阻障層厚度為10奈米，而銦濃度約為10%。後續，沉積約20奈米之氮化鋁鎵(Al0.2Ga0.8N)作為電流阻擋層410。沉積約200奈米之P型氮化鎵(p-GaN)作為P型半導體層412。Hereinafter, a method of manufacturing a reflective light-emitting device according to another embodiment of the present invention will be described with reference to Figs. 4A to 4E. First, a sapphire substrate 402 is provided, and a nucleation layer 404 is deposited on the substrate 402 by an organometallic chemical vapor deposition process. The deposition temperature may be 535 ° C, and the thickness of the nucleation layer 404 may be about 25 nm. Next, an N-type gallium nitride (n-GaN) having a thickness of about 2 μm is deposited by an organometallic chemical vapor deposition process at a temperature of about 1000 ° C and a germanium doping concentration of 1020 /cm-3 . N-type semiconductor layer 406. An indium gallium nitride/gallium nitride quantum well is deposited at a temperature of 760 ° C, a nitrogen flow rate of 1000 sccm, and an ammonia gas flow rate of 1500 sccm. As the active layer 408, the thickness of the indium gallium nitride well layer is about 3 nm. The gallium nitride barrier layer has a thickness of 10 nm and an indium concentration of about 10%. Subsequently, about 20 nm of aluminum gallium nitride (Al0.2 Ga0.8 N) was deposited as the current blocking layer 410. P-type gallium nitride (p-GaN) of about 200 nm is deposited as the P-type semiconductor layer 412.
後續，進行一黃光製程，並且使用感應耦合電漿反應式離子蝕刻設備依序蝕刻P型半導體層412、電流阻擋層410和主動層408至暴露N型半導體層406，以提供N型電極之位置。其後，以蒸鍍製程沉積鈦和鋁之堆疊層於暴露之N型半導體層406上，並圖形化之，以形成N型電極416。接著，沉積鎳和金之堆疊層材料於P型半導體層412上，並圖形化之，以形成電流擴散層418和P型電極414。值得注意的是，本實施例反射式發光元件之N型電極416和P型電極414係位於元件之同一側。Subsequently, a yellow light process is performed, and the P-type semiconductor layer 412, the current blocking layer 410, and the active layer 408 are sequentially etched using an inductively coupled plasma reactive ion etching apparatus to expose the N-type semiconductor layer 406 to provide an N-type electrode. position. Thereafter, a stacked layer of titanium and aluminum is deposited on the exposed N-type semiconductor layer 406 by an evaporation process and patterned to form an N-type electrode 416. Next, a stacked layer of nickel and gold is deposited on the P-type semiconductor layer 412 and patterned to form a current diffusion layer 418 and a P-type electrode 414. It should be noted that the N-type electrode 416 and the P-type electrode 414 of the reflective light-emitting element of the present embodiment are located on the same side of the element.
請參照第4B圖，將上述元件倒置，並利用雷射剝離技術(laser lift-off technique)將基板402從晶核層404上剝離。請參照第4C圖，利用感應耦合電漿反應式離子蝕刻設備(ICP-RIE)，依序蝕刻晶核層404和N型半導體層406，將N型半導體層406蝕刻至約10~40奈米的厚度。請參照第4D圖，以電漿輔助化學氣相沉積(PECVD)設備沉積厚度約為10奈米之氧化矽或氮化矽之介電層420於蝕刻後之N型半導體層406上，接著，於介電層420上沉積一金、銀或鋁之金屬層422，金屬層422和介電層420用作本實施例之表面電漿波耦合單元424。請參照第4E圖，再將此單元倒置，將金屬層422貼合於一例如銅之支撐構件426上。Referring to FIG. 4B, the above components are inverted, and the substrate 402 is peeled off from the nucleation layer 404 by a laser lift-off technique. Referring to FIG. 4C, the nucleation layer 404 and the N-type semiconductor layer 406 are sequentially etched by an inductively coupled plasma reactive ion etching apparatus (ICP-RIE) to etch the N-type semiconductor layer 406 to about 10 to 40 nm. thickness of. Referring to FIG. 4D, a dielectric layer 420 of yttrium oxide or tantalum nitride having a thickness of about 10 nm is deposited on the etched N-type semiconductor layer 406 by a plasma assisted chemical vapor deposition (PECVD) apparatus. A metal layer 422 of gold, silver or aluminum is deposited on the dielectric layer 420. The metal layer 422 and the dielectric layer 420 are used as the surface plasma wave coupling unit 424 of the present embodiment. Referring to FIG. 4E, the unit is inverted and the metal layer 422 is attached to a supporting member 426 such as copper.
本實施例之金屬層422亦形成在N型半導體層406該側，且本實施例另薄化N型半導體層406，減少N型半導體層406之厚度，使發光二極體中量子井與表面電漿波耦合單元424間之距離小於表面電漿波之消散場深度，因此同樣可更有效率的藉由消散場將量子井中的電子電洞對能量耦合，形成表面電漿波，增加發光二極體之發光效率。The metal layer 422 of this embodiment is also formed on the side of the N-type semiconductor layer 406, and the N-type semiconductor layer 406 is further thinned in this embodiment, and the thickness of the N-type semiconductor layer 406 is reduced to make the quantum well and the surface of the LED. The distance between the plasma wave coupling units 424 is smaller than the depth of the dissipative field of the surface plasma waves, so that the electron holes in the quantum wells can be coupled to the energy by the dissipating field to form a surface plasma wave and increase the light emission. The luminous efficiency of the polar body.
以上提供之實施例係用以描述本發明不同之技術特徵，但根據本發明之概念，其可包括或運用於更廣泛之技術範面。須注意的是，實施例僅用以揭示本發明製程、裝置、組成、製造和使用之特定方法，並不用以限定本發明，任何熟習此技藝者，在不脫離本發明之精神和範圍內，當可作些許之更動與潤飾。因此，本發明之保護範圍，當視後附之申請專利範圍所界定者為準。The embodiments provided above are intended to describe various technical features of the present invention, but may include or be applied to a broader technical scope in accordance with the inventive concepts. Must pay attentionThe embodiments are only used to disclose the specific methods of the process, the device, the composition, the manufacture and the use of the present invention, and are not intended to limit the present invention, and those skilled in the art can, without departing from the spirit and scope of the present invention, Make some changes and refinements. Therefore, the scope of the invention is defined by the scope of the appended claims.
102‧‧‧基板102‧‧‧Substrate
104‧‧‧晶核層104‧‧ nucleation layer
106‧‧‧N型氮化鎵層106‧‧‧N-type gallium nitride layer
108‧‧‧量子井結構/主動層108‧‧‧Quantum well structure/active layer
110‧‧‧電流阻擋層110‧‧‧current barrier
111‧‧‧P型氮化鎵層111‧‧‧P type gallium nitride layer
112‧‧‧電流擴散層112‧‧‧current diffusion layer
114‧‧‧P型電極114‧‧‧P type electrode
116‧‧‧N型電極116‧‧‧N type electrode
200‧‧‧發光元件200‧‧‧Lighting elements
202‧‧‧基板202‧‧‧Substrate
204‧‧‧晶核層204‧‧ nucleation layer
206‧‧‧N型氮化鎵層206‧‧‧N-type gallium nitride layer
208‧‧‧主動層208‧‧‧ active layer
210‧‧‧電流阻擋層210‧‧‧current blocking layer
212‧‧‧P型氮化鎵層212‧‧‧P type gallium nitride layer
214‧‧‧電流擴散層214‧‧‧current diffusion layer
216‧‧‧絕緣層216‧‧‧Insulation
217‧‧‧介電層217‧‧‧ dielectric layer
218‧‧‧金屬層218‧‧‧metal layer
220‧‧‧P型電極220‧‧‧P type electrode
222‧‧‧N型電極222‧‧‧N type electrode
300‧‧‧穿透式發光元件300‧‧‧Transmissive lighting elements
302‧‧‧基板302‧‧‧Substrate
304‧‧‧晶核層304‧‧ nucleation layer
306‧‧‧N型半導體層306‧‧‧N type semiconductor layer
308‧‧‧主動層308‧‧‧Active layer
310‧‧‧P型半導體層310‧‧‧P type semiconductor layer
311‧‧‧電流阻擋層311‧‧‧current barrier
312‧‧‧P型電極312‧‧‧P type electrode
314‧‧‧P型電流擴散層314‧‧‧P type current diffusion layer
316‧‧‧支撐構件316‧‧‧Support members
318‧‧‧介電層318‧‧‧ dielectric layer
320‧‧‧金屬層320‧‧‧metal layer
322‧‧‧表面電漿波耦合單元322‧‧‧Surface plasma wave coupling unit
324‧‧‧N型電極324‧‧‧N type electrode
400‧‧‧反射式發光元件400‧‧‧Reflective light-emitting elements
402‧‧‧基板402‧‧‧Substrate
404‧‧‧晶核層404‧‧ nucleation layer
406‧‧‧N型半導體層406‧‧‧N type semiconductor layer
408‧‧‧主動層408‧‧‧ active layer
410‧‧‧電流阻擋層410‧‧‧current blocking layer
412‧‧‧P型半導體層412‧‧‧P type semiconductor layer
414‧‧‧P型電極414‧‧‧P type electrode
416‧‧‧N型電極416‧‧‧N type electrode
418‧‧‧電流擴散層418‧‧‧current diffusion layer
420‧‧‧介電層420‧‧‧ dielectric layer
422‧‧‧金屬層422‧‧‧metal layer
424‧‧‧表面電漿波耦合單元424‧‧‧Surface plasma wave coupling unit
426‧‧‧支撐構件426‧‧‧Support members
第1圖顯示一習知氮化銦鎵(InGaN)為基礎之發光二極體結構。Figure 1 shows a conventional indium gallium nitride (InGaN) based light emitting diode structure.
第2圖顯示一利用表面電漿波增加發光二極體效率之元件剖面圖。Figure 2 shows a cross-sectional view of a component that utilizes surface plasma waves to increase the efficiency of the light-emitting diode.
第3A圖~第3D圖揭示本發明一實施例穿透式發光元件之製造方法。3A to 3D are views showing a method of manufacturing a transmissive light-emitting device according to an embodiment of the present invention.
第4A圖~第4E圖描述本發明另一實施例反射式發光元件之製造方法。4A to 4E are views showing a method of manufacturing a reflective light-emitting element according to another embodiment of the present invention.
300‧‧‧穿透式發光元件300‧‧‧Transmissive lighting elements
306‧‧‧N型半導體層306‧‧‧N type semiconductor layer
308‧‧‧主動層308‧‧‧Active layer
310‧‧‧P型半導體層310‧‧‧P type semiconductor layer
311‧‧‧電流阻擋層311‧‧‧current barrier
312‧‧‧P型電極312‧‧‧P type electrode
314‧‧‧電流擴散層314‧‧‧current diffusion layer
316‧‧‧支撐構件316‧‧‧Support members
318‧‧‧介電層318‧‧‧ dielectric layer
320‧‧‧金屬層320‧‧‧metal layer
322‧‧‧表面電漿波耦合單元322‧‧‧Surface plasma wave coupling unit
324‧‧‧N型電極324‧‧‧N type electrode
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW97110711ATWI436497B (en) | 2008-03-26 | 2008-03-26 | Method for forming a light-emitting device |
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW97110711ATWI436497B (en) | 2008-03-26 | 2008-03-26 | Method for forming a light-emitting device |
| Publication Number | Publication Date |
|---|---|
| TW200941759A TW200941759A (en) | 2009-10-01 |
| TWI436497Btrue TWI436497B (en) | 2014-05-01 |
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW97110711ATWI436497B (en) | 2008-03-26 | 2008-03-26 | Method for forming a light-emitting device |
| Country | Link |
|---|---|
| TW (1) | TWI436497B (en) |
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103474519B (en)* | 2012-06-07 | 2016-12-07 | 清华大学 | The preparation method of light emitting diode |
| Publication number | Publication date |
|---|---|
| TW200941759A (en) | 2009-10-01 |
| Publication | Publication Date | Title |
|---|---|---|
| US8691606B2 (en) | Method for manufacturing a light emitting diode with smooth surface for reflective electrode | |
| TWI363440B (en) | Light-emitting device, light-emitting diode and method for forming a light-emitting device | |
| CN101604701B (en) | Light emitting diode having a thermal conductive substrate and method of fabricating the same | |
| CN100386899C (en) | High-efficiency high-brightness total reflection light-emitting diode and its manufacturing method | |
| CN102270633B (en) | High-power flip-chip array LED chip and manufacturing method thereof | |
| TWI382568B (en) | Light-emitting element, light-emitting diode | |
| TWI529967B (en) | Semiconductor light emitting device | |
| WO2007117035A1 (en) | Nitride semiconductor light emitting element and method for fabricating the same | |
| TW201214771A (en) | Light emitting device, light emitting device package, and lighting device | |
| CN111106212A (en) | Deep ultraviolet light-emitting diode with vertical structure and preparation method thereof | |
| JP2013034010A (en) | Vertical light-emitting device | |
| CN100399587C (en) | Semiconductor light-emitting element, manufacturing method thereof, and semiconductor device | |
| JP5318353B2 (en) | GaN-based LED element and light emitting device | |
| KR20090105462A (en) | Vertical group III-nitride semiconductor light emitting diode device and manufacturing method thereof | |
| CN110335925A (en) | Chip structure and manufacturing method thereof | |
| KR101480551B1 (en) | vertical structured group 3 nitride-based light emitting diode and its fabrication methods | |
| TWI436497B (en) | Method for forming a light-emitting device | |
| KR100699056B1 (en) | Light emitting diodes having a plurality of light emitting cells and a manufacturing method thereof | |
| JP2014154788A (en) | Semiconductor light-emitting element | |
| KR100675268B1 (en) | A semiconductor light emitting device having a flip chip structure in which a plurality of light emitting cells are arranged and a method of manufacturing the same | |
| KR101115533B1 (en) | Flip chip Light-emitting device and Method of manufacturing the same | |
| TW200812105A (en) | Vertical conductive GaN LED structure and the method for manufacturing | |
| TWI630730B (en) | Light-emitting device | |
| CN105006506A (en) | Light emitting device | |
| TW200536142A (en) | Method of fabricating gallium nitride-based light emitting diode and structure thereof |
| Date | Code | Title | Description |
|---|---|---|---|
| MM4A | Annulment or lapse of patent due to non-payment of fees |