12554321255432
發明所屬之技術領域 本發明是有關於一種 關於一種具有薄膜電晶體 置。 有機電致發光裝置，更尤其是有 之主動矩陣式有機電致發光裝 先前技術 電力代之快速發展’—具有類似薄小、質輕、 平板顯示器，早已需求…因此， 二//Λ晶顯示裝置(LCD)'電漿顯示面板 (PDP)场致發射顯示器（FED)、以及電致發光顯梦置 (eld)等平板顯示裝置(FPD)，正在研究及開發’：、 利用型之FPD裝置中，電致發光顯示裝置(關是 A h I狐，象，其中之光線係在有某一定強度之電場 時產生。此等電致發光顯示裝置國取 wrFT 之光源，可被分類成無機電致發光顯示裝 Λ J二機電致發光顯示裝置(eld)。電致發光顯 =衣置（ELD)，已由於其可顯示一可見光範圍内之每一色 :色度和低操作電厂堅’而受嘱目為-具有自 此外’由於上述之有機電致發光顯示裝置（ELD)，係 刑i發ί體’其係具有一高反差，以及係適用為-超薄 产t =衣置。此外，由於其具有一簡單之製造過程，其環 ί ’二tit、私度严相當低。此外，上述之有機電致發光顯示 又 ’係具有一數微秒s )之響應時間，以致其係 1255432 五、發明說明（2) 適用來顯示一些移動影像。該有機電致發光顯干 (ELD)，並無視角之限制，以及在低溫條件中係、。 由於其係以一在5 V和1 5 V間之相者低的Φ厂’、义思疋 其-驅動電路之製造和二相很V?。電壓來一 j述有機電致發光顯示裝置（ELD)之結構，係盥上述 光：Ϊ裝置(關者相類似，但其發光理論係 不同於上述之無機電致發光顯示裝置（eld)。亦即，上述 光顯示裝置(ELD)，係藉著電子與電洞之復 (m射光線，因而其經常被稱為—有機光發射二極體 近年來，一其中有多個排列成矩陣形式之 與ΐ相連接之主動矩陣_，已被廣泛應用至 戎：：板顯示叙置。此種主動矩陣類型，亦被應用至上述 ”致發光顯示裝置(ELD)，以及此係被稱為一主動 矩陣式有機電致發光顯示裝置（E L )。 第1圖係一可顯示一習知技術型主動 發光顯^裝置（ELD)之基本像素結構的等效電電致 在第1圖中，該主動矩陣式有機電致發光顯示裝置之 -像素係具有：一切換薄膜電晶體4、一驅動薄膜電晶體 *、一儲存電容器6、和一發光二極體（LED) 7。其切 f電晶體4和驅動薄膜電晶體5，係由一p_型多晶矽薄膜 晶體所構成。其切換薄膜電晶體4之閘極，係使連接至盆 =極線1，以及其切換薄膜電晶體4之源極，係使連接至盆 貝料線2。其切換薄膜電晶體4之汲極，係使連接至其驅動TECHNICAL FIELD OF THE INVENTION The present invention relates to a device having a thin film transistor. Organic electroluminescent devices, and more particularly active matrix organic electroluminescent devices, have developed rapidly with the previous generation of power--having a similarly small, lightweight, flat panel display, which has long been required... therefore, two// twins display Device (LCD) 'Plasma Display Panel (PDP) Field Emission Display (FED), and flat panel display device (FPD) such as electroluminescence display (eld), research and development ':, use type FPD device In the electroluminescence display device (off is an A h I fox, where the light is generated when there is an electric field of a certain intensity. The light source of the wrFT of the electroluminescent display device can be classified into inorganic electricity. Electroluminescent display device J 2 electroluminescent display device (eld). Electroluminescence display = ELD, because it can display every color in a range of visible light: chromaticity and low operating power plant The subject matter is - from the other 'because of the above-mentioned organic electroluminescent display device (ELD), the system has a high contrast, and the system is suitable for - ultra-thin production t = clothing. In addition, Because it has a simple manufacturing process, Ring ί 'two tit, the degree of privacy is quite low. In addition, the above organic electroluminescent display has a response time of 'a few microseconds s', so that its system is 1255432. 5. The invention description (2) is applicable to show some Move the image. The organic electroluminescence (ELD) has no viewing angle limitation and is in a low temperature condition. Because it is a Φ factory with a low phase between 5 V and 15 V, the manufacture of the drive circuit and the two phases are very V?. The structure of the organic electroluminescent display device (ELD) is the same as that of the above-mentioned light: germanium device (the related art is similar, but the light-emitting theory is different from the above-mentioned inorganic electroluminescent display device (eld). That is, the above-mentioned optical display device (ELD) is a combination of electrons and holes (m-ray rays, which are often referred to as - organic light-emitting diodes in recent years, and a plurality of them are arranged in a matrix form) The active matrix _ connected to ΐ has been widely used in 戎:: board display. This type of active matrix is also applied to the above-mentioned "luminescence display device (ELD), and this system is called an active Matrix type organic electroluminescence display device (EL). Fig. 1 is an equivalent electro-electrical structure of a basic pixel structure of a conventional technology-type active light-emitting device (ELD), which is shown in Fig. 1, the active matrix The pixel system of the organic electroluminescence display device has: a switching thin film transistor 4, a driving thin film transistor *, a storage capacitor 6, and a light emitting diode (LED) 7. The cut transistor 4 and Driving the thin film transistor 5, which is made up of a p_ type The crystal thin film crystal is formed by switching the gate of the thin film transistor 4 so as to be connected to the basin=pole line 1, and the source of the switching thin film transistor 4 is connected to the basin material line 2. The drain of the thin film transistor 4 is connected to its drive
第8頁 1255432 五、發明說明（3) ===閘極，以及其驅動 使連接至其發光二極體（LED) 7 ^ ^ (LED) 7之陰極接地。其驅動薄和。八务光二極體 接至-電力線3，以及；一 晶體5之源極，係使連 膜電晶體5之閘極和源極。電各器6，連接至其驅動薄 Η ΪΓΛ㈣例示之像素結構巾，若有—掃描信號施 :至”極線1，其切換薄膜電晶體4便會被導通，以及一 :自其貧料線2之影像信號’將會透過其切換薄膜電晶體 ’被儲存進至其儲存電容器6内。若此影像信號施加至其 驅動薄膜電晶體5之閘極，其驅動薄膜電晶體5被導通 (on) ’因而其發光二極體（LED) 7，將會發射光線。其發 光二極體（LED) 7之亮度，係藉由改變此發光二極體（LED) 7内之電流，來加以控制。其儲存電容器6，可於其切換薄 膜電晶體4被切斷（〇 f f )時’使其驅動薄膜電晶體5之閘極 電壓保持不變。亦即，即使當其切換薄膜電晶體4被切斷 時，由於其驅動薄膜電晶體5，可受到其儲存電容器6内所 儲存之電壓的驅動，上述之電流將可使持續流進至其發光 二極體（LED) 7内，因而其發光二極體（LED)，將會繼續發 射光線，直至有次一影像信號進入為止。 第2圖係一可顯示一習知技術型主動矩陣式有機電致 發光顯示裝置（ELD)之示意橫截面圖。第2圖係例示一有機 光發射二極體、一儲存電容器、和一驅動薄膜電晶體。此 外’其係採用一其中光線係透過一下部電極之陽極發出的 底部發射類型。Page 8 1255432 V. INSTRUCTIONS (3) === The gate and its drive ground the cathode connected to its light-emitting diode (LED) 7 ^ ^ (LED) 7 . Its drive is thin and. The eight-light diode is connected to the power line 3, and the source of the crystal 5 is the gate and source of the transistor 5. The electric device 6 is connected to the pixel structure towel which is driven by the driving thin film (4). If there is a scanning signal applied to the "pole line 1, the switching film transistor 4 will be turned on, and one: from the lean line thereof. The image signal 'will be transferred through its switching thin film transistor' into its storage capacitor 6. If the image signal is applied to the gate of the driving thin film transistor 5, the driving thin film transistor 5 is turned on (on ) 'Therefore, its light-emitting diode (LED) 7 will emit light. The brightness of its light-emitting diode (LED) 7 is controlled by changing the current in the light-emitting diode (LED) 7. The storage capacitor 6 can 'have the gate voltage of the driving thin film transistor 5 unchanged when the switching thin film transistor 4 is cut off (〇ff). That is, even when it switches the thin film transistor 4 When cut, since it drives the thin film transistor 5, it can be driven by the voltage stored in the storage capacitor 6, and the above current will continue to flow into its light emitting diode (LED) 7, thus illuminating The diode (LED) will continue to emit light until There is a second image signal entering. Fig. 2 is a schematic cross-sectional view showing a conventional active type organic electroluminescent display device (ELD). Fig. 2 is an illustration of an organic light emitting diode. A storage capacitor, and a driving thin film transistor. Further, it employs a bottom emission type in which light is transmitted through the anode of the lower electrode.
1255432 五、發明說明（4) 在第2圖中，其一緩衝區層丨丨，係使形成在一基板上 面，以及接著在此緩衝區層11上面，係形成一具有第一至 第二部分1 2 a、1 2 b、和1 2 c之多晶矽層，和一第二多晶矽 層1 3 a。其第一多晶矽層，係被分割成上述未摻雜任何摻 雜劑之第一部分1 2a (亦即，一活性區），和該等摻雜有 心雜劑之弟一和弟二部分1 2 b和1 2 c (亦即，分別為一汲極 ，和一源極區）。上述之第二多晶矽層1 3a，係變為一電 容器電極。其一閘極絕緣層丨4，係使設置在上述之活性區 1 2 a上面。以及其一閘極1 $係使設置在上述之閘極絕緣層 14上面。其一第一中間層絕緣體16，係使形成在其閘極15 上面，以及使在其閘極絕緣層1 4上面，同時使覆蓋該等沒 極和源極區1 2 b和1 2 c與第二'多晶矽層1 3 a。其一電力線 1 7，係使設置在上述之第一中間層絕緣體丨6上面，特別是 在其第二多晶矽層1 3 a (亦即，上述之電容器電極）上 方。雖未顯示在第2圖中，上述之電力線1 7，係沿一方向 延伸之線路。該等電力線丨7和第二多晶矽層丨3a，與其間 之中間層絕緣體1 6，係形成一儲存電容器。在該中間層絕 緣體1 6上面，係形成有一覆蓋其電力線丨7之第二中間層絕 緣體1 8。 曰、1255432 V. INSTRUCTION DESCRIPTION (4) In Fig. 2, a buffer layer is formed on a substrate, and then on the buffer layer 11, a first to second portion is formed a polycrystalline germanium layer of 1 2 a, 1 2 b, and 1 2 c, and a second poly germanium layer 13 3 a. The first polysilicon layer is divided into the first portion 1 2a (i.e., an active region) which is not doped with any dopant, and the first and second portions of the doping with the doping agent 2 b and 1 2 c (ie, a drain, and a source region, respectively). The second polysilicon layer 13a described above is changed to a capacitor electrode. A gate insulating layer 丨4 is disposed on the active region 1 2 a above. And a gate 1 $ is disposed on the above-mentioned gate insulating layer 14. A first interlayer insulator 16 is formed over its gate 15 and over its gate insulating layer 14 while covering the non-polar and source regions 1 2 b and 1 2 c with The second 'polycrystalline germanium layer 1 3 a. A power line 17 is disposed above the first interlayer insulator 丨6, particularly above the second polysilicon layer 13a (i.e., the capacitor electrode described above). Although not shown in Fig. 2, the above-described power line 17 is a line extending in one direction. The power line 丨7 and the second polysilicon layer 3a, and the intermediate layer insulator 16 therebetween form a storage capacitor. On the intermediate layer insulator 16 is formed a second intermediate layer insulator 18 covering its power line 丨7. Oh,
同時，一些穿透過該等第一和第二中間層絕緣體丨6和 18兩者之第一和第二接觸孔18a*18b，將會分別曝露出該 等沒極區1 2b和源極區1 2c。此外，其一穿透過上述第二中 間層絕緣體1 8之第三接觸孔1 8c，係使形成在一部份之電 力線17上面，以及可使其曝露出。其一汲極19a和源極At the same time, some of the first and second contact holes 18a*18b penetrating through the first and second interlayer insulators 6 and 18 respectively expose the non-polar regions 1 2b and the source regions 1 respectively. 2c. Further, a third contact hole 18c penetrating through the second intermediate layer insulator 18 is formed over a portion of the power line 17 and exposed. One bungee 19a and source
第10頁 1255432 五、發明說明（5) ϋ二m形成在上述之第二中間層絕緣體18上面。其沒 TIT 5Page 10 1255432 V. Description of the Invention (5) The second m is formed on the second intermediate layer insulator 18 described above. It has no TIT 5
相接觸。其源極1 g h将读；a L H 一 b係透過上述之弟二接觸孔18b，以及透 =4 弟二接觸孔1 8c，分別與該等源極區1 2c和電力線 八 以及使在上述第二中間層絕緣體18之曝 路/刀面/此第一鈍化層20，係具有一可曝露出一部份 4觸孔2Qa。其-由某種透明導電性材料所 I成之％極2,1，係使設置在此第一鈍化層2〇上面，以及係 ，込亡述之第四接觸孔2 0 a，使與上述之汲極1 9 a相接觸。 八一第二，化層22，係使形成在上述之陽極21上面，以及 使在上述第一鈍化層2 〇之曝露部分上面。此第二鈍化層 22 ’係具有-可曝露出一部份陽極21之井22&。其 曰 發光層23，係使形成在此第二純化層22上面，以及使進入 該井22a内。其一陰極24係使形成在上述第二鈍化層“之 整個曝露部分上面，以及使在上述之電致發光層23上面。 此陰極2 4係由一不透明金屬導電性材料所形成。 在第2圖中所顯示之主動矩陣式有機電致發光顯示裝 置中，其陽極21係由上述之透明導電性材料所形成，而^ 陰極24係由上述之不透明導電性材料所形成。因此，苴 機電致發光層23所發出之光線，係沿底部方向釋出，^係 被柄·為上述之底部發射類型。 第3A至31圖係-些可顯示第2圖之主動矩陣式有機電 致發光裝置的製造過程之示意橫截面圖。第^至％圖中所 I25M32 五、發明說明（6) 顯示之許多圖案，係 和使用一遮罩之顯影 j光阻（PR)塗佈、配列、曝光、 在第3A圖中，在二v驟的微影術過程，來加以形成。 表面上後，其屬多晶石夕層V形成在-基板1〇之整個 透過—第一遮罩過程，弟和第二半導體層12和13，係 第-和第二多晶形半：：成在其緩衝區層1 1上面。此等 在第3B圖中，It體層12和13具有島形。 導電性材# ’係使循：：：：二：石夕，絕緣體，和一金屬 及接著使用一第二沪罢&積在/、苐一多晶矽層1 2上面，以 半導體層12上^;工：；：圖案化，藉以在其第-多晶形 其後，一些類似^ 閘極絕緣層1 2和一閘極1 5。 和第二多晶形半導體推雜至該等第- 間，由於其閘極丨5係 *路邛刀上面。在摻雜期 導體層1 2，係被分判成、一:一遮罩，上述之第一多晶形半 12a，和一些摻雜有° 一未摻雜任何摻雜劑之活性區 外，其上面/入、多雜劑之汲極和源極區1 2b和1 2c。此 係變為一電有摻雜劑之第二多晶形半導體層13， 伟使值於：。該等汲極和源極區12b和12。， 係便位於上述活性區12a之兩 參照第3C圖，苴一第由鬥思π 其緩衝區層u之整個表二：中！層；緣體16，係使形成在 =極&1孔和l2c、和電容器電極"a。在使上述 =絕緣體16形成在其基板1〇之整個表面上後，其— 電力線1 7 ’係透過一第：r涉置矾 、 ^ ^ 弟—遮罩過私，使形成在其第一中間 層象體16上面’特別是覆蓋其電容器電極13a。由於上Contact. The source 1 gh will be read; a LH-b is transmitted through the above-mentioned two contact holes 18b, and the through-four-two contact holes 18c, respectively, with the source regions 1 2c and the power line eight and in the above The exposure/knife surface of the second interlayer insulator 18/the first passivation layer 20 has a portion 4 hole 2Qa exposed. The second contact hole 2,1 formed by a certain transparent conductive material I is disposed on the first passivation layer 2, and the fourth contact hole 20 a of the system is described above. The bungee is in contact with 1 9 a. In the eighth step, the layer 22 is formed on the anode 21 and on the exposed portion of the first passivation layer 2 described above. The second passivation layer 22' has a well 22& which exposes a portion of the anode 21. The luminescent layer 23 is formed on the second purification layer 22 and into the well 22a. A cathode 24 is formed over the entire exposed portion of the second passivation layer and over the electroluminescent layer 23. The cathode 24 is formed of an opaque metal conductive material. In the active matrix type organic electroluminescence display device shown in the figure, the anode 21 is formed of the above transparent conductive material, and the cathode 24 is formed of the above opaque conductive material. The light emitted by the light-emitting layer 23 is released in the bottom direction, and the handle is the bottom emission type described above. Figures 3A to 31 show some of the active matrix organic electroluminescent devices of Fig. 2 A schematic cross-sectional view of the manufacturing process. I25M32 in the ^ to % figure. 5. Description of the invention (6) Many patterns are shown, and a mask using a development j photoresist (PR) coating, alignment, exposure, In Fig. 3A, it is formed in the lithography process of the second v. After the surface, the polycrystalline stone layer V is formed on the entire substrate - the first mask process, the first mask process Two semiconductor layers 12 and 13, which are - and The second polymorph half:: is formed on the buffer layer 1 1. In the 3B diagram, the It body layers 12 and 13 have island shapes. Conductive material # '系使循::::二:石夕, An insulator, and a metal, and then a second Shanghai strike & is deposited on the /, a polycrystalline germanium layer 1 2, patterned on the semiconductor layer 12; by: patterning, whereby in its first polymorph Some are similar to the gate insulating layer 12 and a gate 15. The second polymorphic semiconductor is fused to the first-to-first, due to its gate 丨5-system* 邛 上面. The layer 12 is divided into one, a mask, the first polymorph half 12a, and some active regions doped with any doping agent, and the upper/input, multi-layer The drain and source regions of the dopant are 1 2b and 1 2c. This becomes a second polymorphic semiconductor layer 13 having a dopant, which is obtained by: the drain and source regions 12b and 12. The system is located in the above-mentioned active area 12a. The reference to the 3C picture is the same as the whole table 2: the middle layer of the buffer layer u; the edge body 16 is formed at the = pole & 1 hole And l2c, and the capacitor electrode "a. After the above-mentioned = insulator 16 is formed on the entire surface of the substrate 1〇, the power line 17' is transmitted through a first: r-related 矾, ^^ brother-mask Excessively, forming on its first intermediate layer body 16 'in particular covering its capacitor electrode 13a.
1255432 五、發明說明（7) Ϊ T ^ f Ϊ17 ’係恰形成在其電容器電極13a上面，其係 二第四遮罩過程；力!：开接：孔18b、和18c，係使用 出其汲極區12b Λ第接觸Λ: 一接觸孔18a， 】&. ^ ββ ，八第一接觸孔18b，可曝露出其源極區 ’卢—QCT苐三接觸孔18C，可曝露出其電力線17。 ㈣=Γ，有一金屬[係使形成在其第二中間層 Γ以ΐ:’以及接著係透過一第五遮罩過程加以圖案 上诚：笛ίί —汲極19“σ一源極19b。其汲極19a係透過 總心从#边之第一接觸孔18b，與其源極區12c相接 電力二目；:、極m係透過上述之第三接觸職，與其 15、= ί之過程’將可完成一具有半導體層12、閑極 t極Ua和191"之驅動薄膜電晶體。此外，一對 = 和：容器電極W之區域，係形成上： ^ 儲；= : = _ m ^ pa 1 r T K咬垵主上述驅動薄膜電晶 ^問極15，以及其電力線17，係、與上述之信號線相平 在第3F圖中，其一具有一因—第六遮罩過程所致之第 第13頁 1255432 五、發明說明（8) 一 四接觸孔20a的第一鈍化層20，係使形成在上述之第二中 間層絕緣體上面，同時係使覆蓋該等汲極和源極丨9a和 19b。上述之第四接觸孔2〇a，使可使一部份汲極19&曝露 出0 斤在第3G圖中，有一透明導電性材料，係使沉積在上述 之第一純化層20上面，以及接著係使用一第七遮罩過程加 以圖案化，藉以形成一可透過上述第四接觸孔2〇a與其汲 極19a相接觸之陽極2丨。 八 曰在第Μ圖中，其一第二鈍化層22，係使形成在上述之 陽極21上面，以及使在上述第一鈍化層20之曝露部分上 面。其後，此第二鈍化層22，係使用一第八遮罩過程加以 圖案化，藉以形成一可曝露出一部份陽極21之井22a。 如今 在上述之 陽極2 1相 電致發光 分上面。 在前 個之薄膜 等遮罩之 將會增加 冲洗過程 一独刻過 間和生產 在第3 I圖中，其 第二鈍化層 接觸。其後 層2 3上面， 其陰極24係 上面， ，其一 以及使 完全覆 述形成一有機電致 沉積，係使一再重 微影術過程 其遮單過程 '一光阻沉 程、等等， 成本將會被 ，亦使 。由於 積過程 若僅有 降低。 有機電 使透過 陰極24 在上述 蓋住上 發光顯 複，以 重複多 上述之 、一曝 一遮罩 然而， 致發光層2 3，係使形成 其井22a，而與上述之 係使形成在上述之有機 第二鈍化層22之曝露部 述之基板1 0。 示裝置之過程中，有多 及此外，有多個使用該 次。所以，此種重複性 微影術過程，係包括_ 光過程、一顯影過程、 過程被省略，其製造時 上述參照苐3 A至3 I圖所1255432 V. INSTRUCTION DESCRIPTION (7) Ϊ T ^ f Ϊ 17 ' is formed on the capacitor electrode 13a, which is the second mask process; force!: open: holes 18b, and 18c, which are used Polar region 12b Λ first contact Λ: a contact hole 18a, 】&. ^ ββ, eight first contact hole 18b, can expose its source region 'Lu-QCT 苐 three contact hole 18C, can expose its power line 17 . (d) = Γ, a metal [made in its second intermediate layer ΐ ': ' and then through a fifth mask process on the pattern: ί ίί - bungee 19 "σ a source 19b. The bungee pole 19a is connected to the source region 12c through the first contact hole 18b of the center of the center, and the power source is connected to the source region 12c; the pole m is transmitted through the third contact position, and the process of 15 and = ί A driving thin film transistor having a semiconductor layer 12, a dummy poles Ua and 191" can be completed. Further, a pair of = and : a region of the container electrode W is formed by: ^ storage; =: = _ m ^ pa 1 r TK bites the main driving film of the above-mentioned driving film, and its power line 17, which is level with the above-mentioned signal line in the 3F picture, one of which has a factor of - the sixth mask process Page 13 1255432 V. INSTRUCTION DESCRIPTION (8) The first passivation layer 20 of the four contact holes 20a is formed on the second interlayer insulator described above while covering the drain and source electrodes 9a and 19b. The fourth contact hole 2〇a, so that a part of the drain 19& can be exposed to 0 kg in the 3G picture, there is a transparent The conductive material is deposited on the first purification layer 20, and then patterned using a seventh mask process to form a contact through the fourth contact hole 2〇a and the drain electrode 19a thereof. The anode 2丨. In the second diagram, a second passivation layer 22 is formed on the anode 21 and on the exposed portion of the first passivation layer 20. Thereafter, The second passivation layer 22 is patterned using an eighth masking process to form a well 22a which exposes a portion of the anode 21. Now in the above-mentioned anode 2 1 phase electroluminescence sub-top. A mask or the like will increase the rinsing process by a single pass and be produced in Figure 3, with its second passivation layer in contact. The back layer 2 3 above, the cathode 24 is above it, one and the other Overlaying the formation of an organic electro-deposition causes the process of masking the process of the lithography process, a photoresist process, etc., and the cost will be, and if the process is only reduced. Through the cathode 24 in the above The illuminating display is repeated to repeat the above-mentioned, one-exposure mask. However, the luminescent layer 23 is formed to form the well 22a thereof, and the exposure to the above-described organic second passivation layer 22 is formed. The substrate 10 described in the process. In the process of displaying the device, there are many and more than one use. Therefore, the repetitive lithography process includes a photo process, a development process, and a process is omitted. When it is manufactured, the above reference 苐3 A to 3 I
第14頁 U55432 五、發明說明（9) 述之有機電致發光顯 ’L有機電致發光顯示二生產成本增加。此外，上 造成之瑕疵便愈多。、所兩要之遮罩愈多，其製造過程 此外，由於上诚羽 ，示裳置，係具有上； 動矩陣式有機電致發光 係具有一縮減之發光區诚f，月性材料之電容器電極，其 問題，其電流密度應；：：縮小之孔徑比。為要克服此等 會造成此有機電致;、光；回二：增力:該裴置之亮度，因而 此外，由於上ίίΓ: 壽命的縮減。 ;示裝置，係具有上；= ΐ陣式有機電致發光 各易劣化及被破壞，以及兮。、《，此電力線將會很 裝置，將無法均；地：；=動矩陣式有機電致發光顯示 之活方ί透= ，上述通常被稱作-作用層 化此多曰々爲/ : ’L 土板上方形成一多晶矽層及圖案 含—此曰曰曰：之過程:來加以形成。由於該多晶矽層係包 性，：曰曰;：’以及彼等晶粒交界，係具有不同之蝕刻選擇 之曰^述之多晶石夕層，可能要使過度钱刻，以便餘刻所有 :巧，和該等應加以移除之晶粒交界。在上述之過度钱 屑k稔中，一部份被上述移除之多晶矽層曝露出的緩衝區 ^可能會被蝕刻，以致當上述之多晶矽層，完全被圖案 面：將，有一些結晶質形狀，形成在上述緩衝區層之表 β 4等、、力日日貝形狀，會影響到其他要形成在該緩衝區 曰上面之表面上，舉例而言，該等閘極絕緣層和中間層絕 第15頁 1255432 五、發明說明（10) 製成之 ，將會 致發光 上述緩 階之影 緣體’和因而形成在此等 陽極，係具有一粗度不卩 面且由銦錫氧化物 由於其表面粗度所站 表面。 感應出一不均勻之電媒 〜寻陽極與陰極之間 努，彼箄臉1 顯示裝置之壽命的縮減 $ έ造成上述有機電 义。此外，山 衝區層之表面粗度而不^ 由於一整流比會因 像。 土，其將报難顯示一些高灰 發明内容 因此 裝置及其 缺點所致 本發 之數目而 致發光顯 本發 致發光顯 壽命。 本發 致發光顯 可顯示均 本發 明中，以 之貫務而 電致發 技術之 少其遮 矩陣式 矩陣式 光顯示 限制和 罩過程 有機電 有機電 比和長 有機電 ，以及 文之說 本發明 由此書 ，本發明針對一種 製造方法，其可^動矩陣式有機 的一項戍多大幅排除上述習知 J貝次夕項問題。 明之一優點，& 有低製造成本和高製；: 示裝置。 、氏手的主動 月：另-優點，旨在提供 -裝置及其製造…其係具 明之另一優點’旨在提供-種主動 ^裝置，其可避免—電力、線之劣= 勻之影像。 化 明之額外特徵、和優點，係部份 =部份可由其之說明而臻明確，或 錶得。本發明之此等和其他優點， 1255432 ----- 五、發明說明（η) 面說明及其申 構’來加以實 為完成此 意說明之目的 括：一基板； 面之緩衝區層 此多晶形半導 極區，盆中之 及该等沒極和 述緩衝區層上 此閘極絕緣層 層之活性區上 電極；一形成 成在上 極、陰極、和 一可曝露出其 觸排内之有機 觸排而與其陰 面及在上述有 Λ所附諸圖中所特別指出之結 ’以及 式有機 面之接 區層上面之多晶形 依據本發明所具現及廣 電致發光顯示裝置係包 地層；一在此接地層上 半導體層， 活性區 第一電 體上面 過中間 與該等 上面且 面之第 可覆蓋 層，此 純化層 致發光 鈍化層 容器電 之没極 層絕緣 汲極和 使連接 二電容 該等汲 鈍化層 上面，且 層，係 之曝露 請專利 現及完 等和其 ，一主 一在此 ;一在 體層， 活性區 源極區 面而可 上面之 方；一 在上述 極之中 和源極 體和閑 源極區 至其汲 器電極 極和源 係具有 進入該 透過該 部分上 範圍加 成。 他目的 動矩陣 基板上 此緩衝 係具有 ，係設 ’係設 覆蓋該 閑極， 在上述 閘極絕 間層絕 ，此等 極絕緣 相接觸 極之陰 ;一形 置在上 置在此 多晶矽 此閘極 閘極絕 緣層上 緣體； >及極和 ，·一形 極；一 汲極區、和一源 述多晶矽層之中間，以 活性區之兩 層之閘極絕 係恰設置在 緣層上面之第一電容器 面而可覆蓋 側；一在上 緣層；一在 上述多晶矽 一些在上述 源極，係透 層之第一和第 成在上述中 在上述中間 述中間層絕 第二電容器 陰極之觸排 電致發光層 極相接觸； 機電致發光 该專閘極和 中間層絕緣 過該等貫穿 觸孔，分別 間層絕緣體 層絕緣體上 緣體上面而 電極之鈍化 ;一在上述 ’此有機電 和一在上述 層上面之陽Page 14 U55432 V. INSTRUCTION DESCRIPTION (9) The organic electroluminescence display of the 'L organic electroluminescence display 2 increases the production cost. In addition, the more the flaws caused. The more the masks are, the more the manufacturing process is. In addition, because of the Cheng Cheng Yu, the show is set, the system has the upper; the dynamic matrix organic electroluminescence system has a reduced light-emitting area, the capacitor of the monthly material. Electrode, its problem, its current density should be::: Reduced aperture ratio. In order to overcome this, it will cause this organic electricity; light; back two: booster: the brightness of the device, and therefore, due to the reduction in life. The display device has the upper; = ΐ array organic electroluminescence, which is easily deteriorated and destroyed, and 兮. ", this power line will be very installed, it will not be able to be uniform; ground:; = moving matrix organic electroluminescence display of the active square 透 through, the above is often referred to as - the effect of layering this is / / ' A polycrystalline germanium layer is formed over the L-soil and the pattern contains the process of forming: Since the polycrystalline germanium layer is encapsulated, :曰曰;: and their grain boundaries, which have different etching options, the polycrystalline stone layer may be excessively engraved, so that all of the remaining: Coincidence, and the boundaries of the crystals that should be removed. In the above excess swarf, a portion of the buffer exposed by the removed polysilicon layer may be etched so that when the polysilicon layer is completely patterned, there will be some crystalline shape. Formed on the surface of the buffer layer, such as the surface β 4 , etc., in the shape of the force, it affects other surfaces to be formed on the buffer layer. For example, the gate insulating layer and the intermediate layer are absolutely Page 15 1255432 V. INSTRUCTIONS (10) Manufactured, will cause the above-mentioned retarded shadow body 'and thus formed on these anodes, have a thickness and are not covered by indium tin oxide The surface roughness is the surface on which it stands. Inducing an uneven dielectric ~ between the anode and the cathode, the life of the display device is reduced by $ έ to cause the above organic meaning. In addition, the surface roughness of the mountain rushing layer is not due to a rectification ratio. Soil, which will report hard to show some high-ash inventions, so the device and its shortcomings caused the number of the hair to cause a luminous lifetime. The present luminescence display can be displayed in the present invention, and the electro-induced technique is less than its matrix-type matrix light display limitation and the mask process organic electro-organic ratio and long organic electricity, and the textbook The invention is based on the present invention, and the present invention is directed to a manufacturing method which can substantially eliminate the above-mentioned conventional J. One of the advantages, & has a low manufacturing cost and high system;: display device. The initiative of the hand: another - advantage, designed to provide - the device and its manufacture ... its line has another advantage - designed to provide - a kind of active device, which can avoid - power, line inferior = uniform image . The additional features and advantages of the invention are part of the = part of which can be clearly stated or expressed. These and other advantages of the present invention, 1255432 ----- 5, the description of the invention (η) surface description and its application 'to achieve the purpose of this description includes: a substrate; a polycrystalline semiconducting region, the upper electrode of the active region of the gate insulating layer of the electrode and the buffer layer; the upper electrode, the cathode, and the exposed electrode are exposed a polymorph of the organic platy inside and its negative surface and the junctions specified in the drawings attached to the above-mentioned drawings, and the polymorphic layer on the interface layer of the organic surface according to the present invention. a semiconductor layer on the ground layer, the first electric body of the active region is over the middle and the upper surface of the first cover layer, the purified layer of the light-emitting passivation layer container is electrically insulated and electrically insulated The second capacitor is above the passivation layer, and the layer, the exposure of the system is required to be patented and finished, and one main one is here; one in the bulk layer, the source region of the active region and the upper side; Neutral And idler diode source region to its drain electrode and the source electrode of the train has entered into the transmission range of the addition portion. The buffer system of the target moving matrix substrate has a system that covers the idle pole, and the poles of the gate are in the cathode, and the poles of the poles are in contact with the cathode; a shape is placed on the polysilicon. The upper gate of the gate gate of the gate electrode; > and the sum of the poles, the first pole, the middle of the drain region, and the layer of the polycrystalline germanium layer, the gates of the two layers of the active region are arranged at the edge a first capacitor surface above the layer to cover the side; a layer on the upper edge; a plurality of the polysilicon in the source, the first and the first of the via layers, and the second capacitor in the intermediate layer in the middle The electroplating electroluminescent layer of the cathode is in contact with each other; the electro-optically emitting the gate and the intermediate layer are insulated from the through-holes, respectively, and the upper layer of the insulating layer insulator is above the electrode and the electrode is passivated; Organic electricity and a yang above the above layer
第17頁 1255432 五、發明說明（12) 極。 在本發明之另一特徵中，一主動矩陣式有機電致發光 顯示裝置之製造方法係包括··在一基板上面，形成一接地 層；在此接地層上面，形成一緩衝區層；在此緩衝區層上 面，形成一多晶形半導體層；在上述緩衝區層上面，形成 ④3極巴、彖層而使其覆盍上述之多晶矽層；在此閘極絕 。土？、:、形Ϊ一閘極和一第一電容器電極，1亥閘極係恰 X 述之夕晶矽層上方；使用此閘極作為一遮罩，將 體:離=晶形半導體層内，以使此多晶^ 性區，係使設“ί述；ΐ:;之#二源極區’其中之活 方，以及兮箄、、及朽，Ϊ, 1，而使在其閘極下 ,a!. 玄4，及極和源極區，係使設置在上述活性戸夕+ :在上述閘極絕緣層上面，形成一:σ : 三、和第四接觸：，：；：認極“成f-、第二、第 過該等中間層絕緣體和閘極 接觸孔，係使貫穿 該等沒極和源極區，以f兩•’而使分別曝露出 :等中間層絕緣體、閘極絕“弟= :穿過 出部份之接地層；在卜、+、七^ 矛綾衝&層，而使曝露 汲極和源極，⑽及極：：間：絕緣體上面，形成-些 絕緣體上"成=源=相接觸；在上述之中間層 上述之中間層絕緣體上面， 使連接至其汲極，在 述之中間層絕緣體上面 成弟二電容器電極；在上 y成—鈍化層，而使覆蓋該等汲Page 17 1255432 V. Description of invention (12) Extreme. In another feature of the present invention, a method for fabricating an active matrix organic electroluminescent display device includes: forming a ground layer on a substrate; forming a buffer layer on the ground layer; Above the buffer layer, a polycrystalline semiconductor layer is formed; on the buffer layer, 43 poles and a layer of germanium are formed to cover the polysilicon layer described above; earth? ,:, a gate and a first capacitor electrode, the first gate of the gate is just above the layer of the wafer; using the gate as a mask, the body: from the = crystalline semiconductor layer, To make this polycrystalline zone, let the "two sources of the two sources", and the 兮箄,, and 朽, Ϊ, 1, and under the gate, a!. Xuan 4, and the pole and source regions are arranged in the above-mentioned active 戸+: on the above-mentioned gate insulating layer, forming a: σ: three, and the fourth contact:,:;: Forming f-, second, and the intermediate layer insulators and the gate contact holes through the non-polar and source regions, respectively, and exposing them respectively: an intermediate layer insulator and a gate Absolutely "different =: through the grounding layer of the part; in the Bu, +, and 7^ spears and layers, and expose the bungee and source, (10) and the pole:: between the insulator, forming - some On the insulator " into = source = phase contact; above the intermediate layer insulator above the intermediate layer, to connect to its drain, on the intermediate layer insulator described above to form the second capacitor electrode; y into a passivation layer, so as to cover the 汲
Ml IM 第18頁 Ϊ255432 五、發明說明（13) 極和源極、陰極、和第二雷 ^ θ 电谷态電極，此鈍化層係具有一 可曝露出其陰極之觸排；在 她 上逃之鈍化層上面，形成一有 知縻阳1定運入4觸排内，此有機電致發光層， 係透過該觸排而與其陰極相垃 兩⑽ ' 石位相接觸，以及在上述鈍化層之曝 路部分上面，且在上述有機 k 心另钱冤致發光層上面，形成一陽 不啦 〇 理應瞭解的是，前述之一般說明和下文之詳細說明兩 ，係屬典型和解釋性，以及係意在提供其所 之進一步解釋。 β 此等被納入用以提供本發明之進一步瞭解及被合併而 冓成此申睛案之一部分的附圖，係例示本發明之實施例， 以及連同其之說明，係用以解釋本發明之原理。 貫施方式 茲將詳細說明本發明之實施例，其範例係例示在所附 =圖中。只要有可能，類似之參考數字，將在遍及諸圖 中’被用來指稱其類似或相同之零件。 4 ,第4圖係一依據本發明之典型實施例的主動矩陣式有 機，致毛光叙置之示意橫截面圖，由於此主動矩陣式有機 L裝置二係使用一P —Si TFT，一頂部閘極型將會被採用。 敫f第4圖中，其一接地層12〇，係使形成在一基板ΐι〇 7正们表面上。此接地層1 2 0，係一類似金屬等導電性材 料其一氮化矽或氧化矽之緩衝區層1 3 0，係使形成在上 述之接地層120上面。其一呈島形之多晶矽半導體層131 1255432 五、發明說明（14) …和⑶），係使形成在上述之緩衝區層13〇上面。 多晶形半導體層’係被分割成一其中未施加摻雜劑之活性 區m，和-些其中施加有摻雜劑及加以摻雜之汲極和源 極區132和133。其中之緩衝區層13〇，可避免 苴美 no或接地層12〇之摻雜劑，渗透進其多晶形半導體層131 (132和133 )内。其一閘極絕緣層14〇，係使形成在上述 之緩衝區層U0上面，而使覆蓋該等活性區、汲極和源極 區131、132和133。其1極151係使形成在上述之間極絕 緣層140上方，以及係與上述多晶形半導體層之活性區i3i 相重疊。此閘極151可使恰形成在上述活性區131上方。此 1，其以一與上述閘極151相同之材料所製成的第一電容 為電極1 5 2，係使形成在上述之閘極絕緣層丨4 〇上面。 仍參照第4圖，其一中間層絕緣體丨6 〇，係使設置在上 述之閘極絕緣層140上面，而使覆蓋該等閘極151和第一電 谷窃電極152。同時’其穿透過中間層絕緣體16〇和閘極絕 緣層140兩者之第一和第二接觸孔161和162，可分別曝露 出該等汲極區132和源極區133。此外，#穿透過該等中間 層絕緣體160、閘極絕緣層14〇、和緩衝區層13〇之第三和 第四接觸孔163和164，係使形成及曝露出部份之接地層 1 20。其以一類似金屬等不透明導電性材料製成之陰極曰 171、 汲極172、源極173、和第二電容器電極174，係使位 於上述之中間層絕緣體160上面。其陰極171係使連接至上 述透過其第一接觸孔161與其汲極區132相接觸之汲極 172。 其源極173係透過上述之第二接觸孔162，以及透過Ml IM Page 18 Ϊ 255432 V. INSTRUCTIONS (13) Pole and source, cathode, and second thunder θ electric valley electrode, this passivation layer has a contact that can expose its cathode; Above the passivation layer, a known yinyang 1 is transported into the four rows of contacts, and the organic electroluminescent layer is contacted with the cathode by two (10) 'stone positions through the bank, and in the passivation layer Above the exposure part, and above the above-mentioned organic k-hearts, the formation of a sensation, it should be understood that the above general description and the following detailed description are typical and explanatory, and the meaning Provide further explanation for it. BRIEF DESCRIPTION OF THE DRAWINGS The accompanying drawings, which are incorporated in and constitute a principle. DETAILED DESCRIPTION OF THE INVENTION Embodiments of the present invention will be described in detail, examples of which are illustrated in the accompanying drawings. Whenever possible, similar reference numerals will be used throughout the drawings to refer to the parts that are similar or identical. 4, FIG. 4 is a schematic cross-sectional view of an active matrix organic, hair-lighting according to an exemplary embodiment of the present invention, since the active matrix organic L device uses a P-Si TFT, a top gate The type will be adopted. In Fig. 4, a ground layer 12 is formed on the surface of a substrate ΐ 〇 7 . The ground layer 120 is a conductive material such as a metal, and a buffer layer 130 of a tantalum nitride or tantalum oxide is formed on the ground layer 120. An island-shaped polycrystalline germanium semiconductor layer 131 1255432 5. The invention descriptions (14) ... and (3)) are formed on the above-mentioned buffer layer 13A. The polycrystalline semiconductor layer' is divided into an active region m in which no dopant is applied, and a plurality of drain and source regions 132 and 133 in which dopants are applied and doped. The buffer layer 13 〇 can avoid the dopants comparable to the ground layer 12 , and penetrate into the polycrystalline semiconductor layers 131 (132 and 133 ). A gate insulating layer 14 is formed over the buffer layer U0 to cover the active regions, the drain and source regions 131, 132 and 133. The one pole 151 is formed over the interlayer insulating layer 140 and overlaps the active region i3i of the polycrystalline semiconductor layer. This gate 151 can be formed just above the above active region 131. In this case, a first capacitor made of the same material as the gate 151 is an electrode 152 formed on the gate insulating layer 丨4 上述. Still referring to Fig. 4, an intermediate layer insulator 丨6 〇 is disposed over the gate insulating layer 140 to cover the gate 151 and the first tamper electrode 152. At the same time, the first and second contact holes 161 and 162 which penetrate through both the intermediate layer insulator 16 and the gate insulating layer 140 may expose the drain regions 132 and the source regions 133, respectively. In addition, the third and fourth contact holes 163 and 164 penetrating through the intermediate layer insulator 160, the gate insulating layer 14A, and the buffer layer 13 are formed to expose and expose portions of the ground layer 1 20 . The cathode 171, the drain 172, the source 173, and the second capacitor electrode 174, which are made of an opaque conductive material such as a metal, are placed on the intermediate layer insulator 160 described above. The cathode 171 is connected to the drain 172 which is in contact with the drain region 132 through the first contact hole 161 thereof. The source 173 is transmitted through the second contact hole 162 and through
1255432 五、發明說明（15) ' ----- =述之第三接觸孔163，分別與該等源極區133和接地層 兩者相接觸。其第二電容器電極174，係透過上述之第 =妾觸孔164，與上述之接地線12〇相接觸。該等中間穿插 述中間層絕緣體16〇之第一和第二電容器電極152和 ☆ t，係形成一儲存電容器。雖未顯示在4圖中，其第一電 奋為電極152，當在一粗略觀察中觀之，係使連接至上述 之閘極151。其一鈍化層18〇，係使形成在上 緣體160上面，而使覆蓋該等陰極171、汲極172、中源門極層、 +7：3、和第二電容器電極174。此鈍化層18〇係具有一可曝 路出上述陰極171之井181。其一電致發光層190，係使形 成在上述之鈍化層180上面，以及係使進入上述之井181 内，以使此電致發光層1 9 〇，能透過該井丨8 }，與上述之陰 極171相接觸。其一陽極2〇〇係使形成在上述之電致發光層 面以及使在上述之鈍化層1 8 0上面。此陽極2 〇 〇係 屬類似銦錫氧化物或銦鋅氧化物等透明導電性材料。該 陽極200係佈滿在上述之基板11〇上方，而使此陽極2〇〇 用為一電力線。 第5圖係一可例示一依據本發明之主動矩陣式有機電 致發光顯示裝置（ELD)之基本像素結構的等效電路線圖。 誠如第5圖中所示，其一閘極線2丨2係使安排在一第一方向 中，以及其一資料線2 11係使安排在一大體上垂直於上述° =一方向之第二方向中，藉此界定一像素區域。其一切換 薄膜電晶體（TFT) 2 1 4，在設置上係毗鄰該等資料線與閑極 線2 11和2 1 2之交點處，以及係使連接至此等資料線與閘極1255432 V. INSTRUCTION DESCRIPTION (15) 'The third contact hole 163 is referred to as being in contact with the source regions 133 and the ground layer, respectively. The second capacitor electrode 174 is in contact with the ground line 12A through the first contact hole 164. The first and second capacitor electrodes 152 and ☆t interposed through the interlayer insulator 16 are formed as a storage capacitor. Although not shown in Fig. 4, the first electrical power is electrode 152, which is connected to the above-described gate 151 when viewed in a rough view. A passivation layer 18 is formed over the upper body 160 so as to cover the cathode 171, the drain 172, the middle source gate layer, +7:3, and the second capacitor electrode 174. The passivation layer 18 has a well 181 that exposes the cathode 171. An electroluminescent layer 190 is formed on the passivation layer 180 and is inserted into the well 181 to allow the electroluminescent layer to pass through the well 8 } The cathode 171 is in contact. An anode 2 is formed on the electroluminescent layer described above and on the passivation layer 108. The anode 2 〇 〇 is a transparent conductive material such as indium tin oxide or indium zinc oxide. The anode 200 is overlaid on the substrate 11 above, and the anode 2 is used as a power line. Fig. 5 is an equivalent circuit diagram showing an essential pixel structure of an active matrix organic electroluminescence display device (ELD) according to the present invention. As shown in Fig. 5, a gate line 2丨2 is arranged in a first direction, and a data line 2 11 is arranged in a direction substantially perpendicular to the above-mentioned °=one direction. In the two directions, a pixel area is thereby defined. A switching thin film transistor (TFT) 2 1 4 is disposed adjacent to the intersection of the data lines and the idle lines 2 11 and 2 1 2, and is connected to the data lines and gates
1255432 五、發明說明（16) 線211和212。上述切換TFT 214之開極，係使連接至上述 之閘極線212，以及該切換TFT 214之源極，係使連接至上 述之資料線211。此外，上述之切換TFT 214，係使連接至 一驅動薄膜電晶體（TFT)215和一儲存電容器216兩者。亦 即，上述切換TFT 214之汲極’係使連接至上述驅動TFT 215之閘極和上述儲存電容器216之電容器電極兩者。上述 驅動TFT 215之没極，係使連接至一電致發光二極體以了之 陰極。該驅動TFT 21 5之源極，則係使接地。上述電致發 光二極體217之陽極，係使連接至一電力線213。為要均勻 地維持上述驅動TFT 215之閘極電壓，上述之儲存電容哭 216，係使連接至上述驅動TFT 215之閘極和源極兩者。 在^5圖中所顯示之主動矩陣式有機電致發光顯示裝 ^中，上述驅動TFT 216為一n_型薄膜電晶體係較適當。 或-。-型薄膜電ΓΓ。 為1—型薄膜電晶體， 使佈圖所說明：該等接地層和電力線層，係 明之並型二;Γ板。第6圖係一可示意例示該等依據本發 H Λ 接地層221和電力線層222之平面圖。在 係加以省略。 仔冤合益為間早例不计， 222，T使所顯示，該等接地層221和電力線層 上述之美板m在其基板220上方。其接地層221係、使佈滿 ίΐ二二使其有某些部分曝露出。此外，其電 力線層亦使佈滿上述之基板咖，而使其有某些部分曝1255432 V. INSTRUCTIONS (16) Lines 211 and 212. The opening of the switching TFT 214 is connected to the gate line 212 and the source of the switching TFT 214 to be connected to the data line 211. Further, the switching TFT 214 described above is connected to both a driving thin film transistor (TFT) 215 and a storage capacitor 216. That is, the drain of the switching TFT 214 is connected to both the gate of the driving TFT 215 and the capacitor electrode of the storage capacitor 216. The above-mentioned driving TFT 215 is infinitely connected to the cathode of an electroluminescent diode. The source of the driving TFT 21 5 is grounded. The anode of the electroluminescent diode 217 is connected to a power line 213. In order to uniformly maintain the gate voltage of the above-described driving TFT 215, the above-mentioned storage capacitor is cried 216 to be connected to both the gate and the source of the above-described driving TFT 215. In the active matrix organic electroluminescence display device shown in Fig. 5, the above driving TFT 216 is an n-type thin film electro-crystalline system. or-. - Type thin film electric cymbal. It is a 1-type thin film transistor, which is illustrated by the layout: the grounding layer and the power line layer are combined with the second type; Figure 6 is a plan view showing the grounding layer 221 and the power line layer 222 according to the present invention. It is omitted. The benefits of the larvae are as early as the case, 222, T shows that the ground layer 221 and the power line layer above the top plate m are above its substrate 220. The grounding layer 221 is so as to be covered with a part of it. In addition, the power line layer also fills the above-mentioned substrate coffee, so that it has some partial exposure.
第22頁 1255432 五、發明說明（17) 露出。該等接地層221和電力線層2 22之重疊區域，係一呈 現影像之顯示區域，以及因而在此顯系區域内，係設置有 多個之薄膜電晶體和多個之電致發光二極體。在本發明 中，上述之電力線層222，誠如前文所述，係作用為上述 電致發光二極體之陽極。 依據本發明，由於該等接地層和電力線層，係使佈滿 上述之基板，其電力線之電阻值將可使降低，以及其電力 線中在驅動該裝置期間可能發生之熱破壞，將可使避免。 所以’其影像品質將會增加，以及將可得到其顯示中之均 勻性。 在第4圖中所例示之第一實施例中，其陰極係由一不 透明導電性材料所形成，以及其陽極係由一透明導電性材 料所形成。因此，該有機電致發光顯示裝置，可屬一頂部 發射類型，其中之光線，係自上方釋出。其將可得到一高 孔徑比。結果，此種顯示裝置之亮度將會增加，即使是其 電流逸、度不大。在本發明中，其有機電致發光顯示裝置之 壽命，係有很明顯之延長。 第7 A和7 F圖係一些可例示第4圖之主動矩陣式有機電 致發光顯示裝置的製造過程之橫截面圖。 在第7 A圖中，有一類似金屬等導電性材料，係使沉積 在基板上面’以及接著使用一弟一遮罩過程加以圖 案化，藉以形成一接地層1 2 0。當在一粗略觀察中觀之， 其接地層1 2 0係具有第6圖中所例示之形狀，以使其能普遍 设置在其基板11 〇上方，以及係使覆蓋其中呈現影像之顯Page 22 1255432 V. Description of invention (17) Exposed. The overlapping regions of the ground layer 221 and the power line layer 22 are a display area for presenting an image, and thus, a plurality of thin film transistors and a plurality of electroluminescent diodes are disposed in the display region. . In the present invention, the above-described power line layer 222 functions as the anode of the above electroluminescent diode as described above. According to the present invention, since the ground layer and the power line layer are such that the substrate is covered, the resistance value of the power line can be lowered, and thermal damage that may occur during driving of the device in the power line can be avoided. . Therefore, the image quality will increase and the uniformity in its display will be obtained. In the first embodiment illustrated in Fig. 4, the cathode is formed of an opaque conductive material, and the anode thereof is formed of a transparent conductive material. Therefore, the organic electroluminescent display device can be of a top emission type in which light is emitted from above. It will give a high aperture ratio. As a result, the brightness of such a display device will increase, even if the current is not large. In the present invention, the life of the organic electroluminescence display device is significantly extended. 7A and 7F are cross-sectional views showing the manufacturing process of the active matrix type organic electroluminescence display device of Fig. 4. In Fig. 7A, a conductive material such as a metal is deposited on the substrate, and then patterned using a mask-forming process to form a ground layer 120. When viewed in a rough view, the ground layer 120 has the shape illustrated in Fig. 6 so that it can be generally disposed above the substrate 11 ,, and the image is covered therein.
第23頁 1255432 五、發明說明（18) 示區域。其後’有-緩衝區層130，係使形成 120上面。此緩衝區層130 ’係氧化石夕和氮化石夕中 曰。 其次，有-多晶石夕層，係使形成在該緩衝區層13〇之 表面上，以及接著係使用一第二遮罩過程加以圖案化， 以形成一半導體層135。有許多方法可使形成上述之多曰曰 矽。一種是在上述之緩衝區上面，形成一非晶声，曰曰 及接著熱處理此非晶形矽，藉以形成上 日θ 乂 日日 〇 SL _ 種疋使用-雷射照射，使該非晶形矽轉換成上述曰-矽。在本發明中，上述之基板110,可為一 曰曰 明性物質。 坡离或其他透 在第7Β圖中，-屬氮化石夕或氧化石夕之閑極絕緣声 140，係使形成在其缓衝區層13〇上面，而使 '上二“ 導體層135，以及接著有一金屬材料，係使，、冗 之半 閉極絕緣層層140上面。此沉積之金屬材料’， 二遮罩過程加以圖案化，藉以形成—閘極151 弟 容器電極152。其閘極151係使設置在上述之 弟二， ^面。使用此閘極151作為一遮罩’施加—摻曰3 如，η-型離子），以及使摻雜至部份之半導體層丨^ :。因此’上述之半導體層135，係被分割成」 活性區131 ’和一些在此活性區131之兩側上面的曰之 極區1 3 2和1 3 3。由於上述之閘極丨5 i，係 :σ源 過程期間之一遮罩，上述之摻雜劑並不存在於為該活:摻雜 1 3 1内，_但僅會存在於該等汲極和源極區1 3 2和^ 。品 然未顯不在第7Β圖中，其第一電容器電極152，係以，Page 23 1255432 V. Description of invention (18) Area of indication. Thereafter, the -buffer layer 130 is formed over 120. This buffer layer 130' is an oxidized stone and a nitrite in the middle. Next, a poly-silicon layer is formed on the surface of the buffer layer 13 and then patterned using a second mask process to form a semiconductor layer 135. There are many ways to form the above-mentioned multiple defects. One is to form an amorphous sound on the buffer zone, and then heat-treat the amorphous crucible, thereby forming the upper day θ 乂 〇 疋 疋 疋 疋 雷 雷 雷 雷 雷 雷 雷 雷 雷 雷 雷The above 曰-矽. In the present invention, the substrate 110 described above may be a clarifying substance. The slope is separated or otherwise penetrated in the seventh diagram, which is a nitride insulating sound 140 of the nitrite or oxidized stone, which is formed on the buffer layer 13 ,, and the 'upper two' conductor layer 135, And then a metal material is applied to the upper half of the semi-closed insulating layer 140. The deposited metal material ', the two masking process is patterned to form a gate 151 of the container electrode 152. The 151 system is disposed on the above-mentioned second side, using the gate 151 as a mask 'applying-doped ytterbium 3 such as η-type ions), and the semiconductor layer doped to a portion. Therefore, the above-mentioned semiconductor layer 135 is divided into an active region 131' and some of the polar regions 1 3 2 and 1 3 3 on both sides of the active region 131. Since the gate 丨5 i is a mask during the sigma source process, the dopant is not present in the active: doping 1 3 1 , but only exists in the drain And the source area 1 3 2 and ^. It is not obvious that in the seventh diagram, the first capacitor electrode 152 is tied to
第24頁 1255432 五、發明說明（19) 方式連接至上述之閘極1 5 1。 在第7C圖中，其一中間層絕緣體160，係使形成在上 述之閘極絕緣層1 4 0上面，而使覆蓋該等閘極丨5 1和第一電 容器電極1 5 2。其後，執行一第四遮罩過程，藉以形成彼 專苐一至第四接觸孔161、162、163、和164。該等第一和 第一接觸孔1 6 1和1 6 2 ’係使貝穿過該等中間層絕緣體1 6 〇 和閘極絕緣層1 4 0兩者，以及可分別曝露出該等汲極區1 3 2 和源極區133。此外，該等第三和第四接觸孔163和164， 係使貫穿過該等中間層絕緣體160、閘極絕緣層14〇、和緩 衝區層130，以使彼等曝露出部份之接地層12〇。上述之中 間層絕緣體1 6 0，可由一類似笨基環丁烯（BCB )等有機絕緣 材料所製成。在此一情況中，上述之中間層絕緣體丨6 〇， 係具有一平坦之表面。由於該中間層絕緣體丨6 〇，係覆蓋 其如上文所述具有不佳表面粗度之緩衝區層13〇，此緩衝 區層1 30之表面粗度，將不會影響到其上所形成之其他薄 層。因此，一將形成在該等薄層上面之電極，並不會受到 上述緩衝區層130之表面粗度的影響。 在第7D圖中，有一類似金屬等導電性材料，係使沉積 在上述之中間層絕緣體1 β 〇上面，以及接著係一 遮罩過程加以圖案化，藉以形成一陰極171、=二五 一源極173、和一第二電容器電極174。其陰極171如第7]) 圖中=顯不，係使連接至其汲極172。此汲極172係透過上 述之第厂接觸孔1 6 1，使與上述之汲極區丨32相接觸。其源 極173係透過上述之第二接觸孔162，以及透過上述之第三Page 24 1255432 V. INSTRUCTION DESCRIPTION (19) The mode is connected to the above-mentioned gate 1 51. In Fig. 7C, an intermediate layer insulator 160 is formed over the gate insulating layer 110 to cover the gate electrodes 51 and the first capacitor electrode 152. Thereafter, a fourth mask process is performed to form the first to fourth contact holes 161, 162, 163, and 164. The first and first contact holes 1 6 1 and 1 6 2 ' are such that the shell passes through the intermediate layer insulator 16 〇 and the gate insulating layer 1400, and the drain electrodes can be exposed respectively Zone 1 3 2 and source zone 133. In addition, the third and fourth contact holes 163 and 164 pass through the intermediate layer insulator 160, the gate insulating layer 14A, and the buffer layer 130 so that they expose a portion of the ground layer. 12〇. The intermediate layer insulator 160 may be made of an organic insulating material such as styrene-based cyclobutene (BCB). In this case, the intermediate layer insulator 上述6 上述 has a flat surface. Since the interlayer insulator 丨6 覆盖 covers the buffer layer 13 具有 having a poor surface roughness as described above, the surface roughness of the buffer layer 130 will not affect the formation thereon. Other thin layers. Therefore, the electrodes to be formed on the thin layers are not affected by the surface roughness of the buffer layer 130 described above. In Fig. 7D, a conductive material such as a metal is deposited on the above-mentioned interlayer insulator 1β, and then patterned by a masking process to form a cathode 171, = 251 source A pole 173, and a second capacitor electrode 174. Its cathode 171 is shown in Figure 7)) and is connected to its drain 172. The drain 172 is brought into contact with the above-described drain region 32 through the above-mentioned first factory contact hole 161. The source 173 is transmitted through the second contact hole 162 and through the third
第25頁 1255432 五、發明說明（20) 接觸孔1 6 3 ’使分別與該等源極區丨3 3和接地層1 2 〇相接 觸。此外，上述之第一電容器電極1 了 4，係透過其第四接 觸孔1 6 4 ’使與上述之接地層1 2 〇相接觸，以及與上述之第 一電容器電極1 5 2 ’且與上述間置之中間層絕緣體丨6 〇，形 成一儲存電容器。 如今在第7E圖中，其一鈍化層18〇，係使形成在上述 圖案化之導電性層上面，以及使在上述中間層絕緣體丨6 〇 之曝露部分上面。因此，此鈍化層丨8 〇將會覆蓋該等陰極 1 7 1、汲極1 7 2、源極1 7 3、和第二電容器電極} 7 4。其後， 有一部份鈍化層1 80，係透過一第六遮罩過程加以圖案 化，藉此產生一可曝露出上述陰極171之井181。 在第7F圖中，其一有機電致發光層19〇，係使形成在 上述之鈍化層180上面，以及使在上述曝露之陰極1了1上 面。此有機電致發光層190，係透過上述之井181，使與其 陰極1 71相接觸。其後，一類似銦錫氧化物或銦鋅氧化物 等透明導電性材料，係使形成在上述之有機電致發光層 \90上面，以及使在上述之鈍化上層18〇上面，藉以形成— 陽極20 0。在形成上述有機電致發光層19〇之時刻，係使用 一喷墨方法或一陰罩，以致將不需要一額外之遮罩過程。 此外’由於該陰罩亦被用來形成其陽極2〇〇，此額外之遮 罩過程亦不需要。 ^ 誠如參妝第7 A至7 F圖所述，本發明之主動矩陣式有 電=發光顯示裝置，係透過該等第一至第六遮罩過程來加 以製造。因此，其製造時間和生產成本，相較於其習知技Page 25 1255432 V. INSTRUCTION DESCRIPTION (20) The contact holes 1 6 3 ' are brought into contact with the source regions 丨 3 3 and the ground layer 1 2 分别, respectively. In addition, the first capacitor electrode 1 is connected to the ground layer 1 2 〇 through the fourth contact hole 16 4 ′, and the first capacitor electrode 1 5 2 ′ and the above An intermediate interlayer insulator 丨6 〇 forms a storage capacitor. In Fig. 7E, a passivation layer 18 is formed over the patterned conductive layer and over the exposed portion of the intermediate layer insulator 丨6 。. Therefore, the passivation layer 丨8 〇 will cover the cathodes 171, the drains 172, the source 173, and the second capacitor electrodes 7.4. Thereafter, a portion of the passivation layer 180 is patterned through a sixth mask process to produce a well 181 that exposes the cathode 171. In Fig. 7F, an organic electroluminescent layer 19 is formed on the passivation layer 180 and placed on the exposed cathode. The organic electroluminescent layer 190 is passed through the well 181 described above to be in contact with the cathode 71. Thereafter, a transparent conductive material such as indium tin oxide or indium zinc oxide is formed on the above-mentioned organic electroluminescent layer \90, and is formed on the above-mentioned passivation upper layer 18, thereby forming an anode. 20 0. At the time of forming the above-mentioned organic electroluminescent layer 19, an ink jet method or a shadow mask is used, so that an additional masking process will not be required. In addition, since the shadow mask is also used to form its anode 2, this additional masking process is not required. ^ As described in Figures 7A through 7F, the active matrix type electrically-lighted display device of the present invention is manufactured by the first to sixth mask processes. Therefore, its manufacturing time and production cost are compared to its conventional technology.
第26頁 1255432 五 發明說明（21) 術 係有顯著之降低。此外，其係有 減少，而使苴薄®开杜 、 此口其遮罩過程之 太於3曰：：層件之瑕疵減少。11此，農f迕声宝卢 本發明中將會增加。 /、衣以艮率在 第4和7A-7F圖中所顯示主動 示裝置，係屬一頂部發射類型丄車^ =光？ 用在-底部發射型“。此種底i;矩: 第嶋-依據本發置明之將/Λ弟】明^ 式有機電致發光裝置之示；^面^ w主動矩陣 減如第8圖中所顯示，有一屬透明導電性材料之接祕 層3 2 0，係#佑汰产七，a π电γϊ材科之接地 明導電性材m或大體上佈滿在其基板3Η上面。此透 4為銦錫氧化物uto)或銦鋅氧化物（IZ0), 320上面土反r 1 〇舉例而t ’大體上為一玻璃。在其接地層 ’係形成有一緩衝區層330。其一具有活性區 t區332、和源極區333之半導體層，係使形成在 ^述之緩衝區層33〇上面。此半導體層係由一多晶矽形 、、及係使形成為一島狀。上述之活性區3 3 1，係一未 ^加捧雜劑之純石夕區域。該等設置在上述活性區331之兩 則上面之汲極和源極區332和3 3 3，係一些其中施加有摻雜 劑及加以摻雜之摻雜劑摻雜區域。 ^ 其後’其一閘極絕緣層340，係使形成在上述之緩衝 區層330上面’而使覆蓋該等活性區、汲極和源極區331、 332和333 °其一閘極351係使形成在上述之閘極絕緣層340 上面’而在其多晶形半導體層之活性區3 3 1上方。此閘極Page 26 1255432 V Description of invention (21) There is a significant reduction in the surgical system. In addition, there is a reduction in the number of layers, and the masking process is too much for 3:: the layer is reduced. 11 This, the farmer's voice will increase in the invention. /, the ratio of the clothing shown in Figures 4 and 7A-7F shows the active display device, which is a top emission type brake ^ = light? Used in the - bottom emission type ". This base i; moment: Dijon - according to the hair of the present invention / Λ 】 】 】 】 】 】 】 】 】 ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; As shown in the figure, there is a transparent conductive material of the secret layer 3 2 0, which is the same as the grounding conductive material m of the a π electric γ ϊ material, or substantially covered on the substrate 3Η. 4 is indium tin oxide uto) or indium zinc oxide (IZ0), 320 is a top anti-r 1 〇 exemplified and t ' is substantially a glass. A buffer layer 330 is formed on the ground layer '. The semiconductor layer having the active region t region 332 and the source region 333 is formed on the buffer layer 33 of the above-described buffer layer. The semiconductor layer is formed into an island shape by a polycrystalline dome and a system. The active region 3 3 1 is a pure stone region in which the dopant is not added. The drain and source regions 332 and 3 3 3 disposed on the upper surface of the active region 331 are applied thereto. There is a dopant and a doped dopant doping region. ^ Thereafter a gate insulating layer 340 is formed over the buffer layer 330 described above. And covering the active regions, the drain and source regions 331, 332 and 333 °, a gate 351 is formed on the gate insulating layer 340 above and in the active region 3 3 of the polycrystalline semiconductor layer 1 above. This gate
第27頁 1255432Page 27 1255432
五、發明說明（22) 3 5 1在形成上，可使恰在上述 由一與上述閘極3 5 1相同之材料制杜區3 3 1上方。此外，其 352，係使形成在上述之閘極=二成的第一電容器電極 第8圖中，該等閘極351和第—番_層^40上面。雖未顯示在 電氣方式相連接。其次，复—:谷态電極3 5 2，彼此係以 置在上述之閘極絕緣層340上面中間層絕緣體36〇，係使設 第-電容器電極352。上述之二而使覆蓋該等閘極351和 機絕緣材料製成，以及可平面/層絕緣體360，係、由一有 板31〇的表面。由於該中間展奶化/述包括其閘極351之基V. INSTRUCTION OF THE INVENTION (22) 3 5 1 can be formed over the above-described material D3 3 1 which is identical to the above-described gate electrode 35 1 . Further, 352 is formed on the first capacitor electrode of the above-mentioned gate = 20%, and the gate 351 and the first layer 40 are formed. Although not shown in the electrical connection. Next, the complex-: valley electrode 3 5 2 is placed on the upper interlayer insulator 36 of the gate insulating layer 340 described above, and the first capacitor electrode 352 is provided. The above two are made to cover the gates 351 and the machine insulating material, and the planar/layer insulator 360 is a surface having a plate 31. Since the intermediate exhibition milking/reporting includes the base of its gate 351
处且右一 π θ β ϋ α \ 緣體36〇，將會覆蓋上述可 月b具有一不良之表面粗度的键； 之表面粗度，對立上要形成之m330，此緩衝區層330 丁^、 欣之其他薄層，將不具影響力。 因此，一將要形成該等薄層上面之電極，將不會受到上述 緩衝區層3 3 0之表面粗度的影響。此中間層絕緣體3 6 〇，可 能包含苯基環丁烯（BCB)。And the right one π θ β ϋ α \ edge body 36〇, will cover the above-mentioned bond b has a poor surface roughness of the bond; the surface roughness, opposite to form m330, the buffer layer 330 ^, Xin's other thin layers will not be influential. Therefore, the electrodes on which the thin layers are to be formed will not be affected by the surface roughness of the buffer layer 310. This interlayer insulator 3 6 〇 may contain phenylcyclobutene (BCB).
同時’彼等穿透過中間層絕緣體3 6 0和閘極絕緣層3 4 0 兩者之第一和第二接觸孔3 6 1和3 6 2，在形成上係使分別曝 露出該等汲極區3 3 2和源極區3 3 3。此外，彼等穿透過中間 層絕緣體3 6 0、閘極絕緣層3 4 0、和緩衝區層3 3 0之第三和 第四接觸孔3 6 3和3 64，係與該等第一和第二接觸孔361和 3 62 —起形成，而使曝露出部份之接地層32 0。其一陰極 371、一汲極372、一源極373、和一第二電容器電極374， 係使形成在上述之中間層絕緣體3 6 0上面。其陰極371係具 有一單層式結構，而該等沒極3 7 2、源極3 7 3、和第二電容 器電極3 7 4，可能具有一雙層式結構。其陰極3 7 1係由一類At the same time, the first and second contact holes 3 6 1 and 3 6 2 which penetrate through the intermediate layer insulator 360 and the gate insulating layer 3 4 0 are formed to expose the drain electrodes respectively. Zone 3 3 2 and source zone 3 3 3. In addition, they penetrate through the interlayer insulator 360, the gate insulating layer 340, and the third and fourth contact holes 3163 and 364 of the buffer layer 333, and the first sum The second contact holes 361 and 3 62 are formed together to expose a portion of the ground layer 32 0 . A cathode 371, a drain 372, a source 373, and a second capacitor electrode 374 are formed on the intermediate layer insulator 360. The cathode 371 has a single layer structure, and the electrodeless 371, the source 373, and the second capacitor electrode 374 may have a two-layer structure. Its cathode 3 7 1 is a class
1255432 五、發明說明（23) 氧化物(IT0)或銦鋅氧化物πζ〇)為例之 性材料所‘成。此夕卜，其汲極372之 、1 之下部3 73a、和苴第二雷交哭帝上 八你極373 ,_ y ”弟一電合電極374之下部3 74a，亦俜 似以錮錫氧化物（IT0)或銦鋅氧化物 之手透 明導電性材料所製成十方面，其沒極3 72之上7之透 源極373之上部373b、和其第二電容器電極爪之 =mb，係由一類似以金屬為例之不透明導 ： 上述之陰则’係使連接至上述雙層式汲则： 卩372a，後者係透過其第一接觸孔361，與上述之汲極 :=接觸。上述源極373之下部373a，係透過其第二 觸孔3 6 2，以及透過盆第二接織了丨Q c Q y. x 弟一接觸孔3 63，使分別與該等源極 时33和接地層320相接觸。上述第二電容器電極374之下 ，374a，係透過其第四接觸孔364，與其接地層32〇相接 ，。該等間置有上述中間層絕緣體36()之第一和第二電容 器電極3 5 2和3 7 4，係形成一儲存電容器。 峻上次’其一鈍化層380，係使形成在上述之中間層絕 、、彖體3 6 0上面，而使覆蓋該等陰極3 71、汲極3 72、源極 3J 3和第二電谷态電極3 7 4。此鈍化層3 8 0係具有一可曝 路出其陰極371之井381。其一電致發光層39〇，接著係使 形成在上述之鈍化層380上面，以及係使進入其井381内， 以使上述之電致發光層39〇 ,透過此井381與上述之陰極 371相接觸。其一陽極4〇〇係使形成在上述之電致發光層 上面，以及使在上述之純化層380上面。其中之陽極 4 〇 〇，很明顯係由一類似以金屬為例之不透明導電性材料1255432 V. INSTRUCTIONS (23) Oxide (IT0) or indium zinc oxide πζ〇) is an example of a material. On the other hand, its bungee 372, the lower part of the 3 73a, and the second 雷 交 哭 帝 上 你 你 你 你 373 373 373 373 373 373 373 一 一 一 一 一 电 电 电 374 374 374 374 374 374 3 3 3 3 3 3 3 The hand-transparent conductive material of oxide (IT0) or indium zinc oxide is made of ten aspects, and the upper portion 373b of the source 373 on the bottom of the step 3 72 and the mbb of the second capacitor electrode claw are It is made of a opaque guide similar to a metal: the above-mentioned yin is connected to the above-mentioned two-layer type 汲: 卩 372a, the latter is in contact with the above-mentioned drain:= through its first contact hole 361. The lower portion 373a of the source electrode 373 is woven through the second contact hole 3 6 2 and through the second connection of the basin 丨Q c Q y. x a contact hole 3 63 so as to be respectively associated with the source 33 The grounding layer 320 is in contact with the grounding layer 320. The lower surface of the second capacitor electrode 374, 374a is connected to the grounding layer 32A through the fourth contact hole 364. The intermediate layer insulator 36() is interposed therebetween. The first and second capacitor electrodes 3 5 2 and 3 7 4 form a storage capacitor. The last time a passivation layer 380 is formed in the above The intermediate layer is over, and the top of the body is 360, so that the cathode 3 71, the drain 3 72, the source 3J 3 and the second electric valley electrode 3 7 4 are covered. The passivation layer 380 has one The well 381 of the cathode 371 can be exposed. An electroluminescent layer 39 is formed thereon, and then formed on the passivation layer 380 and into the well 381 to cause the electroluminescent layer 39 to be formed. Thereafter, the well 381 is in contact with the cathode 371. An anode 4 is formed on the electroluminescent layer and on the purification layer 380. The anode 4 is very Obviously an opaque conductive material similar to metal
第29頁 1255432 五、發明說明（24) 所形成。該陽極4 0 0係使佈滿在或大體上佈滿在其基板3 j 〇 上面，而使此陽極4 0 0作用為一電力線。 在第8圖中所顯示之有機電致發光顯示裝置之範例 中’該等接地層3 2 0和電力線陽極層4 〇 〇，係使佈滿其整個 基板3 1 0。因此，其電力線之電阻值將可使降低，以及其 電力線中在驅動該裝置期間可能發生之熱破壞，將可使避 免。所以，其影像品質將會增加，以及將可得到其顯示中 之均勻性。此外，由於該等接地層32〇和陰極371，係由上 述之透明導電性層所製《，以及上述作用為其電力線之陽 極400，係由上述之不透明導電性材料所製成，第8圖之主 =陣Ϊ!機電致發光顯示裝置，係變為上述之底部發射 '各^中之光線係在其底部之方向中被釋放。 可h ill，ί尤述之主動矩陣式有機電場發光顯示裝置時， 過r 口 A = 圖之第一實施例中’採用-種六遮罩式 遮ΐ : ίίίΓ圖中所顯示之裝置製造中，僅使用六個 係使循序形；：ί J:^::才料和不透明導電性材料， 使用-在其二間::部緣體36◦上面。其後，係 使是在ii 知。因此，此種六遮罩式過程，即 屬雙層式結構時亦屬有效/ 373及弟二電容器電極374係 同時，上述具有該等活性 、 半導體層，係藉由施 二二,極和源極區之多晶形 層末加竭。然而’由於上述之接地層，係使設Page 29 1255432 V. Inventions (24) Formed. The anode 400 is filled or substantially covered on its substrate 3 j , such that the anode 400 acts as a power line. In the example of the organic electroluminescent display device shown in Fig. 8, the grounding layer 3 2 0 and the power line anode layer 4 布 are filled with the entire substrate 3 10 . Therefore, the resistance value of its power line will be reduced, and the thermal damage that may occur during its driving of the device in the power line will be avoided. Therefore, the image quality will increase and the uniformity in its display will be obtained. In addition, since the ground layer 32 and the cathode 371 are made of the transparent conductive layer described above, and the anode 400 which functions as the power line, is made of the above-mentioned opaque conductive material, FIG. The main = Ϊ Ϊ 机电 机电 机电 机电 机电 机电 机电 机电 机电 机电 机电 机电 机电 机电 机电 机电 机电 机电 机电 机电 机电 机电 机电 机电 机电 机电 机电 机电 机电 机电In the case of the active matrix type organic electric field light-emitting display device of H ill, ί, the above-mentioned embodiment of the first embodiment of the present invention uses a six-mask type concealer: ίίίΓ , using only six systems to make the sequence;: ί J: ^:: material and opaque conductive material, use - in its two:: edge body 36 ◦ above. After that, the system is known at ii. Therefore, the six-mask process, which is a two-layer structure, is also effective / 373 and the second capacitor electrode 374 are simultaneously, the above-mentioned having the active, semiconductor layer, by applying the two, the pole and the source The polycrystalline layer of the polar region is exhausted at the end. However, due to the above grounding layer,
1255432 五、發明說明（25) 置在其整個基板上面，以及接著在該接地層上方，形成一 非晶形矽層，使成前述之結構，上述之非晶形石夕層，由於 其所施加至用以結晶之熱量會被上述具有高導熱係數之接 地層分散的事實所致，將無法適當地形成結晶:此種熱量 分散現象，將會導致長的結晶時間和不相稱之多晶矽。上 述恰形成在其接地層上方之多晶矽層，係顯示在第9圖 中。誠如第9圖中所示，上述多晶矽之晶粒係相當小，以 致上述具有此等小顆粒尺寸之薄膜電晶體，並不具有良好 ，電氣性質和特性。特言之，當使用雷射光束來做結晶 打，由於雷射光束之光能，會更容易分 結晶將會變得更糟。 八按6尽八 斤二&克服此種熱里或光能量分散之問豸，本發明 巧：貫施例，提供了一種具有多個各在 述半導體層之開口的接地層。此呈 對應於上 係例示在第1〇圖中。直接：二具/甘〜個開口之接地層’ 行形式之開口421a。每在,其中係有多個鍵 晶體，特別B ^ 1 &係對應於上述之薄膜電 日日聪 符別疋對應於上述且右訪榮、、工&广 之丰導f ^ ^ /性區、沒極和源極區 之+V體層。當使用第10圖 之”體層，將可具有大的晶粒。’上达多晶石夕 第11圖係一可顯示一 上方的多晶矽層之照相圖= 顯示之接地層 421a所致，1非曰带功产#由於上述接地層421之開口 或光能量。因此:曰此多晶;期間，並不會被剝奪熱量 示，將會變得較大b丄冷體層之晶粒如第1 1圖中所 亍車乂大。此具有大尺寸之多晶石夕半導體層的薄1255432 V. Description of the invention (25) placed over the entire substrate, and then over the ground layer, forming an amorphous layer of germanium to form the aforementioned structure, the amorphous layer of the above-mentioned layer, due to its application The fact that the heat of crystallization is dispersed by the above-mentioned ground layer having a high thermal conductivity will not properly form crystals: such heat dispersion will result in long crystallization time and disproportionate polysilicon. The polycrystalline germanium layer formed above the ground layer is shown in Fig. 9. As shown in Fig. 9, the crystal grains of the above polycrystalline germanium are relatively small, so that the above-mentioned thin film transistors having such small particle sizes do not have good electrical properties and characteristics. In particular, when a laser beam is used for crystallization, it is easier to separate crystals due to the light energy of the laser beam. Eight by eight, eight pounds && Overcoming such heat or light energy dispersion, the present invention provides a ground layer having a plurality of openings in each of the semiconductor layers. This presentation corresponds to the top example and is shown in Figure 1. Direct: two/gly~ an open grounding layer' opening 421a in the form of a row. Each of them is composed of a plurality of bond crystals, and in particular, B ^ 1 & corresponds to the above-mentioned thin film electric day and day, and the other is corresponding to the above and right visiting, glory, and work; +V body layer of sex zone, immersion and source zone. When using the "body layer" in Fig. 10, it will have a large crystal grain. 'Up to the polycrystalline stone, Fig. 11 is a photograph showing the upper polycrystalline germanium layer = the ground layer 421a shown, 1 non曰带功产# Due to the opening or light energy of the above grounding layer 421. Therefore: 多 多 多 ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; The car in the picture is large. This is a thin layer of polycrystalline polycrystalline silicon.
第31頁 五:發明說明（26) 膜電晶體，將可 本發明之例 首先，由於 方’其電力線之 $該裝置期間可 〜像品質將會增 第二，由於 &造過程將可使 夕卜’其瑕疵之發 Μ造良率將可使 第三，本發 機電致發光顯示 &置。當其供上 式有機電致發光 第四，該等 一有機材料製成 的表面。所以， 句之電場，以及 之辱命將會增加 本技藝之專 飾體和改變形式 其係意在使本發 之等價體的界定 具有良好之 示貫施例， 該等接地層 電阻值將可 能發生之熱 加，以及將 其陰極係與 減少，以及 生將會因其 提昇。 明之原理， 裝置，或一 述之頂部發 顯示装置， 閘極線與資 ，以及可平 在該等陽極 彼等影像之 電氣性質和 係具有下列 和電力線， 使降低，以 破壞’將可 可得到其顯 該等汲極和 其生產成本 過程之縮減 特性。 諸優點。 係遍佈在 及其電力 使避免。 示中之均 源極同時 將可使降 而使減少 係可被應用至一頂部 底部發射型有機電致 射類型利用時，此種 將可具有一高孔徑比 料線間之中間層絕緣 面化上述包括其閘極 與陰極之間，將會感 灰度將可被改善，以 業人員，很顯然可在本發明中完 而=違離本發明之精神與範圍 ，涵蓋本發明在所附申請專利範 辜巳圍内之修飾體和變更形式。 其基板上 線中在驅 所以，其 勻性。 形成，其 低。此 ，以及其 發射型有 發光顯示 主動矩陣 〇 體，係由 線之基板 應出一均 及其裝置 成各種修 。因此， 圍和彼等Page 31 V: Invention Description (26) Membrane transistor, which can be used as an example of the present invention, firstly, because the power line of the device can be used during the device period, the image quality will increase by a second time, since the & Xi Bu's Μ 瑕疵 Μ 将 将 将 将 将 将 将 将 将 将 将 将 第三 第三 第三 第三 第三 第三 第三 第三 第三 第三When it is supplied with an organic electroluminescence fourth, the surface is made of an organic material. Therefore, the electric field of the sentence, as well as the insults, will increase the special features and forms of the art. The intention is to make the definition of the equivalent of the present invention a good example. The resistance of the grounding layer will be possible. The heat that occurs, as well as the reduction of its cathode system, and the health will be promoted. The principle of the Ming, the device, or the top of the display device, the gate line and the capital, and the electrical properties of the image that can be flattened on the anodes and the following have the power line to reduce the damage to the 'cocoa' This is the reduction characteristic of these bungee jumping and its production cost process. Advantages. The system is spread throughout and its power is avoided. The average source of the display will simultaneously reduce the reduction system to be applied to a top-bottom emission type organic electro-optic type, which will have a high aperture ratio intermediate layer between the layers. </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; Modifications and variations of patents. The substrate is driven on the line, and its uniformity. Formed, it is low. This, as well as its emissive type, has an illuminating display active matrix body, which is composed of a line of substrates and a device for various repairs. Therefore, Wai and their
第32頁 1255432 圖式簡單說明 第1圖係一可顯示一習知技術 發光顯示裝置（ELD)之基本像素結 式有機電致 第2圖係一習知技術型主動矩二2 電路線圖； 裝置之示意橫截面圖； 機電致發光顯示 第3A至31圖係一些可例示第2圖之主 致發光裝置的製造過程之橫截面圖； 動矩陣式有機電 第4圖係一依據本發明之典型@實 機電致發光裝置之示意橫截面圖；、 勺主動矩陣式有 第5圖係一可顯示一依據本發明之主 致細示裝置(ELD)之基本像素結構的等效電 第6圖係一可示意例示本發明 ^ w ， 和接地層之平面圖； /、t只知例的電力線 第7A和7F圖係一些可例示第4圖 致發光顯示裝置的製造過程之橫截面圖動矩陣式有機電 第8圖係、一依據本發明之另一典型實施 式有機電致發光裝置之示意橫截面圖； 勒 ^ 第9圖係一可顯示一形成在第6圖中所顯示之戶上 方的多晶矽層之照相圖； 曰 第1 0圖係一可示意例示一依據本發明之另一典型實施 例的接地層之平面圖；而 Μ κ 第11圖則係-可顯示-形成在幻0圖中所顯示之接地 層上方的多晶矽層之照相圖。 元件編號對照表 第33頁 1255432 圖式簡單說明 1閘極線 2資料線 3電力線Page 32 1255432 Brief Description of the Drawings FIG. 1 is a diagram showing a basic pixel-junction organic electroluminescence of a conventional technology light-emitting display device (ELD). FIG. 2 is a schematic diagram of a conventional technique-type active moment 2 circuit diagram; BRIEF DESCRIPTION OF THE DRAWINGS FIG. 3A to FIG. 31 are cross-sectional views showing a manufacturing process of the electroluminescent device of FIG. 2; A schematic cross-sectional view of a typical @real electroluminescent device; a scoop active matrix type having a fifth figure which can show an equivalent electric figure of a basic pixel structure of an active thinning device (ELD) according to the present invention A plan view of the present invention and a ground plane can be schematically illustrated; /, t is only a power line 7A and 7F of a known example. Some cross-sectional diagrams of the manufacturing process of the fourth embodiment of the light-emitting display device can be exemplified. 8 is a schematic cross-sectional view of another exemplary embodiment of an organic electroluminescent device according to the present invention; FIG. 9 can show a form formed above the household shown in FIG. Photograph of polycrystalline germanium layer; Figure 10 is a plan view schematically showing a ground plane in accordance with another exemplary embodiment of the present invention; and Μ κ 11th-system display - formed above the ground plane shown in the phantom 0 Photograph of a polycrystalline layer. Component Number Comparison Table Page 33 1255432 Schematic Description 1 Gate Line 2 Data Line 3 Power Line
4切換薄膜電晶體 5驅動薄膜電晶體 6儲存電容器 7發光二極體 10基板 11 緩衝區層 12第一（多晶形）半導體層/閘極絕緣層 12a 活性區 1 2 b >及極區 1 2 c 源極區 13第二（多晶形）半導體層 13a 電容器電極 1 4 閘極絕緣層 15閘極4 switching thin film transistor 5 driving thin film transistor 6 storage capacitor 7 light emitting diode 10 substrate 11 buffer layer 12 first (polymorphic) semiconductor layer / gate insulating layer 12a active region 1 2 b > and polar region 1 2 c source region 13 second (polymorphic) semiconductor layer 13a capacitor electrode 1 4 gate insulating layer 15 gate
1 6第一中間層絕緣體 17電力線 1 8 第二中間層絕緣體 18a 第一接觸孔 18b第二接觸孔 18c第三接觸孔1 6 first interlayer insulator 17 power line 1 8 second interlayer insulator 18a first contact hole 18b second contact hole 18c third contact hole
第34頁 1255432 圖式簡單說明 1 9 a 沒極 1 9 b 源極 2 0第一鈍化層 2 0 a弟四接觸孔 21 陽極 22第二鈍化層 22a 井 23有機電致發光層 24陰極 11 0基板 1 2 0 接地層 1 3 0 緩衝區層 131活性區/多晶形半導體層 1 3 2汲極區/多晶形半導體層 1 3 3 源極區/多晶形半導體層 135半導體層 1 4 0 閘極絕緣層 1 5 1閘極 1 5 2第一電容器電極 1 6 0 中間層絕緣體 1 6 1第一接觸孔 1 6 2第二接觸孔 1 6 3 第三接觸孔 1 6 4 第四接觸孔Page 34 1255432 Brief description of the diagram 1 9 a Nopole 1 9 b Source 2 0 First passivation layer 2 0 a brother four contact hole 21 Anode 22 Second passivation layer 22a Well 23 Organic electroluminescent layer 24 Cathode 11 0 Substrate 1 2 0 Ground layer 1 3 0 Buffer layer 131 Active region / Polycrystalline semiconductor layer 1 3 2 Datum region / Polycrystalline semiconductor layer 1 3 3 Source region / Polycrystalline semiconductor layer 135 Semiconductor layer 1 4 0 Gate Insulation layer 1 5 1 gate 1 5 2 first capacitor electrode 1 6 0 interlayer insulator 1 6 1 first contact hole 1 6 2 second contact hole 1 6 3 third contact hole 1 6 4 fourth contact hole
第35頁 1255432 圖式簡單說明 1 7 1陰極 1 7 2 汲極 1 7 3 源極 174 第二電容器電極 1 8 0 純化層 181井 1 9 0 電致發光層 2 ◦ 0 陽極Page 35 1255432 Brief description of the diagram 1 7 1 cathode 1 7 2 drain 1 7 3 source 174 second capacitor electrode 1 8 0 purification layer 181 well 1 9 0 electroluminescent layer 2 ◦ 0 anode
2 11資料線 2 1 2閘極線 2 1 3 電力線 2 1 4切換薄膜電晶體 2 1 5驅動薄膜電晶體 2 1 6儲存電容器 2 1 7電致發光二極體 2 2 0 基板 2 2 1 接地層 2 2 2 電力線層2 11 data line 2 1 2 gate line 2 1 3 power line 2 1 4 switching thin film transistor 2 1 5 driving thin film transistor 2 1 6 storage capacitor 2 1 7 electroluminescent diode 2 2 0 substrate 2 2 1 Formation 2 2 2 power line layer
3 1 0 基板 3 2 0 接地層 3 3 0 緩衝區層 3 3 1 活性區 3 3 2 >及極區 3 3 3 源極區3 1 0 substrate 3 2 0 ground plane 3 3 0 buffer layer 3 3 1 active region 3 3 2 > and polar region 3 3 3 source region
第36頁 1255432 圖式簡單說明 3 4 0 閘極絕緣層 3 5 1 閘極 3 5 2 第一電容器電極 3 6 0 中間層絕緣體 3 6 1第一接觸孔 3 6 2第二接觸孔 3 6 3第三接觸孔 3 64第四接觸孔 3 7 1陰極Page 36 1255432 Brief description of the diagram 3 4 0 gate insulating layer 3 5 1 gate 3 5 2 first capacitor electrode 3 6 0 interlayer insulator 3 6 1 first contact hole 3 6 2 second contact hole 3 6 3 Third contact hole 3 64 fourth contact hole 3 7 1 cathode
3 7 2 汲極 3 7 2 a 汲極下部 372b汲極上部 3 7 3 源極 3 7 3 a 源極下部 3 7 3 b 源極上部 374 第二電容器電極 3 74a 第二電容器電極下部 374b 第二電容器電極上部3 7 2 Dippole 3 7 2 a Bottom plate lower 372b Bungee upper part 3 7 3 Source 3 7 3 a Source lower part 3 7 3 b Source upper part 374 Second capacitor electrode 3 74a Second capacitor electrode lower part 374b Second Capacitor electrode upper
3 8 0鈍化層 381井 3 9 0 電致發光層 4 0 0 陽極 421 接地層 4 2 1 a 開口3 8 0 passivation layer 381 well 3 9 0 electroluminescent layer 4 0 0 anode 421 ground layer 4 2 1 a opening
第37頁Page 37
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