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TWI241040B - Modulized structure of the array LED and its packaging method - Google Patents

Modulized structure of the array LED and its packaging method
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Publication number
TWI241040B
TWI241040BTW93128769ATW93128769ATWI241040BTW I241040 BTWI241040 BTW I241040BTW 93128769 ATW93128769 ATW 93128769ATW 93128769 ATW93128769 ATW 93128769ATW I241040 BTWI241040 BTW I241040B
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TW
Taiwan
Prior art keywords
emitting diode
light
upper substrate
item
modular structure
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TW93128769A
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Chinese (zh)
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TW200611429A (en
Inventor
Ching-Fu Tzou
Yi-Ru Chen
Justin Chao
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Ching-Fu Tzou
Yi-Ru Chen
Justin Chao
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Priority to TW93128769ApriorityCriticalpatent/TWI241040B/en
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Publication of TWI241040BpublicationCriticalpatent/TWI241040B/en
Publication of TW200611429ApublicationCriticalpatent/TW200611429A/en

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Abstract

A modulized structure of the array LED and its packaging method is disclosed, wherein the high thermal conductivity material is chosen as the material for the top substrate; a multitude of array-arranged notches are formed into the top substrate and penetration apertures are formed onto the bottom of notches; the high thermal conductivity material is chosen as the material for the bottom substrate and on the surface of bottom substrate are formed the conductor deployment patterns; the lower surface of the top substrate is fixed onto the upper surface of the bottom substrate to make each of the penetration apertures of notches respectively correspond to the contact electrode of the conductor deployment patterns; a multitude of dies of LED are respectively fixed onto the lower surface of each notch on the top substrate and the two electrodes of dies are made electrically connected to the contact electrodes through the penetration apertures; and seal each notch of the top substrate in the way of protecting LED from oxidation.

Description

Translated fromChinese

1241040 九、發明說明: 【發明所屬之技術領域】 =發明係有關-種陣列式發光二極體之模組化結構及1241040 IX. Description of the invention: [Technical field to which the invention belongs] = The invention relates to a modular structure of an array type light emitting diode and

=衣方法,尤指一種以多數發光二極體(LIGHT EMITTING 夕/)呈陣列式排狀模組化結構以及將模組化結構封裝 之封裝方法。 【先前技術】 按,傳統發光二極體之封裝結構,如第工4圖所示, 1!發光二極體晶粒6之底層電極61以電性黏接於第一 電極層6 2上,而位於發光二極體晶粒6之頂層電極 一 1則利用導線6 6連接至另-第—金屬電極層6 2,這 二層第-金屬電極層6 2同在-破璃纖維基板7的上層表 $ 7 1 ’亚經由貫孔7 2分別連接至位在該玻璃纖維基板 之底層表面7 3的第二金屬電極層6 3,而每一個發光 二極體晶粒6皆被-碗形.反射板64所包圍,以提供^發 光二極體晶粒6發射之光線能集巾向上反射,之後再於^ 碗形反射板6 4内及上方包覆一封裝樹脂層6 5,以保= 該發光二極體晶粒6及連接之導線6 6 ’最後再沿著貫 7 2的中央進行㈣,以完成發光二極體之封裝結構。、 由於發光二極體在發光時會產生熱能,因此散執性是 否良好會影響發光二極體之發光效率,然而前述傳統之發 光二極體封裝結構的基板7本身為—絕緣體,其散熱效果 已不佳,且又被第-金屬電極層6 2與第二金屬電極’ 3包覆,使發光二極財發料難生之熱能無法由練 !24l〇4〇 =去’僅能介由外露在封裝樹脂層6 5外之金屬電極層 2、、6 3部份散逸,因此’其散熱之效果非常有限。 ,此’而有人設計另—種發光二極體之封裝結構,如 旦1圖所不’其主要係以石夕晶月為基板8,利用曝光領 二=!方式,在該基板8上成形凹槽81,再利用 引孔=加工方式,於該凹槽81底部貫穿二電極導 一绫/再喊化或氮化處理,使該基板8之表面形成 8 ’再於該絕緣層上鑛上—金屬層,以供在該凹槽 8背Ξ = ΐ屬電極8 1 1及反光層8 1 2,及在該基板 8月面形成背面電極岸只 、 土低 内之金騎極8 i i帽正’ 用雷射加工在該凹槽 光二極體曰曰叙出負面,之後,再將發 9 1遠接:二;凹槽81内正電極面上,同時以導線 連接負电極面,並將凹槽8 1 著二凹槽8丄的巾卩^〜8 L讀._,衣後再沿 結構。 纟中間進仃切割,以完成發光二極體之封裝 且置放笋光基為矽晶片’其本身散熱之效果較佳, 内,叫$ 日粒9之凹槽8 1係直接成形於基板8 散逸:、:ί —極體晶粒9發光產生之熱能可由基板8直接 政逸而達到較佳之散埶效果.妙二^^ L _ 接 裝結構的封” ’;而’ 5亥叙光-極體之封 以渴_ = :: ^ 繁項’其必須先在基板8之表面 在製作電極導引孔8 2睥,且心極寻夕返之製程,尤其 ^ 其母一凹槽8 1之電極導引孔 1241040 ^須分次進行,而無法批量製造,使得生產之成本大幅 徒局。 再者,前述二種發光二極體之 士 之發光二極體為主,其不適用於陣^結構皆以製作1 於陣列式發光二極體須考慮整體線路性 ΐ之前述二種發光二極體之封裝結構而 列式之模組化結構。 上及光二極體之封袭結構,無論是在結構 上及在表私上所產生之缺失,仍有待改善。 【發明内容】 陣列目Γ,在於解決上述的問題而提供-種 == 模組化結構及其封装方法,其主要係 型、射出成舰刻成型等4;=,再利用模塑成 穿孔,再選用具高導 板之表面成形預定之電路方式,在該下基 固定於該下基板之表面,使再將該上基板之底面 分別對應該下基板表面之電各該凹槽的貫穿孔 該電路佈局圖案的各該連接2局圖案的接觸電極’並使 的底部晶粒相固定於該上基板之各該凹槽 亚利用邊凹槽1底部的二貫穿孔,使«光二 !241〇4〇 極版之晶粒的二電極與該下基板之電 極完成電性連接,再則 佈局_的接觸電 的方式封_上基板之各該 ^之日日粒不文乳化 封裝。 彳日即元成模組化結構及其 該發二下基板係選用具高導熱性之材料為基材,且 光二晶粒係固定於該上基板之凹槽底部,其發 而可^料之賴絲,使發光二_^^^。 来一先^ f之次一目的,係在於模組化之設計可將多數發 二^虽體王陣列式排列並模組化,以應用於發光二極體須 ^組化^產品,例如車燈、交通號誌甚至液晶面板等之產 品,且透過下基板之電路佈局圖案將發光二極體之電極導 引出至下基板的周邊,以利於製作出對外之引腳, 方便整個模纟且與產品的後續封裝。 本叙明之上述及其他目的與優點,不難從下迷所 貫施之詳細說明與附圖中,獲得深入了解。 當然’本發明在某些另件上,或另件之安排上容許有 所不同,但所選用之實施例,則於本說明書中,予以 說明,並於附圖中展示其構造。 u、、、田 【實施方式】 —清芬閱第1圖至第3圖,圖中所示者為本發明所選用 之貫施例結構,此僅供說明之用,在專利申請上並不受此 種結構之限制。 本發明係為一種陣列式發光二極體之模組化結構及其 1241040 封裝方法,該陣列式發光二極體之模組化結構包含有一下 基板2以及一固定於該下基板2之表面的上基板丄,其中 該上基板1具有一定之高導熱性,該上基板1中成形 有多數呈陣列式排列之凹槽丄,在本實施例中,該上基 板1中成也有夕數壬4 X 4之陣列式排列的凹槽1 1,該凹 槽1 1具有傾斜一定角度之槽壁丄丄2,使該凹槽丄工呈 錐狀漸縮,以增加反射效果,當然,該凹槽1 1之槽壁1 1 2亦可呈垂直狀或圓弧狀,而各該凹槽丄1分別具有一 底部1 1 1,各該凹則i之底部丄1丄分別成形有二個 以上貫穿該底部1 1 1之貫穿孔12,各該貫穿孔1 2内 分別設有-導電材料i 4,各該凹槽丄丄之底部丄丄工分 別固疋至少一發光二極體之晶粒4,各該發光二極體之晶 粒4分別具有二電極4丄、4 2,並以保護該發光二極體 之晶粒4不受氧化的方式封閉該上基板1之各該凹槽i 及下基板2具有—定之高導熱性,該下基板2之表面 成形有預定之電路佈局圖案2 1,如第3圖所示,該電路 佈局圖案2 1對應該上基板i之各該凹槽丄丄的各該貫穿 =1 2分別成形有接觸電極2 i 2,以利用各該貫穿孔工 導兒材料1 4分別與各該發光二極體之晶粒4的電 其 、4 2接觸導通,而且該電路佈局圖案2 1在該下 : = 成形有多數連接外部之連接部2 1 3,而該 % 口 #木2 1於各該接觸電極2 1 2與各該連接部2 1241040 之卿核料之⑽2 1 4,此外,該下基板2 置^制^可以製作該電路佈局圖案21之外,亦可以放 微電子元件’例如電阻、熱感應元件、以及 f二極體等等,用以提高整體模組化控制電路之功 在本列式發光二極體之模組化結構的封裝方法, 在本A例中,係以各凹槽 為例,其包括下列㈣: 極體之晶粒 W作上基板··其係選用具高導埶性 i、,在本實施二=:, D圖所示,ιϋ _成型方式,如第4圖至第4 之具材,將;=—片(副)單晶石夕晶片1 3為上基板1 式夕晶片13置於爐管内,以熱氧化的方 發u沉積一層二:)t: 長一層二氧化 微影製程定義二 1 Ο 9 . , 日片1 3的表面與底面的蝕刻區域 3 2,亚、!由濕钱刻(B〇E)或乾餘刻⑼幻的 區域132的保護層131,使餘刻區域13^裸 二2=非ΐ向性濕__的方式,刻區 41 3 2蝕刻至一定深度,以供 時成形多數呈陣列式排列之 早曰?3内同 η之底面⑴分別成形二;匕【同,凹槽 _好凹槽“及貫穿孔12::H2,之後,再將已 ^之早日日矽晶片1 3置於爐管 1241040 内加溫,以熱氧化的方式於各該凹槽1 !及貫穿孔i 2之 表面成長-層二氧切(或沉積—層氮切),作為電性絕 緣層1 3 4,如此,即完成上基板1之製作。 衣作下基板·其係選用具高導熱性之材料為基材,並 以網板印刷方式與微影蝕刻方式等其中之一方式,在該下 基板2之表面成形預定之電路佈局圖f2l,在本實施例 中,如第5圖至第5 C圖所示,係選用一片單晶矽晶片2 2為下基板2之基材,將該單晶石夕晶片2 2置於爐管内加 溫’以熱氧化的方式於該單晶石夕晶片2 2的表面與底面分 別成長一層二氧化矽(或沉積一層氮化矽),作為電性絕緣 層2 2 1,再利用蒸鍍(或濺鍍)的方式於該單晶矽晶片2 2的表面沉積-層金屬|2工1,以作為該電路佈局圖案 2 1之基層,再利用微影製程於該金屬層2 1丄上定義出 該電路佈局圖案2 1預蝕刻之區域,再經蝕刻方式去除區 域外之金屬層,以在該下基板2之表面形成具有接觸電極 2 1 2、連接部2 1 3以及導線2 1 4佈局之電路佈局圖 案2 1,此外,若在該下基板2之表面再製作模組化控制 電路所需之微電子元件時,則可以利用CM〇s及其相關製程 製作’以達到元件積體化以及系統整合的功能。 上、下基板固定··其係將該上基板1之底面置於該下 基板2之表面,如第2、3圖及第6圖所示,使該上基板 1之各該凹槽1 1的貫穿2分別對應該下基板2表面 之笔路佈局圖案2 1的接觸電極2 1 2,並使該電路佈局 圖案21的各该連接部213外露於該上基板1之周邊, 11 1241040 之後,再將該上基板1與該下基板2固定,在本實施例中, 係在該上基板1與該下基板2接觸之周邊,以上膠方式塗 佈一圈高分子材料,如epoxy和p〇lyimide,或是其他之= Clothing method, especially a packaging method that uses a majority of light emitting diodes (LIGHT EMITTING) in an array-like modular structure and encapsulates the modular structure. [Previous technology] According to the conventional light emitting diode packaging structure, as shown in FIG. 4, 1! The bottom electrode 61 of the light emitting diode die 6 is electrically bonded to the first electrode layer 62. The top electrode 1 located on the light-emitting diode die 6 is connected to another-first-metal electrode layer 62 by a wire 6 6. These two first-metal electrode layers 6 2 are the same as those of the glass-fiber substrate 7 The upper layer $ 7 1 'is connected to the second metal electrode layer 6 3 on the bottom surface 7 3 of the glass fiber substrate via through holes 7 2 respectively, and each of the light-emitting diode crystals 6 is bowl-shaped. The reflecting plate 64 is surrounded to provide the light emitted by the light-emitting diode die 6 to be reflected upwards, and then a packaging resin layer 65 is coated inside and above the bowl-shaped reflecting plate 6 4 to ensure = The light-emitting diode die 6 and the connected wire 6 6 ′ are finally re-finished along the center of 7 2 to complete the packaging structure of the light-emitting diode. 2. Since the light emitting diode generates thermal energy when it emits light, whether the parasitic property is good will affect the light emitting efficiency of the light emitting diode. However, the substrate 7 of the aforementioned conventional light emitting diode packaging structure is an insulator, which has a heat dissipation effect. It is not good, and it is covered with the first-metal electrode layer 62 and the second metal electrode '3, which makes the heat energy of the light-emitting diodes difficult to produce. It cannot be practiced! The metal electrode layers 2, 6 and 6 exposed outside the encapsulating resin layer 65 are partially dissipated, so 'the effect of heat dissipation is very limited. This 'someone designed another kind of light-emitting diode packaging structure, as shown in Figure 1', which mainly uses Shi Xijingyue as the substrate 8 and uses the exposure collar II =! Method to form on the substrate 8 The groove 81 uses the lead-through = processing method, and the two electrodes are penetrated at the bottom of the groove 81 to conduct a re-seal / re-shout or nitridation treatment, so that the surface of the substrate 8 is formed 8 ′ on the insulating layer. -A metal layer for the back of the groove 8 = metal electrode 8 1 1 and reflective layer 8 1 2, and a gold electrode 8 ii cap formed on the August surface of the substrate on the rear surface of the substrate Positive 'uses laser processing to describe the negative in the grooved photodiode, and then connect 9 1 far away: two; the positive electrode surface in the groove 81, and at the same time connect the negative electrode surface with a wire, and Put the groove 8 1 on the two groove 8 丄 of towel ^ ~ 8 L to read ._, and then follow the structure after clothes.纟 Cut into the middle to complete the packaging of the light-emitting diode and place the bamboo light base on a silicon wafer. 'It has a better heat dissipation effect. Inside, the groove 8 called $ 日 粒 9 1 is directly formed on the substrate 8 Dissipation:,: ί—The thermal energy generated by the luminescence of the polar body crystals 9 can be directly dissipated by the substrate 8 to achieve a better dispersing effect. Miaoer ^^ L _ Sealing of the mounting structure "'; and' 5th The seal of the polar body is thirsty _ =: ^ Versatile 'It must first make an electrode guide hole 8 2 睥 on the surface of the substrate 8 and the process of returning to the heart, especially ^ its mother-groove 8 1 The electrode guide hole 1241040 must be carried out in stages, and it cannot be manufactured in batches, which makes the cost of production greatly futile. Furthermore, the two types of light-emitting diodes mentioned above are mainly light-emitting diodes, which are not suitable for arrays. ^ The structure is based on the modular structure of the above two types of light-emitting diode packaging structures that must be considered in the production of array-type light-emitting diodes. The encapsulation structure of the upper and the light-emitting diodes, regardless of It is a deficiency in structure and in appearance, which needs to be improved. [Summary of the Invention] Array Objective Γ is to solve the above problems and provide-a kind of == modular structure and its packaging method, its main system type, injection molding, etc. 4; =, then use molding to form perforations, and then choose a high guide plate for appliances The surface is formed with a predetermined circuit method, and the lower base is fixed to the surface of the lower substrate, so that the bottom surface of the upper substrate is respectively corresponding to the through holes of the grooves on the surface of the lower substrate. The contact electrodes of 2 patterns are connected and the bottom grains are fixed to each of the grooves of the upper substrate. The two through holes at the bottom of the side groove 1 are used to make the «Kojiji! 241040」 polar crystals. The two electrodes are electrically connected to the electrodes of the lower substrate, and then the layout of the electrical contact method is used to seal the upper substrate of each and every day of the day. The next day, the particles are emulsified and encapsulated. The next day, Yuancheng has a modular structure and The base material of the second base plate is a material with high thermal conductivity, and the second grain of light is fixed on the bottom of the groove of the upper base plate. The first purpose of ^ f and the second purpose is that the modular design can make many Hair ^ ^ Although the king of the body is arrayed and modularized, it is applied to light emitting diodes ^ grouping ^ products, such as products such as car lights, traffic signs and even LCD panels, and through the circuit layout pattern of the lower substrate Guide the electrode of the light-emitting diode to the periphery of the lower substrate to facilitate the production of external pins, which is convenient for the entire mold and the subsequent packaging of the product. The above and other purposes and advantages of this description are not difficult to follow. The detailed descriptions and the accompanying drawings can be used to obtain in-depth understanding. Of course, the present invention allows some differences in the arrangement of other parts, or the arrangement of other parts, but the selected embodiment is in this specification. , Explain, and show its structure in the drawings. U ,,, Tian [Embodiment]-Qingfen read Figure 1 to Figure 3, the figure shows the structure of the embodiment of the present invention, This is for illustration purposes only and is not restricted by this structure in patent applications. The invention relates to a modular structure of an array light-emitting diode and its 1241040 packaging method. The modular structure of the array light-emitting diode includes a lower substrate 2 and a substrate fixed on the surface of the lower substrate 2. An upper substrate 丄, wherein the upper substrate 1 has a certain high thermal conductivity, and a plurality of grooves 多数 arranged in an array are formed in the upper substrate 1. In this embodiment, the upper substrate 1 also has a plurality of grooves 4. The grooves 11 arranged in an array of X 4 have groove walls 丄 丄 2 inclined at a certain angle, so that the grooves are tapered and tapered to increase the reflection effect. Of course, the grooves The groove wall 1 1 2 of 1 1 can also be vertical or arc-shaped, and each of the grooves 丄 1 has a bottom 1 1 1, and each of the grooves i has a bottom 丄 1 成形 formed with two or more penetrations. The through hole 12 of the bottom 1 1 1 is provided with a conductive material i 4 in each of the through holes 12, and the bottom of each groove 丄 丄 is fixed with at least one light emitting diode crystal 4 Each crystal grain 4 of the light-emitting diode has two electrodes 4 丄 and 4 2 to protect the crystal of the light-emitting diode. 4 The grooves i and the lower substrate 2 of the upper substrate 1 are sealed in a non-oxidizing manner with a predetermined high thermal conductivity, and a predetermined circuit layout pattern 21 is formed on the surface of the lower substrate 2 as shown in FIG. 3 The circuit layout pattern 21 corresponds to each of the through holes corresponding to each of the grooves 上 of the upper substrate i, and the contact electrodes 2 i 2 are respectively formed to use each of the through hole working guide materials 1 and 4 respectively. The electrodes 4 and 4 2 of the light emitting diode 4 are in conduction, and the circuit layout pattern 2 1 is below: = a plurality of connecting portions 2 1 3 connected to the outside are formed, and the% 口 # 木 2 1 In addition, each of the contact electrodes 2 1 2 and each of the connecting portions 2 1241040 is a core material 2 1 4 of the nuclear material. In addition, the lower substrate 2 can be fabricated ^ in addition to the circuit layout pattern 21, and microelectronic components can also be placed 'For example, resistors, thermal sensing elements, and f diodes, etc., are used to improve the power of the overall modular control circuit. The packaging method of the modular structure of the inline light emitting diode, in this example, Taking each groove as an example, it includes the following: The crystal grains of the polar body are used as the upper substrate. I 性 i 、 In the second embodiment of this embodiment, as shown in Figure D, ι_ _ forming method, as shown in Figures 4 to 4, will be; =-piece (sub) monocrystalline wafer 13 is on top The substrate 1 and the wafer 13 are placed in a furnace tube, and a layer of thermally oxidized square hair is used to deposit a layer of two :) t: a layer of dioxide lithography process definition 2 10 9., The etching area of the surface and the bottom of the wafer 13 3 2, Ya ,! By the wet money engraving (BOE) or the dry protective layer 131, the protective layer 131 makes the remaining area 13 ^ bare 2 = non-orientation wet __, the etched area 41 3 2 is etched to A certain depth, so that most of the forming time is in an array. The inner surfaces of 3 with the same η are respectively formed into two; dagger [same, groove_good groove "and the through hole 12 :: H2, after that, the silicon wafer 1 which has already been ^ 1 is placed in the furnace tube 1241040. The surface of each of the grooves 1 and the through hole i 2 is thermally oxidized, and a layer of dioxygen cutting (or deposition-layer of nitrogen cutting) is grown as an electrical insulating layer 1 3 4. Fabrication of the substrate 1. The clothing is used as the lower substrate. It is made of a material with high thermal conductivity as the base material, and is formed on the surface of the lower substrate 2 by one of the screen printing method and the lithographic etching method. The circuit layout diagram f2l, in this embodiment, as shown in FIGS. 5 to 5C, a single-crystal silicon wafer 22 is selected as the base material of the lower substrate 2, and the single-crystal silicon wafer 22 is placed. Warm in the furnace tube to grow a layer of silicon dioxide (or deposit a layer of silicon nitride) on the surface and bottom of the single crystal wafer 2 2 by thermal oxidation, and use it as an electrical insulating layer 2 2 1 and reuse Deposition-layer metal | 2 process 1 is deposited on the surface of the single crystal silicon wafer 2 2 by evaporation (or sputtering) as the circuit layout pattern 2 The base layer 1 is used to define the circuit layout pattern 2 1 on the metal layer 2 1 丄 using a lithography process. The pre-etched area is then removed by etching to form a metal layer outside the area to form the surface of the lower substrate 2. A circuit layout pattern 21 having a contact electrode 2 1 2, a connecting portion 2 1 3 and a lead 2 1 4 is arranged. In addition, if microelectronic components required for a modular control circuit are fabricated on the surface of the lower substrate 2, You can use CMOs and related processes to make 'to achieve component integration and system integration. Upper and lower substrates are fixed ... It is to place the bottom surface of the upper substrate 1 on the surface of the lower substrate 2, such as As shown in FIGS. 2, 3 and 6, the penetrations 2 of the grooves 1 1 of the upper substrate 1 correspond to the contact electrodes 2 1 2 of the pen layout pattern 21 on the surface of the lower substrate 2 and make Each of the connection portions 213 of the circuit layout pattern 21 is exposed on the periphery of the upper substrate 1. After 11 1241040, the upper substrate 1 and the lower substrate 2 are fixed. In this embodiment, the upper substrate 1 is connected to the upper substrate 1 and The periphery of the lower substrate 2 contact, a circle of polymer material is coated by the above glue method Materials, such as epoxy and polyimide, or other

黏合材料3,例如UV膠,使該上基板丄與該下基板/2固J 在一起,並藉由該黏合材料3防止水氣入侵至該上基板 之凹槽1 1内。 固晶:其係將多數發光二極體之晶粒4分別固定於該 上基板1之各該凹槽! i的底部!丄丄上,並利用該凹样 底部1 1 1的二貫穿孔1 2,使該發光二極體之㈣ 的一电極4 1、42與该下基板2之電路佈局圖案2 1 的接觸電極2 1 2完成電性連接,在本實施例中,係在製 作上基板之步驟中,如第4E圖及第4F圖所示,芎上二 f1各該凹槽i i及貫穿孔i 2之表面完成電性絕緣層^ 3 4後,將數錫球(或是導電膠)等之導電材料丄4分別植 入各該凹槽1 1之各該貫穿孔丨2内,在本實 ,球為導電材料14,再將該上基Μ置於烤箱内加 使錫球之導電材料i 4軟化填滿於該貫穿“ 2内 =出該貫穿孔1 2之_,如第7圖所示,以供該上基板 1固定於下基板2及固定該發光二極體之晶粒4時, :觸該發光二極體之晶粒4的電極4丄與該電路佈局圖荦 1的接觸電極2 1 2 ’而完成該發光二極體之晶粒‘的 -電極4 1、42與該下基板2之電路佈局圖f 觸電極2 1 2的電性連接。 、接 封閉上基板之凹糟:其係以保護該發光二極體之晶粒 12 1241040 ί不党氧化的方式封閉該上基板1之各該凹槽11,在本 錢财’如第8圖所示,係在真空或是填充空氣以外的 狀恶下於該上基板i之表面固定蓋合—透光度良好之 =Γ板$例如’透明之玻璃板或壓克力板,以隔絕外界 ^兄丄達到保護該發光二極體之晶粒4不受氧化,並避免 …源儿度的散失,而且該保護板5對應該凹槽1 1之内面 I塗附螢光劑,以改變該發光二極體之晶粒4的發光顏 並且可以直接在该保護板5對應各該凹槽11之内面 卜,衣作处鏡’以增加聚光或是散光的效果;當然,封 I板之凹槽的方式並不限制於上述方式,如第9圖所 丁其心本發明封閉上基板之凹槽步驟之第二實施例,盆 ^以點膠之方式,將透明樹脂5 1分別填人各該凹槽I 、:同樣可達到保護該發光二極體之晶粒4不受氧化, 且為增加聚光效果’可將透明樹脂5丄之表面形 出之半圓體511。 本發明陣列式發光二極體之模組化結構及其封 可適用二電極位在不同侧之發光:/门 侧之發光二極體,其中,-π⑴ %極位在同 ,、r —包極位在不同側之發光二極 在固晶步驟中,係將發光二極體之晶粒4的底部電極 ==該凹槽11:貫穿孔12上’如第7圖所示,並與 Μ貝牙孔1 2内之導電材料i 4接觸導通,而該發光 體之晶粒4的頂部電極4 2則以-導線4 5連接另 :L1 2内之導電材料1 4,使該發光二極體之晶粒4二1 私極4 1、4 2與該下基板2之電路佈局圖案2丄的接 13 1241040 電極2 1 2完成電性連接。 而二電極位在同侧之發光二極體,在固晶步驟中,如 第1 0圖所示,係將發光二極體之晶粒4位在同侧之電極 41A、42A分別固定於該凹槽11二貫穿孔12上, 並與二貫穿孔1 2内之導電材料1 4接觸導通,如此一 來,即可使該發光二極體之晶粒4的二電極4 1A、42 A與該下基板2之電路佈局圖案2 1的接觸電極2 1 2完 成電性連接。當然,運用二電極位在同侧之發光二極體時,Φ 在固晶步驟中,如第1 1圖及第1 1A圖所示,可先將發 光二極體之晶粒4位在同側之電極位置’以導電材料分別 長出一極腳4 3、4 4,再將各該極腳4 3、4 4分別置 入該凹槽1 1之二貫穿孔1 2中,以供與該下基板2之電 路佈局圖案2 1的接觸電極2 1 2完成電性連接。 另外,二電極同位在另一侧之發光二極體,在固晶步 驟中,如第1 2圖所示,係將該發光二極體之晶粒4相對 具有二電極41B、42B之一面固定於該凹槽11之二鲁 貫穿孔1 2間,再將位在同侧之電極4 1 B、4 2 B分別 以導線4 5連接各貫穿孔1 2内之導電材料1 4,如此一 來,即可使該發光二極體之晶粒4的二電極41B、42 B與該下基板2之電路佈局圖案2 1的接觸電極2 1 2完 成電性連接。 在製作上基板之步驟中,係以(100)單晶矽晶片為基材 並以Κ0Η方式蝕刻蝕刻出之凹槽1 1,因此所蝕刻出凹槽 1 1的槽壁1 1 2具有5 4 · 7 4度傾斜角,其恰使該凹 14 1241040 槽1 1呈錐狀漸縮,可提供光線之反射角度,且在該凹槽 1 1的槽壁1 1 2鍍上一可反射之金屬層,大可提高該發 光二極體之發光亮度,當然以等向性石夕基材钱刻方式可置 作出圓弧型之凹槽,其同樣具有反射光線之效果。 前述實施例中係以每一凹槽設置一發光二極體之晶粒 為例,當然,該上基板内之各凹槽亦可設置二個以上具有 R、G、B不同發光顏色之發光二極體之晶粒,如第1 3 圖所示,而可供製作液晶面板之背光源。 由上述實施例說明可知,本發明陣列式發光二極體之 模組化結構及其封裝方法具下列之優點: 1 ·上、下基板係選用具南導熱性之材料為基材’且该發 光二極體之晶粒係固定於該上基板之凹槽底部,其發 光二極體發光時所產生之熱能,可由該上、下基板散 逸,而可提供較佳之散熱效果,使發光二極體之發光 效率提昇。 2·模組化之設計可將多數發光二極體呈陣列式排列並模 組化,以應用於發光二極體須模組化之產品,例如車 燈、交通號誌甚至液晶面板等之產品,且透過下基板 之電路佈局圖案將發光二極體之電極導引出至下基板 的周邊,以利於製作出對外之引腳,而更加方便整個 模組與產品的後續封裝。 3 ·在上、下基板之製程中,以單一矽晶片當作基材模板, 可搭配CMOS製程進行製作高密集度的模組化產品,以 及進行批量製造,大大的降低生產之成本。 15 1241040 4 ·因在上、下基板之製程中,利用蝕刻方式製作貫穿孔 及利用錫球回熔(或是填入導電膠)方式製作内部導體 連線,可減少製程的步驟與複雜性,進而可提高製程 良率並降低生產成本。 5 ·又因在上、下基板之製程中,以單一矽晶片當作基材 相:板^其相對於其他非金屬材料而§有較南的導熱性 質,且利用矽晶片當作基材模板,其與發光二極體的 材料機械性質接近,因此整個模組在使用過程中,可 減少因溫度效應導致元件產生的熱應力破壞現象。 6 ·在封閉上基板之凹槽的製程中,以一整片之玻璃可一 次封閉全部之凹槽,達到簡化製程之效果,且可利用 玻璃背面塗附螢光劑,以改變發光二極體之發光顏色。 以上所述實施例之揭示係用以說明本發明,並非用以 限制本發明,故舉凡數值之變更或等效元件之置換仍應隸 屬本發明之範®壽。 由以上詳細說明,可使熟知本項技藝者明暸本發明的 確可達成前述目的,實已符合專利法之規定,爰提出專利 申請。 【圖式簡單說明】 第1圖係本發明模組化結構之立體外觀圖 第2圖係本發明模組化結構之部份剖視圖 第3圖係本發明下基板之電路佈局圖案示意圖 第4圖係本發明製作上基板步驟之示意圖一 第4 A圖係本發明製作上基板步驟之示意圖二 16 1241040 第4 B圖係本發明製作上基板步驟之示意圖三 第4 C圖係本發明製作上基板步驟之示意圖四 第4 D圖係本發明製作上基板步驟之示意圖五 第4 E圖係本發明製作上基板步驟之示意圖六 第4 F圖係本發明製作上基板步驟之示意圖七 第5圖係本發明製作下基板步驟之示意圖一 第5 A圖係本發明製作下基板步驟之示意圖二 第5 B圖係本發明製作下基板步驟之示意圖三 第5 C圖係本發明製作下基板步驟之示意圖四 第6圖係本發明上、下基板固定之示意圖 第7圖係本發明固晶之示意圖 第8圖係本發明以保護板封閉凹槽之示意圖 第9圖係本發明封閉上基板凹槽第二實施例之示意圖 第1 0圖係本發明二電極位在同侧之發光二極體晶粒固晶 之示意圖 第11圖係本發明以導電材料作為發光二極體晶粒之極腳 之示意圖 第11A圖係第11圖之發光二極體晶粒之極腳與接觸電 極完成電性連接之示意圖 第1 2圖係本發明二電極位在另一同侧之發光二極體晶粒 固晶之不意圖 第1 3圖係本發明各凹槽分別設置三個發光二極體晶粒之 示意圖 第1 4圖係習用發光二極體之封裝結構之示意圖 17 1241040 弟1 5圖係習用另一 r ± ^ ^ 裡I九一極體之封裝結 【主要兀件符號】 不思圖 (習用部分) 發光二極體晶粒6 第一金屬電極層6 2 碗形反射板6 4 導線6 6 上層表面7 1 底層表面7 3 電極6 1 第二金屬電極層6 3 封裝樹脂層6 5 基板7 貫孔7 2 基板8 凹槽8 1 金屬電極8 1 1 月面電極層8 1 3 導線9 1 凹槽1 1 槽壁1 1 2 單晶石夕晶片1 3 蝕刻區域1 3 2 導電材料14 電路佈局圖案2 1 接觸電極2 1 2 導線2 1 4 電性絕緣層2 2 1 發光二極體之晶粒4 電極導引孔8 2 反光層8 1 2 發光二極體晶粒9 (本發明部分) 上基板1 底部1 1 1 貫穿孔1 2 蝕刻保護層131 電性絕緣層1 3 4 下基板2 金屬層211、211八 連接部2 1 3 曰曰秒晶片2 2 點合材料3 18 1241040 電極41、41A、41B 電極42、42A、42B 導線4 5 極腳4 3、4 4 保護板5 透明樹脂5 1 半圓體511 19Adhesive material 3, such as UV glue, keeps the upper substrate 丄 and the lower substrate / 2 fixed J together, and prevents moisture from entering the groove 11 of the upper substrate by the adhesive material 3. Solid crystal: it is to fix the crystal grains 4 of most light-emitting diodes to the grooves of the upper substrate 1 respectively! the bottom of i!丄 丄 and using the two through holes 12 of the bottom 1 1 1 of the concave sample to make one of the electrodes 4 1 and 42 of the ㈣ of the light-emitting diode and the contact electrode of the circuit layout pattern 2 1 of the lower substrate 2 2 1 2 Complete the electrical connection. In this embodiment, in the step of manufacturing the upper substrate, as shown in FIG. 4E and FIG. 4F, the surface of each of the grooves ii and the through holes i 2 on the top two f1 is shown. After the electrical insulation layer ^ 3 4 is completed, a conductive material 丄 4 such as a solder ball (or conductive glue) is implanted into each of the through holes 2 of the groove 1 1. In the actual case, the ball is The conductive material 14 is placed in the oven, and the conductive material i 4 of the solder ball is softened and filled in the through hole 2, and the through hole 12 is _, as shown in FIG. 7. When the upper substrate 1 is fixed to the lower substrate 2 and the crystal grain 4 of the light emitting diode is fixed, the electrode 4 丄 which touches the crystal grain 4 of the light emitting diode 4 and the contact electrode 2 1 of the circuit layout diagram 1 2 'and complete the crystal grains of the light-emitting diode'-the electrical layout of the electrodes 4 1, 42 and the lower substrate 2 f the electrical connection of the touch electrodes 2 1 2. system Protect the crystal grains 12 1241040 of the light-emitting diode. The grooves 11 of the upper substrate 1 are closed in an oxidation-free manner. In the cost-effective manner, as shown in FIG. 8, they are in a state other than vacuum or filled with air. The cover is fixed on the surface of the upper substrate i—a good light transmittance = Γ plate, such as a “transparent glass plate or an acrylic plate, so as to protect the outside of the light emitting diode and protect the crystal grains of the light-emitting diode. 4 is not oxidized, and avoids the loss of the source degree, and the protective plate 5 is coated with a fluorescent agent corresponding to the inner surface I of the groove 11 to change the luminous color of the crystal grain 4 of the light emitting diode and can Directly on the inner surface of the protective plate 5 corresponding to each of the grooves 11 and dress as a mirror to increase the effect of condensing or astigmatism; of course, the way of sealing the groove of the I plate is not limited to the above method, such as the first The second embodiment of the step of closing the groove of the upper substrate according to the present invention is shown in Fig. 9. In the method of potting, the transparent resin 51 is filled into each of the grooves I, respectively: the same can be achieved to protect the light. The crystal grains 4 of the diode are not oxidized, and the surface of the transparent resin 5 can be increased to increase the light collecting effect. Shaped semi-circular body 511. The modular structure of the array type light-emitting diode of the present invention and its seal are applicable to light-emitting diodes with two electrodes positioned on different sides: / gate-side light-emitting diodes, of which -π⑴% pole position At the same time, r — the light-emitting diodes whose poles are located on different sides in the solidifying step, the bottom electrode of the light-emitting diode's crystal grain 4 == the groove 11: on the through hole 12 'as in section 7 As shown in the figure, it is in contact with the conductive material i 4 in the M bayonet hole 12, and the top electrode 4 2 of the crystalline body 4 of the light emitter is connected with a -wire 4 5. Another: the conductive material 1 in L1 2 4. The grains of the light-emitting diode 421, the private electrodes 4, 1, 4 2 are connected to the circuit layout pattern 2 of the lower substrate 2, and the 13 1241040 electrode 2 1 2 is electrically connected. For the light-emitting diodes with the two electrodes on the same side, as shown in Fig. 10, the electrodes 41A and 42A with the crystal grains of the light-emitting diodes on the same side are respectively fixed to the electrodes. The groove 11 is on the two through-holes 12 and is in contact with the conductive material 14 in the two through-holes 12 to conduct electricity. In this way, the two electrodes 4 1A, 42 A of the light-emitting diode grains 4 and The contact electrodes 2 1 2 of the circuit layout pattern 21 of the lower substrate 2 are electrically connected. Of course, when using a light-emitting diode with two electrodes on the same side, as shown in Fig. 11 and Fig. 11A, in the solidification step, the crystal grains of the light-emitting diode can be firstly placed on the same side. The electrode positions on the side are respectively formed by a conductive pin 4 3, 4 4 with a conductive material, and then each of the polar pins 4 3, 4 4 is respectively inserted into the groove 11 2 through-hole 12 for supply. The contact electrodes 2 1 2 of the circuit layout pattern 21 of the lower substrate 2 are electrically connected. In addition, the two electrodes are co-located on the other side of the light-emitting diode. In the solid-fixing step, as shown in FIG. 12, the crystal grains 4 of the light-emitting diode are fixed relative to one surface of the two electrodes 41B and 42B. Between the two through holes 12 in the groove 11, the electrodes 4 1 B and 4 2 B on the same side are connected to the conductive material 14 in each through hole 12 by wires 4 5 respectively. That is, the two electrodes 41B and 42B of the crystal grain 4 of the light-emitting diode and the contact electrodes 2 1 2 of the circuit layout pattern 21 of the lower substrate 2 are electrically connected. In the step of manufacturing the upper substrate, the (100) single crystal silicon wafer is used as the base material and the etched groove 1 1 is etched in the K0Η manner. Therefore, the groove wall 1 1 of the etched groove 1 1 has 5 4 · 7 4 degree inclination angle, which just makes the recess 14 1241040 the groove 11 is tapered and tapered, which can provide the reflection angle of light, and the groove wall 1 1 2 of the groove 11 is plated with a reflective metal The layer can greatly improve the luminous brightness of the light-emitting diode. Of course, it can be made into an arc-shaped groove by means of an isotropic stone substrate, which also has the effect of reflecting light. In the foregoing embodiment, an example is provided in which each die is provided with a light emitting diode. Of course, each groove in the upper substrate may be provided with two or more light emitting diodes having different light emitting colors of R, G, and B. The crystal grains of the polar body are shown in Fig. 13 and can be used to make a backlight for a liquid crystal panel. It can be known from the above embodiments that the modular structure and packaging method of the array light-emitting diode of the present invention have the following advantages: 1. The upper and lower substrates are based on a material with thermal conductivity as the base material, and the luminescence The crystal grain of the diode is fixed on the bottom of the groove of the upper substrate, and the heat energy generated by the light emitting diode can be dissipated by the upper and lower substrates, which can provide better heat dissipation effect and make the light emitting diode The luminous efficiency is improved. 2 · Modular design can align and modularize most light-emitting diodes in arrays, which can be applied to products that require modularization of light-emitting diodes, such as products such as car lights, traffic signs, and even LCD panels. In addition, the electrodes of the light-emitting diodes are guided to the periphery of the lower substrate through the circuit layout pattern of the lower substrate, so as to facilitate the production of external pins, and further facilitate the subsequent packaging of the entire module and product. 3 · In the manufacturing process of the upper and lower substrates, a single silicon wafer is used as the substrate template, which can be used with the CMOS process to produce high-density modular products and batch manufacturing, which greatly reduces the production cost. 15 1241040 4 · Because in the manufacturing process of the upper and lower substrates, through-holes are made by etching and internal conductor connections are made by solder ball reflow (or filled with conductive adhesive), which can reduce the steps and complexity of the process. This can increase process yield and reduce production costs. 5 · Because in the process of the upper and lower substrates, a single silicon wafer is used as the substrate phase: the plate ^ has relatively southern thermal conductivity compared to other non-metallic materials, and uses the silicon wafer as a substrate template It is close to the mechanical properties of the material of the light-emitting diode, so the entire module can reduce the thermal stress damage caused by the temperature effect during the use of the module. 6 · In the process of closing the grooves of the upper substrate, a whole piece of glass can be used to close all the grooves at once, to achieve the effect of simplifying the process, and the back of the glass can be coated with a fluorescent agent to change the light-emitting diode. Its glowing color. The disclosure of the embodiments described above is intended to illustrate the present invention, and is not intended to limit the present invention. Therefore, any change in numerical values or replacement of equivalent components should still belong to the scope of the present invention. From the above detailed description, those skilled in the art can understand that the present invention can indeed achieve the aforementioned purpose, and it has indeed complied with the provisions of the Patent Law, and filed a patent application. [Schematic description] Figure 1 is a three-dimensional appearance of the modular structure of the present invention. Figure 2 is a partial cross-sectional view of the modular structure of the present invention. Figure 3 is a schematic diagram of the circuit layout pattern of the lower substrate of the present invention. It is a schematic diagram of the steps for making the upper substrate according to the present invention. FIG. 4 A is a schematic diagram of the steps for making the upper substrate according to the present invention. 16 1241040 FIG. 4 B is a schematic diagram of the steps for making the upper substrate according to the present invention. Schematic diagram of the steps IV. 4D is a schematic diagram of the steps of manufacturing the upper substrate of the present invention. 5) 4E of E is a schematic diagram of the steps of preparing the upper substrate of the present invention. 6: 4F is a schematic diagram of the steps of the present invention. Schematic diagram of the steps of making the lower substrate according to the present invention. FIG. 5A is a schematic diagram of the steps of making the lower substrate according to the present invention. FIG. 5B is a schematic diagram of the steps of making the lower substrate according to the present invention. Figure 4 is a schematic diagram of the fixing of the upper and lower substrates of the present invention. Figure 7 is a schematic diagram of the solid crystal of the present invention. Figure 8 is a schematic diagram of the groove closed by the protective plate of the present invention. Figure 9 is the present invention. Schematic diagram of the second embodiment of sealing the groove on the upper substrate. FIG. 10 is a schematic diagram of solid-state luminescent diode crystals with two electrodes on the same side of the present invention. FIG. 11 is a conductive material as luminescent diode crystals according to the present invention. Figure 11A is a schematic diagram of the light-emitting diode crystal pin and the contact electrode of Figure 11A to complete the electrical connection Figure 12A is a light-emitting diode with the two electrodes of the present invention on the same side The intent of solid-crystal grain solidification Figure 13 is a schematic diagram of three light-emitting diode grains in each groove of the present invention. Figure 14 is a schematic diagram of a conventional light-emitting diode package structure. 17 1241040 Brother 1 5 The picture shows the package junction of another nine-nine-diode I r [^] ^ [major component symbols] Unthinking (conventional part) Light-emitting diode grains 6 First metal electrode layer 6 2 Bowl-shaped reflector 6 4 Conductor 6 6 Upper surface 7 1 Lower surface 7 3 Electrode 6 1 Second metal electrode layer 6 3 Encapsulation resin layer 6 5 Substrate 7 Through hole 7 2 Substrate 8 Groove 8 1 Metal electrode 8 1 1 Moon electrode layer 8 1 3 Lead 9 1 Groove 1 1 Wall 1 1 2 Monocrystalline wafer 1 3 Etched area 1 3 2 Conductive Material 14 Circuit layout pattern 2 1 Contact electrode 2 1 2 Wire 2 1 4 Electrical insulating layer 2 2 1 Light emitting diode grain 4 Electrode guide hole 8 2 Reflective layer 8 1 2 Light emitting diode grain 9 ( Part of the present invention) Upper substrate 1 Bottom 1 1 1 Through-holes 1 2 Etching protective layer 131 Electrical insulating layer 1 3 4 Lower substrate 2 Metal layers 211, 211 Eight connecting portions 2 1 3 Said second wafer 2 2 Point bonding material 3 18 1241040 Electrode 41, 41A, 41B Electrode 42, 42A, 42B Lead 4 5 Pin 4 3, 4 4 Protective plate 5 Transparent resin 5 1 Semicircle 511 19

Claims (1)

Translated fromChinese
1241040 十、申請專利範圍: 1 ·一種陣列式發光二極體之模組化結構,該模組化結構 包含有一下基板以及一固定於該下基板之表面的上基 板,其中; 該上基板具有一定之南導熱性5該上基板中成形 有多數呈陣列式排列之凹槽,各該凹槽分別具有一底 部,各該凹槽之底部分別成形有二個以上貫穿該底部 之貫穿孔,各該凹槽之底部分別固定至少一發光二極 體之晶粒9各該發光二極體之晶粒分別具有二電極’ 並以保護該發光二極體之晶粒不受氧化的方式封閉該 上基板之各該凹槽; 該下基板具有一定之高導熱性,該下基板之表面 成形有預定之電路佈局圖案,該電路佈局圖案對應該 上基板之各該凹槽的各該貫穿孔分別成形有一接觸電 極,以利用各該貫穿孔與各該發光二極體之晶粒的電 極導通,且該電路佈局圖案在該下基板之周邊成形有 多數連接外部之連接部,而該電路佈局圖案於各該接 觸電極與各該連接部間分別形成有導通之導線。 2·依申請專利範圍第1項所述之陣列式發光二極體之模 組化結構,其中該上基板之各該凹槽分別具有傾斜一 定角度之槽壁,使該凹槽呈錐狀漸縮,可提供光線之 反射角度。 3·依申請專利範圍第2項所述之陣列式發光二極體之模 組化結構,其中該凹槽的槽壁鍍上一可反射之金屬層 20 1241040 ,以增加反射效果。 4·依申請專利範圍第1項所述之陣列式發光二極體之模 組化結構,其中該上基板之各該凹槽的底部分別固定 一發光二極體之晶粒,且各該凹槽的底部分別貫穿二 貫穿孔。 5·依申請專利範圍第4項所述之陣列式發光二極體之模 組化結構5其中談上基板之各該凹槽底部的各該貫穿 孔内分別設有一^導電材料’以供該發光二極體之晶粒 的電極與該電路佈局圖案之接觸電極相接觸導通。 6·依申請專利範圍第5項所述之陣列式發光二極體之模 組化結構,其中該發光二極體之晶粒的二電極分別位 在不同側,該發光二極體之晶粒的底部電極固定於該 凹槽一貫穿孔上,並與該貫穿孔内之導電材料接觸導 通,而該發光二極體之晶粒的頂部電極則以一導線連 接另一貫穿孔内之導電材料。 7 ·依申請專利範圍第5項所述之陣列式發光二極體之模 組化結構,其中該發光二極體之晶粒的二電極係位在 同一側,該發光二極體之晶粒位在同側之電極分別固 定於該凹槽二貫穿孔上,並與二貫穿孔内之導電材料 接觸導通。 8 ·依申請專利範圍第5項所述之陣列式發光二極體之模 組化結構5其中該發光二極體之晶粒的二電極係位在 同一側,該發光二極體之晶粒相對具有二電極之一面 固定於該凹槽之二貫穿孔間,再將位在同侧之電極分 21 1241040 別以導線連接各貫穿孔内之導電材料。 9·依申請專利範圍第1項所述之陣列式發光二極體之模 組化結構,其中該上基板之表面固定蓋合一透光度良 好之保護板,以封閉各該凹槽。 1 0 ·依申請專利範圍第9項所述之陣列式發光二極體之 模組化結構’其中該保護板係為一透明之玻璃板。 1 1 ·依申請專利範圍第9項所述之陣列式發光二極體之 模組化結構,其中該保護板係為一透明之壓克力板。 12·依申請專利範圍第1項所述之陣列式發光二極體之 模組化結構,其中該上基板之各該凹槽中分別填入透 明樹脂,以封閉各該凹槽。 13·—種陣列式發光二極體之模組化結構的封裝方法, 其包括下列步驟: 製作上基板:其係選用一具高導熱性之上基板為 基材,再利用模塑成型、射出成型與蝕刻成型等其中 之一方式,於該上基板中成形多數呈陣列式排列之凹 槽,並在各該凹槽之底部成形有二個以上的貫穿孔; 製作下基板:其係選用一具高導熱性之下基板為 基材,並以網板印刷方式與蝕刻方式等其中之一方式 ,在該下基板之表面成形預定之電路佈局圖案,該電 路佈局圖案成形有多數的接觸電極,且該電路佈局圖 案在該下基板之周邊成形有多數連接外部之連接部, 而該電路佈局圖案在各該接觸電極與各該連接部間分 別形成有導通之導線; 22 1241040 上、下基板固定:其係將該上基板之底面置於該 下基板之表面,使該上基板之各該凹槽的貫穿孔分別 對應該下基板表面之電路佈局圖案的接觸電極,並使 該電路佈局圖案的各該連接部外露於該上基板之周邊 ,之後,再將該上基板與該下基板固定; 固晶··其係將多數發光二極體之晶粒分別固定於 該上基板之各該凹槽的底部上,並利用該凹槽底部的 貫穿孔,使該發光二極體之晶粒的二電極與該下基板$ 之電路佈局圖案的接觸電極完成電性連接; 封閉上基板之凹槽:其係以保護該發光二極體之 晶粒不受氧化的方式封閉該上基板之各該凹槽,如此 即完成相:組化結構之封裝, 1 4 ·依申請專利範圍第1 3項所述之陣列式發光二極體 之模組化結構的封裝方法,其在製作上基板之步驟中 ,係以蝕刻成型方式,其先選用一片(100)單晶矽晶片 為上基板之基材,將該單晶矽晶片置於爐管内加溫,鲁 以在該單晶矽晶片的表面與底面分別形成一層蝕刻保 護層,再利用微影製程定義該單晶矽晶片的表面與底 面之凹槽及貫穿孔的蝕刻區域,並經由蝕刻的方式去 除蝕刻區域的保護層,使蝕刻區域裸露在外,再利用 非等向性濕蝕刻的方式,將蝕刻區域蝕刻至一定深度 ,以供在該單晶矽晶片内同時成形多數呈陣列式排列 之凹槽,並同時在各該凹槽之底面分別成形二貫穿孔 ,之後,再將已蝕刻好凹槽及貫穿孔之單晶矽晶片置 23 1241040 於爐管内加溫,以在各該凹槽及貫穿孔之表面形成一 層電性絕緣層,如此,即完成上基板之製作。 15·依申請專利範圍第14項所述之陣列式發光二極體 之模組化結構的封裝方法,其中,該單晶矽晶片的表 面與底面之姓刻保護層為一層二氧化石夕,而各該凹槽 及貫穿孔之表面形成之電性絕緣層為一層二氧化矽。 16·依申請專利範圍第14項所述之陣列式發光二極體 之模組化結構的封裝方法,其中,該單晶矽晶片的表 面與底面之姓刻保護層為一層氮化石夕,而各該凹槽及 貫穿孔之表面形成之電性絕緣層為一層氮化矽。 1 7 ·依申請專利範圍第1 3項所述之陣列式發光二極體 之模組化結構的封裝方法,其在製作上基板之步驟中 ,該上基板之各該凹槽底部的貫穿孔内分別植入一導 電材料,以供作為發光二極體之晶粒的電極與該下基 板之電路佈局圖案的接觸電極的電性連接。 18·依申請專利範圍第17項所述之陣列式發光二極體 之模組化結構的封裝方法,其中植入該貫穿孔内之導 電材料為一錫球,並以烤箱加溫,使錫球軟化填滿於 該貫穿孔内,並微凸出該貫穿孔之兩端,以分別接觸 該發光二極體之晶粒的電極與該電路佈局圖案的接觸 電極,而完成電性連接。 1 9 ·依申請專利範圍第1 3項所述之陣列式發光二極體 之模組化結構的封裝方法,其在製作下基板之步驟中 ’係選用一片早晶石夕晶片為下基板之基材5將該早晶 24 1241040 矽晶片置於爐管内加溫,以在該單晶矽晶片的表面與 底面分別形成一層電性絕緣層,再利用蒸鍍的方式於 該單晶矽晶片的表面沉積一層金屬層,以作為該電路 佈局圖案之基層,再利用微影製程於該金屬層上定義 出該電路佈局圖案預钱刻之區域,再經#刻方式去除 區域外之金屬層,以在該下基板之表面形成具有接觸 電極、連接部以及導線佈局之電路佈局圖案。 2 0 ·依申請專利範圍第1 9項所述之陣列式發光二極體 之模組化結構的封裝方法,其中,該單晶矽晶片的表 面與底面之電性絕緣層為一層二氧化石夕。 2 1 ·依申請專利範圍第1 9項所述之陣列式發光二極體 之核組化結構的封裝方法’其中’該早晶梦晶片的表 面與底面之電性絕緣層為一層氮化石夕。 2 2 ·依申請專利範圍第1 3項所述之陣列式發光二極體 之模組化結構的封裝方法’其在上、下基板固定之步 驟中,係在該上基板與該下基板接觸之周邊,以上膠 方式塗佈一圈高分子材料之黏合材料,使該上基板與 該下基板固定在一起。 2 3 ·依申請專利範圍第1 3項所述之陣列式發光二極體 之模組化結構的封裝方法,其在封閉上基板之步驟中 ,係在真空狀態下,於該上基板之表面固定蓋合一透 光度良好之保護板,以隔絕外界環境。 2 4 ·依申請專利範圍第2 3項所述之陣列式發光二極體 之模組化結構的封裝方法,其中該保護板對應各該凹 25 1241040 槽之内面及外面製作透鏡,以增加聚光或是散光的效 果。 2 之乾圍第13項所述之陣列式發光二極體 ,二裝方法,其在封閉瑜之步驟中 ,以隔絕外界環‘。將处明樹脂分別填入各該凹槽中 •依申睛專利範圍第 之模組化結構的封裂$I項所述之陣列式 發光二極體. 形成向上凸出之半圓體:以增力:聚=樹脂之表面 261241040 10. Scope of patent application: 1. A modular structure of an array type light emitting diode, the modular structure includes a lower substrate and an upper substrate fixed on the surface of the lower substrate, wherein the upper substrate has A certain south thermal conductivity 5 The upper substrate is formed with a plurality of grooves arranged in an array, each of the grooves has a bottom, and the bottom of each groove is respectively formed with two or more through holes penetrating the bottom, each The bottom of the groove is respectively fixed with at least one light-emitting diode crystal grain. 9 Each of the light-emitting diode crystal grains has two electrodes respectively, and the upper surface of the light-emitting diode crystal grains is protected from oxidation. Each of the grooves of the substrate; the lower substrate has a certain high thermal conductivity, a predetermined circuit layout pattern is formed on the surface of the lower substrate, and the circuit layout pattern is formed corresponding to each of the through holes of each of the grooves of the upper substrate A contact electrode is used to conduct conduction between each of the through holes and the electrodes of the crystal grains of the light emitting diode, and the circuit layout pattern is formed on the periphery of the lower substrate with a plurality of connections to the outside. A connection portion, and the circuit layout pattern is formed with a conductive wire between each of the contact electrodes and each of the connection portions. 2. According to the modular structure of the array type light-emitting diode described in item 1 of the scope of the patent application, each of the grooves of the upper substrate has a groove wall inclined at a certain angle, so that the groove is tapered gradually. Shrink can provide the angle of reflection of light. 3. The modular structure of the array type light emitting diode according to item 2 of the scope of the patent application, wherein the groove wall of the groove is plated with a reflective metal layer 20 1241040 to increase the reflection effect. 4. The modular structure of the array light-emitting diode according to item 1 of the scope of the patent application, wherein the bottom of each groove of the upper substrate is respectively fixed with a crystal grain of the light-emitting diode, and each of the concaves The bottom of the slot penetrates two through holes respectively. 5. According to the modular structure of the array type light emitting diode described in item 4 of the scope of the patent application, 5 a conductive material is provided in each of the through holes at the bottom of each of the grooves of the substrate for the The electrode of the crystal grain of the light-emitting diode is in contact with the contact electrode of the circuit layout pattern and is conducted. 6. The modular structure of the array light-emitting diode according to item 5 of the scope of the patent application, wherein the two electrodes of the crystal grains of the light-emitting diode are located on different sides, and the crystal grains of the light-emitting diode The bottom electrode of the light emitting diode is fixed on a through hole of the groove, and is in contact with the conductive material in the through hole, and the top electrode of the light emitting diode chip is connected to the conductive material in the other through hole by a wire. 7 · The modular structure of the array type light emitting diode according to item 5 of the scope of the patent application, wherein the two electrodes of the crystal grains of the light emitting diode are located on the same side, and the crystal grains of the light emitting diode are The electrodes located on the same side are respectively fixed to the two through holes of the groove, and are in contact with and conductive with the conductive material in the two through holes. 8 · Modular structure of the array light-emitting diode according to item 5 of the scope of the patent application 5 wherein the two electrodes of the crystal grains of the light-emitting diode are on the same side, and the crystal grains of the light-emitting diode Opposite one of the two electrodes is fixed between the two through holes of the groove, and the electrodes on the same side are divided into 21 1241040. Do not connect the conductive materials in the through holes with wires. 9. The modular structure of the array type light emitting diode according to item 1 of the scope of the patent application, wherein the surface of the upper substrate is fixedly covered with a protective plate with good light transmission to close each groove. 10 · The modular structure of the array type light emitting diode according to item 9 of the scope of the patent application, wherein the protective plate is a transparent glass plate. 1 1 · The modular structure of the array light-emitting diode according to item 9 of the scope of the patent application, wherein the protective plate is a transparent acrylic plate. 12. The modular structure of the array type light emitting diode according to item 1 of the scope of the patent application, wherein each of the grooves of the upper substrate is filled with a transparent resin to close each of the grooves. 13 · —A packaging method for a modular structure of an array type light-emitting diode, which includes the following steps: Fabricating an upper substrate: it uses an upper substrate with high thermal conductivity as the base material, and then uses molding and injection One of the methods, such as molding and etching, forms a plurality of grooves arranged in an array in the upper substrate, and two or more through holes are formed in the bottom of each groove; The lower substrate with high thermal conductivity is used as a base material, and a predetermined circuit layout pattern is formed on the surface of the lower substrate by one of a screen printing method and an etching method, and the circuit layout pattern is formed with a plurality of contact electrodes. And the circuit layout pattern is formed on the periphery of the lower substrate with a plurality of connection parts for connecting to the outside, and the circuit layout pattern is formed with conducting wires between each of the contact electrodes and each of the connection parts; 22 1241040 Upper and lower substrates are fixed : It is to place the bottom surface of the upper substrate on the surface of the lower substrate, so that the through holes of the grooves of the upper substrate correspond to the circuit cloth on the surface of the lower substrate, respectively. Contact electrode of the local pattern, and each connection part of the circuit layout pattern is exposed on the periphery of the upper substrate, and then the upper substrate is fixed to the lower substrate; The crystal grains are respectively fixed on the bottoms of the grooves of the upper substrate, and the through-holes at the bottom of the grooves are used to make the two electrodes of the crystal grains of the light-emitting diode and the circuit layout pattern of the lower substrate $. The contact electrode completes the electrical connection; closing the grooves of the upper substrate: it closes the grooves of the upper substrate in a way to protect the crystals of the light-emitting diode from oxidation, thus completing the phase: Packaging, 1 4 · The packaging method of the modular structure of the array type light-emitting diode described in item 13 of the scope of the patent application, in the step of manufacturing the upper substrate, the etching method is used. (100) A single crystal silicon wafer is used as the base material of the upper substrate. The single crystal silicon wafer is placed in a furnace tube to be heated, and a layer of etching protection is formed on the surface and the bottom surface of the single crystal silicon wafer respectively, and then the lithography is used. The process defines the monocrystalline silicon The etched areas of the grooves and through holes on the surface and bottom of the wafer, and the protective layer of the etched area is removed by etching, so that the etched area is exposed, and then the etched area is etched to a certain level by using anisotropic wet etching Depth for forming a plurality of grooves arranged in an array in the single crystal silicon wafer at the same time, and simultaneously forming two through holes on the bottom surface of each groove, and then etching the grooves and the through holes The single-crystal silicon wafer is placed in a 1241040 and heated in the furnace tube to form an electrical insulating layer on the surface of each of the grooves and the through holes. In this way, the production of the upper substrate is completed. 15. The packaging method of the modular structure of the array light-emitting diode according to item 14 of the scope of the patent application, wherein the protective layer engraved on the surface and the bottom surface of the single crystal silicon wafer is a layer of stone dioxide, The electrical insulating layer formed on the surface of each of the grooves and the through holes is a layer of silicon dioxide. 16. The packaging method of the modular structure of the array type light-emitting diode according to item 14 of the scope of the patent application, wherein the protective layer of the surface and bottom of the single-crystal silicon wafer is a layer of nitride, and The electrical insulating layer formed on the surface of each of the groove and the through hole is a layer of silicon nitride. 17 · The packaging method of the modular structure of the array light-emitting diode according to item 13 of the scope of the patent application, in the step of manufacturing the upper substrate, the through holes at the bottom of each groove of the upper substrate A conductive material is implanted therein for the electrical connection of the electrodes serving as the crystal grains of the light emitting diode and the contact electrodes of the circuit layout pattern of the lower substrate. 18. The packaging method of the modular structure of the array type light emitting diode according to item 17 of the scope of the patent application, wherein the conductive material implanted in the through hole is a tin ball, and the tin is heated in an oven to make the tin The ball is softened and filled in the through hole, and the two ends of the through hole are slightly protruded, so as to contact the electrode of the crystal grain of the light-emitting diode and the contact electrode of the circuit layout pattern respectively to complete the electrical connection. 19 · According to the packaging method of the modular structure of the array type light-emitting diode described in Item 13 of the scope of the patent application, in the step of manufacturing the lower substrate, 'a pre-crystal stone wafer is selected as the lower substrate. The substrate 5 puts the early-crystal 24 1241040 silicon wafer in a furnace tube to heat it, so as to form an electrical insulating layer on the surface and the bottom surface of the single-crystal silicon wafer, respectively, and then uses evaporation to deposit the single-crystal silicon wafer. A metal layer is deposited on the surface as the base layer of the circuit layout pattern, and then a lithographic process is used to define a pre-etched area of the circuit layout pattern on the metal layer, and then the metal layer outside the area is removed by #etching. A circuit layout pattern having contact electrodes, connection portions, and wire layouts is formed on the surface of the lower substrate. 20 · The packaging method of the modular structure of the array type light-emitting diode according to item 19 of the scope of the patent application, wherein the surface and the bottom of the single crystal silicon wafer are electrically insulated with a layer of dioxide Xi. 2 1 · Packaging method of the arrayed light emitting diode core structure according to item 19 of the patent application 'wherein' the electrical insulating layer on the surface and the bottom surface of the premature dream wafer is a layer of nitride . 2 2 · Packaging method of the modular structure of the array light-emitting diode according to item 13 of the scope of the patent application 'in the step of fixing the upper and lower substrates, the upper substrate is in contact with the lower substrate In the periphery, a circle of polymer material is coated with a glue method to fix the upper substrate and the lower substrate together. 2 3 · The packaging method of the modular structure of the array light-emitting diode according to item 13 of the scope of the patent application, in the step of sealing the upper substrate, in a vacuum state, on the surface of the upper substrate The fixed cover is combined with a protective plate with good light transmission to isolate the external environment. 2 4 · The packaging method of the modular structure of the array type light emitting diode described in item 23 of the scope of the patent application, wherein the protective plate corresponds to the inner surface and the outer surface of each recess 25 1241040 slot to make a lens to increase the concentration The effect of light or astigmatism. The array-type light-emitting diode described in item 2 of item 2 is a two-pack method, which is used in the step of closing the Yu to isolate the outer ring. Fill in the resin separately into each of the grooves. • The array-type light-emitting diode described in Item I of the modular structure in the patent scope of the patent application. Form a semicircular body protruding upward: to increase Force: Poly = resin surface 26
TW93128769A2004-09-222004-09-22Modulized structure of the array LED and its packaging methodTWI241040B (en)

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USD646015S1 (en)2009-11-202011-09-27Everlight Electronics Co., Ltd.Light emitting diode lamp
US8378358B2 (en)2009-02-182013-02-19Everlight Electronics Co., Ltd.Light emitting device
US8405105B2 (en)2009-02-182013-03-26Everlight Electronics Co., Ltd.Light emitting device
US8772802B2 (en)2009-02-182014-07-08Everlight Electronics Co., Ltd.Light emitting device with transparent plate
CN108735764A (en)*2017-04-182018-11-02金佶科技股份有限公司Image capturing module and manufacturing method thereof

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US10734435B2 (en)2017-04-182020-08-04Gingy Technology Inc.Image capturing module and manufacturing method thereof
TWI744893B (en)*2019-05-242021-11-01啟耀光電股份有限公司Electronic device and manufacturing method of the same
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Cited By (5)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
US8378358B2 (en)2009-02-182013-02-19Everlight Electronics Co., Ltd.Light emitting device
US8405105B2 (en)2009-02-182013-03-26Everlight Electronics Co., Ltd.Light emitting device
US8772802B2 (en)2009-02-182014-07-08Everlight Electronics Co., Ltd.Light emitting device with transparent plate
USD646015S1 (en)2009-11-202011-09-27Everlight Electronics Co., Ltd.Light emitting diode lamp
CN108735764A (en)*2017-04-182018-11-02金佶科技股份有限公司Image capturing module and manufacturing method thereof

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