201123538 六、發明說明： 【發明所屬之技術領域】 本發明係有關增益發光裝置的電注入效率和出光效率 的方法，尤指一種藉由在發光裝置上形成氧化鋅窗層，以 改善電流擁擠現象（current crowding phenomenon)，並增益 發光裝置的電注入效率和出光效率的方法。 【先前技術】 由於GaN和空氣間的折射率差異大，所以氮化鎵(GaN) 發光裝置的出光效率低。發射自氮化鎵基發光裝置中活性 層的光主要侷限在氮化錄基層。因此，氮化錄基發光裝置 内會發生嚴重的全反射和再吸收現象。由於(^^^晶體中的 受體（鎂，Mg)被活化的能力不佳’所以典型的p型GaN(3〇〇 至5000A厚）層具有電流傳導性低和電流擴散能力（current spreading ability)不佳的問題，可能造成電流擁擠現象。 基於GaN化合物的LED通常包含透明絕緣基板，亦即 藍寶石基板。藉由透明基板，活性層所發出的光可從基板 或LED相反端被利用，該透明基板即所謂的，，窗，％然而， 好的®層具有某些特性，包含良好傳導性與較低的光吸收 性。有鑒於上述特性，絕緣藍寶石基板並非為良好的窗層， 所以成長在藍寶石基板上的GaN基LED結構係為一水平裝 置。 LED產生的光直取決於發光區表面（發光區上部）的激 勵電流（energizing current)的分佈。電極間的電流傾向在電 3 201123538 極正下方的一特定路徑集中（電流傾向走最短路徑）。再 者’由於此特定路徑在不透明電極之下，會使得輸出光被 電極反射與再吸收現象，造成輸出光功率之損失，故改善 電極下方半導體材料之阻值即可減少此一現象之發生。 另一方面’導電透明材料氧化銦錫（IndiUm Tin Oxide， IT0)經研究並應用作為電流擴散層。如美國第5,481,122 號專利所揭示，ΙΤ0層取代GaP層，以作為電流擴散層。ιτο 層的透光係數在可見光範圍内約為90%。P型GaP的電阻係 數為N型ITO的100倍。然而，蕭特基接點（Schottky contact) 形成於IT0層與P型接面層之間。由於輸入功率消耗的緣 故，LED的光學表現因而降低。 歐洲第0434233號專利揭示一種增益亮度的發光二極 體，其半導體基板在發光用的AlGalnP活性P-N接合層的下 方。不同於AlGalnP，半導體透明窗層在活性層的上方，其 電阻係數低於活性層，且其能隙（bandgap)大於活性層，以 將透明窗層上方金屬電接點的電流擁擠最小化。晶格失配 的GaP層於是生成於活性層上，GaP的能隙大於活性層的能 隙，因而LED所發出的光可穿透。然後選擇性蝕刻掉GaAs 暫時性基板，GaP因而作為透明基板。透明窗層於活性層 上方蠢晶成長於先前與GaAs基板相鄰的表面上，作為電流 擴散層的晶格失配的GaP層，相對於發射自活性層的光是 透明的，因為其能隙大於活性層。由於進行元素重摻雜 (heavy elements doping)，致使此層材質的電阻係數低，因 此垂直流過裝置的電流在整個活性區域上橫向擴散。 201123538 這種配置的缺點在於當電流垂直流過晶圓時，電流擴 散層厚度須達50 μιη，以使電流充分均勻擴散。如此厚的塊 材半導體(bulk semiconductor material)層不易生成，其成本 昂貴且生長費時。LED應用於電子裝置的領域日趨擴大， 其生產成本勢必應降低。由於厚層中應力鬆弛 (strain-relaxation)，導致在晶格失配的AlGalnP與GaP晶體 介面（crystal interface)附近發生線差排（threading dislocations)和疊差（stacking faults)，因此高強度的LED可 鲁靠度低。 有鑑於上述問題，本發明遂提出解決之道，以增益發 光裝置的電注入效率以及出光效率。 【發明内容】 由於先前技藝受限於上述問題。本發明之目的為提供 一種藉由在發光裝置上形成具有光脫逃角的窗層的方法，' 以增益發光裝置的電注入效率和出光效率。 〆 根據本案之一觀點，增益發光裝置的電注入效率和出光 效率的方法，包括以下步驟：在發光裝置上提 佈設層上設置保護層、形成穿越保護層和佈設層=空ς 以 及在空腔中生成窗層。其中窗層的形狀可藉由調整氣氛的 NVH2濃度比、反應時間和反應溫度來控制，如此可改變* 層的光脫逃角。另-方面，亦可藉由濕㈣或乾㈣製程二 形成規則或不規則的圖樣，將窗層表面加以粗化，藉以 升發光二極體之輸出光效率。 201123538 根據本發明的構想，窗層包括N型氧化辞(n_Zn〇)或p 型氧化鋅(p-ZnO)。 根據本發明的構想，窗層藉由水熱處理、溶膠凝膠法、 電鍍、熱蒸鍍法、化學氣相沈積法（C VD)、或分子束磊晶 法（MBE)所形成。 根據本發明的構想，進一步包括藉由濕蝕刻製程或乾 蝕刻製程來蝕刻窗層的步驟，以形成粗糙表面。 根據本發明的構想，窗層的厚度大於1 μπι。 根據本發明的構想，佈設層包含n-AUItiyGa^.yN、 p-AlxInyGa卜x.yN、ITO、Ni/Au、NiO/Au、p-ZnO、或 n-ZnO， 其中 OSxSl、OSySl、0$ 1-x-yg 1。 根據本發明的構想，保護層包括光阻材料或介電材料。 根據本發明的構想，反應溫度高於2〇〇°C。 根據本發明的構想，氣氛包括氮、氫、或其混合氣氛。 根據本發明的構想，窗層的形狀為矩形稜柱狀或截角 錐狀。 根據本發明的構想，空腔藉由濕蝕刻製程、乾蝕刻製 程、或黃光微影和曝光顯影製程所形成。 根據本案之另一觀點，一種具有增益的電注入效率和出 光效率的發光裝置’包括：發光基板、提供在發光基板上 的佈设層、形成穿越佈設層的空腔、保護層、以及窗層。 窗層的形狀可藉由調整氣氛的N2/H2濃度比 、反應時間和反 應溫度來控制，如此可改變窗層的光脫逃角。另一方面，亦 可藉由濕兹刻或乾餘刻製程來形成規則或不規則的圖樣， 201123538 以粗化窗層的表面，藉以提升發光二極體之輪出光效率。 根據本發明的構想’窗層包括N型氧化辞(n_zn〇)或p 型氧化鋅(ρ-ZnO)。 根據本發明的構想，窗層藉由水熱處理、溶膠凝膠法、 電鑛、熱蒸鐘法、化學氣相沈積法（CVD)、或分子束磊晶 法(MBE)所形成。 根據本發明的構想，佈設層包括n-AlJiiyGa^yN、 p-AlJiiyGa^x-yN、ΙΤ0、Ni/Au、NiO/Au、p-ZnO、或 n-ZnO， ® 其中 0SxSl、0SySl、0S 1-x-yS 1。 根據本發明的構想，保護層包括光阻材料或介電材料。 根據本發明的構想，反應溫度高於200°C。 根據本發明的構想，氣氛包括氮、氫、或其混合氣氛。 根據本發明的構想，窗層具有藉由濕蝕刻製程或乾蝕 刻製程所形成的規則或不規則粗糙表面。。 根據本發明的構想，窗層為矩形稜柱狀或截角錐狀。 根據本發明的構想’窗層的厚度大於1 μηι。 根據本發明的構想，空腔藉由濕蝕刻製程、乾蝕刻製 程、或黃光微影和曝光顯影製程所形成。 【實施方式】 本發明將於下列的實施例中更具體的揭露。值得注 意的是，下列本發明實施例中之說明僅出於描述與圖示 之用’發明本身並不侷限於揭露的型態與式樣。 7 201123538 圖1係本發明較佳實施例的流程圖，繪示藉由在發光裝 置上形成具有可控制光脫逃角（light escape angie)的窗層， 以增益發光裝置的電注入效率和出光效率。圖2係本發明的 3D立體圖’繪示本發明各元件的相對位置。現請參照圖1 與圖2。本發明用以增益發光裝置的電注入效率和出光效率 的方法包含以下步驟。首先，提供發光裝置1〇2，其上形成 有表層104(如步驟S101)。在本實施例中，表層1〇4係由P型 GaN(p-GaN)所製成。然而，本發明之表層1〇4不限於 p-GaN，亦可由 p_AlxGai-xN、p-InxGa^xN、p-GaN/InxGabxN SLs 、p-AlxGa,.xN/GaN SLs 、p-AlJnyGa^^N 、 p-In^Aly^a^^.^N/In^Al^Ga^^.^N SLs 、 n+-AlxInyGa!.x.yN ' IT〇 > p-ZnO、ZnO、或Ni/Au所製成， 其中 OSx，xl, x2Sl、〇$y，yl，y2Sl、〇Sl -x-y $ 1、 OSl-xl-ylSl、0$l-x2-y2Sl。換句話說，表層 104不限 為P型或N型導電型。 本實施例的發光裝置10 2係氮化物發光二極體，其能隙 (energy band gap)相當於200 nm至 650 nm波長。 隨後在發光裝置102的表層104上提供佈設層106(如步 驟 S102)。佈設層 106 可由 n-AlxInyGai.x.yN 、 p-AlJiiyGabx.yN、ITO、Ni/Au、NiO/Au、p-ZnO、或 n-ZnO 製成，其中0$父$1、〇$丫$1、0$1-乂彳$1。 接下來，在佈設層106上設置保護層107(如步驟 S103)。請參照圖3，其繪示本發明之空腔的剖面圖。藉由 濕蝕刻、乾蝕刻、或黃光微影和曝光顯影製程，形成穿越 201123538 保護層107和佈設層i〇6的空腔ι〇9(如步驟S104)。當使用黃 光微影、曝光顯影製程、以及濕蝕刻或乾蝕刻製程時，保 護層107由光阻材料或介電材料製成。 窗層108形成於空腔1〇9中，如圖4所示。保護層107用 來將窗層108定位於空腔1〇9，以防止窗層108生成在空腔 109以外的地方。 窗層108的形狀可藉由調整氣氛的濃度、反應時間和反 應溫度來控制’如此可改變窗層1〇8的光脫逃角（light escape angle)’ 如步驟 S105 〜S106)。 窗層108形成後，蝕刻窗層ι〇8以形成規則（如圖6A)或 不規則（如圖6B)的粗糙表面，出光效率得以進一步增益（如 步驟S107)。在窗層1〇8蝕刻前，可使用光罩（未圖示）覆蓋 在窗層108上’以限制蝕刻面積。光罩可由光阻材料或介電 材料製成。光罩由黃光微影和曝光顯影製程所界定。其後， 窗層108藉由濕蝕刻或乾蝕刻製程來進行蝕刻。應理解的是 窗層108不限為粗糖表面。 窗層108可由N型氧化鋅（n-ZnO)或P型氧化鋅（p_ZnO) 製成。201123538 VI. Description of the Invention: [Technical Field] The present invention relates to a method for electrical injection efficiency and light extraction efficiency of a gain light-emitting device, and more particularly to a method for forming a zinc oxide window layer on a light-emitting device to improve current crowding (current crowding phenomenon), and a method of gaining electrical injection efficiency and light extraction efficiency of a light-emitting device. [Prior Art] Since the refractive index difference between GaN and air is large, the gallium nitride (GaN) light-emitting device has low light-emitting efficiency. The light emitted from the active layer in the gallium nitride based light-emitting device is mainly limited to the nitride substrate. Therefore, severe total reflection and re-absorption occurs in the nitride-based light-emitting device. The typical p-type GaN (3〇〇 to 5000A thick) layer has low current conductivity and current spreading ability due to the poor ability of the acceptor (magnesium, Mg) to be activated in the ^^^ crystal. The problem of poor performance may cause current crowding. LEDs based on GaN compounds usually comprise a transparent insulating substrate, that is, a sapphire substrate. With the transparent substrate, the light emitted by the active layer can be utilized from the opposite end of the substrate or the LED. Transparent substrate is so-called, window, % However, the good layer has certain properties, including good conductivity and low light absorption. In view of the above characteristics, the insulating sapphire substrate is not a good window layer, so it grows. The GaN-based LED structure on the sapphire substrate is a horizontal device. The light generated by the LED depends directly on the distribution of the energizing current on the surface of the light-emitting region (the upper portion of the light-emitting region). The current between the electrodes tends to be in the electricity 3 201123538 A specific path set directly below (current tends to go the shortest path). Again, because this particular path is below the opaque electrode, the output light is Electrode reflection and re-absorption phenomenon, resulting in loss of output optical power, so improving the resistance of the semiconductor material under the electrode can reduce this phenomenon. On the other hand, 'conductive transparent material Indium oxide tin (IndiUm Tin Oxide, IT0) It is studied and applied as a current diffusion layer. As disclosed in U.S. Patent No. 5,481,122, the ΙΤ0 layer replaces the GaP layer as a current diffusion layer. The transmission coefficient of the ιτο layer is about 90% in the visible range. The resistivity of the P-type GaP It is 100 times that of N-type ITO. However, the Schottky contact is formed between the IT0 layer and the P-type junction layer. Due to the input power consumption, the optical performance of the LED is thus reduced. European No. 0432233 The patent discloses a light-emitting diode of gain brightness, the semiconductor substrate is below the AlGalnP active PN junction layer for light emission. Unlike AlGalnP, the semiconductor transparent window layer has a lower resistivity than the active layer above the active layer, and The bandgap is larger than the active layer to minimize current crowding of the metal contacts above the transparent window layer. The lattice mismatched GaP layer is then generated On the active layer, the energy gap of GaP is larger than the energy gap of the active layer, so that the light emitted by the LED can be penetrated. Then, the GaAs temporary substrate is selectively etched, and GaP is thus used as a transparent substrate. The transparent window layer is above the active layer. Growing on the surface previously adjacent to the GaAs substrate, the lattice mismatched GaP layer as the current diffusion layer is transparent with respect to the light emitted from the active layer because its energy gap is larger than that of the active layer. The heavy elements doping cause the material of this layer to have a low resistivity, so that the current flowing vertically through the device spreads laterally across the active area. 201123538 The disadvantage of this configuration is that when the current flows vertically through the wafer, the current diffusion layer must be 50 μm thick to allow the current to spread evenly. Such a thick bulk semiconductor material layer is not easily formed, which is expensive and time consuming to grow. The field of LED application in electronic devices is expanding, and its production cost is bound to decrease. High-strength LEDs occur due to strain-relaxation in thick layers, resulting in threading dislocations and stacking faults near the lattice mismatched AlGalnP and GaP crystal interfaces. Low reliability. In view of the above problems, the present invention proposes a solution to the electrical injection efficiency and light extraction efficiency of the gain light-emitting device. SUMMARY OF THE INVENTION The prior art is limited by the above problems. SUMMARY OF THE INVENTION An object of the present invention is to provide a method of forming a window layer having a light escape angle on a light-emitting device, which is an electric injection efficiency and a light-emitting efficiency of the gain light-emitting device. According to one aspect of the present invention, a method of gaining electrical injection efficiency and light extraction efficiency of a light-emitting device includes the steps of: providing a protective layer on the wiring layer on the light-emitting device, forming a crossing protective layer and a layout layer = open space, and in the cavity Generate a window layer. The shape of the window layer can be controlled by adjusting the NVH2 concentration ratio of the atmosphere, the reaction time, and the reaction temperature, so that the light escape angle of the * layer can be changed. On the other hand, the surface of the window layer can be roughened by forming a regular or irregular pattern by wet (four) or dry (four) process 2, thereby increasing the output light efficiency of the light-emitting diode. 201123538 In accordance with the teachings of the present invention, the window layer comprises N-type oxidized (n_Zn〇) or p-type zinc oxide (p-ZnO). According to the concept of the present invention, the window layer is formed by hydrothermal treatment, sol-gel method, electroplating, thermal evaporation, chemical vapor deposition (C VD), or molecular beam epitaxy (MBE). According to the inventive concept, the step of etching the window layer by a wet etching process or a dry etching process is further included to form a rough surface. According to the concept of the invention, the thickness of the window layer is greater than 1 μm. According to the concept of the present invention, the layout layer comprises n-AUItiyGa^.yN, p-AlxInyGabx.yN, ITO, Ni/Au, NiO/Au, p-ZnO, or n-ZnO, wherein OSxSl, OSySl, 0$ 1-x-yg 1. According to the concept of the invention, the protective layer comprises a photoresist material or a dielectric material. According to the concept of the invention, the reaction temperature is above 2 °C. According to the concept of the present invention, the atmosphere includes nitrogen, hydrogen, or a mixed atmosphere thereof. According to the concept of the invention, the shape of the window layer is a rectangular prism or a truncated cone. In accordance with the teachings of the present invention, the cavity is formed by a wet etch process, a dry etch process, or a yellow lithography and exposure development process. According to another aspect of the present disclosure, a light-emitting device having a power injection efficiency and a light-emitting efficiency of a gain includes: a light-emitting substrate, a wiring layer provided on the light-emitting substrate, a cavity forming a traversing layer, a protective layer, and a window layer . The shape of the window layer can be controlled by adjusting the N2/H2 concentration ratio of the atmosphere, the reaction time, and the reaction temperature, thus changing the light escape angle of the window layer. On the other hand, it is also possible to form a regular or irregular pattern by wet etching or dry etching, and 201123538 to roughen the surface of the window layer, thereby improving the light-emitting efficiency of the light-emitting diode. The window layer according to the present invention includes an N-type oxidized word (n_zn〇) or a p-type zinc oxide (ρ-ZnO). In accordance with the teachings of the present invention, the window layer is formed by hydrothermal treatment, sol-gel method, electrowinning, hot steaming, chemical vapor deposition (CVD), or molecular beam epitaxy (MBE). According to the concept of the present invention, the layout layer includes n-AlJiiyGa^yN, p-AlJiiyGa^x-yN, ΙΤ0, Ni/Au, NiO/Au, p-ZnO, or n-ZnO, where 0SxSl, 0SySl, 0S 1 -x-yS 1. According to the concept of the invention, the protective layer comprises a photoresist material or a dielectric material. According to the concept of the invention, the reaction temperature is above 200 °C. According to the concept of the present invention, the atmosphere includes nitrogen, hydrogen, or a mixed atmosphere thereof. In accordance with the teachings of the present invention, the window layer has a regular or irregularly rough surface formed by a wet etch process or a dry etch process. . According to the concept of the invention, the window layer is rectangular prismatic or truncated pyramidal. According to the concept of the invention, the thickness of the window layer is greater than 1 μηι. In accordance with the teachings of the present invention, the cavity is formed by a wet etch process, a dry etch process, or a yellow lithography and exposure development process. [Embodiment] The present invention will be more specifically disclosed in the following examples. It is to be noted that the following description of the embodiments of the invention is merely for the purposes of illustration and description. 7 201123538 FIG. 1 is a flow chart showing a preferred embodiment of the present invention, showing the electrical injection efficiency and light-emitting efficiency of the light-emitting device by forming a window layer having a controllable light escape angie on the light-emitting device. . Figure 2 is a 3D perspective view of the present invention showing the relative positions of the various elements of the present invention. Please refer to Figure 1 and Figure 2 now. The method of the present invention for accelerating the electrical injection efficiency and light extraction efficiency of the light-emitting device comprises the following steps. First, a light-emitting device 1 2 is provided on which a surface layer 104 is formed (step S101). In the present embodiment, the surface layer 1〇4 is made of P-type GaN (p-GaN). However, the surface layer 1〇4 of the present invention is not limited to p-GaN, and may be composed of p_AlxGai-xN, p-InxGa^xN, p-GaN/InxGabxN SLs, p-AlxGa, .xN/GaN SLs, p-AlJnyGa^^N. , p-In^Aly^a^^.^N/In^Al^Ga^^.^N SLs , n+-AlxInyGa!.x.yN ' IT〇> p-ZnO, ZnO, or Ni/Au Made, where OSx, xl, x2Sl, 〇$y, yl, y2Sl, 〇Sl -xy $1, OSl-xl-ylSl, 0$l-x2-y2Sl. In other words, the surface layer 104 is not limited to a P-type or N-type conductivity type. The light-emitting device 10 2 of the present embodiment is a nitride light-emitting diode whose energy band gap corresponds to a wavelength of 200 nm to 650 nm. A routing layer 106 is then provided on the surface layer 104 of the illumination device 102 (e.g., step S102). The routing layer 106 can be made of n-AlxInyGai.x.yN, p-AlJiiyGabx.yN, ITO, Ni/Au, NiO/Au, p-ZnO, or n-ZnO, where 0$parent$1, 〇$丫$1 0$1-乂彳$1. Next, a protective layer 107 is provided on the wiring layer 106 (step S103). Referring to Figure 3, a cross-sectional view of the cavity of the present invention is illustrated. The cavity ι 9 passing through the 201123538 protective layer 107 and the wiring layer i 〇 6 is formed by wet etching, dry etching, or yellow lithography and exposure development processing (step S104). When a yellow lithography, an exposure developing process, and a wet etching or dry etching process are used, the protective layer 107 is made of a photoresist material or a dielectric material. A window layer 108 is formed in the cavity 1〇9 as shown in FIG. A protective layer 107 is used to position the window layer 108 in the cavity 1〇9 to prevent the window layer 108 from being generated outside of the cavity 109. The shape of the window layer 108 can be controlled by adjusting the concentration of the atmosphere, the reaction time, and the reaction temperature so that the light escape angle of the window layer 1 8 can be changed as in steps S105 to S106. After the window layer 108 is formed, the window layer ι 8 is etched to form a rough surface of a regular (Fig. 6A) or irregular (Fig. 6B), and the light extraction efficiency is further increased (e.g., step S107). Before the window layer 1 〇 8 is etched, a mask (not shown) may be used to cover the window layer 108 to limit the etching area. The photomask can be made of a photoresist material or a dielectric material. The mask is defined by a yellow lithography and exposure development process. Thereafter, the window layer 108 is etched by a wet etching or dry etching process. It should be understood that the window layer 108 is not limited to a rough sugar surface. The window layer 108 may be made of N-type zinc oxide (n-ZnO) or P-type zinc oxide (p_ZnO).
如前所述’由於GaN和空氣間的折射率差異大，所以 GaN發光裝置的出光效率低。當GaN層過厚時，發射自GaN 發光裝置中活性層的光主要侷限在GaN層，會發生嚴重的 全反射和光再吸收（opticalre-absorption)。然而，薄的GaN 層具有電流傳導性低和電流擴散能力不佳的問題，可能造 成電流擁擠現象。 201123538 由於Zn〇和GaN具有相近的晶格常數（lattice constant) ’且其晶格常數失配少於2%，所以Zn〇窗層可替 代GaN層。換句話說，本發明的Zn〇窗層可克服厚Ga^層不 易生成問題或生長成本高昂，以及薄GaN層所造成的電流 擁擠現象。 在本實施例中，窗層108藉由水熱處理所形成。首先， 具有空腔形成其中的發光裝置分別以丙酮、甲醇、去離子 水清洗約5分鐘。然後以氮氣喷槍將發光裝置吹乾。接著， ZnO的晶種層形成於空腔，以增加附著力。As described above, since the difference in refractive index between GaN and air is large, the light-emitting efficiency of the GaN light-emitting device is low. When the GaN layer is too thick, light emitted from the active layer in the GaN light-emitting device is mainly confined to the GaN layer, and severe total reflection and optical re-absorption occur. However, a thin GaN layer has a problem of low current conductivity and poor current spreading capability, which may cause current crowding. 201123538 Since Zn〇 and GaN have similar lattice constants and their lattice constant mismatch is less than 2%, the Zn germanium window layer can replace the GaN layer. In other words, the Zn germanium window layer of the present invention can overcome the problem that the thick Ga layer is not easily generated or the growth cost is high, and the current crowding caused by the thin GaN layer. In the present embodiment, the window layer 108 is formed by hydrothermal treatment. First, the light-emitting device having the cavity formed therein was washed with acetone, methanol, and deionized water for about 5 minutes, respectively. The luminaire was then blown dry with a nitrogen spar. Next, a seed layer of ZnO is formed in the cavity to increase adhesion.
ZnO的晶種層係將醋酸鋅（Ζη((：Η3(：〇〇)2·Η2〇，“沉 acetate)溶解於乙二醇甲醚（CH3〇(CH2)2〇h， 2-methoxyethanol)配製而成，兩者濃度為〇 5M，接著在加 熱溫度達65°C時攪拌其混合溶液兩小時，以取得透明膠狀 溶液。隨後將透明膠狀溶液旋轉塗佈於發光裝置的上表 面。下一步’在溫度13〇。(：時，將其上佈有透明膠狀溶液的 發光裝置進行60分鐘的熱退火(thermal annealing)，以取得 氧化鋅晶種層。在本實施例中，ZnO晶種層作為ZnO粒子 來生成ZnO層。 晶種層不限於由ZnO製成，亦可由金（Au)、銀（Ag)、 錫（Sn)、或始(Co)製成。 晶種層形成後，將發光裝置的面朝下，置於純度99.5% 的六亞甲四胺（C6Hi2N4，HMT, hexamethylenetetramine)與 98% 的純度的硝酸鋅（Ζη(Ν03)2·6Η20，zinc nitrate hexahydrate)的生長溶液中，兩者濃度為0.5M。之後在烘乾 201123538 機中以低溫90°C加熱約3小時。加熱後，將之取出以去離子 水清洗。如此可獲得具有複數個柱體的ZnO層。ZnO柱體的 高度、生長速率、尺寸可由調整溫度、濃度和生長時間來 控制。 進行水熱處理時，ZnO的形成係依據下列分子式：The seed layer of ZnO dissolves zinc acetate (Ζη((Η〇〇2(:〇〇)2·Η2〇, “sink acetate) in ethylene glycol methyl ether (CH3〇(CH2)2〇h, 2-methoxyethanol) It was prepared to have a concentration of 〇5M, and then the mixed solution was stirred for two hours at a heating temperature of 65 ° C to obtain a transparent colloidal solution. Then, a transparent colloidal solution was spin-coated on the upper surface of the light-emitting device. Next, 'at a temperature of 13 〇. (:, a light-emitting device having a transparent colloidal solution thereon was subjected to thermal annealing for 60 minutes to obtain a zinc oxide seed layer. In the present embodiment, ZnO The seed layer forms a ZnO layer as ZnO particles. The seed layer is not limited to being made of ZnO, and may be made of gold (Au), silver (Ag), tin (Sn), or Si (Co). Thereafter, the illuminating device was placed face down, and placed in a purity of 99.5% of hexamethylenetetramine (C6Hi2N4, HMT, hexamethylenetetramine) and 98% pure zinc nitrate (Ζη(Ν03)2·6Η20, zinc nitrate hexahydrate). In the growth solution, the concentration of both is 0.5M, and then heated at a low temperature of 90 ° C for about 3 hours in the drying 201123538 machine. After heating, it is taken out and washed with deionized water. Thus, a ZnO layer having a plurality of columns can be obtained. The height, growth rate, and size of the ZnO column can be controlled by adjusting temperature, concentration, and growth time. The formation of ZnO is based on the following molecular formula:
Zn2+ + 20『—Zn(OH)2 Zn(OH)2 A ZnO + H20. 在上述沉積機制中，一旦鋅離子（zinc ions)和氫氧離子 (hydroxide ions)的濃度飽和時，ZnO開始形成於晶種層 上。由於原子鍵合（atomic bonding)的異向性，原子依附 在核上成長時，會傾向游移至低能量處，造成了某一個 能量較低的方向堆疊在一特定方向上的非對稱性成 長，也因此形成柱/線形陣列結構。 本實施例係採用水熱處理，然本發明不限於使用水熱 處理法，亦可採用熱蒸鐘法（thermal evaporation)、溶膠凝 膠法（sol-gel method)、化學氣相沈積法（chemical vapor deposition，CVD)、或分子束蟲晶法（molecular beam epitaxy， MBE)。 此外，本實施例雖以旋轉塗佈法（spin coating)來佈設 晶種層於GaN基板上，亦可利用浸潰塗佈（dip coating)、 蒸鍍（evaporation)、濺射（sputtering)、原子層沉積（atomic layer deposition)、電化學沉積（electrochemical deposition)、脈衝雷射沉積（pUise iaser deposition)、金屬 201123538 有機物化學氣相沉積（metal-organic chemical vapor deposition)、或熱退火(thermal annealing)等方式。 在本實施例中，氣氛包含氮、氫、或其混合氣氛。此 外，反應溫度高於200°C。 形成於空腔内晶種層上的ZnO柱體密度係由氣氛的濃 度所控制。當ZnO柱體密度逐漸增加時，複數個ZnO柱體會 開始鍵合（bonding)。在ZnO柱體緊密鍵合後，反應溫度隨 之提高，以至於ZnO柱體間的化學鍵合（chemical bonding) 受到破壞，因而形成連續的ZnO層（即為窗層）。 · 圖7係發光裝置上之窗層的示意圖。如上所述，本實施 例的表層104雖由p_GaN所製成，然並不限於此，亦可由 p-A^Ga^xN ' p-I^Ga^xN > p-GaN/InxGa,.xN SLs ' p-AlxGa!.xN/GaN SLs 、 p-AlxInyGa,.x.yN 、 p-InxlAlylGai.xl.ylN/InX2Aly2Ga1.X2.y2N SLs 、 n+-AlxInyGa,.x.yN > ITO ' p-ZnO ' ZnO、或Ni/Au製成，其 中 OSx，xl，χ2$1、〇$y，yl，y2Sl、OSl-x-ySl、 1-xl-ylS 1、0$ l-x2-y2S 1。換句話說，表層 104不限· 為P型或N型導電型。 本實施例的窗層108形狀可為矩形棱柱狀（如圖4)或截 角錐狀（如圖5)，視空腔的形狀而定。窗層的形狀亦不限於 此’亦可呈現為六角錐狀或截頭六角錐狀。 光束根據窗層108的結構在一特定方向自發光裝置102 發射。換句話說，窗層呈截角錐狀的出光面積與出光機率 較矩形稜柱狀更好。實際上，截角錐狀窗層的出光面積比 12 201123538 矩形稜柱狀窗層至少好上10%以上。因此，發光裝置的光 脫逃角（light escape angle)可藉由改變窗層1〇8的形狀來加 以控制。再者，本發明的窗層不僅可改善出光，亦可提供 高電流傳導以及良好的電流擴散。 雖然本發明已以實施例揭露如上，然其並非用以限 定本發明。反之，任何所屬技術領域中具有通常知識 者，在不脫離本發明之精神和範圍内，當可作些許之更 動與潤飾’因此本發明之保護範圍當視後 攀範圍所界定者為準。 甲咕專利Zn2+ + 20『—Zn(OH)2 Zn(OH)2 A ZnO + H20. In the above deposition mechanism, once the concentration of zinc ions and hydroxide ions is saturated, ZnO begins to form. On the seed layer. Due to the anisotropy of atomic bonding, when atoms grow on the nucleus, they tend to migrate to low energy, causing a certain energy to grow in a direction of asymmetry in a particular direction. A column/linear array structure is thus also formed. This embodiment adopts hydrothermal treatment, but the invention is not limited to the use of hydrothermal treatment, but also thermal evaporation, sol-gel method, chemical vapor deposition (chemical vapor deposition). , CVD), or molecular beam epitaxy (MBE). Further, in the present embodiment, the seed layer is disposed on the GaN substrate by spin coating, and may be subjected to dip coating, evaporation, sputtering, or atom. Atomic layer deposition, electrochemical deposition, pUise iaser deposition, metal 201123538 metal-organic chemical vapor deposition, or thermal annealing the way. In the present embodiment, the atmosphere contains nitrogen, hydrogen, or a mixed atmosphere thereof. In addition, the reaction temperature is higher than 200 °C. The density of the ZnO pillars formed on the seed layer in the cavity is controlled by the concentration of the atmosphere. As the density of the ZnO pillars increases, a plurality of ZnO pillars begin to bond. After the ZnO pillars are tightly bonded, the reaction temperature is increased so that the chemical bonding between the ZnO cylinders is destroyed, thereby forming a continuous ZnO layer (i.e., a window layer). Figure 7 is a schematic illustration of a window layer on a light emitting device. As described above, although the surface layer 104 of the present embodiment is made of p_GaN, it is not limited thereto, and may be pA^Ga^xN ' pI^Ga^xN > p-GaN/InxGa, .xN SLs ' p- AlxGa!.xN/GaN SLs , p-AlxInyGa, .x.yN , p-InxlAlylGai.xl.ylN/InX2Aly2Ga1.X2.y2N SLs , n+-AlxInyGa,.x.yN > ITO ' p-ZnO ' ZnO, Or made of Ni/Au, where OSx, xl, χ2$1, 〇$y, yl, y2Sl, OSl-x-ySl, 1-xl-ylS 1, 0$ l-x2-y2S 1 . In other words, the surface layer 104 is not limited to a P-type or N-type conductivity type. The window layer 108 of the present embodiment may have a rectangular prism shape (as shown in Fig. 4) or a truncated cone shape (Fig. 5) depending on the shape of the cavity. The shape of the window layer is also not limited to this. It may also be a hexagonal cone or a truncated hexagonal cone. The light beam is emitted from the illumination device 102 in a particular direction depending on the structure of the window layer 108. In other words, the window layer has a truncated cone-shaped light-emitting area and a light-emitting probability better than a rectangular prism shape. In fact, the light-emitting area of the truncated cone window layer is at least 10% better than the rectangular prismatic window layer of 12 201123538. Therefore, the light escape angle of the light-emitting device can be controlled by changing the shape of the window layer 1〇8. Furthermore, the window layer of the present invention not only improves light extraction, but also provides high current conduction and good current spreading. Although the present invention has been disclosed above by way of example, it is not intended to limit the invention. On the contrary, the scope of the present invention is defined by the scope of the invention, and the scope of the invention is defined by the scope of the invention. Hyperthyroidism patent
13 201123538 【圖式簡單說明】 圖1係本發明較佳實施例的流程圖。 圖2係本發明的3D立體圖。 圖3係本發明空腔的剖面圖。 圖4係圖2中A-A’截面的剖面圖，繪示形成於空腔的窗層。 圖5係截角錐狀窗層之剖面圖。 圖6A係規則粗糙表面窗層的示意圖。 圖6B係不規則粗糙表面窗層的示意圖。 圖7係發光裝置上本發明之窗層的標準示意圖。 · 【主要元件符號說明】 S101-S107 步驟 102 發光裝置 104 表層 106 佈設層 107 保護層 108 窗層 109 空腔 1413 201123538 BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a flow chart of a preferred embodiment of the present invention. Figure 2 is a 3D perspective view of the present invention. Figure 3 is a cross-sectional view of the cavity of the present invention. Figure 4 is a cross-sectional view taken along the line A-A' of Figure 2, showing the window layer formed in the cavity. Figure 5 is a cross-sectional view of a truncated pyramidal window layer. Figure 6A is a schematic illustration of a regular rough surface window layer. Figure 6B is a schematic illustration of an irregular rough surface window layer. Figure 7 is a schematic illustration of the standard of the window layer of the present invention on a light-emitting device. · [Main component symbol description] S101-S107 Step 102 Light-emitting device 104 Surface layer 106 Layout layer 107 Protective layer 108 Window layer 109 Cavity 14