200834977 九、發明說明： 【發明所屬之技術領域】 本發明係與發光二極體有關，特別是指一種具有高發 光政率之垂直式發光二極體的製作方法及其結構。 5【先前技術】 ^隨著半導體製程能力不斷的提升，以及高發光效率與 同売度的發光元件不斷為生活所需，發光二極體晶片已逐 漸走上舞臺，其中尤以倒裝式覆晶（flip_chip)封裝技術所 i成的电光一極管兼具有T%散熱性與高功率的優點，於是 W成為LED發光元件的主流，如第六圖所示即為以覆晶封裝 之一發光二極管1，其中LED晶片1〇結構與傳統的發光二 極體結構相同，但晶片模組化結構確不盡相同，由於所使 用的覆晶模組11以具有高散熱效果的熱沈晶片為基底，使 LED晶片10在高電流條件下驅動也不會有餘熱，所以晶片 15面積可以加大至lmmxlmm，進而操作於300至500mA之 大電流條件，而可達到一瓦的操作功率。 然由於LED晶片1〇的基底1〇〇材料普遍為絕緣材質， 需藉由N型及P型之雙電極1〇1、1〇2與下方覆晶模組u 之杯塾110倒裝接合，而光電效應所產生的光子為經由上 20方的基底100透出以發光，故部分光子不但在經過基底1〇〇 時受基底100材料吸收，並因在出光介面不斷發生介面反 射現象使更多的光子受基底觸材料吸收，因而降低光電 反應的發光效率；再者，為了使光電反應材料中上層N型 材料與下方之覆晶模組Η直接導通以形成歐姆接觸，需犧 4 200834977 牲LED晶片10中部分的光電反應材料，以作為金屬導通 路徑，因此造成LED晶片10之發光面積損失與電流不均 勻擴散，使目前以倒裝式覆晶技術生產的LED晶片其發光 效率有限，所以如何於具有降低熱阻的覆晶LED結構增加 5發光面積進而提升其發光效率，實為LED產品製造業者所 面臨的一大考驗。 【發明内容】 因此，本發明之主要目的乃在於提供一種高亮度之發 1〇光二極體及其製作方式，兼具有高散熱及高發光效率的優 為達成前揭目的，本發明所提供之一種垂直式發光二 極體係有以下之形成步驟： a·備製一基板，並於該基板上以半導體長晶方法形成一 15 半導體層； b·於該半導體層上製成一發光層，該發光層為一 N型摻 雜區、一活化區及一 P型摻雜區所構成，N型摻雜區與該 基板之間形成"未換雜區； c·於該發光層之P型摻雜區上形成一第一導電層； 20 d•將該第一導電層以覆晶接合技術接合於一散熱模組之 一第一金屬層，使相互電性導通； e·依序去除該基板及該未掺雜區； f·於該發光層之N型摻雜區上形成一第二導電層，因此 形成一發光晶片與該散熱模組所組成之該垂直式發光二極 5 200834977 且直式發光二極體可藉由該散熱模組之導熱材質而 回，熱性，更藉由去除不產生光電反應的該基板與該 5 、払^區’有效降低光子在該垂直式發光二極體内被吸收 、機^ 口而开》成咼受度且高散熱性的該垂直式發光二極 體。 【實施方式】 以下’兹配合若干圖式列舉一較佳實施例，用以對本 1〇發明之組成構件及功效作進一步說明，其中所用各圖式之 簡要說明如下·· 弟圖係本發明所提供最較佳實施例之該發光二極體 之結構不意圖； 第二圖係為上述最佳實施例所提供該散熱模組之結構 I5不意圖； 第三圖係為上述最佳實施例所提供該發光二極體與該 散熱模組之組合結構示意圖； 第四圖係為將第三圖中該發光二極體之基板及該N型 半導體層之未摻雜區去除後之結構示意圖； 20 第五圖係為本發明所提供最較佳實施例之製程最終結 構示意圖； 200834977 請參閱如第-圖所示，為本發明最較佳實施例所提供 之-發光二極體2〇，係依序疊置有—基板2ι、— N型半^ 體層22、一活化層23、一 P别车墓鱗a，4 層25,其中： p…體層^及一第-導電200834977 IX. DESCRIPTION OF THE INVENTION: TECHNICAL FIELD The present invention relates to a light-emitting diode, and more particularly to a method for fabricating a vertical light-emitting diode having a high light-emitting rate and a structure thereof. 5 [Prior Art] ^ With the continuous improvement of semiconductor process capability, and the high luminous efficiency and the same brightness of light-emitting components continue to meet the needs of life, LED chips have gradually stepped onto the stage, especially in flip-chip The electro-optical transistor formed by the flip-chip package technology has the advantages of T% heat dissipation and high power, so W becomes the mainstream of LED light-emitting components, as shown in the sixth figure, which is one of the flip-chip packages. The light-emitting diode 1 has the same structure as the conventional light-emitting diode structure, but the chip modular structure is different, because the flip-chip module 11 used has a heat sink chip with high heat dissipation effect. The substrate allows the LED chip 10 to be driven under high current conditions without any residual heat, so the area of the wafer 15 can be increased to 1 mm x 1 mm, and then operated under a large current condition of 300 to 500 mA, and an operating power of one watt can be achieved. However, since the substrate 1 〇〇 1 of the LED chip is generally made of an insulating material, the N-type and P-type double electrodes 1 〇 1 and 1 〇 2 are flip-chip bonded to the underlying flip chip module u. The photons generated by the photoelectric effect are transmitted through the substrate 20 of the upper 20 to emit light, so that some photons are absorbed by the substrate 100 not only when passing through the substrate 1 but also due to the continuous interface reflection phenomenon in the light emitting interface. The photons are absorbed by the substrate contact material, thereby reducing the luminous efficiency of the photoelectric reaction; in addition, in order to make the upper N-type material in the photoelectric reaction material directly connected to the underlying flip chip module to form an ohmic contact, it is necessary to sacrifice 4 200834977 A portion of the photoelectrically reactive material in the wafer 10 serves as a metal conduction path, thereby causing loss of light-emitting area of the LED wafer 10 and uneven diffusion of current, so that the LED chip currently produced by the flip-chip flip chip technology has limited luminous efficiency, so how It is a big test for LED product manufacturers to increase the luminous area of the flip-chip LED structure with reduced thermal resistance and increase its luminous efficiency. SUMMARY OF THE INVENTION Therefore, the main object of the present invention is to provide a high-brightness hair-emitting diode and a manufacturing method thereof, which have the advantages of high heat dissipation and high luminous efficiency, and are provided by the present invention. A vertical type light emitting diode system has the following forming steps: a. preparing a substrate, and forming a 15 semiconductor layer on the substrate by a semiconductor crystal growth method; b. forming a light emitting layer on the semiconductor layer, The luminescent layer is formed by an N-type doping region, an activation region and a P-type doping region, and an "unchanged region" is formed between the N-type doping region and the substrate; c. Forming a first conductive layer on the doped region; 20 d • bonding the first conductive layer to a first metal layer of a heat dissipation module by flip chip bonding technology to electrically conduct each other; e· sequentially removing The substrate and the undoped region; f· forming a second conductive layer on the N-type doped region of the light-emitting layer, thereby forming a vertical light-emitting diode 5 formed by the light-emitting chip and the heat dissipation module; And the direct light emitting diode can be guided by the heat dissipation module The heat material is returned, and the heat is further removed by removing the substrate that does not generate an electro-optical reaction and the 5, 払 ^ area effectively reducing the photon absorption in the vertical light-emitting diode body. The vertical light-emitting diode with high heat dissipation. [Embodiment] Hereinafter, a preferred embodiment will be described with reference to a plurality of drawings for further explaining the components and functions of the present invention, and a brief description of each of the drawings is as follows. The structure of the light-emitting diode of the most preferred embodiment is not intended; the second figure is not intended to provide the structure I5 of the heat-dissipating module; the third figure is the preferred embodiment described above. A schematic diagram of a combined structure of the light-emitting diode and the heat-dissipating module is provided; the fourth figure is a schematic structural view of the substrate of the light-emitting diode and the undoped region of the N-type semiconductor layer in the third figure; The fifth figure is a schematic diagram of the final structure of the process of the most preferred embodiment of the present invention; 200834977, as shown in the first embodiment, the light-emitting diode 2 is provided in the most preferred embodiment of the present invention, The substrate 2ι, the N-type half body layer 22, an activation layer 23, a P-car tomb scale a, and 4 layers 25 are stacked in sequence, wherein: p... body layer ^ and a first-conducting layer
Τ為監f ^、GaAs或料與半導體光電材 料有良好接合性的材質，以減少後續半導體材齡晶製程 的晶格缺陷。 該N型半導體層22可為⑽或細齡冑基底材料 以蠢晶製程於該基板21上，再以負型摻雜材料自上層表面 1〇才"隹开v成4 N型摻雜區22〇 ’使未摻雜該負型摻雜材料 之下層鄰近區域形成為一未摻雜區221。 該活化層23為選用自與該二半導體層22、24有良好 鍵結性及低能隙的半導體光電材料，如本實施例所提供之 InGaN材質，因此形成該二半導體層22、24之間的量子井， is使自該二半導體層22、24所躍遷之電子電洞容易於該活化 層23發生電子電洞結合反應而產生光子以發光。 該P型半導體層24為對應於該N型半導體層22之基 底材料以正型摻雜材料所形成，因此該N型掺雜區220、 該活化層23所形成之活化區，以及該P型半導體層24所 2〇形成之P型摻雜區則形成該發光二極體2〇主要之一發光層 200 〇 该第一導電層25係包含有一反射區250及與該P型半 導體層24相鄰之一傳導區251，皆可作為該P型半導體層 24之歐姆接觸區，藉以傳遞電場電位至該p型半導體層 7 200834977 24，該反射區250可為鋁、銀、鉑、鉻、鉬、鎢或金等具 良好導電性及反射性的金屬材質，以使光電反應所產生的 光子不會自該反射區250透出，而可朝該發光層2〇〇的方 向反射，該傳導區251可為ITO、Ru02、ZnO或NiO等與 5該P型半導體層24有良好接合性，且兼具良好導電性及可 透光性的透明電極所製成，因此降低光子被該傳導區251 所吸收。 另請參閱如第二圖所示為本發明所提供之一散熱模組 30 ’為以覆晶接合技術用來封裝該發光二極體20的封裝模 10組基座，具有一導熱層31、一第一及一第二金屬層32、33， 該導熱層31可為矽、銅、GaN、鉬或SiC等具有良好熱傳 導性的材料所製成，該二金屬層32、33可使用該反射區250 所適用之金屬材質，且透過該導熱層31相互電性導通，因 此若該導熱層31使用導電金屬材質則可直接電性連接該二 15金屬層32、33，或者可以蝕刻或鑽孔等加工方式製成導電 通道以電性連接該二金屬層32、33 ;因此當如第三圖所示 以超音波熱壓等接合方式將該發光二極體20之反射區250 表面與該第一金屬層32作覆晶接合，則該發光二極體20 之p型半導體層24可透過該第二金屬層33獲得光電反應 所茶的正向外加電場。 當經過上述模組化製程後，先將該發光二極體20之基 板21以研磨拋光、化學蝕刻或雷射剝離等方式去除，再將 遠N型半導體層22之未摻雜區221以反應性離子蝕刻方式 去除’第四圖參照，最後如第五圖所示於裸露的該發光層 8 200834977 200上以電鍍等薄膜製程方式形成具導電性之一第二導電 層26 ’藉以作為該發光層200之N型摻雜區220的有效歐 姆接觸因此形成一發光晶片與散熱模組30所組成之一垂 直式發光二極體2。 5 藉由以上所述的結構及製程方式，當外加電壓之高、 低電位分別作用於該垂直式發光二極體2外露之該第二金 屬層33及該第二導電層26，則使該發光層200之N型摻 雜區220及p型摻雜區獲得光電反應所需的外加電場，因 此可於該活化層23產生光子，並利用該反射區250將光子 !〇朝該N型摻雜區220之方向反射出去，故使該垂直式發光 二極體2可藉由該散熱模組30之導熱層31具有高散熱性， 更藉由該反射區250之反射特性以及去除不產生光電反應 的$亥基板21與該未推雜區221，有效降低光子在該垂直式 發光一極體2内被吸收的機會，因而形成高亮度且高散熱 15性的4垂直式發光二極體2;當然若為了更提升該垂直式發 光二極體2之有效發光面積，亦可將與該發光層2〇〇之N 型摻雜區220作歐姆接觸之該第二導電層％使用為透明導 電材質，同樣可發揮本發明之功效。 唯’以上所述者，僅為本發明之較佳可行實施例而已， 20故舉凡應用本發明說明書及申請專利範圍所為之等效結構 變化，理應包含在本發明之專利範圍内。 9 200834977 【圖式簡單說明】 第一圖係本發明所提供最較佳實施例之該發光二極體 之結構示意圖； 第二圖係為上述最佳實施例所提供該散熱模組之結構 示意圖； 1 第二圖係為上述最佳實施例所提供該發光二極體與該 散熱模組之組合結構示意圖； 第四圖係為將第三圖中該發光二極體之基板及該N型 半導體層之未摻雜區去除後之結構示意圖； 第五圖係為本發明所提供最較佳實施例之製程最終結 構示意圖； 第六圖係為習用以覆晶技術封裝之發光二極管之結構 示意圖。 200834977 【主要元件符號說明】 2垂直式發光二極體 20發光二極體 21基板 5 220 N型摻雜區 23活化層 25第一導電層 251傳導區 30散熱模組 ίο 32第一金屬層 200發光層 22 N型半導體層 221未摻雜區 24 P型半導體層 250反射區 26第二導電層 31導熱層 33第二金屬層 11Τ is a material that has good adhesion to GaAs, or GaAs or materials and semiconductor optoelectronic materials, to reduce the lattice defects of the subsequent semiconductor ageing process. The N-type semiconductor layer 22 may be a (10) or fine-grained ruthenium substrate material on the substrate 21, and then a negative-type doping material from the upper surface 1 〇 隹 v 成 成 4 4 N-doped regions 22〇' is formed as an undoped region 221 adjacent to the underlying region of the underlying dopant material. The active layer 23 is selected from a semiconductor optoelectronic material having a good bonding property and a low energy gap with the two semiconductor layers 22 and 24, such as the InGaN material provided in this embodiment, thereby forming between the two semiconductor layers 22 and 24. The quantum wells are such that electron holes that are transitioned from the two semiconductor layers 22 and 24 are easily subjected to electron hole bonding reaction in the active layer 23 to generate photons to emit light. The P-type semiconductor layer 24 is formed of a positive-type dopant material corresponding to the base material of the N-type semiconductor layer 22, and thus the N-type doping region 220, the activation region formed by the activation layer 23, and the P-type The P-type doped region formed by the semiconductor layer 24 forms the light-emitting diode 2, and the first conductive layer 25 includes a reflective region 250 and is associated with the P-type semiconductor layer 24. An adjacent conductive region 251 can serve as an ohmic contact region of the P-type semiconductor layer 24, thereby transmitting an electric field potential to the p-type semiconductor layer 7 200834977 24, and the reflective region 250 can be aluminum, silver, platinum, chromium, molybdenum. a metal material having good conductivity and reflectivity, such as tungsten or gold, so that photons generated by the photoelectric reaction are not transmitted from the reflective region 250, but can be reflected toward the light-emitting layer 2, and the conductive region 251 can be made of ITO, Ru02, ZnO, NiO or the like which has good adhesion to the P-type semiconductor layer 24, and has a good conductivity and a light transmissive transparent electrode, thereby reducing photons by the conduction region 251. Absorbed. In addition, as shown in the second figure, a heat dissipation module 30' provided by the present invention is a package mold 10 group base for packaging the light emitting diode 20 by a flip chip bonding technology, and has a heat conduction layer 31. a first and a second metal layer 32, 33, the heat conductive layer 31 may be made of a material having good thermal conductivity such as beryllium, copper, GaN, molybdenum or SiC, and the two metal layers 32, 33 may use the reflection The metal material of the region 250 is electrically connected to each other through the heat conducting layer 31. Therefore, if the conductive layer 31 is made of a conductive metal material, the two 15 metal layers 32, 33 may be directly electrically connected, or may be etched or drilled. The processing method is formed into a conductive path to electrically connect the two metal layers 32, 33; therefore, when the surface of the reflective region 250 of the light emitting diode 20 is bonded to the surface by ultrasonic bonding or the like as shown in FIG. When a metal layer 32 is flip-chip bonded, the p-type semiconductor layer 24 of the light-emitting diode 20 can pass through the second metal layer 33 to obtain a positive applied electric field of the photoelectrically reacted tea. After the above-mentioned modular process, the substrate 21 of the light-emitting diode 20 is first removed by grinding, chemical etching or laser stripping, and then the undoped region 221 of the far N-type semiconductor layer 22 is reacted. Ion etching method removes the 'fourth drawing reference, and finally, as shown in FIG. 5, a second conductive layer 26' having conductivity is formed on the bare light-emitting layer 8 200834977 200 by a thin film process such as electroplating. The effective ohmic contact of the N-type doped region 220 of the layer 200 thus forms a vertical light-emitting diode 2 of a light-emitting chip and a heat dissipation module 30. When the high and low potentials of the applied voltage are respectively applied to the second metal layer 33 and the second conductive layer 26 exposed by the vertical light-emitting diode 2, the structure and the processing method are as described above. The N-type doped region 220 and the p-type doped region of the light-emitting layer 200 obtain an applied electric field required for the photoelectric reaction, so that photons can be generated in the active layer 23, and the photonic region 〇 is mixed toward the N-type by the reflective region 250. The direction of the impurity region 220 is reflected out, so that the vertical light-emitting diode 2 can have high heat dissipation property through the heat conduction layer 31 of the heat dissipation module 30, and the reflection property of the reflection region 250 and the removal do not generate photoelectricity. The illuminating substrate 21 and the undoped region 221 effectively reduce the chance of photons being absorbed in the vertical illuminating body 2, thereby forming a 4-bright LED 2 with high brightness and high heat dissipation. Of course, if the effective light-emitting area of the vertical light-emitting diode 2 is further increased, the second conductive layer 5% in ohmic contact with the N-type doping region 220 of the light-emitting layer 2 can be used as a transparent conductive The material can also exert the effects of the present invention. It is to be understood that the above description is only a preferred embodiment of the invention, and that the equivalent structural changes of the present invention and the scope of the patent application are intended to be included in the scope of the invention. 9 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 1 is a schematic diagram of the combined structure of the light emitting diode and the heat dissipation module provided in the above preferred embodiment; the fourth figure is the substrate of the light emitting diode in the third figure and the N type The schematic diagram of the structure of the undoped region of the semiconductor layer is removed; the fifth diagram is a schematic diagram of the final structure of the process of the most preferred embodiment of the present invention; and the sixth diagram is a schematic diagram of the structure of the LED used in the flip chip technology package. . 200834977 [Main component symbol description] 2 vertical light-emitting diode 20 light-emitting diode 21 substrate 5 220 N-type doping region 23 active layer 25 first conductive layer 251 conductive region 30 heat dissipation module ίο 32 first metal layer 200 Light-emitting layer 22 N-type semiconductor layer 221 undoped region 24 P-type semiconductor layer 250 reflective region 26 second conductive layer 31 heat conductive layer 33 second metal layer 11