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TW200525605A - Tuned potential pedestal for mask etch processing apparatus - Google Patents

Tuned potential pedestal for mask etch processing apparatus
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Publication number
TW200525605A
TW200525605ATW093139448ATW93139448ATW200525605ATW 200525605 ATW200525605 ATW 200525605ATW 093139448 ATW093139448 ATW 093139448ATW 93139448 ATW93139448 ATW 93139448ATW 200525605 ATW200525605 ATW 200525605A
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TW
Taiwan
Prior art keywords
base
supporting
substrate
marking board
dielectric material
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TW093139448A
Other languages
Chinese (zh)
Inventor
Peter Satitpunwaycha
Khiem Nguyen
Alfred W Mak
Kenneth S Collins
Turgut Sahin
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Applied Materials Inc
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Publication date
Application filed by Applied Materials IncfiledCriticalApplied Materials Inc
Publication of TW200525605ApublicationCriticalpatent/TW200525605A/en

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Abstract

The present invention generally provides an improved pedestal for supporting a substrate. The pedestal has greatest application during a plasma etching process, such as for a quartz photomask, or "reticle". The pedestal defines a body, and a substrate support base along an upper surface of the body. The substrate support base has an outer edge, and an intermediate substrate support ridge for receiving and supporting the substrate. At least a portion of the substrate support base outside of the intermediate substrate support ridge is fabricated form a dielectric material. The purpose is to couple greater RF power through the reticle in order to enhance the plasma etching process.

Description

Translated fromChinese

ii ii200525605 玫、發明說明 【發明所屬之技術領域 本發明概有關.於積體電路製程。更明確而古, σ,本發明 係有關於用以製造一運用於半導體製造之 板」的裝置。 $襟線 【先前技術】 積體電路(1C)是藉由在一半導體基材之表面上構 離之半導體元件所製得。這種基材其一範例即為矽(s = 二氧化矽(Si〇2)晶圓。為互連該基材上之各元件,可^或 一種内連線結構之多層網路。可將材料按多層方式沉積成 該基材上,並依一序列的受控步驟將其選擇性地移除。 路密度增加對於用以製作半導體元件之製程產生額外的電 求。例如,隨著電路密度增加,各線道、接觸與其他特徵需 以及位於該等間之介電材料的寬度,就會降低至次微米維 度。然而,各介電層的厚度仍維持大致固定,因此會增加 各特徵之高深寬比,亦即該等高度除以寬度。高深寬比特 徵的可靠構形對於次微米技術的成功,以及對於增加電路 被度及個別基材及晶粒之品質的後續努力而言極為重要。 具所欲關鍵尺寸之高深寬比特徵可靠構形會要求精確 圖案製程及基材的後續蝕刻製程。一種常用以在基材上構 成精確圖案之技術即為微影蝕刻。該技術一般說來係涉及 光能量透過一透鏡、或「標線板」並導引至該基材上。在 一傳統微影蝕刻製程裡,會首先將一光阻材料施加於一待 3 200525605 予蝕刻之基材層上。在具光阻時,該阻障材料會對像是紫 外線或雷射源之光能量敏感。該阻障材料定義為一經調變 以回應於該光線之特定波長以及不同曝光源的聚合物。 在將該光阻沉積該基材上之後,會啟動該光源以發散 出例如紫外線(UV)光或低X光線,且被導向至該阻障覆蓋 之基材。該經選擇光源會化學地改變該光阻材料之組成成 分。然而,該光阻層僅被選擇性地曝露出。在此雜樣中, 一光罩或一「標線板」係置放於該光源與所加處理之基材 間。該光罩係經圖案化以包含該基材之所欲特徵配置。談 經圖案化光罩可使光能量根據該圖案而觸擊該阻障材料。 微影餘刻標線板是由一光學透明材料所製得,像是石 英(亦即二氧化矽Si〇2)。該標線板包含不透明材料之圖 案,其可根據所欲圖案而阻擋光線照射該基材各曝出的部 分。一薄型的金屬不透明層(通常會是鉻質)會被置放在該 標線板的表面上。此光遮層會被圖案化以對應欲轉至基材 的該等特徵,例如電晶體或是多重閘極。可利用傳統雷射 或電子射束圖案設備來將該金屬材料圖案化,以定義欲轉 至該金屬層的關鍵尺寸。然後餘刻該金屬層以移除未由該 圖案化阻障所保護之金屬材料,藉此曝出底下之石英材 料’並構成一經圖案化的光標線板。如此,各光標線板可 讓光線按一精確圖案經此通過而至該基材表面上。 在微影蝕刻裡’所暴露材料可為一正型阻障或一負型 阻障。在正型阻障裡,會移除該基材上的所暴露阻障材料, 而在負型阻障裡,會移除未經暴露局部。通常是會藉由一 4 200525605 化 暴 圖 底 有 光 圖 在 除 其 板 基 式 線 處 可 電 的 石 體 子处進行移除,以暴露底下的基材材料。然後可將所 露的底置基材材料加以姓刻,以於該基材表面上構成經 案化的特徵’同時所保留的阻障材料仍可作為未經暴露 下基材材料的保護鍍層。按此方式,可透過一其上置放 一光標線板之微影蝕刻標線板,藉由將該阻障暴露於一 線圖案,以構成各個接觸窗、介層洞或内連線。 在反覆聚集(iterative convergence)中,用以製造一經 案化標線板本身之方法牽涉到沉積及後續的蝕刻製程。 此態樣中,係經由蝕刻製程將該金屬層所選定的部分移 。可利用各種的钱刻製程以自一標線板蝕刻該金屬層。 一蝕刻方法稱之為電漿蝕刻。為執行電漿蝕刻,會先將 玻璃標線板置放在一處理室内。詳細地說,該玻璃標線 會被放在該基座上。在電漿蝕刻製程中,該基座會作為 陰極《為此,會給予該金屬基座一 RF電源。施加在該 座的電源會於該標線板之上表面產生一按一負電壓之形 的基材偏壓。此負電壓係用以吸引來自該處理室中該標 板上所形成電漿的離子。該電漿是藉由將電源施加於該 理室頂部處之一或更多感應線圈所構成。該等感應線圈 產生該電漿並將其維持在該基座及標線板之上。如此, 壓降便可感應而遍及該基座,以將離子吸引至該標線板 上表面,藉此14刻一金屬層。 由於該標線板由低介電常數之材料所構成(如玻璃或 央)’搞合經該標線板的RF電源量會較低。這可防止氣 電漿與該標線板表面發生反應。這限制可藉由一通常會 200525605 存在於該標線板與其下之支撐基座間的間隔而複加。此 外,當該基座的表面區域相較於該標線板區域較大時, RF電源係較佳地耦合至該基座的其他區域,因而形成Rf 電力漏失。此外,吾人已觀察到運用一基座覆蓋物(如由— 介電材料所製成之覆蓋環及捕捉環)並不適合用來降低經 由基座區域(非緊鄰於該標線板下方)耦合的電力。 因此,會需要一種能夠輔助發生在一氣體電漿與__、 線板間之化學反應的電漿蝕刻裝置。此外,亦需要一種& I係可在電漿蝕刻處理期間不會在遍及該標線板上產生t 力漏失的材料所製成。 【發明内容】 本發明概關於提供一種用以支撐一基材之改良基座, 以及相關的基材支撐硬體。該基座在像是對於石英光罩或 「罩片」之電漿蝕刻製程期間會具有最大的應用性。 該基座可界定出一本體,及沿該本體之一上表面的底 座。該本體在基材製程期間會接收一 RF電源。該基材支 撐底座具有一外部邊緣,及一用以接受及支撐該基材的中 間基材支撐凸物。在該中間基材支撐凸物之外的至少一部 分基材支撐底座係由一介電材料、或是較其餘的支撐底座 具$ —較低介電常數之材料所製成。其一範例即為石英。 石央比起常用於製造基座本體或覆蓋物之材料,如鋁質會 具有較低的介電常數。置放石英可讓較大的rf電源耦合 經該標線板,#此強化電漿蝕刻製程。這也可對於經該標 6 200525605 線板而耦合之相對RF電源量提供較高的控制性。 在一態樣中,該介電材料層會被沿該基座本體之支撐 底座頂部而放置。在另一具體實施例裡蓋該支撐凸物 的支撐底貞整個冑面厚纟會是由-彳電材料所t成。在一 具體實施例裡’會將一個別基材支撐組件放置在該基座 上,以利於傳動該基材於該基座之一端上,而該基材支撐 組件係由一介電材料所製成。 【實施方式】 後文中將參照於一感應耦合電漿蝕刻處理室以說明本 發明各項特點。適當的感應耦合電漿蝕刻處理室包含可向 美國加州聖塔克拉拉市Applied Materials公司購得之「解 搞合電锻來源(DPStm)」處理室,或是向美國加州黑沃德市 ETEC公司購得之「eteC Tetra™」光罩蝕刻處理室。亦可 運用一雙線圈處理室,像是可自Applied Materials公司購 得之Tetra IITM解耦合電漿來源處理室。亦可採用其它的處 理室’例如包含電容性耦合平行平板處理室與磁性強化離 子ϋ刻處理室,以及不同設計方式的感應耦合蝕刻室。雖 然該等製程以DPS™處理室執行較佳,然與該DPS™處理 室之描述相關者乃屬說明性質,故不應被詮釋或解譯為限 制本發明範圍及特點。 為執行電漿蝕刻製程,會將一基材(如一玻璃標線板) 放置在一處理室内。這種處理室之一範例即如第1圖所略 示。第1圖之處理室1〇〇具有一經置放於其内之基材支撐 200525605 組件200,及一位於鄰接於此的基材處置片3〇1。該基材或 標線板222圖不為位於該基材支樓組件2〇〇及該基材處置 片301兩者之上。 該處理室100係經配置以接收一基材222 ,像是一待 透過電漿蝕刻而予處理之玻璃標線板。該基材222可經由 一閘口 161進出該處理室100。該閘口 “I作為一機埠, 並且在標線板處理期間可隔絕該處理室1 〇 〇環境。可利用 該基材處置片3 01,透過一基材卡匣來傳送該基材222。該 基材處置片301可在一個別傳送處理室(未以圖示)與各種 處理室之間傳送該基材222。在此態樣中,應了解該標線 板製程處理牵涉到多個步驟,且通常可在不同處理室内以 機械方式與該基材處置片301併同運作來進行不同的步 驟。這種製程系統之一範例即如可向美國加州聖塔克拉拉 市Applied Materials公司購得之Centura*™製程系統。 該處理室1 00 —般說來包含一圓柱形的側壁本體 162。該側壁本體162有助於定義該處理室本體,且亦可支 撐該閘口 161。該處理室1〇〇亦由一處理室底部167以及 一能量穿透上板或頂蓋163所定義。一感應線圈ι76係放 置在至少一部分頂蓋163的週遭。該處理室1〇〇之側壁本 體162及感應線圈176可由一像是電鍍鋁之金屬所製成。 該頂蓋163係自像是一陶瓷或其他介電材料之能量穿透金 屬所構成。 如刖文所述’該處理室1 00可承載一基材支撐組件 200。該支樓組件200可在製程期間支撐該基材222。可由 200525605 該處理室100在該基材支撐組件200之一上表面上定義一 電漿區域164。在製程處理期間,會透過一氣體注入管線 172將處理氣體引入該電漿蝕刻處理室100内。該氣體注 入管線1 7 2係繞設於該基材支撐組件2 0 0周邊。該氣體注 入管線1 7 2僅為說明而繪示,且可以其他配置作設置,例 如設於該頂蓋163上部。可透過一排氣系統(未圖示),從 該處理室1〇〇排出處理氣體及餘刻副產物。可於該基材支 撐組件或基座2 0 0内提供一選擇性冷卻管線1 8 4,以控制 該電漿蝕刻處理室1 〇〇内的壓力。可選擇性地納入一終點 測量裝置,以決定在該處理室1 〇 〇内所執行之一製程的終 點。 關於該基材支撐組件200本身,該支撐組件200可在 製程期間界定出一用於基材222的基座。該支撐組件200 首先包含一鑽孔206。該鑽孔206具有一上表面,以界定 出一基材支撐底座21 0(參見第2圖)。在一具體實施例中, 該基材支撐底座210係一安裝於該鑽孔206之一上表面上 的獨立片段。較佳係將一選擇性基材支撐組件2 1 5設於該 基座210上,以輔助往返於該處理室1〇〇而傳送該基材 222 〇 現回到第1圖,該基材支撐組件200之鑽孔2〇6被安 裝在一隔板組件,或一軸1 02上。在所繪具體實施例裡, 該鑽孔206係固定於該處理室1〇〇内;然而,在一替代性 具體實施例裡,該鑽孔206 (或一部份的鑽孔206)可在該 處理室100内移動。於一配置中,該基材支撐組件2〇〇之 200525605 鑽孔206會被安裝在一不銹鋼基座i〇4上。該基座i〇4通 常會被放置在該處理室的底部上(第2圖未繪示),而該分 壁、卫件102係安裝經該處理室1 〇〇之底部且辆接於該鑽孔 206該基材支撐組件200經調適以維持該處理室100内部 與外部環境之間的真空隔離。可透過軸組件1〇2,將電源、 電子控制及背壓(backpressure)氣體提供至該基材支撐組 件 200 〇 第2圖顯示一基材支撐組件2〇〇之具體實施例的分解 斜視圖。由該第2圖中可更清晰看出該鑽孔2 〇6及該支撐 基座210。亦可觀察到將一陰極112放置在該支撐基座210 内。該陰極112可選擇性地垂直延伸於該鑽孔2 〇6的表面 上°該陰極112電子耦接於一電極電源供應器ι78,以於 該電漿蝕刻處理室1〇〇内產生一電容電場。一般係將_rf 電壓施加於該陰極11 2,同時將該側壁本體丨62電性接地。 被施加於該基座200的電源會在該基材222之上表面上產 生一按負電壓形式的基材偏壓。此負電壓會被用來將該處 理室100内形成之電漿離子吸引至該基材222的上表面。 該電容電場會形成一偏壓,以感應地加速所形成之電漿物 種’使之朝向基材222而提供基材更垂直的異向性蝕刻。 通道211 (圖繪有三個)亦經該鑽孔206而置放,且其 中内罩有數個可移動昇舉銷214。如後文中所將進一步詳 述者,該等昇舉銷214會嚙合一捕捉環220的下表面,以 將該捕捉環220相對於該覆蓋環216而在該處理室1〇〇内 垂直地移動。該鑽孔2 0 6可包含一經溫度控制之底座,此 10 200525605 者經調適以控制該基材支撐組件2丨5的溫度,並因此,可 於其上放置一基材222。該鑽孔2〇6可由一對該處理室内 所進行之製程呈惰性的材料製成,例如氧化鋁或鋁質,而 該基材支稽組件215各元件可由鋁質或氧化鋁製成。該鑽 孔206可包含液流通道、加熱元件,如加熱元件或其他溫 度控制組件。 在第2圖的支撐組件配置裡,該基材支撐組件2〇〇包 含一個別基材支撐組件2丨5。該基材支撐組件2丨5 一般包 含一覆蓋環2 1 6及一捕捉環2丨5。 現首先參照於該覆蓋環2丨6,該覆蓋環2丨6最好是一 具有一上表面219及支撐肩部218的圓形環。該基材支撐 218可定義用以接收一基材(未以圖示)之肩部。在一配置 裡’該基材支撐218可定義相對凸起之表面221、223,各 者包含一用以接收一基材之内部坡斜表面。一中央開孔 225構成於該覆蓋環216的上表面219内。這兩個經凸起 表面221、223 —般說來會被放置在該中央開孔225的相對 側。該第一凸起表面22丨定義一基本上為線性而沿該中央 開孔225 —侧之長度所延伸的凸起表面。而該第二凸起表 面223定義一具有一外部直徑224及一内部直徑226的弧 形凸起表面221。該外部直徑224大致符合於該覆蓋環216 的半徑,而該内部直徑226大致適配於沿該鑽孔225之一 或更多側的中央鑽孔225幾何性。該上表面21 9及該等經 凸起表面221、223可為單塊性,或可為相互連接之個別元 件所製成。 200525605 該捕捉環220定義一具有一内部直徑207及一外部直 徑224之弧狀基座平板。該中央鑽孔2〇6構成於該捕捉環 220之内部直徑2〇7内。該捕捉環22〇的直徑2〇7、2〇2並 非連續性’而是維持一作為該鑽孔2〇6之一部分的開口。 當具有該覆蓋環216時,該捕捉環22 0包含基材支撐部 204、205。該等基材支撐部204、205 —般係採該捕捉環ii ii200525605 Description of the invention [Technical field to which the invention belongs The present invention relates generally to integrated circuit manufacturing processes. More specifically and anciently, σ, the present invention relates to a device for manufacturing a board used in semiconductor manufacturing. $ 襟 线 [Previous technology] Integrated circuit (1C) is made by a semiconductor element structured on the surface of a semiconductor substrate. An example of such a substrate is a silicon (s = silicon dioxide (SiO2) wafer. To interconnect the components on the substrate, a multilayer network with an interconnect structure can be used. Materials are deposited on the substrate in multiple layers and selectively removed in a sequence of controlled steps. Increasing circuit density creates additional power requirements for the processes used to make semiconductor components. For example, as circuit density With the increase, the width of each line, contact, and other features and the dielectric material located between them will be reduced to the sub-micron dimension. However, the thickness of each dielectric layer remains approximately fixed, so the depth of each feature will be increased. The aspect ratio, that is, the height divided by the width. The reliable configuration of the aspect ratio features is extremely important for the success of sub-micron technology and for subsequent efforts to increase the circuit coverage and the quality of individual substrates and grains. Reliable configuration of high aspect ratio features with desired key dimensions will require precise patterning and subsequent etching of the substrate. One technique commonly used to form precise patterns on substrates is lithographic etching. This technique Generally speaking, it involves light energy passing through a lens, or "reticle" and guided to the substrate. In a traditional lithographic etching process, a photoresist material is first applied to a substrate. 3 200525605 Pre-etching On the substrate layer. When there is a photoresist, the barrier material is sensitive to light energy such as ultraviolet or laser sources. The barrier material is defined as a modulated wavelength in response to a specific wavelength of the light and different exposures Polymer of the source. After depositing the photoresist on the substrate, the light source is activated to emit, for example, ultraviolet (UV) light or low X-rays, and is directed to the substrate covered by the barrier. The light source will chemically change the composition of the photoresist material. However, the photoresist layer is only selectively exposed. In this case, a photomask or a "reticle" is placed between the light source and the Between the substrates to be treated. The photomask is patterned to include the desired characteristics of the substrate. The patterned photomask allows light energy to strike the barrier material according to the pattern. The marking board is made of an optically transparent material, like Quartz (also known as silicon dioxide Si02). The reticle includes a pattern of opaque material that blocks light from irradiating each exposed part of the substrate according to the desired pattern. A thin metal opaque layer (usually It is chrome) will be placed on the surface of the reticle. This light shielding layer will be patterned to correspond to the features to be transferred to the substrate, such as transistors or multiple gates. Traditional mines can be used Radiographic or electron beam patterning equipment to pattern the metallic material to define the critical dimensions to be transferred to the metallic layer. The metallic layer is then etched to remove metallic materials that are not protected by the patterned barrier, by This exposes the underlying quartz material 'and forms a patterned cursor line plate. In this way, each cursor line plate allows light to pass through it in a precise pattern onto the surface of the substrate. In lithographic etching' The exposed material can be a positive barrier or a negative barrier. In a positive barrier, the exposed barrier material on the substrate is removed, and in a negative barrier, the unexposed material is removed. After exposed locally. It is usually removed by a 200505605 chemical storm pattern with a light pattern at the bottom of the board which can be electrically charged except for the plate base line to expose the underlying substrate material. The exposed bottom substrate material can then be engraved to form a documented feature on the surface of the substrate 'while the remaining barrier material can still serve as a protective coating for the substrate material without exposure. In this way, a lithographic etched reticle with a cursor line plate on it can be used to form each contact window, via, or interconnect by exposing the barrier to a line pattern. In iterative convergence, the method used to fabricate a documented reticle itself involves deposition and subsequent etching processes. In this aspect, the selected portion of the metal layer is moved by an etching process. Various coining processes can be used to etch the metal layer from a reticle. One etching method is called plasma etching. To perform plasma etching, a glass reticle is first placed in a processing chamber. In detail, the reticle is placed on the base. In the plasma etching process, the base serves as a cathode. To this end, the metal base is given an RF power source. The power applied to the base will generate a substrate bias in the form of a negative voltage on the upper surface of the reticle. This negative voltage is used to attract ions from the plasma formed on the target in the processing chamber. The plasma is constructed by applying power to one or more induction coils at the top of the processing chamber. The induction coils generate the plasma and maintain it on the base and the reticle. In this way, the pressure drop can be sensed across the base to attract ions to the upper surface of the reticle, thereby engraving a metal layer at 14 times. Since the reticle is made of a material with a low dielectric constant (such as glass or central), the amount of RF power passing through the reticle will be low. This prevents the plasma from reacting with the surface of the reticle. This limitation can be added by a gap that would normally exist between the reticle and the supporting base below it. In addition, when the surface area of the base is larger than the area of the reticle, the RF power supply is better coupled to other areas of the base, thereby forming an Rf power loss. In addition, I have observed that the use of a base cover (such as a cover ring and a capture ring made of a dielectric material) is not suitable for reducing coupling through the base area (not immediately below the reticle). electric power. Therefore, there is a need for a plasma etching device capable of assisting a chemical reaction between a gas plasma and a wire plate. In addition, there is also a need for a & I system that is made of a material that does not cause t-force leakage throughout the reticle during the plasma etching process. SUMMARY OF THE INVENTION The present invention is generally directed to providing an improved base for supporting a substrate, and related substrate supporting hardware. This base will be most useful during plasma etching processes like quartz masks or "masks". The base may define a body and a base along an upper surface of the body. The body receives an RF power source during the substrate manufacturing process. The substrate supporting base has an outer edge and an intermediate substrate supporting protrusion for receiving and supporting the substrate. At least a part of the substrate supporting base other than the intermediate substrate supporting protrusion is made of a dielectric material or a material with a lower dielectric constant than the remaining supporting base. One example is quartz. Shi Yang has a lower dielectric constant than the materials commonly used to make the base body or cover, such as aluminum. Placing quartz allows larger rf power to be coupled through the reticle, which enhances the plasma etching process. This can also provide higher control over the relative amount of RF power coupled through the standard 6 200525605 line board. In one aspect, the dielectric material layer is placed along the top of the support base of the base body. In another specific embodiment, the entire thickness of the supporting base covering the supporting protrusions may be made of -electric material. In a specific embodiment, 'an additional substrate supporting component is placed on the base to facilitate driving the substrate on one end of the base, and the substrate supporting component is made of a dielectric material. to make. [Embodiment] Hereinafter, various features of the present invention will be described with reference to an inductively coupled plasma etching processing chamber. Suitable inductively coupled plasma etch processing chambers include a "Decoupled Electric Forging Source (DPStm)" processing chamber available from Applied Materials, Santa Clara, California, or ETEC, Blackward, California, USA Commercially available "eteC Tetra ™" mask etching chamber. A dual coil processing chamber can also be used, such as a Tetra IITM decoupling plasma source processing chamber available from Applied Materials. Other processing chambers may also be used, such as a capacitively coupled parallel plate processing chamber and a magnetically enhanced ion engraving processing chamber, as well as inductively coupled etching chambers of different designs. Although these processes are better performed with a DPS ™ processing chamber, those related to the description of the DPS ™ processing chamber are illustrative and should not be interpreted or interpreted to limit the scope and features of the invention. To perform the plasma etching process, a substrate (such as a glass reticle) is placed in a processing chamber. An example of such a processing chamber is shown in Figure 1. The processing chamber 100 in FIG. 1 has a substrate support 200525605 module 200 placed therein, and a substrate treatment sheet 301 located adjacent thereto. The substrate or reticle 222 is not shown on both the substrate supporting component 200 and the substrate disposal sheet 301. The processing chamber 100 is configured to receive a substrate 222, such as a glass reticle to be processed by plasma etching. The substrate 222 can enter and exit the processing chamber 100 through a gate 161. The gate "I serves as a machine port, and can isolate the processing room 1000 environment during the marking board processing. The substrate processing sheet 3 01 can be used to transfer the substrate 222 through a substrate cassette. The The substrate processing sheet 301 can transfer the substrate 222 between a separate transfer processing chamber (not shown) and various processing chambers. In this aspect, it should be understood that the reticle process processing involves multiple steps, In general, different steps can be performed mechanically with the substrate processing sheet 301 in different processing chambers to perform different steps. An example of such a process system is available from Applied Materials, Santa Clara, California, USA Centura * ™ process system. The processing chamber 100 generally includes a cylindrical side wall body 162. The side wall body 162 helps define the processing chamber body and also supports the gate 161. The processing chamber 10 〇 is also defined by a processing chamber bottom 167 and an energy penetrating upper plate or top cover 163. An induction coil ι76 is placed around at least a portion of the top cover 163. The side wall body 162 and the induction coil of the processing chamber 100 176 may One is made of metal plated with aluminum. The top cover 163 is made of energy-penetrating metal made of ceramic or other dielectric materials. As described in the text, 'The processing chamber 100 can carry a substrate. Support component 200. The branch component 200 can support the substrate 222 during the manufacturing process. The processing chamber 100 can define a plasma area 164 on one of the upper surfaces of the substrate support component 200 by the 200525605. During the processing process, the A processing gas is introduced into the plasma etching processing chamber 100 through a gas injection line 172. The gas injection line 17 2 is wound around the substrate support assembly 2000. The gas injection line 1 72 is for illustration only It is shown and can be set in other configurations, such as the upper part of the top cover 163. Through an exhaust system (not shown), the processing gas and remaining by-products can be discharged from the processing chamber 100. A selective cooling line 18 84 is provided in the substrate support assembly or base 200 to control the pressure in the plasma etching processing chamber 1000. An end point measuring device can be optionally included to determine the This processing room is executed within 1000 The end of one of the processes. Regarding the substrate support assembly 200 itself, the support assembly 200 can define a base for the substrate 222 during the process. The support assembly 200 first includes a bore 206. The bore 206 has an upper surface to define a substrate support base 210 (see FIG. 2). In a specific embodiment, the substrate support base 210 is an upper surface mounted on one of the holes 206. Independent fragment. Preferably, a selective substrate support assembly 2 15 is set on the base 210 to assist in transferring the substrate 222 to and from the processing chamber 100. Now returning to FIG. 1, the The holes 206 of the substrate support assembly 200 are mounted on a partition assembly, or a shaft 102. In the illustrated embodiment, the borehole 206 is fixed in the processing chamber 100; however, in an alternative embodiment, the borehole 206 (or a portion of the borehole 206) may be The processing chamber 100 moves inside. In one configuration, the 200525605 drill hole 206 of the substrate support assembly 2000 will be mounted on a stainless steel base 104. The base i04 is usually placed on the bottom of the processing chamber (not shown in FIG. 2), and the partition wall and the guard 102 are installed through the bottom of the processing chamber 100 and the vehicle is connected to the bottom. The substrate support assembly 200 is drilled 206 to adjust the vacuum isolation between the interior of the processing chamber 100 and the external environment. A power supply, electronic control and backpressure gas can be provided to the substrate support assembly through the shaft assembly 102. Figure 2 shows an exploded perspective view of a specific embodiment of a substrate support assembly 200. The hole 206 and the support base 210 can be seen more clearly from the second figure. It can also be observed that a cathode 112 is placed in the support base 210. The cathode 112 may optionally extend vertically on the surface of the borehole 206 °. The cathode 112 is electronically coupled to an electrode power supply ι78 to generate a capacitive electric field in the plasma etching processing chamber 100. . Generally, the _rf voltage is applied to the cathode 112, and the sidewall body 62 is electrically grounded. The power applied to the base 200 generates a substrate bias in the form of a negative voltage on the upper surface of the substrate 222. The negative voltage is used to attract plasma ions formed in the processing chamber 100 to the upper surface of the substrate 222. The capacitive electric field will form a bias voltage to inductively accelerate the plasma species' formed towards the substrate 222 to provide a more vertical anisotropic etching of the substrate. Channels 211 (three shown in the drawing) are also placed through the holes 206, and the inner cover is provided with a plurality of movable lifting pins 214. As will be described in further detail later, the lifting pins 214 engage the lower surface of a capture ring 220 to move the capture ring 220 vertically within the processing chamber 100 relative to the cover ring 216. . The drilling hole 206 may include a temperature-controlled base, which is adapted to control the temperature of the substrate support assembly 2 and 5 and, therefore, a substrate 222 may be placed thereon. The drilling hole 206 can be made of a pair of inert materials, such as alumina or aluminum, and the components of the substrate support assembly 215 can be made of aluminum or alumina. The drill hole 206 may include a liquid flow channel, a heating element, such as a heating element or other temperature control components. In the support assembly configuration of FIG. 2, the substrate support assembly 200 includes a separate substrate support assembly 2-5. The substrate support assembly 2 丨 5 generally includes a cover ring 2 1 6 and a capture ring 2 5. Reference is now first made to the cover ring 2 丨 6, which is preferably a circular ring having an upper surface 219 and a support shoulder 218. The substrate support 218 may define a shoulder for receiving a substrate (not shown). In a configuration, the substrate support 218 may define relatively convex surfaces 221, 223, each including an internal sloped surface for receiving a substrate. A central opening 225 is formed in the upper surface 219 of the covering ring 216. The two raised surfaces 221, 223 are generally placed on opposite sides of the central opening 225. The first convex surface 22 丨 defines a convex surface that is substantially linear and extends along the length of one side of the central opening 225. The second convex surface 223 defines an arc-shaped convex surface 221 having an outer diameter 224 and an inner diameter 226. The outer diameter 224 generally corresponds to the radius of the cover ring 216, while the inner diameter 226 generally matches the geometry of the central bore 225 along one or more sides of the bore 225. The upper surface 219 and the convex surfaces 221, 223 may be monolithic, or may be made of individual components connected to each other. 200525605 The capture ring 220 defines an arc-shaped base plate having an inner diameter 207 and an outer diameter 224. The central bore 206 is formed within the internal diameter 207 of the capture ring 220. The diameters 207 and 002 of the capture ring 22 are not discontinuous' but maintain an opening as part of the bore 206. When the cover ring 216 is provided, the capture ring 220 includes substrate support portions 204 and 205. The substrate support portions 204, 205-generally use the capture ring

220之内部直徑2〇7。在如第2圖之配置裡,支撐部2〇4、 205可界定出沿該内部直徑2〇7所置放之肩部。該等支撐 2〇4、2 05及該底座平板2〇2經調適以適配於該覆蓋環216 的基材支# 218。當該捕捉環22〇靠在該覆蓋環216上時, 該捕捉環220的基材支撐2〇5與該覆蓋環的基材支撐218 共平面。該捕捉環220係按尺寸設計以靠置在該覆蓋環216 上,而無須將這兩個凸起表面221、223覆蓋在該覆蓋環 216上。同時,該等基材支撐2〇5、218可接著不中斷地接 收一基材(未圖示)。The inner diameter of 220 is 207. In the configuration as shown in FIG. 2, the support portions 204 and 205 may define a shoulder placed along the inner diameter 207. The supports 204, 05 and the base plate 202 are adapted to fit the substrate support # 218 of the cover ring 216. When the capture ring 220 is resting on the cover ring 216, the substrate support 205 of the capture ring 220 is coplanar with the substrate support 218 of the cover ring. The capture ring 220 is sized to rest on the cover ring 216 without the need to cover the two raised surfaces 221, 223 on the cover ring 216. At the same time, the substrate supports 205, 218 can then receive a substrate (not shown) without interruption.

該捕捉環220會在該覆蓋環216上垂直移動。操作上, 該昇舉銷2i4會於傳送基材期間將該捕捉環22〇垂直地移 動於該覆蓋環216之上’並接著將該捕捉環22〇下置於該 覆蓋環216之上以進行基材製程處理。於半導體製程產業 裡利用昇舉銷係屬幕知者1諸本項技藝之人士應即可自 本揭示而瞭解如何製作昇舉銷。 通道2丨7係穿設於該覆蓋環216,以供通過該鑽孔2( 之昇舉銷214可垂直地舉起該捕捉環22()。昇舉銷21〇 配予之垂直移動會被用來舉㈣捕提環22Q,以於該^ 12 200525605 處置片301與該捕捉環220之間進行基材傳送作業。在基 材傳送期間,該等昇舉銷214會於該覆蓋環216之上垂直 移動該捕捉環220,然後將該捕捉環220下置於該覆蓋環 216上以進行基材製程處理。The capture ring 220 moves vertically on the cover ring 216. In operation, the lifting pin 2i4 will vertically move the capture ring 22 above the cover ring 216 'during the substrate transfer, and then place the capture ring 22 below the cover ring 216 to perform Substrate manufacturing process. Those in the semiconductor manufacturing industry who use the promotion technique are those who know this technique. Those skilled in the art should be able to understand how to make the promotion technique from this disclosure. The channel 2 丨 7 is penetrating the cover ring 216, so that the capture ring 22 () can be lifted vertically by the lifting pin 214 through the drilling hole 2 (). The vertical movement assigned by the lifting pin 21 will be It is used to lift the capture lifting ring 22Q for the substrate transfer operation between the ^ 20052005605 processing sheet 301 and the capture ring 220. During the substrate transfer, the lifting pins 214 are placed on the cover ring 216. The capture ring 220 is vertically moved upward, and then the capture ring 220 is lowered on the cover ring 216 for substrate processing.

為開始進行處理,會將該標線板222 (或其他基材)放 置在該基座200的表面上。然後將蝕刻氣體引入該處理室 1 〇〇内。為此,一處理氣體來源會經一氣體注入管線1 72 供應像是氧基氣體之氣體。在如第1圖之配置中,該注入 管線172會將氣體饋送進入該覆蓋物163之邊側。然而, 亦可經一喷嘴(未圖示)而將氣體引入該覆蓋物163内。可 由一封閉迴路壓力控制系統(未圖示)來控制該處理室壓 力。To begin processing, the reticle 222 (or other substrate) is placed on the surface of the base 200. An etching gas is then introduced into the processing chamber 1000. To this end, a process gas source supplies a gas like oxygen gas through a gas injection line 1 72. In the configuration shown in Figure 1, the injection line 172 feeds gas into the sides of the cover 163. However, the gas can also be introduced into the covering 163 through a nozzle (not shown). The closed chamber pressure control system (not shown) can be used to control the process chamber pressure.

當氣體被注入該處理室100内時,會產生一氣體電 漿。電毅是藉由在該覆蓋物1 63之頂部處將電源施加於一 或更多感應線圈176所構成。在第1圖之處理室裡是 利用兩個RF線圈1 76,而一者係為外部線圈,而另一為内 部線圈。可利用一電源供應器1 77及配合網路以將電源施 加於該等感應線圈176。該等感應線圈176會在該基座2〇0 及該基材222之上產生並維持電漿。在一配置中,係以約 13.56百萬赫茲的頻率將大約125瓦特的電源施加於線圈 176 ’以於該標線板222的表面上產生並維持一含氧之電 漿。在一種雙線圈系統之配置中,係以約丨3 · 5 6百萬赫茲 的頻率將大約400瓦特的電源施加於線圈ι76,以於該標 線板222的表面上產生並維持—含氣及氧之電《。對於一 13 200525605 單一線圈系統,線圈可在該標線板表面上提供一 410伏特之DC偏壓。 第3圖顯示一本發明基座3 〇〇之具體實施例 面視圖。該基座3 0 〇係經配置以於一電漿餘刻處 並支撐一基材。較佳的是,該基材係一微影蝕刻 且該處理室係電漿蝕刻處理室,像是第1圖所繪 所述之處理室。 該基座首先包含一本體或上部支稱底座306 圖配置裡,該本處理室306係概為一圓柱形物體 採取其他形狀。該本體306包含一支撐底座31〇 為一基材支撐底座。在如第3圖所示之配置裡, 座310具有一圓形外部直徑324。該底座31〇亦 成一四側支撐凸物325之支撐凸物326。該支撐 可在處理期間用以在該基座300上支撐該標線板 凸物325會最好是自一金屬材料所製成。該名詞 物(support ridge)」意思係指製程期間,沿著該 310任一高度或形狀之任一凸起特徵均會接觸並 材222者。 該支撐底座3 1 0通常經配置以在製程處理期 覆蓋物(未以圖示)俾進一步支撐一標線板。該覆 配置以運作如前述之基材支撐組件2 1 5。 在本發明的新式基座3 0 0裡,至少一部份@ 會是由一介電材料所製成。在第3圖的截面圖中 3 06的介電材料部分可如318處所示。介電材料 約340至 的外觀截 理室接收 標線板, 且如前文 。在第3 ’然亦可 ,其可作 該支撐底 具有一構 凸物325 。該支撐 「支撐凸 支撐底座 承載一基 間接收一 蓋物可經 本體306 ,該本體 3 18會選 14 200525605When gas is injected into the processing chamber 100, a gas plasma is generated. Reliability is constructed by applying power to one or more induction coils 176 at the top of the cover 163. In the processing chamber of Fig. 1, two RF coils 176 are used, one of which is an external coil and the other is an internal coil. A power supply 177 and a network can be used to apply power to the induction coils 176. The induction coils 176 generate and maintain a plasma on the base 2000 and the substrate 222. In one configuration, a power of approximately 125 watts is applied to the coil 176 'at a frequency of approximately 13.56 megahertz to generate and maintain an oxygen-containing plasma on the surface of the reticle 222. In a dual-coil system configuration, a power of approximately 400 watts is applied to the coil ι76 at a frequency of about 3.56 megahertz to generate and maintain the surface of the reticle 222-gas-containing And oxygen electricity. For a 13 200525605 single coil system, the coil can provide a DC bias voltage of 410 volts on the surface of the reticle. Fig. 3 shows a specific embodiment of the base 300 of the present invention in a plan view. The base 300 is configured to support a substrate at the rest of a plasma. Preferably, the substrate is a lithographic etching and the processing chamber is a plasma etching processing chamber, such as the processing chamber depicted in FIG. 1. The base first includes a body or an upper support base 306. In the configuration, the processing chamber 306 is a cylindrical object and adopts other shapes. The body 306 includes a support base 31 and a base support base. In the configuration shown in FIG. 3, the seat 310 has a circular outer diameter 324. The base 31 is also formed as a support protrusion 326 with four side support protrusions 325. The support may be used to support the reticle projection 325 on the base 300 during processing, and is preferably made of a metallic material. The term "support ridge" means that during the manufacturing process, any raised feature along any height or shape of the 310 will contact the unit 222. The support base 3 1 0 is usually configured to further support a marking board during the processing process of the cover (not shown). The overlay is configured to operate the substrate support assembly 2 1 5 as previously described. In the new-type base 300 of the present invention, at least a part @ will be made of a dielectric material. The dielectric material portion 306 in the cross-sectional view of FIG. 3 may be shown at 318. Dielectric materials Appearance of about 340 to 1500 ft. Receiving graticules, as before. It can also be used at the 3'th, which can be used as the supporting base with a convex structure 325. The support "supporting convex support base bearing a base receiving a cover can pass through the body 306, the body 3 18 will choose 14 200525605

〇〇上之標線板222)的外 部分318可包含兩種或以上、 擇性地用於該上表面3 1 0 體306周邊的介電環。該A 支撐凸物326,用於支撐言 側。該本體3 0 6之介電材料部分: 彼此接合形成該本體306之介電材料部318的個別元件(未The outer portion 318 of the reticle 222) above may include two or more kinds of dielectric rings selectively used around the upper surface 3 1 0 body 306. The A support projection 326 is used to support the speech side. Dielectric material portion of the body 3 06: Individual elements (not shown) joined to each other to form the dielectric material portion 318 of the body 306

控制經該標線板所輕接之相對RF電力量,因為該秩線板 基材(如石英)之厚度及介電性質為固定。 該本體306的介電材料部分318可由不同厚度所製 成。這可如第4及5圖中的簡略具體實施例所示。第4圖 提供一本發明之基座300’截面圖。該基座3〇〇,係經簡化所 圖示。同樣地,第5圖呈現一本發明之基座300”截面圖。 該基座300”係經簡化所圖示。在各視圖裡,該標線板222 係經圖示為被支撐在個別基座3 0 0,、3 0 0,,上。此外,在& 視圖裡提供有一基材支撐組件315。該基材支撐組件315 可根據該如第2圖分解視圖中所示之基材支撐組件2 1 5而 予配置。該基材支撐組件315會最好是由一介電材料所製 成。利用不同介電材料厚度係為調整或控制耦接於該標線 板之相對RF電源。利用一介電材料的好處之一是這可供 運用兩個控制項,即介電常數及厚度的控制項。而這又可 讓操作者改變相對的RF電源(即流入標線板的RF電源相 對於環繞該標線板之基座區域的RF電源)。該介電厚度及 種類可使此相對量對均勻電源分配者呈相同,或是需補償 15 200525605 該蝕刻製程時呈不同。 在第4圖及第5圖内該介電材料所示為318處。在 4圖裡,該介電材料318係沿該上部支撐底座3〇6之頂$ 置放。而在第5圖裡,該介電材料318大致定義為該上: 支撐底座306的整個厚度。在任一例子裡,較佳是將今 電材料318放置在該基座3 00上該標線板222的接觸點外 側。Control the amount of relative RF power lightly connected through the reticle, because the thickness and dielectric properties of the base material (such as quartz) of the reticle are fixed. The dielectric material portion 318 of the body 306 can be made of different thicknesses. This can be shown in the simple and specific embodiments in FIGS. 4 and 5. Figure 4 provides a cross-sectional view of a base 300 'of the present invention. The base 300 is shown in simplified form. Similarly, Figure 5 presents a cross-sectional view of a base 300 "of the present invention. The base 300" is simplified and illustrated. In each view, the reticle 222 is illustrated as being supported on individual bases 300, 300 ,. In addition, a substrate support assembly 315 is provided in the & view. The substrate supporting assembly 315 can be configured according to the substrate supporting assembly 2 1 5 as shown in the exploded view of FIG. 2. The substrate support assembly 315 is preferably made of a dielectric material. The use of different dielectric material thicknesses is used to adjust or control the relative RF power coupled to the reticle. One of the benefits of using a dielectric material is that it allows the use of two controls, namely the control of dielectric constant and thickness. This, in turn, allows the operator to change the relative RF power (ie, the RF power flowing into the reticle is relative to the RF power that surrounds the base area of the reticle). The dielectric thickness and type can make this relative amount the same for a uniform power distributor, or need to be compensated. 15 200525605 The etching process is different. The dielectric material is shown in Figures 4 and 5 at 318 locations. In Figure 4, the dielectric material 318 is placed along the top of the upper support base 306. In FIG. 5, the dielectric material 318 is roughly defined as: the entire thickness of the supporting base 306. In either case, it is preferable to place the electrical material 318 outside the contact point of the reticle 222 on the base 300.

即如圖中可見,基座300、300,、300”將介電材料沿 該上部基材支撐本體3 06周邊放置。該介電材料318可為 聚合物或陶瓷。一聚合物材料之範例可如由Amoco聚合物 所製造之A r d e 1TM聚方基酸醋材料。另一範例係d u p 〇 n t公 司所製造的Vespel™聚合物。又另一範例係合成橡膠材 料。一適當之陶瓷材料範例為氧化鋁。另一可接受之介電 材料範例為石英。該介電材料318的選定應用可具有在電 漿触刻製程期間’改變柄合於該標線板内之RF電力量的 效果。於此態樣中,該本體306會在電漿蝕刻製程期間接 收電源(例如一 RF電源)。藉由在該本體的周邊上使用介電 材料,會改變遍及於該基座之電壓降以使其值小於置放該 標線板之區域者的值,亦即該基材支撐凸物326内部之 值。該基座300在該基材支撐凸物326之内的部分維持為 金屬性,藉以有效管理來自標線板222的消耗熱。 前揭各項雖係針對於本發明各具體實施例所述,然確 可設計其他或進一步的本發明具體實施例而不致悖離其基 本範疇,且其範圍係由後述之申請專利範圍所定。 16 200525605 【圖式簡單說明】 從而可參照於各隨附圖式,獲得詳細暸解本發明 各項特點,如前簡述之本發明更特定說明的方式。然 意隨附圖式僅說明本發明之典型具體實施例,並因此 被視為現制其範圍。 第1圖係一可含有本發明之基座的電漿蝕刻處理 面視圖。如第1圖中所示之處理室屬示範性質。 第2圖顯示一如第1圖之基材支撐組件的分解斜;f 第3圖顯示一本發明基座之具體實施例的外觀截 圖。 第4圖提供一本發明基座之截面略視圖。該圖繪 按介電材料所製得之部分。 第5圖顯示本發明一替代具體實施例中基座之截 視圖。該圖再次繪示一按介電材料所製得之部分。 【主要元件符號說明】 100 處理室 102 軸 104 不銹鋼基座 161 閘口 162 側壁本體 163 頂蓋 164 電漿區域 上述 應注 不應 室截That is, as shown in the figure, the bases 300, 300, and 300 "place a dielectric material along the periphery of the upper substrate supporting body 306. The dielectric material 318 may be a polymer or a ceramic. An example of a polymer material may be For example, Arde 1TM polycubic acid vinegar material manufactured by Amoco polymer. Another example is Vespel ™ polymer manufactured by Dupont. Another example is synthetic rubber material. An example of a suitable ceramic material is Aluminum oxide. Another example of an acceptable dielectric material is quartz. The selected application of the dielectric material 318 may have the effect of 'changing the amount of RF power handled in the reticle during the plasma-etching process. In this aspect, the body 306 will receive power (such as an RF power source) during the plasma etching process. By using a dielectric material on the periphery of the body, the voltage drop across the base will be changed to make it The value is smaller than the value of the area where the reticle is placed, that is, the value inside the substrate support protrusion 326. The portion of the base 300 within the substrate support protrusion 326 is kept metallic, thereby being effective Manage messages from graticule 222 Although the foregoing disclosure is directed to the specific embodiments of the present invention, it is possible to design other or further specific embodiments of the present invention without departing from its basic scope, and the scope of which is covered by the patent application described later The range is determined. 16 200525605 [Simplified description of the drawings] Therefore, you can refer to the accompanying drawings to get a detailed understanding of the features of the present invention, as described in the more specific way of describing the present invention. However, the accompanying drawings are only A typical specific embodiment of the present invention is described, and therefore it is considered to be a scope made in-house. FIG. 1 is a view of a plasma etching treatment surface that may include a pedestal of the present invention. The processing chamber shown in FIG. Exemplary nature. Fig. 2 shows an exploded slant of the substrate supporting assembly as in Fig. 1; f Fig. 3 shows a screenshot of the appearance of a specific embodiment of the base of the present invention. A schematic view. The figure illustrates a portion made from a dielectric material. Figure 5 shows a cross-sectional view of a base in an alternative embodiment of the present invention. The figure again illustrates a portion made from a dielectric material. [Main component symbols Ming 100] processing chamber 102 stainless steel shaft 104 gate 162 of the base 161 side walls 163 of the body cap 164 plasma region of the chamber should not cross Note

圖。 面視 示一 面略Illustration. Look at it and show it slightly

17 200525605 167 處理室底部 172 氣體注入管線 176 感應線圈 177 電源供應器 178 電極電源供應器 184 冷卻管線 200 基材支撐組件 ,202 直徑 204 基材支撐 205 基材支撐 206 鑽孔 207 直徑 211 通道 214 昇舉銷 215 基材支撐組件 216 覆蓋環 217 通道 218 支撐肩部 219 上表面 220 捕捉環 221 表面 222 基材或標線板 223 表面 224 外部直徑 200525605 225 中 央 開 孔 226 内 部 直 徑 300 基 座 3005 基 座 300,, 基 座 301 基 材 處 置 片 306 上 部 支 稱 底 座 3 10 上 表 面 315 基材 支 撐 組 件 318 介 電 材 料 處 324 圓 形 外 部 直 徑 325 四 側 支撐 凸 物 326 支 撐 凸 物17 200525605 167 Bottom of the processing chamber 172 Gas injection line 176 Induction coil 177 Power supply 178 Electrode power supply 184 Cooling line 200 Substrate support assembly, 202 diameter 204 Substrate support 205 Substrate support 206 Drilling 207 Diameter 211 Channel 214 liters Lifting pin 215 Substrate support assembly 216 Cover ring 217 Channel 218 Support shoulder 219 Upper surface 220 Snap ring 221 Surface 222 Substrate or graticule plate 223 Surface 224 External diameter 200525605 225 Central opening 226 Internal diameter 300 Base 3005 Base 300, pedestal 301 base material treatment sheet 306 upper support base 3 10 upper surface 315 base material support assembly 318 dielectric material 324 circular outer diameter 325 four side support projection 326 support projection

Claims (1)

Translated fromChinese
200525605 拾:1_議_襲_圓 ......: .ί ·· : .:.: ":· - ·.::·: :: ·. ·: :·. + .-!'<*-· - ";::;-:>:.·:::· :; i; .1". --:'·'::,-:·'· -w.' ί';"?:'::· ·': : »::·;.": :.-.ϊ·····:·'··*-»ν··: ν· '.·’.·.,.,. :·:,.·· ; :·'- - -'r·" ---., ">·ν-ο !::: ι· 一種用以於一電漿蝕刻室中支撐一基材之基座,其中至 少包含: 一本體,該本體係經配置以接收一 RF電源;以及 一基材支撐底座,此係沿該本體之一上表面設置, 該基材支撐底座具有一外部邊緣,以及一用以接收並支待 該基材之中間(intermediate)基材支撐凸物; 且其中至少一部分位該中間基材支撐凸物外的基枓 支撐底座是由一介電材料所製成。 2·如申請專利範圍第1項之基座,其中位在該基材支撐凸 物内之該基材支撐底座的部分是由一金屬材料所製成。 3·如申請專利範圍第2項之基座,其中該基材支撐底座中 由一介電材料所製成的部分係藉由將一介電材料層沿著位 於該基材支撐凸物外之基材支撐底座的上表面置放以形成 一介電環的方式所構成。 4·如申請專利範圍第3項之基座,其中該基材支撐凸物是 由一金屬材料所製成。 5·如申請專利範圍第3項之基座,其中該介電材料是由一 選自一含聚合物材料、一陶瓷材料及該等組合之群組中的 材料所製成。 200525605 6·如申請專利範圍第2項之基座,其中該基材支撐底座中 由一介電材料所製成之部分可大致定義出位於基材支撐凸 物外之該基材支撐底座的整個厚度。 7·如申請專利範圍第6項之基座,其中該基材支撐凸物是 由一金屬材料所製成。200525605 Pick up: 1_ 议 _ 袭 _ 圆 ......: .ί ··:.:.: &Quot;: ·-·. ::::: ·. ·:: ·. + .-! '< *-·-"::;-: >:. · :::::; i; .1 ".-:' · '::,-: ·'--w. ' ί '; "?:' :: ·· ': : »:: ·;. ": : .-. ϊ ·····: ·' ·· *-» ν · ': ν ·'. · '. ·.,.,.: ·:,. ··;: ·'---'r · " ---., &Quot; > · ν-ο! :: ι · A kind of A base supporting a substrate in a plasma etching chamber, which includes at least: a body configured to receive an RF power source; and a base supporting base, which is arranged along an upper surface of the body The substrate supporting base has an outer edge and an intermediate substrate supporting protrusion for receiving and supporting the substrate; and at least a part of the substrate supporting base is outside the intermediate substrate supporting protrusion. The base is made of a dielectric material. 2. The base according to item 1 of the scope of the patent application, wherein a portion of the base supporting base located within the base supporting protrusion is made of a metal material. 3. The pedestal according to item 2 of the scope of patent application, wherein a portion of the base support base made of a dielectric material is formed by placing a layer of dielectric material along the outside of the support protrusions of the base material. The upper surface of the substrate supporting base is placed to form a dielectric ring. 4. The base as claimed in claim 3, wherein the substrate supporting protrusion is made of a metal material. 5. The base of claim 3, wherein the dielectric material is made of a material selected from the group consisting of a polymer-containing material, a ceramic material, and combinations thereof. 200525605 6. If the pedestal of the scope of patent application No. 2 is applied, the part of the substrate supporting base made of a dielectric material can roughly define the entirety of the substrate supporting base located outside the substrate supporting protrusion. thickness. 7. The base according to item 6 of the patent application, wherein the substrate supporting protrusion is made of a metal material.8·如申請專利範圍第6項之基座,其中該介電材料是由一 選自一含聚合物材料、一陶瓷材料及該等組合之群組中的 材料所製成。 9·如申請專利範圍第1項之基座,更包含一經配置以被收 受於該基材支撐底座上的覆蓋物。8. The pedestal according to item 6 of the application, wherein the dielectric material is made of a material selected from the group consisting of a polymer-containing material, a ceramic material, and combinations thereof. 9. The base according to item 1 of the scope of patent application, further comprising a cover configured to be received on the base support base.10·—種用以於一電漿蝕刻室中支撐一標線板之基座,其中 至少包含: 一本體,該本體係經配置以接收一 RF電源; 一標線板支撑底座,此係沿該本體之一上表面設 置,該標線板支撐底座具有一外部邊緣,以及一用以接收 且支樓該標線板之中間標線板支撐凸物; 且其中至少一部分位在該中間標線板支撐凸物外的 標線板支撐底座是由一介電材料所製成1。 21 200525605 11 ·如申請專利範圍第1 〇項之基座,其中: 位在該標線板支撐凸物内之該標線板支撐底座的部分 是由一金屬材料所製成; · 該標線板支撐凸物是由一金屬材料所製成。 •如申請專利範圍第10項之基座,其中該介電材料是由 一聚合物材料及一陶究#料之至少一者所製成。 •如申請專利範圍第12項之基座,其中該標線板支撐底 · 座中由一介電材料製成的部分係藉由將一介電材料層沿著 # ^ # ”線^反支撐凸物外之標線板支撐底座的上表面設置以 以形成一介電環的方式所構成。 14·如申請專利範圍第12項之基座,其中在該標線板支撐 底座中由一介電材料製成之部分可大致定義出位在標線板 支撐凸物外之標線板支撐底座的整個厚度。 15.—種於其内具有一用以支撐一標線板之基座的電漿蝕 刻室,其中包含: 一處理室本體,其界定出一底座邊壁,一側壁及一 圓頂; 一閘口,此係沿該侧壁設置以供一標線板移入該電 漿蝕刻室内;以及 一標線板支撐底座,此係用以於製程期間在該電漿 - 22 200525605 蝕刻室内支撐一標線板,該標線板支撐底座包含: 一本體,該本體係經配置以接收一 RF電源; 一標線板支撐底座,此係沿該本體之一上表面設 置,該標線板支撐底座具有一外部邊緣,以及一用以接收 且支撐該標線板之中間標線板支撐凸物; 且其中至少一部份位在該中間標線板支撐凸物 外的標線板支撐底座是由一介電材料所製成。10 · —A base for supporting a marking board in a plasma etching chamber, which at least includes: a body, the system is configured to receive an RF power source; a marking board supporting base, which is along the An upper surface of the body is provided, the marking board supporting base has an outer edge, and an intermediate marking board supporting protrusion for receiving and supporting the marking board; and at least a part of which is located on the intermediate marking The reticle support base outside the plate support projection is made of a dielectric material1. 21 200525605 11 · The base of item 10 of the scope of patent application, wherein: the part of the support base of the target board which is located within the support of the target board is made of a metal material; The plate supporting protrusion is made of a metal material. • The base of claim 10, wherein the dielectric material is made of at least one of a polymer material and a ceramic material. • For the base of item 12 of the scope of patent application, wherein the marking board supports the bottom part of the base made of a dielectric material is counter-supported by placing a layer of dielectric material along the # ^ # ”line ^ The upper surface of the reticle support base outside the projection is configured to form a dielectric ring. 14. The pedestal according to item 12 of the patent application scope, wherein the reticle support base is provided by a The portion made of electrical material can roughly define the entire thickness of the reticle support base located outside the reticle support protrusions. 15. An electrical device having a pedestal for supporting a reticle inside it. The plasma etching chamber includes: a processing chamber body defining a base side wall, a side wall and a dome; a gate, which is arranged along the side wall for a marking board to move into the plasma etching chamber; and A marking board supporting base is used to support a marking board in the plasma during the manufacturing process. The marking board supporting base includes: a body, the system is configured to receive an RF power source ; A marking board supports the base, which is along An upper surface of the body is provided, the marking board supporting base has an outer edge, and an intermediate marking board supporting protrusion for receiving and supporting the marking board; and at least a part of which is located on the intermediate marking The reticle support base outside the plate support projection is made of a dielectric material.16.如申請專利範圍第15項之處理室,其中: 位在該標線板支撐凸物内之該標線板支撐底座的部分 是由一金屬材料所製成; 該標線板支撐凸物是由一金屬材料所製成。 17·如申請專利範圍第16項之處理室,其中該介電材料是 由一聚合物材料及一陶瓷材料之至少一者所製成。16. The processing room according to item 15 of the scope of patent application, wherein: the part of the supporting base of the marking board which is located in the supporting board of the marking board is made of a metal material; the supporting board of the marking board Is made of a metallic material. 17. The processing chamber of claim 16 in which the dielectric material is made of at least one of a polymer material and a ceramic material.18·如申請專利範圍第17項之處理室,其中該標線板支撐 底座中由一介電材料製成之部分係藉由將一介電材料層沿 著位在該標線板支撐凸物外之標線板支撐底座的上表面設 置以形成一介電環的方式所構成。 1 9 ·如申請專利範圍第1 7項之處理室,其中在該標線板支 撐底座中由一介電材料所製成之部分可大致定義出位在該 標線板支樓凸物外之標線板支撐底座的整個厚度。 2318. The processing chamber according to item 17 of the scope of patent application, wherein the portion of the marking board supporting base made of a dielectric material supports a protrusion by placing a layer of dielectric material along the marking board. The upper surface of the outer reticle support base is configured to form a dielectric ring. 19 · If the processing room in item 17 of the scope of patent application, the part of the marking board support base made of a dielectric material can be roughly defined outside the protrusion of the marking board branch The reticle supports the entire thickness of the base. twenty three
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Families Citing this family (246)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
US7128806B2 (en)*2003-10-212006-10-31Applied Materials, Inc.Mask etch processing apparatus
JP2006332336A (en)*2005-05-262006-12-07Toshiba Corp Plasma etching apparatus for photomask and etching method
US8021231B2 (en)*2005-12-022011-09-20Walker Digital, LlcProblem gambling detection in tabletop games
US20070217119A1 (en)*2006-03-172007-09-20David JohnsonApparatus and Method for Carrying Substrates
US8206552B2 (en)*2008-06-252012-06-26Applied Materials, Inc.RF power delivery system in a semiconductor apparatus
US8809538B2 (en)*2009-01-122014-08-19Array Biopharma Inc.Piperidine-containing compounds and use thereof
US20110236806A1 (en)*2010-03-252011-09-29Applied Materials, Inc.Dc voltage charging of cathode for plasma striking
US20130023129A1 (en)2011-07-202013-01-24Asm America, Inc.Pressure transmitter for a semiconductor processing environment
US20160376700A1 (en)2013-02-012016-12-29Asm Ip Holding B.V.System for treatment of deposition reactor
US11326255B2 (en)*2013-02-072022-05-10Uchicago Argonne, LlcALD reactor for coating porous substrates
JP6444641B2 (en)*2014-07-242018-12-26株式会社ニューフレアテクノロジー Film forming apparatus, susceptor, and film forming method
US10941490B2 (en)2014-10-072021-03-09Asm Ip Holding B.V.Multiple temperature range susceptor, assembly, reactor and system including the susceptor, and methods of using the same
US10276355B2 (en)2015-03-122019-04-30Asm Ip Holding B.V.Multi-zone reactor, system including the reactor, and method of using the same
US11139308B2 (en)2015-12-292021-10-05Asm Ip Holding B.V.Atomic layer deposition of III-V compounds to form V-NAND devices
US10438833B2 (en)*2016-02-162019-10-08Lam Research CorporationWafer lift ring system for wafer transfer
US10529554B2 (en)2016-02-192020-01-07Asm Ip Holding B.V.Method for forming silicon nitride film selectively on sidewalls or flat surfaces of trenches
US10343920B2 (en)2016-03-182019-07-09Asm Ip Holding B.V.Aligned carbon nanotubes
US11453943B2 (en)2016-05-252022-09-27Asm Ip Holding B.V.Method for forming carbon-containing silicon/metal oxide or nitride film by ALD using silicon precursor and hydrocarbon precursor
JP6700118B2 (en)*2016-06-242020-05-27東京エレクトロン株式会社 Plasma deposition apparatus and substrate mounting table
US10612137B2 (en)2016-07-082020-04-07Asm Ip Holdings B.V.Organic reactants for atomic layer deposition
US9859151B1 (en)2016-07-082018-01-02Asm Ip Holding B.V.Selective film deposition method to form air gaps
US9887082B1 (en)2016-07-282018-02-06Asm Ip Holding B.V.Method and apparatus for filling a gap
US9812320B1 (en)2016-07-282017-11-07Asm Ip Holding B.V.Method and apparatus for filling a gap
US11532757B2 (en)2016-10-272022-12-20Asm Ip Holding B.V.Deposition of charge trapping layers
US10714350B2 (en)2016-11-012020-07-14ASM IP Holdings, B.V.Methods for forming a transition metal niobium nitride film on a substrate by atomic layer deposition and related semiconductor device structures
KR102546317B1 (en)2016-11-152023-06-21에이에스엠 아이피 홀딩 비.브이.Gas supply unit and substrate processing apparatus including the same
US11581186B2 (en)2016-12-152023-02-14Asm Ip Holding B.V.Sequential infiltration synthesis apparatus
US11251019B2 (en)*2016-12-152022-02-15Toyota Jidosha Kabushiki KaishaPlasma device
US11447861B2 (en)2016-12-152022-09-20Asm Ip Holding B.V.Sequential infiltration synthesis apparatus and a method of forming a patterned structure
US11390950B2 (en)2017-01-102022-07-19Asm Ip Holding B.V.Reactor system and method to reduce residue buildup during a film deposition process
US10468261B2 (en)2017-02-152019-11-05Asm Ip Holding B.V.Methods for forming a metallic film on a substrate by cyclical deposition and related semiconductor device structures
US10770286B2 (en)2017-05-082020-09-08Asm Ip Holdings B.V.Methods for selectively forming a silicon nitride film on a substrate and related semiconductor device structures
KR102417931B1 (en)*2017-05-302022-07-06에이에스엠 아이피 홀딩 비.브이.Substrate supporting device and substrate processing apparatus including the same
US12040200B2 (en)2017-06-202024-07-16Asm Ip Holding B.V.Semiconductor processing apparatus and methods for calibrating a semiconductor processing apparatus
US11306395B2 (en)2017-06-282022-04-19Asm Ip Holding B.V.Methods for depositing a transition metal nitride film on a substrate by atomic layer deposition and related deposition apparatus
KR20190009245A (en)2017-07-182019-01-28에이에스엠 아이피 홀딩 비.브이.Methods for forming a semiconductor device structure and related semiconductor device structures
US11374112B2 (en)2017-07-192022-06-28Asm Ip Holding B.V.Method for depositing a group IV semiconductor and related semiconductor device structures
US10590535B2 (en)2017-07-262020-03-17Asm Ip Holdings B.V.Chemical treatment, deposition and/or infiltration apparatus and method for using the same
TWI815813B (en)2017-08-042023-09-21荷蘭商Asm智慧財產控股公司Showerhead assembly for distributing a gas within a reaction chamber
US10692741B2 (en)2017-08-082020-06-23Asm Ip Holdings B.V.Radiation shield
US10770336B2 (en)2017-08-082020-09-08Asm Ip Holding B.V.Substrate lift mechanism and reactor including same
US11769682B2 (en)2017-08-092023-09-26Asm Ip Holding B.V.Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith
US11830730B2 (en)2017-08-292023-11-28Asm Ip Holding B.V.Layer forming method and apparatus
US11295980B2 (en)2017-08-302022-04-05Asm Ip Holding B.V.Methods for depositing a molybdenum metal film over a dielectric surface of a substrate by a cyclical deposition process and related semiconductor device structures
JP6863199B2 (en)2017-09-252021-04-21トヨタ自動車株式会社 Plasma processing equipment
US10658205B2 (en)2017-09-282020-05-19Asm Ip Holdings B.V.Chemical dispensing apparatus and methods for dispensing a chemical to a reaction chamber
US10403504B2 (en)2017-10-052019-09-03Asm Ip Holding B.V.Method for selectively depositing a metallic film on a substrate
US10923344B2 (en)2017-10-302021-02-16Asm Ip Holding B.V.Methods for forming a semiconductor structure and related semiconductor structures
WO2019103613A1 (en)2017-11-272019-05-31Asm Ip Holding B.V.A storage device for storing wafer cassettes for use with a batch furnace
CN111344522B (en)2017-11-272022-04-12阿斯莫Ip控股公司Including clean mini-environment device
US10872771B2 (en)2018-01-162020-12-22Asm Ip Holding B. V.Method for depositing a material film on a substrate within a reaction chamber by a cyclical deposition process and related device structures
TWI799494B (en)2018-01-192023-04-21荷蘭商Asm 智慧財產控股公司Deposition method
KR102695659B1 (en)2018-01-192024-08-14에이에스엠 아이피 홀딩 비.브이. Method for depositing a gap filling layer by plasma assisted deposition
US11081345B2 (en)2018-02-062021-08-03Asm Ip Holding B.V.Method of post-deposition treatment for silicon oxide film
WO2019158960A1 (en)2018-02-142019-08-22Asm Ip Holding B.V.A method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process
US10896820B2 (en)2018-02-142021-01-19Asm Ip Holding B.V.Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process
US10731249B2 (en)2018-02-152020-08-04Asm Ip Holding B.V.Method of forming a transition metal containing film on a substrate by a cyclical deposition process, a method for supplying a transition metal halide compound to a reaction chamber, and related vapor deposition apparatus
KR102636427B1 (en)2018-02-202024-02-13에이에스엠 아이피 홀딩 비.브이.Substrate processing method and apparatus
US10975470B2 (en)2018-02-232021-04-13Asm Ip Holding B.V.Apparatus for detecting or monitoring for a chemical precursor in a high temperature environment
US11473195B2 (en)2018-03-012022-10-18Asm Ip Holding B.V.Semiconductor processing apparatus and a method for processing a substrate
KR102646467B1 (en)2018-03-272024-03-11에이에스엠 아이피 홀딩 비.브이.Method of forming an electrode on a substrate and a semiconductor device structure including an electrode
KR102600229B1 (en)2018-04-092023-11-10에이에스엠 아이피 홀딩 비.브이.Substrate supporting device, substrate processing apparatus including the same and substrate processing method
US12025484B2 (en)2018-05-082024-07-02Asm Ip Holding B.V.Thin film forming method
US12272527B2 (en)2018-05-092025-04-08Asm Ip Holding B.V.Apparatus for use with hydrogen radicals and method of using same
KR102596988B1 (en)2018-05-282023-10-31에이에스엠 아이피 홀딩 비.브이.Method of processing a substrate and a device manufactured by the same
US11718913B2 (en)2018-06-042023-08-08Asm Ip Holding B.V.Gas distribution system and reactor system including same
KR102568797B1 (en)2018-06-212023-08-21에이에스엠 아이피 홀딩 비.브이.Substrate processing system
US10797133B2 (en)2018-06-212020-10-06Asm Ip Holding B.V.Method for depositing a phosphorus doped silicon arsenide film and related semiconductor device structures
TWI873894B (en)2018-06-272025-02-21荷蘭商Asm Ip私人控股有限公司Cyclic deposition methods for forming metal-containing material and films and structures including the metal-containing material
KR102854019B1 (en)2018-06-272025-09-02에이에스엠 아이피 홀딩 비.브이. Periodic deposition method for forming a metal-containing material and films and structures comprising the metal-containing material
US10388513B1 (en)2018-07-032019-08-20Asm Ip Holding B.V.Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US10755922B2 (en)2018-07-032020-08-25Asm Ip Holding B.V.Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US11430674B2 (en)2018-08-222022-08-30Asm Ip Holding B.V.Sensor array, apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods
US11024523B2 (en)2018-09-112021-06-01Asm Ip Holding B.V.Substrate processing apparatus and method
KR102707956B1 (en)2018-09-112024-09-19에이에스엠 아이피 홀딩 비.브이.Method for deposition of a thin film
CN110970344B (en)2018-10-012024-10-25Asmip控股有限公司Substrate holding apparatus, system comprising the same and method of using the same
KR102592699B1 (en)2018-10-082023-10-23에이에스엠 아이피 홀딩 비.브이.Substrate support unit and apparatuses for depositing thin film and processing the substrate including the same
KR102546322B1 (en)2018-10-192023-06-21에이에스엠 아이피 홀딩 비.브이.Substrate processing apparatus and substrate processing method
US12378665B2 (en)2018-10-262025-08-05Asm Ip Holding B.V.High temperature coatings for a preclean and etch apparatus and related methods
US11087997B2 (en)2018-10-312021-08-10Asm Ip Holding B.V.Substrate processing apparatus for processing substrates
KR102748291B1 (en)2018-11-022024-12-31에이에스엠 아이피 홀딩 비.브이.Substrate support unit and substrate processing apparatus including the same
US11572620B2 (en)2018-11-062023-02-07Asm Ip Holding B.V.Methods for selectively depositing an amorphous silicon film on a substrate
US10818758B2 (en)2018-11-162020-10-27Asm Ip Holding B.V.Methods for forming a metal silicate film on a substrate in a reaction chamber and related semiconductor device structures
US12040199B2 (en)2018-11-282024-07-16Asm Ip Holding B.V.Substrate processing apparatus for processing substrates
KR102636428B1 (en)2018-12-042024-02-13에이에스엠 아이피 홀딩 비.브이.A method for cleaning a substrate processing apparatus
US11158513B2 (en)2018-12-132021-10-26Asm Ip Holding B.V.Methods for forming a rhenium-containing film on a substrate by a cyclical deposition process and related semiconductor device structures
TWI874340B (en)2018-12-142025-03-01荷蘭商Asm Ip私人控股有限公司Method of forming device structure, structure formed by the method and system for performing the method
TWI866480B (en)2019-01-172024-12-11荷蘭商Asm Ip 私人控股有限公司Methods of forming a transition metal containing film on a substrate by a cyclical deposition process
TWI873122B (en)2019-02-202025-02-21荷蘭商Asm Ip私人控股有限公司Method of filling a recess formed within a surface of a substrate, semiconductor structure formed according to the method, and semiconductor processing apparatus
TWI845607B (en)2019-02-202024-06-21荷蘭商Asm Ip私人控股有限公司Cyclical deposition method and apparatus for filling a recess formed within a substrate surface
TWI838458B (en)2019-02-202024-04-11荷蘭商Asm Ip私人控股有限公司Apparatus and methods for plug fill deposition in 3-d nand applications
TWI842826B (en)2019-02-222024-05-21荷蘭商Asm Ip私人控股有限公司Substrate processing apparatus and method for processing substrate
KR102858005B1 (en)2019-03-082025-09-09에이에스엠 아이피 홀딩 비.브이.Method for Selective Deposition of Silicon Nitride Layer and Structure Including Selectively-Deposited Silicon Nitride Layer
US11742198B2 (en)2019-03-082023-08-29Asm Ip Holding B.V.Structure including SiOCN layer and method of forming same
JP2020167398A (en)2019-03-282020-10-08エーエスエム・アイピー・ホールディング・ベー・フェー Door openers and substrate processing equipment provided with door openers
KR102809999B1 (en)2019-04-012025-05-19에이에스엠 아이피 홀딩 비.브이.Method of manufacturing semiconductor device
KR20200123380A (en)2019-04-192020-10-29에이에스엠 아이피 홀딩 비.브이.Layer forming method and apparatus
KR20200125453A (en)2019-04-242020-11-04에이에스엠 아이피 홀딩 비.브이.Gas-phase reactor system and method of using same
KR20200130121A (en)2019-05-072020-11-18에이에스엠 아이피 홀딩 비.브이.Chemical source vessel with dip tube
KR20200130652A (en)2019-05-102020-11-19에이에스엠 아이피 홀딩 비.브이.Method of depositing material onto a surface and structure formed according to the method
JP7612342B2 (en)2019-05-162025-01-14エーエスエム・アイピー・ホールディング・ベー・フェー Wafer boat handling apparatus, vertical batch furnace and method
JP7598201B2 (en)2019-05-162024-12-11エーエスエム・アイピー・ホールディング・ベー・フェー Wafer boat handling apparatus, vertical batch furnace and method
USD947913S1 (en)2019-05-172022-04-05Asm Ip Holding B.V.Susceptor shaft
USD975665S1 (en)2019-05-172023-01-17Asm Ip Holding B.V.Susceptor shaft
KR20200141002A (en)2019-06-062020-12-17에이에스엠 아이피 홀딩 비.브이.Method of using a gas-phase reactor system including analyzing exhausted gas
KR20200141931A (en)2019-06-102020-12-21에이에스엠 아이피 홀딩 비.브이.Method for cleaning quartz epitaxial chambers
KR20200143254A (en)2019-06-112020-12-23에이에스엠 아이피 홀딩 비.브이.Method of forming an electronic structure using an reforming gas, system for performing the method, and structure formed using the method
KR20210005515A (en)2019-07-032021-01-14에이에스엠 아이피 홀딩 비.브이.Temperature control assembly for substrate processing apparatus and method of using same
JP7499079B2 (en)2019-07-092024-06-13エーエスエム・アイピー・ホールディング・ベー・フェー Plasma device using coaxial waveguide and substrate processing method
CN112216646A (en)2019-07-102021-01-12Asm Ip私人控股有限公司Substrate supporting assembly and substrate processing device comprising same
KR20210010307A (en)2019-07-162021-01-27에이에스엠 아이피 홀딩 비.브이.Substrate processing apparatus
KR20210010816A (en)2019-07-172021-01-28에이에스엠 아이피 홀딩 비.브이.Radical assist ignition plasma system and method
KR102860110B1 (en)2019-07-172025-09-16에이에스엠 아이피 홀딩 비.브이.Methods of forming silicon germanium structures
US11643724B2 (en)2019-07-182023-05-09Asm Ip Holding B.V.Method of forming structures using a neutral beam
KR20210010817A (en)2019-07-192021-01-28에이에스엠 아이피 홀딩 비.브이.Method of Forming Topology-Controlled Amorphous Carbon Polymer Film
TWI851767B (en)2019-07-292024-08-11荷蘭商Asm Ip私人控股有限公司Methods for selective deposition utilizing n-type dopants and/or alternative dopants to achieve high dopant incorporation
US12169361B2 (en)2019-07-302024-12-17Asm Ip Holding B.V.Substrate processing apparatus and method
CN112309899A (en)2019-07-302021-02-02Asm Ip私人控股有限公司Substrate processing apparatus
CN112309900A (en)2019-07-302021-02-02Asm Ip私人控股有限公司Substrate processing apparatus
US11587815B2 (en)2019-07-312023-02-21Asm Ip Holding B.V.Vertical batch furnace assembly
US11227782B2 (en)2019-07-312022-01-18Asm Ip Holding B.V.Vertical batch furnace assembly
US11587814B2 (en)2019-07-312023-02-21Asm Ip Holding B.V.Vertical batch furnace assembly
CN112323048B (en)2019-08-052024-02-09Asm Ip私人控股有限公司Liquid level sensor for chemical source container
CN112342526A (en)2019-08-092021-02-09Asm Ip私人控股有限公司Heater assembly including cooling device and method of using same
USD965044S1 (en)2019-08-192022-09-27Asm Ip Holding B.V.Susceptor shaft
USD965524S1 (en)2019-08-192022-10-04Asm Ip Holding B.V.Susceptor support
JP2021031769A (en)2019-08-212021-03-01エーエスエム アイピー ホールディング ビー.ブイ.Production apparatus of mixed gas of film deposition raw material and film deposition apparatus
USD979506S1 (en)2019-08-222023-02-28Asm Ip Holding B.V.Insulator
KR20210024423A (en)2019-08-222021-03-05에이에스엠 아이피 홀딩 비.브이.Method for forming a structure with a hole
KR20210024420A (en)2019-08-232021-03-05에이에스엠 아이피 홀딩 비.브이.Method for depositing silicon oxide film having improved quality by peald using bis(diethylamino)silane
US11286558B2 (en)2019-08-232022-03-29Asm Ip Holding B.V.Methods for depositing a molybdenum nitride film on a surface of a substrate by a cyclical deposition process and related semiconductor device structures including a molybdenum nitride film
KR102806450B1 (en)2019-09-042025-05-12에이에스엠 아이피 홀딩 비.브이.Methods for selective deposition using a sacrificial capping layer
KR102733104B1 (en)2019-09-052024-11-22에이에스엠 아이피 홀딩 비.브이.Substrate processing apparatus
US11562901B2 (en)2019-09-252023-01-24Asm Ip Holding B.V.Substrate processing method
CN112593212B (en)2019-10-022023-12-22Asm Ip私人控股有限公司Method for forming topologically selective silicon oxide film by cyclic plasma enhanced deposition process
TW202128273A (en)2019-10-082021-08-01荷蘭商Asm Ip私人控股有限公司Gas injection system, reactor system, and method of depositing material on surface of substratewithin reaction chamber
KR20210042810A (en)2019-10-082021-04-20에이에스엠 아이피 홀딩 비.브이.Reactor system including a gas distribution assembly for use with activated species and method of using same
TWI846953B (en)2019-10-082024-07-01荷蘭商Asm Ip私人控股有限公司Substrate processing device
TWI846966B (en)2019-10-102024-07-01荷蘭商Asm Ip私人控股有限公司Method of forming a photoresist underlayer and structure including same
US12009241B2 (en)2019-10-142024-06-11Asm Ip Holding B.V.Vertical batch furnace assembly with detector to detect cassette
TWI834919B (en)2019-10-162024-03-11荷蘭商Asm Ip私人控股有限公司Method of topology-selective film formation of silicon oxide
US11637014B2 (en)2019-10-172023-04-25Asm Ip Holding B.V.Methods for selective deposition of doped semiconductor material
KR102845724B1 (en)2019-10-212025-08-13에이에스엠 아이피 홀딩 비.브이.Apparatus and methods for selectively etching films
KR20210050453A (en)2019-10-252021-05-07에이에스엠 아이피 홀딩 비.브이.Methods for filling a gap feature on a substrate surface and related semiconductor structures
US11646205B2 (en)2019-10-292023-05-09Asm Ip Holding B.V.Methods of selectively forming n-type doped material on a surface, systems for selectively forming n-type doped material, and structures formed using same
KR20210054983A (en)2019-11-052021-05-14에이에스엠 아이피 홀딩 비.브이.Structures with doped semiconductor layers and methods and systems for forming same
US11501968B2 (en)2019-11-152022-11-15Asm Ip Holding B.V.Method for providing a semiconductor device with silicon filled gaps
KR102861314B1 (en)2019-11-202025-09-17에이에스엠 아이피 홀딩 비.브이.Method of depositing carbon-containing material on a surface of a substrate, structure formed using the method, and system for forming the structure
US11450529B2 (en)2019-11-262022-09-20Asm Ip Holding B.V.Methods for selectively forming a target film on a substrate comprising a first dielectric surface and a second metallic surface
CN112951697B (en)2019-11-262025-07-29Asmip私人控股有限公司Substrate processing apparatus
CN112885692B (en)2019-11-292025-08-15Asmip私人控股有限公司Substrate processing apparatus
CN120432376A (en)2019-11-292025-08-05Asm Ip私人控股有限公司Substrate processing apparatus
JP7527928B2 (en)2019-12-022024-08-05エーエスエム・アイピー・ホールディング・ベー・フェー Substrate processing apparatus and substrate processing method
KR20210070898A (en)2019-12-042021-06-15에이에스엠 아이피 홀딩 비.브이.Substrate processing apparatus
KR20210078405A (en)2019-12-172021-06-28에이에스엠 아이피 홀딩 비.브이.Method of forming vanadium nitride layer and structure including the vanadium nitride layer
KR20210080214A (en)2019-12-192021-06-30에이에스엠 아이피 홀딩 비.브이.Methods for filling a gap feature on a substrate and related semiconductor structures
JP7636892B2 (en)2020-01-062025-02-27エーエスエム・アイピー・ホールディング・ベー・フェー Channeled Lift Pins
JP7730637B2 (en)2020-01-062025-08-28エーエスエム・アイピー・ホールディング・ベー・フェー Gas delivery assembly, components thereof, and reactor system including same
US11993847B2 (en)2020-01-082024-05-28Asm Ip Holding B.V.Injector
KR20210093163A (en)2020-01-162021-07-27에이에스엠 아이피 홀딩 비.브이.Method of forming high aspect ratio features
KR102675856B1 (en)2020-01-202024-06-17에이에스엠 아이피 홀딩 비.브이.Method of forming thin film and method of modifying surface of thin film
TWI889744B (en)2020-01-292025-07-11荷蘭商Asm Ip私人控股有限公司Contaminant trap system, and baffle plate stack
TW202513845A (en)2020-02-032025-04-01荷蘭商Asm Ip私人控股有限公司Semiconductor structures and methods for forming the same
KR20210100010A (en)2020-02-042021-08-13에이에스엠 아이피 홀딩 비.브이.Method and apparatus for transmittance measurements of large articles
US11776846B2 (en)2020-02-072023-10-03Asm Ip Holding B.V.Methods for depositing gap filling fluids and related systems and devices
KR20210103956A (en)2020-02-132021-08-24에이에스엠 아이피 홀딩 비.브이.Substrate processing apparatus including light receiving device and calibration method of light receiving device
US11111578B1 (en)2020-02-132021-09-07Uchicago Argonne, LlcAtomic layer deposition of fluoride thin films
TW202146691A (en)2020-02-132021-12-16荷蘭商Asm Ip私人控股有限公司Gas distribution assembly, shower plate assembly, and method of adjusting conductance of gas to reaction chamber
TWI855223B (en)2020-02-172024-09-11荷蘭商Asm Ip私人控股有限公司Method for growing phosphorous-doped silicon layer
CN113410160A (en)2020-02-282021-09-17Asm Ip私人控股有限公司System specially used for cleaning parts
KR20210113043A (en)2020-03-042021-09-15에이에스엠 아이피 홀딩 비.브이.Alignment fixture for a reactor system
US11876356B2 (en)2020-03-112024-01-16Asm Ip Holding B.V.Lockout tagout assembly and system and method of using same
KR20210116240A (en)2020-03-112021-09-27에이에스엠 아이피 홀딩 비.브이.Substrate handling device with adjustable joints
KR102775390B1 (en)2020-03-122025-02-28에이에스엠 아이피 홀딩 비.브이.Method for Fabricating Layer Structure Having Target Topological Profile
US12173404B2 (en)2020-03-172024-12-24Asm Ip Holding B.V.Method of depositing epitaxial material, structure formed using the method, and system for performing the method
KR102755229B1 (en)2020-04-022025-01-14에이에스엠 아이피 홀딩 비.브이.Thin film forming method
TWI887376B (en)2020-04-032025-06-21荷蘭商Asm Ip私人控股有限公司Method for manufacturing semiconductor device
TWI888525B (en)2020-04-082025-07-01荷蘭商Asm Ip私人控股有限公司Apparatus and methods for selectively etching silcon oxide films
KR20210127620A (en)2020-04-132021-10-22에이에스엠 아이피 홀딩 비.브이.method of forming a nitrogen-containing carbon film and system for performing the method
KR20210128343A (en)2020-04-152021-10-26에이에스엠 아이피 홀딩 비.브이.Method of forming chromium nitride layer and structure including the chromium nitride layer
US11821078B2 (en)2020-04-152023-11-21Asm Ip Holding B.V.Method for forming precoat film and method for forming silicon-containing film
US11996289B2 (en)2020-04-162024-05-28Asm Ip Holding B.V.Methods of forming structures including silicon germanium and silicon layers, devices formed using the methods, and systems for performing the methods
KR20210130646A (en)2020-04-212021-11-01에이에스엠 아이피 홀딩 비.브이.Method for processing a substrate
KR20210132600A (en)2020-04-242021-11-04에이에스엠 아이피 홀딩 비.브이.Methods and systems for depositing a layer comprising vanadium, nitrogen, and a further element
TW202208671A (en)2020-04-242022-03-01荷蘭商Asm Ip私人控股有限公司Methods of forming structures including vanadium boride and vanadium phosphide layers
KR20210132612A (en)2020-04-242021-11-04에이에스엠 아이피 홀딩 비.브이.Methods and apparatus for stabilizing vanadium compounds
KR102866804B1 (en)2020-04-242025-09-30에이에스엠 아이피 홀딩 비.브이.Vertical batch furnace assembly comprising a cooling gas supply
CN113555279A (en)2020-04-242021-10-26Asm Ip私人控股有限公司 Methods of forming vanadium nitride-containing layers and structures comprising the same
KR102783898B1 (en)2020-04-292025-03-18에이에스엠 아이피 홀딩 비.브이.Solid source precursor vessel
KR20210134869A (en)2020-05-012021-11-11에이에스엠 아이피 홀딩 비.브이.Fast FOUP swapping with a FOUP handler
JP7726664B2 (en)2020-05-042025-08-20エーエスエム・アイピー・ホールディング・ベー・フェー Substrate processing system for processing a substrate
KR20210137395A (en)2020-05-072021-11-17에이에스엠 아이피 홀딩 비.브이.Apparatus and methods for performing an in-situ etch of reaction chambers with fluorine-based radicals
KR102788543B1 (en)2020-05-132025-03-27에이에스엠 아이피 홀딩 비.브이.Laser alignment fixture for a reactor system
TW202146699A (en)2020-05-152021-12-16荷蘭商Asm Ip私人控股有限公司Method of forming a silicon germanium layer, semiconductor structure, semiconductor device, method of forming a deposition layer, and deposition system
KR20210143653A (en)2020-05-192021-11-29에이에스엠 아이피 홀딩 비.브이.Substrate processing apparatus
KR102795476B1 (en)2020-05-212025-04-11에이에스엠 아이피 홀딩 비.브이.Structures including multiple carbon layers and methods of forming and using same
KR20210145079A (en)2020-05-212021-12-01에이에스엠 아이피 홀딩 비.브이.Flange and apparatus for processing substrates
TWI873343B (en)2020-05-222025-02-21荷蘭商Asm Ip私人控股有限公司Reaction system for forming thin film on substrate
KR20210146802A (en)2020-05-262021-12-06에이에스엠 아이피 홀딩 비.브이.Method for depositing boron and gallium containing silicon germanium layers
TWI876048B (en)2020-05-292025-03-11荷蘭商Asm Ip私人控股有限公司Substrate processing device
TW202212620A (en)2020-06-022022-04-01荷蘭商Asm Ip私人控股有限公司Apparatus for processing substrate, method of forming film, and method of controlling apparatus for processing substrate
TW202208659A (en)2020-06-162022-03-01荷蘭商Asm Ip私人控股有限公司Method for depositing boron containing silicon germanium layers
TW202218133A (en)2020-06-242022-05-01荷蘭商Asm Ip私人控股有限公司Method for forming a layer provided with silicon
TWI873359B (en)2020-06-302025-02-21荷蘭商Asm Ip私人控股有限公司Substrate processing method
TW202202649A (en)2020-07-082022-01-16荷蘭商Asm Ip私人控股有限公司Substrate processing method
KR20220010438A (en)2020-07-172022-01-25에이에스엠 아이피 홀딩 비.브이.Structures and methods for use in photolithography
TWI878570B (en)2020-07-202025-04-01荷蘭商Asm Ip私人控股有限公司Method and system for depositing molybdenum layers
KR20220011092A (en)2020-07-202022-01-27에이에스엠 아이피 홀딩 비.브이.Method and system for forming structures including transition metal layers
US12322591B2 (en)2020-07-272025-06-03Asm Ip Holding B.V.Thin film deposition process
KR20220021863A (en)2020-08-142022-02-22에이에스엠 아이피 홀딩 비.브이.Method for processing a substrate
US12040177B2 (en)2020-08-182024-07-16Asm Ip Holding B.V.Methods for forming a laminate film by cyclical plasma-enhanced deposition processes
TW202228863A (en)2020-08-252022-08-01荷蘭商Asm Ip私人控股有限公司Method for cleaning a substrate, method for selectively depositing, and reaction system
US11725280B2 (en)2020-08-262023-08-15Asm Ip Holding B.V.Method for forming metal silicon oxide and metal silicon oxynitride layers
TW202229601A (en)2020-08-272022-08-01荷蘭商Asm Ip私人控股有限公司Method of forming patterned structures, method of manipulating mechanical property, device structure, and substrate processing system
USD990534S1 (en)2020-09-112023-06-27Asm Ip Holding B.V.Weighted lift pin
KR20220036866A (en)2020-09-162022-03-23에이에스엠 아이피 홀딩 비.브이.Silicon oxide deposition method
USD1012873S1 (en)2020-09-242024-01-30Asm Ip Holding B.V.Electrode for semiconductor processing apparatus
TWI889903B (en)2020-09-252025-07-11荷蘭商Asm Ip私人控股有限公司Semiconductor processing method
US12009224B2 (en)2020-09-292024-06-11Asm Ip Holding B.V.Apparatus and method for etching metal nitrides
KR20220045900A (en)2020-10-062022-04-13에이에스엠 아이피 홀딩 비.브이.Deposition method and an apparatus for depositing a silicon-containing material
CN114293174A (en)2020-10-072022-04-08Asm Ip私人控股有限公司Gas supply unit and substrate processing apparatus including the same
TW202229613A (en)2020-10-142022-08-01荷蘭商Asm Ip私人控股有限公司Method of depositing material on stepped structure
TW202232565A (en)2020-10-152022-08-16荷蘭商Asm Ip私人控股有限公司Method of manufacturing semiconductor device, and substrate treatment apparatus using ether-cat
TW202217037A (en)2020-10-222022-05-01荷蘭商Asm Ip私人控股有限公司Method of depositing vanadium metal, structure, device and a deposition assembly
TW202223136A (en)2020-10-282022-06-16荷蘭商Asm Ip私人控股有限公司Method for forming layer on substrate, and semiconductor processing system
TW202229620A (en)2020-11-122022-08-01特文特大學Deposition system, method for controlling reaction condition, method for depositing
US12100579B2 (en)*2020-11-182024-09-24Applied Materials, Inc.Deposition ring for thin substrate handling via edge clamping
TW202229795A (en)2020-11-232022-08-01荷蘭商Asm Ip私人控股有限公司A substrate processing apparatus with an injector
TW202235649A (en)2020-11-242022-09-16荷蘭商Asm Ip私人控股有限公司Methods for filling a gap and related systems and devices
TW202235675A (en)2020-11-302022-09-16荷蘭商Asm Ip私人控股有限公司Injector, and substrate processing apparatus
US12255053B2 (en)2020-12-102025-03-18Asm Ip Holding B.V.Methods and systems for depositing a layer
TW202233884A (en)2020-12-142022-09-01荷蘭商Asm Ip私人控股有限公司Method of forming structures for threshold voltage control
US11946137B2 (en)2020-12-162024-04-02Asm Ip Holding B.V.Runout and wobble measurement fixtures
TW202232639A (en)2020-12-182022-08-16荷蘭商Asm Ip私人控股有限公司Wafer processing apparatus with a rotatable table
CN114714268A (en)*2020-12-222022-07-08浙江蓝晶芯微电子有限公司Ultrahigh frequency ultrathin quartz wafer mask positioning tool and positioning method
TW202231903A (en)2020-12-222022-08-16荷蘭商Asm Ip私人控股有限公司Transition metal deposition method, transition metal layer, and deposition assembly for depositing transition metal on substrate
TW202226899A (en)2020-12-222022-07-01荷蘭商Asm Ip私人控股有限公司Plasma treatment device having matching box
TW202242184A (en)2020-12-222022-11-01荷蘭商Asm Ip私人控股有限公司Precursor capsule, precursor vessel, vapor deposition assembly, and method of loading solid precursor into precursor vessel
USD980813S1 (en)2021-05-112023-03-14Asm Ip Holding B.V.Gas flow control plate for substrate processing apparatus
USD981973S1 (en)2021-05-112023-03-28Asm Ip Holding B.V.Reactor wall for substrate processing apparatus
USD980814S1 (en)2021-05-112023-03-14Asm Ip Holding B.V.Gas distributor for substrate processing apparatus
USD1023959S1 (en)2021-05-112024-04-23Asm Ip Holding B.V.Electrode for substrate processing apparatus
USD990441S1 (en)2021-09-072023-06-27Asm Ip Holding B.V.Gas flow control plate
US12065738B2 (en)2021-10-222024-08-20Uchicago Argonne, LlcMethod of making thin films of sodium fluorides and their derivatives by ALD
USD1060598S1 (en)2021-12-032025-02-04Asm Ip Holding B.V.Split showerhead cover
US11901169B2 (en)2022-02-142024-02-13Uchicago Argonne, LlcBarrier coatings

Family Cites Families (36)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
US5374147A (en)*1982-07-291994-12-20Tokyo Electron LimitedTransfer device for transferring a substrate
US4676193A (en)*1984-02-271987-06-30Applied Magnetics CorporationStabilized mask assembly for direct deposition of a thin film pattern onto a substrate
US4586743A (en)*1984-09-241986-05-06Intelledex IncorporatedRobotic gripper for disk-shaped objects
US5280983A (en)*1985-01-221994-01-25Applied Materials, Inc.Semiconductor processing system with robotic autoloader and load lock
US4813732A (en)*1985-03-071989-03-21Epsilon Technology, Inc.Apparatus and method for automated wafer handling
US4705951A (en)*1986-04-171987-11-10Varian Associates, Inc.Wafer processing system
US4842683A (en)*1986-12-191989-06-27Applied Materials, Inc.Magnetic field-enhanced plasma etch reactor
US5080549A (en)*1987-05-111992-01-14Epsilon Technology, Inc.Wafer handling system with Bernoulli pick-up
DE3803411A1 (en)*1988-02-051989-08-17Leybold Ag DEVICE FOR HOLDING WORKPIECES
US5022695A (en)*1989-01-301991-06-11Texas Instruments IncorporatedSemiconductor slice holder
EP0600851B1 (en)*1989-10-201999-02-03Applied Materials, Inc.Robot apparatus
CH680275A5 (en)*1990-03-051992-07-31Tet Techno Investment Trust
US5292399A (en)*1990-04-191994-03-08Applied Materials, Inc.Plasma etching apparatus with conductive means for inhibiting arcing
US5180276A (en)*1991-04-181993-01-19Brooks Automation, Inc.Articulated arm transfer device
US5580388A (en)*1993-01-211996-12-03Moore Epitaxial, Inc.Multi-layer susceptor for rapid thermal process reactors
US5352294A (en)*1993-01-281994-10-04White John MAlignment of a shadow frame and large flat substrates on a support
CN1046654C (en)*1993-04-161999-11-24布鲁克斯自动化公司Articulated arm transfer device
US5643366A (en)*1994-01-311997-07-01Applied Materials, Inc.Wafer handling within a vacuum chamber using vacuum
US5791895A (en)*1994-02-171998-08-11Novellus Systems, Inc.Apparatus for thermal treatment of thin film wafer
US5688358A (en)*1995-03-081997-11-18Applied Materials, Inc.R.F. plasma reactor with larger-than-wafer pedestal conductor
EP0742579A2 (en)*1995-05-111996-11-13Applied Materials, Inc.A method and apparatus for concentrating plasma on a substrate surface during processing
JP2676334B2 (en)*1995-07-311997-11-12住友重機械工業株式会社 Robot arm
US5733096A (en)*1995-09-131998-03-31Silicon Valley Group, Inc.Multi-stage telescoping structure
US5669644A (en)*1995-11-131997-09-23Kokusai Electric Co., Ltd.Wafer transfer plate
US5647626A (en)*1995-12-041997-07-15Taiwan Semiconductor Manufacturing Company, Ltd.Wafer pickup system
JPH09205130A (en)*1996-01-171997-08-05Applied Materials Inc Wafer support device
US6217663B1 (en)*1996-06-212001-04-17Kokusai Electric Co., Ltd.Substrate processing apparatus and substrate processing method
US6284093B1 (en)*1996-11-292001-09-04Applied Materials, Inc.Shield or ring surrounding semiconductor workpiece in plasma chamber
US6203617B1 (en)*1998-03-262001-03-20Tokyo Electron LimitedConveying unit and substrate processing unit
JP2001196309A (en)*2000-01-062001-07-19Hitachi Ltd Plasma processing equipment
US7141757B2 (en)*2000-03-172006-11-28Applied Materials, Inc.Plasma reactor with overhead RF source power electrode having a resonance that is virtually pressure independent
JP4405048B2 (en)*2000-07-112010-01-27Okiセミコンダクタ株式会社 Alignment jig
JP2002134484A (en)*2000-10-192002-05-10Asm Japan KkSemiconductor substrate holding device
US6726804B2 (en)*2001-01-222004-04-27Liang-Guo WangRF power delivery for plasma processing using modulated power signal
JP4098975B2 (en)*2001-10-292008-06-11キヤノンアネルバ株式会社 Double electrode wafer holder for plasma assisted wafer processing equipment
US6887340B2 (en)*2001-11-132005-05-03Lam Research CorporationEtch rate uniformity

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