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JPS6469135A - Time division multiplexing device - Google Patents

Time division multiplexing device

Info

Publication number
JPS6469135A
JPS6469135AJP22733987AJP22733987AJPS6469135AJP S6469135 AJPS6469135 AJP S6469135AJP 22733987 AJP22733987 AJP 22733987AJP 22733987 AJP22733987 AJP 22733987AJP S6469135 AJPS6469135 AJP S6469135A
Authority
JP
Japan
Prior art keywords
reading
assigning table
writing
dual port
time division
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22733987A
Other languages
Japanese (ja)
Inventor
Hidekazu Tsuruta
Toru Ejima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Engineering Corp
Toshiba Corp
Original Assignee
Toshiba Engineering Corp
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Engineering Corp, Toshiba CorpfiledCriticalToshiba Engineering Corp
Priority to JP22733987ApriorityCriticalpatent/JPS6469135A/en
Publication of JPS6469135ApublicationCriticalpatent/JPS6469135A/en
Pendinglegal-statusCriticalCurrent

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Abstract

PURPOSE:To simplify a hardware and to decrease a cost by using a dual port RAM as assigning table part. CONSTITUTION:For an assigning table part, a dual port RAM 20 is used, one side port of the dual port RAM 20 can access the writing and reading from a control part 4 to execute the re-writing and reading of the contents of an assigning table and other side is set so as to be able to execute only the reading. When the writing command of one side port is executed, an address given to respective ports is compared by a comparing means, when the value of both is coincident, the priority is given to one side port side and the output to a data bus 2 of address information is prohibited. Thus, since the access from a control part side can be executed without giving an influence to an inherent output action for the assigning table part and the hardware constitution can be simplified, the cost can be decreased.
JP22733987A1987-09-101987-09-10Time division multiplexing devicePendingJPS6469135A (en)

Priority Applications (1)

Application NumberPriority DateFiling DateTitle
JP22733987AJPS6469135A (en)1987-09-101987-09-10Time division multiplexing device

Applications Claiming Priority (1)

Application NumberPriority DateFiling DateTitle
JP22733987AJPS6469135A (en)1987-09-101987-09-10Time division multiplexing device

Publications (1)

Publication NumberPublication Date
JPS6469135Atrue JPS6469135A (en)1989-03-15

Family

ID=16859258

Family Applications (1)

Application NumberTitlePriority DateFiling Date
JP22733987APendingJPS6469135A (en)1987-09-101987-09-10Time division multiplexing device

Country Status (1)

CountryLink
JP (1)JPS6469135A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
JPH07177117A (en)*1993-12-201995-07-14Nec CorpCommunication equipment
WO2001045417A1 (en)*1999-12-142001-06-21General Instrument CorporationDynamic configuration of input filtering parameters for an mpeg re-multiplexer

Cited By (2)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
JPH07177117A (en)*1993-12-201995-07-14Nec CorpCommunication equipment
WO2001045417A1 (en)*1999-12-142001-06-21General Instrument CorporationDynamic configuration of input filtering parameters for an mpeg re-multiplexer

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