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JPS6449270A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

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Publication number
JPS6449270A
JPS6449270AJP62205238AJP20523887AJPS6449270AJP S6449270 AJPS6449270 AJP S6449270AJP 62205238 AJP62205238 AJP 62205238AJP 20523887 AJP20523887 AJP 20523887AJP S6449270 AJPS6449270 AJP S6449270A
Authority
JP
Japan
Prior art keywords
psg
film
flattened
drain
source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62205238A
Other languages
Japanese (ja)
Inventor
Michihiko Hasegawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu LtdfiledCriticalFujitsu Ltd
Priority to JP62205238ApriorityCriticalpatent/JPS6449270A/en
Publication of JPS6449270ApublicationCriticalpatent/JPS6449270A/en
Pendinglegal-statusCriticalCurrent

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Abstract

PURPOSE:To easily form a wiring part on a PSG film and to form the device characteristic of a desired value by a method wherein, when a MOSFET is to be manufactured, a PSG interlayer insulating film is melted and flattened and, after that, a source and a drain are formed by implanting an impurity. CONSTITUTION:An SiO2 film 17 is formed on an Si substrate 16; an island- shaped single-crystal Si layer (an SOI island) 19 is formed thereon. A gate insulating film 11 and a gate electrode 12 are formed on the surface of the SOI island 19; after that, a PSG (phospho-silicate glass) insulating film 13 is deposited on the whole surface of the substrate. A contact hole is made in the PSG film 13; after that, the assembly is annealed in an atmosphere of N2 at 1050 deg.C for 30 minutes; the PSG film is melted; the surface is flattened. Then, ions of As are implanted via the contact hole; a source 14 and a drain 15 are formed. Then, an Al wiring part 22 is formed. Because the PSG film is flattened, a disconnection of the Al wiring part can be prevented. After the formation of the source and the drain, a high-temperature process is not executed; accordingly, a device characteristic is not changed.
JP62205238A1987-08-201987-08-20Manufacture of semiconductor devicePendingJPS6449270A (en)

Priority Applications (1)

Application NumberPriority DateFiling DateTitle
JP62205238AJPS6449270A (en)1987-08-201987-08-20Manufacture of semiconductor device

Applications Claiming Priority (1)

Application NumberPriority DateFiling DateTitle
JP62205238AJPS6449270A (en)1987-08-201987-08-20Manufacture of semiconductor device

Publications (1)

Publication NumberPublication Date
JPS6449270Atrue JPS6449270A (en)1989-02-23

Family

ID=16503690

Family Applications (1)

Application NumberTitlePriority DateFiling Date
JP62205238APendingJPS6449270A (en)1987-08-201987-08-20Manufacture of semiconductor device

Country Status (1)

CountryLink
JP (1)JPS6449270A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
JP2013016783A (en)*2011-06-102013-01-24Semiconductor Energy Lab Co LtdManufacturing method of semiconductor device
JP2014082389A (en)*2012-10-172014-05-08Semiconductor Energy Lab Co LtdSemiconductor device and manufacturing method of the same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
JP2013016783A (en)*2011-06-102013-01-24Semiconductor Energy Lab Co LtdManufacturing method of semiconductor device
JP2014082389A (en)*2012-10-172014-05-08Semiconductor Energy Lab Co LtdSemiconductor device and manufacturing method of the same
US9852904B2 (en)2012-10-172017-12-26Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor device

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