JPS6439694A - Non-volatile semiconductor memory device - Google Patents

Abstract

PURPOSE:To operate a device only by an internal power source without necessitating an external high voltage, to miniaturize the device, and to lower cost, by performing an erasure and write operation by utilizing a tunnel phenomenon by providing an erasure and write voltage impression means. CONSTITUTION:In a memory cell array 20, a plural memory cells MC are arranged in a matrix shape. Plural bit lines BL and word lines WL are arranged intersecting orthogonally, and the memory cell MC is arranged on respective intersection. The erasure operation is performed in such a way that an erasing state can be obtained by applying a prescribed voltage between the bit line and the word line, generating the tunnel phenomenon between the drain areas of all memory cells and floating gates, and injecting electrons in the floating gates. The write operation is performed in such a way that a write state can be obtained by generating the tunnel phenomenon by applying a voltage between the bit line and the word line of only a selected one memory cell, and extracting the electrons in the floating gates. Thus, it is possible to miniaturize the device, to lower the cost, and to increase the number of times of the erasure and the write.