PURPOSE:To decide an inclusive relation at a high speed by providing plural bit processing computing elements arranged in parallel, for deciding an inclusive relation of each logical variable value which has been brought to a bit expression, and a deciding computing element for deciding an inclusive relation of an AND term from an output of said computing element. CONSTITUTION:The titled circuit is provided with plural bit processing computing elements 10 for deciding an inclusive relation of each logical variable value which has been brought to a bit expression, and a deciding computing element 14 for deciding an inclusive relation of an AND term from an output 13 of this computing element 10. First of all, a literal corresponding to one logical variable in the AND term is shown by a bit, and those which have executed its operation with regard to all the literals in one AND term are collected in a lump, and set as one term. Those which have executed this operation with regard to an AND term A and an AND term B are set as a term C and a term D, respectively, OR of every bit of the term C and the term D is taken, and when it is equal to the term C, the term C includes logically the term D. In such a way, the inclusive relation of the corresponding AND terms, namely, whether the AND term A corresponding to the term C includes logically the AND term B corresponding to the term D or not can be decided at a high speed.