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JPS6315426A - Semiconductor device - Google Patents

Semiconductor device

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Publication number
JPS6315426A
JPS6315426AJP15998486AJP15998486AJPS6315426AJP S6315426 AJPS6315426 AJP S6315426AJP 15998486 AJP15998486 AJP 15998486AJP 15998486 AJP15998486 AJP 15998486AJP S6315426 AJPS6315426 AJP S6315426A
Authority
JP
Japan
Prior art keywords
silicon nitride
nitride film
gaas
gaas element
compressive stress
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15998486A
Other languages
Japanese (ja)
Other versions
JPH0691083B2 (en
Inventor
Minoru Sawada
稔 澤田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co LtdfiledCriticalSanyo Electric Co Ltd
Priority to JP61159984ApriorityCriticalpatent/JPH0691083B2/en
Publication of JPS6315426ApublicationCriticalpatent/JPS6315426A/en
Publication of JPH0691083B2publicationCriticalpatent/JPH0691083B2/en
Anticipated expirationlegal-statusCritical
Expired - Fee Relatedlegal-statusCriticalCurrent

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Abstract

PURPOSE:To prevent the peeling of an silicon nitride film from a GaAs element consisting of the silicon nitride film regardless of the rate of an Au electrode on the element by bringing compressive stress on the GaAs element to a specific value or less. CONSTITUTION:An silicon nitride film, compressive stress of which extends over 4X10<9> dyne/cm<2> or less on a GaAs element, is formed onto the GaAs element. For shape the silicon nitride film onto a wafer 2 by using an ECR plasma CVD device, the wafer 2 is placed onto a sample base 1, and the deposition chamber 5 is evacuated from an exhaust port 3. A plasma chamber 4 is supplied with microwaves (frequency such as 2.45 GHz) while DC currents are caused to flow through a coil 8 to form a magnetic field, and N2 gas is fed to the plasma chamber 4 from a gas supply pipe 6 to shape nitrogen plasma. SiH4 gas is fed from an silane gas supply section 10 at the same time. When the state is continued for a fixed time, the silicon nitride film is formed onto the surface of the wafer 2, and the silicon nitride film, compressive stress of which on the GaAs element extends over 4X10<9> dyne/cm<2> or less, is difficult to be peeled from the upper section of an Au electrode on the GaAs element.

Description

Translated fromJapanese

【発明の詳細な説明】(イ)産業上の利用分野本発明は、電子サイクロトロン共鳴(以下ECRと略す
)プラズマCVD装置を用いて形成されたパッシベーシ
ョン用窒化シリコン(S i Nり膜を備えた半導体装
置に関する。
DETAILED DESCRIPTION OF THE INVENTION (A) Industrial Application Field The present invention provides a silicon nitride film for passivation formed using an electron cyclotron resonance (hereinafter abbreviated as ECR) plasma CVD apparatus. Related to semiconductor devices.

(ロ)従来の技術従来、G a A s M E S F E T等用の
パ7シベーシ3ン膜としては、プラズマCVDにζる窒
化シリコン膜が用いられていた。しかし、プラズマCV
Dによる窒化シリコン膜は、熱CVDで作製された窒化
シリコン膜と比べて曖衝フッ酸によるエツチング速度が
20@以上速く、耐酸性、緻密性に問題があった。
(b) Prior Art Conventionally, a silicon nitride film subjected to plasma CVD has been used as a passivation film for GaAs MESFET and the like. However, plasma CV
The silicon nitride film produced by D had an etching rate of 20@ or more faster with annealed hydrofluoric acid than a silicon nitride film produced by thermal CVD, and had problems in acid resistance and density.

これに対して、ECRプラズマCVDで作製された窒化
シリコン膜は熱CVDで作製された窒化シリコン膜に匹
敵する耐酸性、緻密性を有しきらに低温で生成可使であ
るため近年注目されている(例えばJAPANESE 
JOURNAL OF APPLIED PHYSIC
3VOL、22 No、4 APRIL 1983 p
p、L210−L212参照)。
On the other hand, silicon nitride films made by ECR plasma CVD have attracted attention in recent years because they have acid resistance and density comparable to silicon nitride films made by thermal CVD, and can be produced and used at much lower temperatures. (for example, JAPANESE
JOURNAL OF APPLIED PHYSICS
3VOL, 22 No. 4 APRIL 1983 p.
p, see L210-L212).

(ハ) 発明が解決しようとする問題点上述したECR
プラズマCVDにより作製された窒化シリコン膜は耐酸
性、緻密性には優れるもののAu電極が形成されたGa
As素子上からはく離することがある。
(c) Problems to be solved by the invention ECR mentioned above
Although the silicon nitride film produced by plasma CVD has excellent acid resistance and density, the Ga
It may peel off from the As element.

なお、Au電極が形成されるGaAs素子には熱CVD
による窒化シリコン膜は用いることができない(高温の
ためA u T;、極がアロイ化してしまう)。
Note that thermal CVD is applied to the GaAs element on which the Au electrode is formed.
A silicon nitride film cannot be used (due to the high temperature, the electrode becomes alloyed).

本発明は上記の問題点に鑑み為されたもので、GaAs
素子表面からははくなしにくいECRブラズマCVDに
よる窒化シリコン膜を備えた半導体装置を提供しようと
するものである。
The present invention has been made in view of the above-mentioned problems.
The present invention aims to provide a semiconductor device equipped with a silicon nitride film produced by ECR plasma CVD that is difficult to peel off from the element surface.

(ニ)問題点を解決するための手段本発明はGaAs素子上での圧縮応力が4×109dy
r+e/cm’以下の窒化シリコン膜をGaAs1子上
に備えることを特徴とする。
(d) Means for solving the problem The present invention is characterized in that the compressive stress on the GaAs element is 4×109 dy.
It is characterized in that a silicon nitride film with a thickness of r+e/cm' or less is provided on a single GaAs layer.

(ホ)作用GaAs素子上での圧縮応力が4 X 1o9dyne
/C’lil’以下の窒化ンリコン膜はGaAs素子の
Au電極上からはく離しにくい。
(e) The compressive stress on the working GaAs element is 4 x 1o9dyne
/C'lil' or less silicon nitride film is difficult to peel off from the Au electrode of the GaAs element.

(へ)実施例第1図は本発明の半導体装置に備えられる窒化シリコン
膜の作製に使用きれるECRプラズマCVD9置の断面
図である。
(f) Example FIG. 1 is a cross-sectional view of an ECR plasma CVD apparatus 9 that can be used for manufacturing a silicon nitride film provided in a semiconductor device of the present invention.

図において、(6)はブラズ、マ室(4)へN 2等の
ガスを供給するガス供給管、(7)はこのプラズマ室(
4)−・・マ・1″クロ波を供給する導、波管、(8)
はこのプラズマ室(4)へ発散磁界を生成するためのコ
イル、(9)はこのプラズマ室(4)とデポジション室
(5)間に設けられた開口、(10)はこの開口(9)
近傍に取り付けられたリング状のシランガス供給部を示
し、内周部にガス噴出用の小孔が多数説(プられている
。(3)はデポジション室(5)下部に設けられた排気
口であって、デポジション室(5)を真空に引(ために
用いられる。また、(2)はウェハであり試料台(1)
上にft1ffされている。
In the figure, (6) is a gas supply pipe that supplies gas such as N2 to the plasma chamber (4), and (7) is this plasma chamber (
4) --... Ma.1'' Wave tube, wave tube, which supplies chroma waves (8)
is a coil for generating a divergent magnetic field to this plasma chamber (4), (9) is an opening provided between this plasma chamber (4) and the deposition chamber (5), and (10) is this opening (9).
It shows a ring-shaped silane gas supply unit installed nearby, and it is said that there are many small holes for gas ejection on the inner circumference. (3) is an exhaust port installed at the bottom of the deposition chamber (5). It is used to evacuate the deposition chamber (5). Also, (2) is a wafer and the sample stage (1)
It is ft1ff above.

このようなECRプラズマCVD装置を用いてウェハ(
2)上に窒化シリコン膜を生成するには試料台(1)上
にウェハ(2)を載置し、排気口(3)からデポジショ
ン室(5)を真空に引く。
Wafers (
2) To form a silicon nitride film thereon, place the wafer (2) on the sample stage (1) and evacuate the deposition chamber (5) through the exhaust port (3).

次にプラズマ室(4)にマイクロ波(例えば2.45G
H2)を供給するとともにフィル(8)に直流電流を流
して磁場を形成し、ガス供給管(6)からN2ガスをプ
ラズマ室(4))こ与え窒素プラズマを生成する。この
とき、同時にシランガス供給部(10)からSiH+ガ
スを供給する。この状態を一定時間続けるとウェハ(2
)表面に窒化シリコン膜が形成される。
Next, microwave (for example 2.45G) is applied to the plasma chamber (4).
While supplying H2), a direct current is passed through the fill (8) to form a magnetic field, and N2 gas is supplied to the plasma chamber (4) from the gas supply pipe (6) to generate nitrogen plasma. At this time, SiH+ gas is simultaneously supplied from the silane gas supply section (10). If this state continues for a certain period of time, the wafer (2
) A silicon nitride film is formed on the surface.

上述のように、ECRプラズマCVD装置を用いて窒化
シリコン膜が形成きれるが、SiH+ガス流量、N2ガ
ス流量を変化させることにより種々の圧縮応力を填する
窒化シリコン膜が形成できる。
As described above, a silicon nitride film can be formed using an ECR plasma CVD apparatus, but by changing the SiH+ gas flow rate and N2 gas flow rate, a silicon nitride film that can accommodate various compressive stresses can be formed.

SiH+  カース流量  N2 カ・ス流量   マ
イクロ波出力(例1 )  10105c    、 
 10105e     600W(例2 )  10
105c     13sccm     600W(
例3 )  lO105c     15sccm  
   600W(例4 )  10105c     
20secm     600W(例5 )  15s
ccm     20sccm     600W(例
6 )  15secm     22secm   
  600W上記の条件でG a A s M E S
 F E T上に窒化シリコン膜を形成すると、圧縮応
力は下記のようになった(例1 )   12X 10”dyne/ crn 
2(例2)   5X109dyne/cri’(例3
 )   4X 109dyne/ CTll2(例4
 )   LX 109dyne/ c=n’(例5 
)   5X 10”dyne/ cm ’(例6 )
   4X 10”dyne/c+n2また、(例1)
〜(例6)の条件で素子上の0%、20%、40%、7
0%、100%がAu電極であるGaAsMESFET
上に窒化シリコン膜を作製したくただし、0%の場合は
AutJ極なし、100%の場合は全面Aut極)。
SiH+ Cass flow rate N2 Cass flow rate Microwave output (Example 1) 10105c,
10105e 600W (Example 2) 10
105c 13sccm 600W (
Example 3) lO105c 15sccm
600W (Example 4) 10105c
20sec 600W (Example 5) 15s
ccm 20sccm 600W (Example 6) 15secm 22secm
600W under the above conditions Ga As M E S
When a silicon nitride film was formed on FET, the compressive stress became as follows (Example 1) 12X 10"dyne/crn
2 (Example 2) 5X109dyne/cri' (Example 3
) 4X 109dyne/CTll2 (Example 4
) LX 109dyne/c=n' (Example 5
) 5X 10"dyne/cm' (Example 6)
4X 10”dyne/c+n2 Also (Example 1)
0%, 20%, 40%, 7 on the element under the conditions of ~ (Example 6)
GaAs MESFET with 0% and 100% Au electrodes
However, if it is 0%, there is no OutJ pole, and if it is 100%, there is no OutJ pole on the entire surface.

その結果(例1)の窒化シリコン膜では20%、40%
、70%、100%ではく離、(例2)(例5ンの窒化
シリコン膜では40%、70%、100%ではく離、(
例3)(例4)(例6)では全くはく離しなかった。
As a result (Example 1), the silicon nitride film has 20% and 40%
, 70%, 100% peeling, (Example 2) (Example 5)
In Example 3) (Example 4) and (Example 6), no peeling occurred at all.

第2図に測定結果を示す(はく離する点は×、はく離し
ない点はOで表し、はく離の生じない領域を斜線で示す
)。
The measurement results are shown in FIG. 2 (points that peel off are indicated by x, points where no flaking occurs are indicated by O, and areas where no flaking occurs are indicated by diagonal lines).

〈ト)発明の効果本発明は以上の説明から明らかなようにECRプラズマ
CVD装置を用いて形成きれるGaAs素子上での圧縮
応力が4 X 10”dyne/ cm’以下の窒化シ
リコン膜は素子上のA+rtJ極の割合がどれだけあろ
うと素子上から窒化シリコン膜がはく離することはない
。きらに、ECRプラズマCVD装置を用いて作製した
窒化シリコン膜はプラズマCVD装置を用いて作製した
窒化シリコン膜よりも耐酸性、緻密性に優れる。
(G) Effects of the Invention As is clear from the above description, the present invention provides a silicon nitride film having a compressive stress of 4 x 10"dyne/cm' or less on a GaAs element that can be formed using an ECR plasma CVD apparatus. Regardless of the ratio of A+rtJ poles in It has superior acid resistance and density.

従って、はく離しにくくかつ耐酸性、緻密性に優れた窒
化シリコン膜を備えた半導体装置を提供することができ
る。
Therefore, it is possible to provide a semiconductor device including a silicon nitride film that is difficult to peel off and has excellent acid resistance and density.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はECRプラズマCVD装置の断面図、第2図は
測定結果を示す図である。
FIG. 1 is a sectional view of the ECR plasma CVD apparatus, and FIG. 2 is a diagram showing measurement results.

Claims (1)

Translated fromJapanese
【特許請求の範囲】[Claims]GaAs素子上に電子サイクロトロンプラズマCVD装
置を用いて形成された窒化シリコン膜が備えられる半導
体装置において、前記窒化シリコン膜の前記GaAs素
子上での圧縮応力が4×10^9dyne/cm^2以
下であることを特徴とする半導体装置。
In a semiconductor device including a silicon nitride film formed on a GaAs element using an electron cyclotron plasma CVD apparatus, the compressive stress of the silicon nitride film on the GaAs element is 4×10^9 dyne/cm^2 or less. A semiconductor device characterized by the following.
JP61159984A1986-07-081986-07-08 Semiconductor deviceExpired - Fee RelatedJPH0691083B2 (en)

Priority Applications (1)

Application NumberPriority DateFiling DateTitle
JP61159984AJPH0691083B2 (en)1986-07-081986-07-08 Semiconductor device

Applications Claiming Priority (1)

Application NumberPriority DateFiling DateTitle
JP61159984AJPH0691083B2 (en)1986-07-081986-07-08 Semiconductor device

Publications (2)

Publication NumberPublication Date
JPS6315426Atrue JPS6315426A (en)1988-01-22
JPH0691083B2 JPH0691083B2 (en)1994-11-14

Family

ID=15705460

Family Applications (1)

Application NumberTitlePriority DateFiling Date
JP61159984AExpired - Fee RelatedJPH0691083B2 (en)1986-07-081986-07-08 Semiconductor device

Country Status (1)

CountryLink
JP (1)JPH0691083B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
JPH01202869A (en)*1988-02-081989-08-15Sumitomo Electric Ind LtdManufacture of field-effect transistor
JPH0488632A (en)*1990-07-311992-03-23Murata Mfg Co LtdFormation of protective film for heat treatment
JP2023062858A (en)*2021-10-222023-05-09株式会社日本製鋼所 ECR PLASMA CVD APPARATUS AND METHOD FOR FORMING ECR PLASMA CVD APPARATUS

Citations (1)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
JPS62150726A (en)*1985-12-241987-07-04Fuji Electric Co Ltd Manufacturing method of semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
JPS62150726A (en)*1985-12-241987-07-04Fuji Electric Co Ltd Manufacturing method of semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
JPH01202869A (en)*1988-02-081989-08-15Sumitomo Electric Ind LtdManufacture of field-effect transistor
JPH0488632A (en)*1990-07-311992-03-23Murata Mfg Co LtdFormation of protective film for heat treatment
JP2023062858A (en)*2021-10-222023-05-09株式会社日本製鋼所 ECR PLASMA CVD APPARATUS AND METHOD FOR FORMING ECR PLASMA CVD APPARATUS

Also Published As

Publication numberPublication date
JPH0691083B2 (en)1994-11-14

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