【発明の詳細な説明】産業上の利用分野本発明は半導体レーザ素子の製造方法に関するものであ
る。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a method of manufacturing a semiconductor laser device.
従来例の構成とその問題点近年、埋込型半導体レーザ素子は低しきい値電流で動作
し、安定なレーザ発振出力光を得ることができる素子と
して知られている。第1図に埋込型半導体レーザ素子の
構造の一例を斜視断面図を用いて示す。第1図の例は1
.3μmの発光波長を有するInP−1nGaAsP系
化合物半導体からなる埋込型半導体レーザ素子である。Conventional Structures and Their Problems In recent years, buried semiconductor laser devices have been known as devices that operate with a low threshold current and can provide stable laser oscillation output light. FIG. 1 shows an example of the structure of a buried semiconductor laser element using a perspective sectional view. The example in Figure 1 is 1
.. This is a buried semiconductor laser device made of an InP-1nGaAsP compound semiconductor having an emission wavelength of 3 μm.
第1図において、1はn型1nP基板、2はn型InP
領域、3はn型InGaAsP発光領域、4はp型1n
P領域、5はp型1 nGaAs P領域、6はp型I
nP層、7はn型InP層、8はp型InP層、9 u
3102層、10Fip型I nGaAs P領域6
に対するオーミック電極、11はn型InP基板1に対
するオーミック電極である。以下、n型InP領域2.
n型InGaAsP発光領域3.p型InP領域4.p
型InGaAsP領域5を含めて被埋込領域と呼ひ、p
型InP層6.n型InP層7.p型InPJ習8を含
めて埋込領域と呼ぶことにする。In Figure 1, 1 is an n-type 1nP substrate, 2 is an n-type InP substrate, and 2 is an n-type InP substrate.
3 is an n-type InGaAsP light emitting region, 4 is a p-type 1n
P region, 5 is p-type 1 nGaAs P region, 6 is p-type I
nP layer, 7 is n-type InP layer, 8 is p-type InP layer, 9 u
3102 layers, 10 Fip type InGaAs P region 6
11 is an ohmic electrode for the n-type InP substrate 1. Below, n-type InP region 2.
n-type InGaAsP light emitting region 3. p-type InP region 4. p
The type InGaAsP region 5 is called the buried region, and p
Type InP layer6. n-type InP layer7. The region including the p-type InPJ 8 will be referred to as an embedded region.
以下図面を参照しながら、上述したような従来の半導体
レーザ素子の製造方法について説明する。A conventional method for manufacturing a semiconductor laser device as described above will be described below with reference to the drawings.
第2図は第1図に説明した埋込型半導体レーザ素子の製
造工程の概略を断面図により示すものであり、図番号(
a) 、 (b) 、 (C) 、 (d) 、 (e
) 、 (f)の順に製造される。なお既説明における
ものと同一の部分には同一番号を附す。第2図中の番号
において、12型InP層、16はp型I nGaAs
P層、16は紙面垂直方向にストライプ形状の810
2層、1了はn型InP領域2およびn型InP発元領
域3およびp型InP領域3およびInP領域4および
p型InGaAsP領域5からなる被埋込領域、18は
p型InP層6およびn型InP層7およびp型InP
層8からなる埋込領域である。製造工程の概略はまず、
第2図(a)に示すように、n型InP基板1上に、n
型InP層12.n型InGaAsP層13.p型In
P層14゜p型InGaAsP層16を順次結晶成長す
る。次に第2図(b)に示すS t02層16を形成す
る。次に第2図(C)に示すように3102層16をマ
スクとしてエツチングを行い被埋込領域17を形成する
。第2図(d)に示すように被埋込領域17をはさむ部
分に、埋込領域18を液相エピタキシャル法を用いて結
晶成長する。次に第2図(e)に示すように3102層
9を形成する。次に第2図(f)に示すように電極1゜
および電極11を形成することにより製造工程を終える
。FIG. 2 is a cross-sectional view schematically showing the manufacturing process of the buried semiconductor laser device explained in FIG.
a), (b), (C), (d), (e
) and (f) are manufactured in this order. Note that the same numbers are given to the same parts as those in the previous explanation. In the numbers in FIG. 2, 12 type InP layer and 16 p type InGaAs layer.
P layer, 16 is a stripe-shaped 810 in the direction perpendicular to the paper surface.
In the second layer, 1 indicates a buried region consisting of an n-type InP region 2, an n-type InP source region 3, a p-type InP region 3, an InP region 4, and a p-type InGaAsP region 5, and 18 indicates a p-type InP layer 6 and n-type InP layer 7 and p-type InP
This is a buried area consisting of layer 8. First, the outline of the manufacturing process is as follows.
As shown in FIG. 2(a), n
Type InP layer 12. n-type InGaAsP layer 13. p-type In
A p-type InGaAsP layer 16 is successively crystal-grown. Next, the St02 layer 16 shown in FIG. 2(b) is formed. Next, as shown in FIG. 2C, etching is performed using the 3102 layer 16 as a mask to form a buried region 17. As shown in FIG. 2(d), a buried region 18 is grown using a liquid phase epitaxial method on both sides of the buried region 17. Then, as shown in FIG. Next, a 3102 layer 9 is formed as shown in FIG. 2(e). Next, as shown in FIG. 2(f), electrode 1° and electrode 11 are formed to complete the manufacturing process.
しかしながら上記のような従来の埋込型半導体レーザ素
子の製造方法においては、第2図(d)に示す工程にお
いて埋込領域18の形成時に成長基板上の凸部である被
埋込領域17が破損されることが起こる。被埋込領域1
7が破損される原因は、埋込領域18の液相エピタキシ
ャル法による結晶成長時に溶融した結晶材料(通常メル
トと呼ばれる。)の圧力によって成長基板上の凸部であ
る被埋込領域が折れたり、倒れたりすることによるもの
である。一般に埋込型半導体レーザ素子において被埋込
領域の幅が発光波長に比べて十分長ければ複数の横モー
ドでレーザ発振し、被埋込領域の幅が発光波長程度にな
れば単一の横モードで安定に発振する。実際に1.3μ
mの発光波長で単−横モードの埋込型半導体レーザ素子
を得るためには仮埋込領域の幅は2μm程度に狭くする
必要があり、被埋込領域が折れやすい。このように素子
特性を上げることと生産上歩留1りを上げることは相反
し産業上大きさ問題となっていた。However, in the conventional method for manufacturing a buried semiconductor laser device as described above, when the buried region 18 is formed in the step shown in FIG. 2(d), the buried region 17, which is a convex portion on the growth substrate, is It happens that it gets damaged. Embedded area 1
7 is damaged because the buried region, which is a convex portion on the growth substrate, is bent due to the pressure of the melted crystal material (usually called melt) during the crystal growth of the buried region 18 by the liquid phase epitaxial method. , due to falling down. In general, in a buried semiconductor laser device, if the width of the buried region is sufficiently long compared to the emission wavelength, the laser oscillates in multiple transverse modes, and if the width of the buried region is about the same as the emission wavelength, the laser oscillates in a single transverse mode. oscillates stably. Actually 1.3μ
In order to obtain a single-transverse mode buried semiconductor laser device with an emission wavelength of m, the width of the temporary buried region must be narrowed to about 2 μm, and the buried region is likely to break. In this way, improving the device characteristics and increasing the production yield are contradictory and have become an industrial problem.
発明の目的本発明はω]配欠点に鑑与、埋込型半導体レーザ素子の
前記レーザ発振特性を良くすると共に生産上大幅に歩留
まりを上げることのできる半導体レーザ素子の製造方法
を提供するものである。OBJECTS OF THE INVENTION The present invention provides a method for manufacturing a semiconductor laser device that takes into consideration the ω] alignment defect, improves the laser oscillation characteristics of a buried semiconductor laser device, and can significantly increase the production yield. be.
発明の構成本発明は、埋込型半導体レーザ素子において、発光層を
含む被埋込領域をはさむ埋込領のうち、まず前記被埋込
領域に隣接する一方の埋込領域を液相エピタキシャル法
を用いて形成し、然る後に前記被埋込領域に隣接する他
方の埋込領域を形成するものである。Structure of the Invention The present invention provides a buried semiconductor laser device in which one of the buried regions sandwiching a buried region including a light-emitting layer, which is adjacent to the buried region, is formed by a liquid phase epitaxial method. Then, the other buried region adjacent to the buried region is formed.
実施例の説明本発明の一実施例について図面を参照しながら説明する
。本実施例は第1図に示した1、3μmの発光波長を有
する埋込型半導体レーザ素子の製造方法を第3図に示す
。第3図は製造工程の概略であり、図番号(a)、(b
)、(C)、(d)、(e)、(f)、(q)、[有]
)。DESCRIPTION OF EMBODIMENTS An embodiment of the present invention will be described with reference to the drawings. In this embodiment, a method for manufacturing a buried semiconductor laser device having an emission wavelength of 1.3 μm shown in FIG. 1 is shown in FIG. Figure 3 is an outline of the manufacturing process, with figure numbers (a) and (b).
), (C), (d), (e), (f), (q), [Yes]
).
(i)の順に製造される。なお既説明におけるものと同
一の部分には同一番号を附す。図中において、19は8
102層であり一方の埋込領域を形成する位置のみ選択
的にエツチングされたもの、20社n型InP層12の
一部、21はn型InGaAsP層の一部、22はp型
InP層の一部、23はp型I nGa As P層の
一部、24はp型InP領域、25はn型InP領域、
26はp型InP@域、27はp型InP領域24およ
びn型InP領域26およびp型InP領域からなる一
方の埋込領域、28はS 102層であり他方領域を形
成する位置のみ選択的にエツチングされたもの、29は
p型1nP領域、30はn型InP領域、31はp型I
nP領域、32はp型InP領域29およびn型InP
領域30およびp型1nP領域31からなる他方の埋込
領域である。They are manufactured in the order of (i). Note that the same numbers are given to the same parts as those in the previous explanation. In the figure, 19 is 8
102 layers, selectively etched only at the position forming one buried region, 20 layers, part of n-type InP layer 12, 21 part of n-type InGaAsP layer, 22 part of p-type InP layer. 23 is a part of the p-type InGaAs P layer, 24 is a p-type InP region, 25 is an n-type InP region,
26 is a p-type InP@ region, 27 is one buried region consisting of a p-type InP region 24, an n-type InP region 26, and a p-type InP region, and 28 is an S102 layer, which is selective only at the position where the other region is formed. 29 is a p-type 1nP region, 30 is an n-type InP region, and 31 is a p-type I
nP region, 32 is p-type InP region 29 and n-type InP
This is the other buried region consisting of a region 30 and a p-type 1nP region 31.
製造工程はまず第3図(a)に示すようにn型InP基
板1上に、n型InP層12.n型1 nGaA訂唱1
3゜p型InP層14.p型InGaAsP層16を順
次結晶成長する。次に第3図(b)に示すようにb 1
02層19を形成する。次に第3図(C)に示すように
Si03層19をマスクとして一方の埋込領域が形成さ
れる部分をエツチングする。次に第3図(dlに示すよ
うに一方の埋込領域27を液相エピタキシャル法にエリ
結晶成長する。次に第3図(Q)に示すようにS r
02層28を形成する。次に第3図(1)に示すように
8102層28をマスクとして他方の埋込領域が形成さ
れる部分をエツチングする。次に第3図(q)に示すよ
うに他方の埋込領域32を液相エピタキシャル法により
結晶成長する。次に第3図(h)に示すように8102
層9を形成する。次に第3図(i)に示すように電極1
0および電極11を形成して製造工程を終える。In the manufacturing process, first, as shown in FIG. 3(a), an n-type InP layer 12. n-type 1 nGaA recitation 1
3° p-type InP layer 14. A p-type InGaAsP layer 16 is successively crystal-grown. Next, as shown in FIG. 3(b), b 1
02 layer 19 is formed. Next, as shown in FIG. 3C, the portion where one of the buried regions will be formed is etched using the Si03 layer 19 as a mask. Next, as shown in FIG. 3(dl), one of the buried regions 27 is grown by liquid phase epitaxial method.Next, as shown in FIG. 3(Q), S r
02 layer 28 is formed. Next, as shown in FIG. 3(1), the portion where the other buried region will be formed is etched using the 8102 layer 28 as a mask. Next, as shown in FIG. 3(q), crystal growth is performed on the other buried region 32 by liquid phase epitaxial method. Next, as shown in FIG. 3(h), 8102
Form layer 9. Next, as shown in FIG. 3(i), the electrode 1
0 and electrodes 11 are formed to complete the manufacturing process.
この製造方法では液相エピタキシャル結晶成長による埋
込領域の形成時において、成長基板上の凸部の幅(第3
図中21+’2)を、形成しようとす′る発光領域の幅
によらず任意に設定できるために、メルトの圧力による
基板上の凸部の損傷を完全に無くすことができる。また
、形成しようとする発光領域の幅が、たとえば1μm以
下の場合においても°成長基板上の凸部の幅を充分広く
することにより充分な機械的強度を得ることができる。In this manufacturing method, when forming a buried region by liquid phase epitaxial crystal growth, the width of the convex portion (third width) on the growth substrate is
Since 21+'2) in the figure can be arbitrarily set regardless of the width of the light emitting region to be formed, damage to the convex portions on the substrate due to the pressure of the melt can be completely eliminated. Further, even when the width of the light emitting region to be formed is, for example, 1 μm or less, sufficient mechanical strength can be obtained by making the width of the convex portion on the growth substrate sufficiently wide.
なお、本実施例においてはInP −InGaAsP系
ノ埋込型半導体レーザ素子の製造方法について述べたが
5本発明の製造方法は液相エピタキシャル法により結晶
成長を行う他のいかなる埋込型半導体レーザ素子の製造
方法についても同様の効果を得ることができる。また本
実施例に用いたS 102層は、シリコン窒化膜、アル
ミナ膜、アルミ窒化膜等でも良く、結晶成長時にマスク
作用を持つ材料であればこの限りでは無い。Although this embodiment describes a method for manufacturing an InP-InGaAsP-based buried semiconductor laser device, the manufacturing method of the present invention can also be applied to any other buried semiconductor laser device in which crystal growth is performed by liquid phase epitaxial method. Similar effects can be obtained with the manufacturing method. Further, the S102 layer used in this embodiment may be a silicon nitride film, an alumina film, an aluminum nitride film, etc., and is not limited to this as long as it has a masking effect during crystal growth.
発明の効果以上のように本発明は埋込型半導体ンーザ素子の製造に
おいて前記埋込領域の形成を交互に行なうことにより結
晶成長後の生産歩留まりをほぼ100チにすることがで
きる効果がある。捷だ前記被埋込領域の幅を細くするこ
とが可能になり素子の横モード特性を単一化することが
できる効果があり、前記効果とあわせてその芙用的意義
は大なるものがある。Effects of the Invention As described above, the present invention has the effect of increasing the production yield after crystal growth to approximately 100 chips by alternately forming the buried regions in manufacturing a buried semiconductor device. This has the effect of making it possible to narrow the width of the embedded region and unifying the transverse mode characteristics of the element, and in addition to the above effect, this has great practical significance. .
第1図は埋込型半導体レーザ素子の斜視断面図、第2崗
fa)〜(f)は従来の埋込型半導体レーザ素子の製造
工程概略を示す素子断面図、第3図(6)〜(1〕は本
発明の一実施例の埋込型半導体レーザ素子の製造工程概
略を示す素子断面図である。17・・・・・・発光層を含む被埋込領域、27・・・
・・一方の埋込領域、32・・・・・・他方の埋込領域
。代理人の氏名 弁理士 中 尾 敏 男 ほか1名第1
図第2図第 2 図!@2図第3図第3図第3図FIG. 1 is a perspective cross-sectional view of a buried semiconductor laser device, FIGS. 2(f) to 2(f) are device cross-sectional views showing an outline of the manufacturing process of a conventional buried semiconductor laser device, and FIGS. 3(6) to (1) is a device cross-sectional view showing an outline of the manufacturing process of a buried semiconductor laser device according to an embodiment of the present invention. 17...A buried region including a light emitting layer, 27...
... One embedded area, 32... The other embedded area. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 2 Figure 2 Figure 2! @2Figure 3Figure 3Figure 3Figure 3
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58186464AJPS6077486A (en) | 1983-10-05 | 1983-10-05 | Manufacturing method of semiconductor laser device |
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58186464AJPS6077486A (en) | 1983-10-05 | 1983-10-05 | Manufacturing method of semiconductor laser device |
| Publication Number | Publication Date |
|---|---|
| JPS6077486Atrue JPS6077486A (en) | 1985-05-02 |
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58186464APendingJPS6077486A (en) | 1983-10-05 | 1983-10-05 | Manufacturing method of semiconductor laser device |
| Country | Link |
|---|---|
| JP (1) | JPS6077486A (en) |
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61274385A (en)* | 1985-05-29 | 1986-12-04 | Fujitsu Ltd | Buried type semiconductor laser |
| US4963507A (en)* | 1987-04-30 | 1990-10-16 | Siemens Aktiengesellschaft | Method and manufacturing a laser diode with buried active layer |
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| US5472907A (en)* | 1992-12-16 | 1995-12-05 | U.S. Philips Corporation | Method of manufacturing an optoelectronic semiconductor device |
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61274385A (en)* | 1985-05-29 | 1986-12-04 | Fujitsu Ltd | Buried type semiconductor laser |
| US4963507A (en)* | 1987-04-30 | 1990-10-16 | Siemens Aktiengesellschaft | Method and manufacturing a laser diode with buried active layer |
| US5397740A (en)* | 1992-05-12 | 1995-03-14 | Matsushita Electric Industrial Co., Ltd. | Method of making an optical semiconductor device |
| US5472907A (en)* | 1992-12-16 | 1995-12-05 | U.S. Philips Corporation | Method of manufacturing an optoelectronic semiconductor device |
| US5418183A (en)* | 1994-09-19 | 1995-05-23 | At&T Corp. | Method for a reflective digitally tunable laser |
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