第1図は可変容量ダイオードの逆バイアス電圧対静電容
量特性の一例を示す図、第2図はこの考案に係る受信装
置の一実施例の要部を示す回路図、第3図は第2図の回
路の動作を説明するために用いた図、第4図はこの考案
の他の実施例を示す回路図である。、11・・・・・・FM検波部、12・・・・・・低周
波増幅器、13・・・・・・減算器、14・・・・・・
局部発振器、■。・・・・・・基準電源、VC・・・・
・・可変容量コンデンサ、L・・・・・・コイル、Dv
・・・・・・可変容量ダイオード、R1乃至R3・・・
・・・抵抗、C1乃至C1・・・・・・コンデンサ、D
l・・・・・・ダイオード。Fig. 1 is a diagram showing an example of the reverse bias voltage versus capacitance characteristics of a variable capacitance diode, Fig. 2 is a circuit diagram showing the main part of an embodiment of the receiving device according to this invention, and Fig. 3 is a diagram showing an example of the reverse bias voltage versus capacitance characteristic of a variable capacitance diode. FIG. 4, which is a diagram used to explain the operation of the circuit shown in the figure, is a circuit diagram showing another embodiment of this invention. , 11...FM detection unit, 12...Low frequency amplifier, 13...Subtractor, 14...
Local oscillator,■. ...Reference power supply, VC...
...Variable capacitor, L...Coil, Dv
・・・・・・Variable capacitance diode, R1 to R3...
...Resistance, C1 to C1...Capacitor, D
l...Diode.
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6335382UJPS58166137U (en) | 1982-04-30 | 1982-04-30 | receiving device |
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6335382UJPS58166137U (en) | 1982-04-30 | 1982-04-30 | receiving device |
| Publication Number | Publication Date |
|---|---|
| JPS58166137Utrue JPS58166137U (en) | 1983-11-05 |
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6335382UPendingJPS58166137U (en) | 1982-04-30 | 1982-04-30 | receiving device |
| Country | Link |
|---|---|
| JP (1) | JPS58166137U (en) |
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