【発明の詳細な説明】〔発明の技術分野〕本発明は骨に光伝送用の発ｆｔ、素子として用いられる
半導体レーザダイオードの異常検出力式〔発明の技術的
背景〕一般に半導体レーザダイオード（以下、ＬＤと称する）
は、情報伝送の超高速化および長距離化が要求される光
伝送における送信部（元送信回路）の発光素子として用
いられることが多い。周知のようにＬＤの光出力は温度
依存性があるため安定性に欠ける。そこで安定化回路（
以下、ＡＰＣと称する）により光出力の安定化が図られ
るようになっている。すなわち、ＡＰＣはＬＤの光出力
を検出し、この検出結果に応じてＬＤに供給されるバイ
アス電流ＩＢを可変制御するもので、これによりＬＤの
光出力の安定化が図られる。ところで、ＬＤには経時劣
化があり、とのよ５な場合、温度やバイアス電流が一定
であっても時間の経過とともにＬＤの光出力が低下する
恐れがある。通常人ＰＣはこのような劣化現象にも動作
してバイアス電流を増加せしめ一定の光出力が得られる
ように制御している。しかし、ＬＤの劣化が進むにつれ
て、たとえＡＰＣが上記バイアス電流を増加しても所定
の光出力が得られなくなる。そこで。Detailed Description of the Invention [Technical Field of the Invention] The present invention relates to an abnormality detecting power system for a semiconductor laser diode used as a device for transmitting light to bones [Technical Background of the Invention] In general, a semiconductor laser diode (hereinafter , referred to as LD)
are often used as light-emitting elements in transmitters (original transmitter circuits) in optical transmission, which requires extremely high-speed and long-distance information transmission. As is well known, the optical output of an LD is temperature dependent and therefore lacks stability. Therefore, the stabilization circuit (
(Hereinafter referred to as APC) stabilizes the optical output. That is, the APC detects the optical output of the LD and variably controls the bias current IB supplied to the LD according to the detection result, thereby stabilizing the optical output of the LD. Incidentally, LDs deteriorate over time, and in such cases, the optical output of the LD may decrease over time even if the temperature and bias current are constant. Normally, human PCs operate even in response to such deterioration phenomena and control the bias current to be increased so as to obtain a constant optical output. However, as the LD deteriorates, a predetermined optical output cannot be obtained even if the APC increases the bias current. Therefore.
送信ＩＩＩにおいて、ＬＤから出力される光信号を蛍光
素子で受けてその光出力を監視し、ＬＤの劣化や故障を
検出、予知する濫伐回路が８賛であった。In Transmission III, there were 8 reviews for an overexploitation circuit that receives an optical signal output from an LD using a fluorescent element, monitors the optical output, and detects and predicts deterioration or failure of the LD.
第１−はこのよ５な監視機能を備えた従来の光送信回路
におけるＬＤ（半導体レーザダイオード）駆動（ロ）路
の構成を示すもので、１はＬＤ（半導体レーザダイオー
ド）、２はＬＤ１ｔｌＣバイアス電流■１を供給するバ
イアス電流供給源としてのトランジスタである。３は変
調回路である。ｆｉｌｌＦｊＡ路３は入力信号ＩＮの変
化に応じた電流信号を発生するトランジスタ４を有し、
この信号を変調電流として上記バイアス電ｆｉＩＢに重
畳する。ＬＤｚはこのバイアス亀ｆｆ１Ｉｎ に重畳
された変調電流によって発番し、光信号を出力する・こ
の光信号は光ファイバ参り−プルＪ＆Ｃ送出される。Ｃ
は前述したＡＰＣ（安定化回路）であり、フォートダイ
オード（以下、ＰＤと称する）７、電流／電圧変換器と
しての抵抗８、ローパスフィルタ（以下、ＬＰＦと称す
る）９、オペアンプ（以下、ＯＰと称する）１０、およ
び電圧／電流変換＠１１を有している。Part 1 shows the configuration of the LD (semiconductor laser diode) drive path in a conventional optical transmitter circuit equipped with these five monitoring functions. This is a transistor that serves as a bias current supply source that supplies current 1. 3 is a modulation circuit. fillFjA path 3 has a transistor 4 that generates a current signal in response to changes in input signal IN;
This signal is superimposed on the bias current fiIB as a modulation current. LDz generates a number by the modulation current superimposed on this bias pulse ff1In and outputs an optical signal. This optical signal is sent out from the optical fiber to the pull J&C. C
is the aforementioned APC (stabilization circuit), which includes a fort diode (hereinafter referred to as PD) 7, a resistor 8 as a current/voltage converter, a low-pass filter (hereinafter referred to as LPF) 9, and an operational amplifier (hereinafter referred to as OP). ) 10, and voltage/current conversion @11.
ＬＤＪから出力される光信号はＰＤ７で検出され電気信
号Ｋｔ換された後、抵抗８で電圧に変換される。この抵
抗８で変換された電圧はＬＰＦｊでその高周波分が除去
されてＯＰｘ。The optical signal output from the LDJ is detected by the PD 7 and converted into an electric signal Kt, and then converted into a voltage by the resistor 8. The high frequency component of the voltage converted by this resistor 8 is removed by LPFj and becomes OPx.
の一方の入力端子に供給されるｏＯＰｘｏの他方の入力
端子にはＬＤｘの所定の光出力に対応する基準電８：Ｂ
Ｊｌが供給されている。しかして０Ｐｓｅはり、ＰＦ５
１の出力電圧と（所定の光出力を得るための）基準電圧
ＨＪｌとを比較し、その電圧差に応じた出力電圧を発生
する。A reference voltage 8:B corresponding to a predetermined optical output of the LDx is supplied to the other input terminal of the oOPxo.
Jl is supplied. However, 0Pse beam, PF5
1 and a reference voltage HJl (for obtaining a predetermined optical output), and generates an output voltage according to the voltage difference.
０Ｐｘｏからの出力電圧は電圧／１ｆｆｉｆ換器１１に
よって電流に変換され、バイアス制御用ベース電流とし
てトランジスタ２０ベースに供給される。これにより、
ＬＤＺに供給されるノ夷イアス電流■１が可変され、Ｌ
ＤＪの光出力が一定となるように制御される。The output voltage from 0Pxo is converted into a current by a voltage/1ffif converter 11, and is supplied to the base of the transistor 20 as a base current for bias control. This results in
The negative current ■1 supplied to LDZ is varied, and L
The optical output of the DJ is controlled to be constant.
ＬＰＦｊの出力電圧は比較器（以下・ＣＭＰと称する）
１２の一方の入力端子にも供給される。ＣＭＰＪｊの他
方の入力端子には参照電圧比が供給され工いるＯこの参
照電圧Ｅｂは、ＬＤＩが寿命あるいは故障であると判断
される光出力に対応する電圧値である。ＣＭＰｚ２はＬ
ＰＦｙの出力電圧と参照電圧Ｂｂとを比較し、比較結果
に応じた２値信号を出力する。ＬＤＩが正常な通常状態
では、ＬＤＪの光出力はＡＰＣｇの制御により上述した
ように一定に保たれており、Ｌ Ｐ Ｆ ９の出力電圧
〉参照電圧Ｅｂ である。The output voltage of LPFj is determined by a comparator (hereinafter referred to as CMP).
It is also supplied to one input terminal of 12. A reference voltage ratio is supplied to the other input terminal of CMPJj. This reference voltage Eb is a voltage value corresponding to the optical output at which it is determined that the LDI is at the end of its life or has failed. CMPz2 is L
The output voltage of PFy and the reference voltage Bb are compared, and a binary signal according to the comparison result is output. In a normal state in which the LDI is normal, the optical output of the LDJ is kept constant as described above under the control of the APCg, and the output voltage of the L P F 9>the reference voltage Eb.
一方、Ｉ、ＤＩが異常となり、ＬＤＩの光出力が低下し
、ＡＰＣ６の制御によりノ毫イアス亀流ＩＢが増加され
てもＬＤｚのｆｔ、ａｌｌ力が所定出力に保たれない場
合、Ｌ Ｐ ｆ” ９の出力電圧く参照電圧Ｅｂ と
なる。そして、この状１１における比較器１２の出力に
よってＬＤＺの異常が検出される。On the other hand, if I and DI become abnormal, the optical output of LDI decreases, and the ft and all forces of LDz are not maintained at the predetermined output even if the current IB is increased by the control of APC6, L P f The output voltage of "9 becomes the reference voltage Eb. Then, an abnormality in the LDZ is detected by the output of the comparator 12 in this state 11.
このように従来のＬＤＩＫ動回路では、ＬＤＪの光出力
に対応するＬＰＦｊｌの出力を監視し、このＬＰＦｊの
出力と参照電圧Ｅｂとの大小比較により異常検出を行な
うようになっていた０この場合、ＬＤＪの光出力を検出
するためＫは前述したよ５にＬＩ）ｚにＰＤｌを結合さ
せ、Ｐｉ）７によって光／電気電換を行なわせる８黴が
あった。しかし、ＬＤＪとＰＤｙの結合には各回路毎に
ばらつきが生じるため、たとえＬＤＩの光出力が一定で
あってもＰＤ７における光検出出力は各回路毎に異なる
のが一般的であった。このため、従来のＬＤ駆動回路で
は、各回路毎に光測定器等を用いてＬＤＩの光出力とＰ
Ｄ７における光検出出力との関係を把握し、異常判定条
件としての参照電圧を調整しなければならず、実用性に
乏しい欠点があった〇〔発明の目的〕本発明は上記事情に鑑みてなされたものでその目的は、
ＬＤ（半導体レーザダイオード）の異常判定条件として
の参照電圧（基準電圧）を、ＬＤの仕様上の特性に基づ
いて極めて簡単に決定し設定でき、もってＬＤの異常検
出が効率よく行なえる実用性に富んだ半導体レーデダイ
オードの異常検出方式を提供することにある。In this way, in the conventional LDIK operating circuit, the output of LPFjl corresponding to the optical output of LDJ is monitored, and an abnormality is detected by comparing the output of LPFj with the reference voltage Eb. In order to detect the optical output of the LDJ, as described above, K was used to couple PDl to LI)z, and perform optical/electrical conversion using Pi)7. However, since the coupling between LDJ and PDy varies from circuit to circuit, even if the optical output of the LDI is constant, the photodetection output at PD7 generally differs from circuit to circuit. For this reason, in conventional LD drive circuits, an optical measuring device or the like is used for each circuit to determine the optical output and P of the LDI.
It is necessary to grasp the relationship with the photodetection output in D7 and adjust the reference voltage as an abnormality judgment condition, which has the disadvantage of lacking in practicality. [Object of the Invention] The present invention was made in view of the above circumstances. Its purpose is to
The reference voltage (reference voltage) as an abnormality judgment condition for an LD (semiconductor laser diode) can be determined and set extremely easily based on the characteristics of the LD specifications, making it practical to efficiently detect abnormalities in an LD. It is an object of the present invention to provide a rich abnormality detection method for semiconductor radar diodes.
ＬＬ）（半導体レーデダイオード）の光出力を検出し、
この光出力が一定となるようにＬＤに供給されるバイア
ス電流を可変制御するＡＰＣ（安定化回路）を備えたＬ
Ｄ駆動回路において、上記バイアス電流を電圧に変換す
る電ｆｉ／電圧変換（ロ）路と、この電ｆｉ／電圧変換
回路の出力電圧と上記ＬＤが異常と判定されるバイアス
電流［Ｋ基づいて設定された基準電圧（参照電圧）とを
比較するＣＭＰ （比較器）とを設け、このＣＭＰの大
小比較結果すなわちＡＰＣによって制御された実際のバ
イアス電流が異常と判定されるバイアス電流より大きく
なったか否かによりＬＬ）の異常検出を行なうものであ
る。LL) (semiconductor radar diode) optical output is detected,
L is equipped with an APC (stabilization circuit) that variably controls the bias current supplied to the LD so that this optical output is constant.
In the D drive circuit, there is an electric fi/voltage conversion (b) path that converts the bias current into a voltage, an output voltage of this electric fi/voltage conversion circuit, and a bias current [set based on K] that determines that the LD is abnormal. A CMP (comparator) is provided to compare the CMP with a standard voltage (reference voltage), and it is determined whether or not the actual bias current controlled by the APC is larger than the bias current that is determined to be abnormal. Accordingly, abnormality detection of LL) is performed.
以下、本発明の一実施例を図面を参照して説明する。な
お、第１図と同一部分には同一符号を付して詳細な説明
を省略する。ＷＪ２図のＬＤ暴動回路において、２１は
トランジスタ２のエミツタに接続されるバイアス電流制
限抵抗である。２２は参照電圧（基準電圧） Ｈｃを発
生する参照電圧発生器、２３はＣＭＰ （比較器）であ
る。ＣＭＰＪＪは抵抗２１の両熾電圧Ｂｘと参照電圧発
生＠ａＸで発生される参照電圧Ｂｃとの大小を比較し、
例えばＢｘ≧Ｍ、の場合に論理′″１”の異常検出信号
ＤＨＴを出力するようになっている。Hereinafter, one embodiment of the present invention will be described with reference to the drawings. Note that the same parts as in FIG. 1 are given the same reference numerals and detailed explanations are omitted. In the LD riot circuit shown in Figure WJ2, 21 is a bias current limiting resistor connected to the emitter of transistor 2. 22 is a reference voltage generator that generates a reference voltage (reference voltage) Hc, and 23 is a CMP (comparator). CMPJJ compares the magnitude of the voltage Bx across the resistor 21 and the reference voltage Bc generated by reference voltage generation @aX,
For example, when Bx≧M, the abnormality detection signal DHT of logic ``1'' is output.
次に本発明の一実施例の動作を説明する。一般Ｋｌ、Ｄ
が発振を始める電流はスレクＶヨルド電Ｒ１ｔｈと称さ
れている。通常１．Ｄ駆動回路ではこのスレツｖｙｓル
ド電流Ｉｔｈをバイアス電流Ｉ、としてＩ、ＤＫ定常的
に供給するようになっている・したがって、１１１２図
の構成においてＬＤ、１の電流−光出力特性に変動が無
い状態では、ＬＤＪの光出力は上記ストクＶヨルド電ａ
Ｉｔｈに一致したバイアス電ｆｉＩｇ によって安定
している。このような状態でＬＤＩの電流−光出力特性
が変動してＬＤＺの光出力が変化すると、従来例で説明
したようにＡＰＣ＃の制御によりトランジスタ２のペー
スに供給されるバイアス制動用ベース電流が可変される
。これによりトランジスタ２のコレクタ電流すなわちバ
イアス電ＲＩｌが可変され、ＬＤＪの光出力が一定とな
るように制御される。周知のようにＡＰＣ６は、温度変
化またはＬ Ｄ Ｊ ｆ）索子劣化などによりＬＬ）１
の光出力が減少するとバイアス電ｆｔＩＢが増加するよ
うに動作し、逆にＬＤｘの光出力が増加するとバイアス
電流が減少するように動作する。Next, the operation of one embodiment of the present invention will be explained. General Kl, D
The current at which oscillation begins is called the SLEK Vjord current R1th. Usually 1. In the D drive circuit, this threaded current Ith is constantly supplied to I,DK as a bias current I.Therefore, in the configuration shown in Fig. 1112, there is no fluctuation in the current-optical output characteristics of LD1. In the state, the optical output of LDJ is
It is stabilized by the bias voltage fiIg that matches Ith. When the current-optical output characteristics of the LDI fluctuates in this state and the optical output of the LDZ changes, the bias braking base current supplied to the pace of transistor 2 changes due to the control of APC#, as explained in the conventional example. Variable. As a result, the collector current of the transistor 2, that is, the bias voltage RIl is varied, and the optical output of the LDJ is controlled to be constant. As is well known, APC6 is affected by temperature changes, L D J f) LL) 1 due to cord deterioration, etc.
When the optical output of LDx decreases, the bias current ftIB increases, and conversely, when the optical output of LDx increases, the bias current decreases.
ところで、ＬＤｆの素子劣化に伴ってＬｌ）Ｊの光出力
が減少した際に、上述のようにＡＰＣｆｆＫよってバイ
アス電ｌｌｌ１ｌが増加され、所定の光出力が安定して
得られるようＫＩＩＫ＋御されるが、バイアス電ｆｉ１
ｍを充分に増やしても所定の光出力が得られない場合が
ある。このような状態におけるＬＤｚは寿命（または故
障）と考えられる。上記バイアス電流１．は、駆動時間
をｔとすると一般にＥに比例するといわれている・そし
て、このバイアス電流ＩＩが初期値（これはＬＤＪの仕
様規格で定められているスレ７Ｖａ。By the way, when the optical output of Ll)J decreases due to the deterioration of the LDf element, the bias voltage lll1l is increased by APCffK as described above, and KIIK+ is controlled so that a predetermined optical output can be stably obtained. , bias electric fi1
Even if m is increased sufficiently, a predetermined optical output may not be obtained. The LDz in such a state is considered to have reached the end of its life (or failure). Bias current 1. is generally said to be proportional to E, where t is the drive time.Then, this bias current II is the initial value (this is 7Va as defined by the LDJ specifications).
ルド電ｆｆ１Ｉｔｈと考えてもよい）の１．５倍になっ
たときを一般にＬＤｘの寿命と称している。The life span of the LDx is generally referred to as the time when it becomes 1.5 times the LDx voltage (which may be considered as the LDx voltage ff1Ith).
そこで本実施例では、ＬＤＩに供給されるバイアス電＠
Ｉｎが初期バイアス電ｔｌｔＩＢ、の１，５倍になった
ときにＬＤＪが異常と判定されるよ５にしている・そし
て、ＬＤｚに供給されるバイアス電流ＩＢと初期バイア
ス電ａＩｎ、 の１．５倍値とを比較するために、Ｌ
ＤＪに供給されるバイアス電流１１に代えて抵抗２１の
両熾電圧Ｅｘを用い、初期バイアス電流ＩＢ、の１．５
倍値に代えて以下に示す参照電圧Ｅｃを用い、ＥｘとＥ
Ｃとを比較するようｋしている。これは、抵抗２１０両
端電圧ＩＡｘがバイアス電流Ｉ、に比例することに＊ｉ
ｉしたもので、これに伴い参照電圧ＥＣとして初期バイ
アス電ｇＬ１１．がＬＤＪＫ供給された場合の抵抗２１
の電圧電圧Ｅｘ０の１．５倍値を採用し１いるＯＣＭＰｚｓは抵抗２１の電増電圧Ｉ！２ｘ と参照電
圧発生器２２で発生される上記参照電圧ＥＣとの大小を
比較する。通常Ｅｘ ＜ ＥｃであるためＣＭＰ２３か
ら異常検出信号１）ＥＴが出力されることはない。これ
に均し、ＬＤＪの素子劣化などによりり、ＤＩの光出力
が低下し、この光出力を所定レベルに保つようにＡＰＣ
６０制御によってバイアスを流１１が増加されると、抵
抗２１０両趨電圧Ｅｘが大きくなってくる０そして、こ
のバイアス電流ＩＢが前記初期バイアス電流■Ｂ０の１
．５倍値に一致するようになると、抵抗２１の１ｌｉｉ
ｌｌ電圧Ｅｘ はあらかじめ設定されている参照電圧Ｂ
Ｃに一致し、これによりＣＭＰ Ｊ ３は有効な異常検
出信号ＤＥＴを出力する。この異常検出信号ＤＢＴＫよ
って１，１）Ｊの異常、すなわちＬＤｌの寿命または故
障などが判断される。この場合、異常検出信号ＤＢＴを
警報器の駆動信号としたり、更には他のＬＤへの切換え
を行なう切換回路に対する切換制御信号とすることは可
能である。Therefore, in this embodiment, the bias voltage supplied to the LDI
The value is set to 5 so that LDJ is determined to be abnormal when In becomes 1.5 times the initial bias voltage tltIB, and the bias current IB supplied to LDz and the initial bias voltage aIn are 1.5. In order to compare with the double value, L
By using the voltage Ex across the resistor 21 instead of the bias current 11 supplied to the DJ, the initial bias current IB is 1.5
Using the reference voltage Ec shown below instead of the double value, Ex and E
I am trying to compare it with C. This means that the voltage IAx across the resistor 210 is proportional to the bias current I, *i
Accordingly, the initial bias voltage gL11.i is set as the reference voltage EC. Resistor 21 when LDJK is supplied
1.5 times the voltage Ex0 is adopted, and 1 O CMPzs is the increased voltage I! of the resistor 21. 2x and the reference voltage EC generated by the reference voltage generator 22 are compared. Normally, since Ex < Ec, the abnormality detection signal 1) ET is not output from the CMP 23. In addition to this, the optical output of the DI decreases due to deterioration of the LDJ element, etc., and the APC
When the bias current 11 is increased by the 60 control, the voltage Ex across the resistor 210 increases.0 And this bias current IB becomes 1 of the initial bias current B0.
．． When it matches the 5 times value, 1lii of resistor 21
ll voltage Ex is the preset reference voltage B
C, so that CMP J 3 outputs a valid abnormality detection signal DET. This abnormality detection signal DBTK determines the abnormality of 1,1)J, that is, the life span or failure of LDl. In this case, it is possible to use the abnormality detection signal DBT as a drive signal for an alarm or as a switching control signal for a switching circuit that switches to another LD.
本実施例で適用される参照電圧Ｅｃ は、上述したよう
に初期バイアス電ｆＩＬＩＢ０により発生する抵抗２１
の電増電圧を１．５倍した値である。The reference voltage Ec applied in this embodiment is the resistance 21 generated by the initial bias voltage fILIB0 as described above.
It is the value obtained by multiplying the electric charge increase voltage by 1.5 times.
一般にこの初期バイアス電流ＩＢ０として、Ｌｌ）の仕
様上の特性で示されているスレクンヨルド電流Ｉｔｈが
採用されており、このスレンシヨルド電流Ｉｔｈ、抵抗
２１の抵抗値ＲＥ基づル１て、従来のように調整等を行
なうことなく参照電圧ＥＣを決定することができる。こ
の場合、トランジスタ２０ペース接地電流増幅率をαと
すると１ｃ＝１，５Ｘ（ａＸＩｌｈＸＲ）となる。Generally, as this initial bias current IB0, the Threnschjord current Ith shown in the specification characteristics of Ll) is adopted. The reference voltage EC can be determined without adjustment or the like. In this case, if the ground current amplification factor of the transistor 20 is α, then 1c=1,5X(aXIlhXR).
また、本実施例によれば、ムＰＣの故障により、ＬＤＪ
Ｋ供給されるバイアス電流Ｉ、が急増した場合などＫも
、その旨をＣＭＰｚｚから：°１出力される異常検出信号１）ＩＴＫよって検知できるの
で、これに対処することによりバイアス電流１１の急増
のためにＬＤＪが破壊されることを未然に防止できる。Further, according to this embodiment, when the LDJ
If the bias current I supplied by K suddenly increases, this fact can be detected by the abnormality detection signal 1) ITK output from CMPzz. Therefore, it is possible to prevent the LDJ from being destroyed.
これに対し、従来の方式では、バイアス電ｆｌＬＩＢな
増加することによってＬＤの光出力が一定に保たれる状
態では異常検出は行なわれないため、上述したり、Ｄに
対する保護機能を発揮することは困難である。On the other hand, in the conventional method, abnormality detection is not performed when the optical output of the LD is kept constant due to an increase in the bias voltage flLIB. Have difficulty.
なお、１紀実施例ではバイアス電流ＩＢ が初期バイア
ス電ｇＩｉ＋。の１．５倍以上となることによりＬｌ）
σ）異常を判定する場合について説明したが、これに限
定されるものではない。また、前記実施例では、バイア
ス電ｆｉＩ／）電流／電圧変換器としてトランジスタ２
のエミッタに接続される（バイアス電流制限）抵抗２１
を用いた場合について説明したが、トランジスタ２．４
のコレクタ関に抵抗を挿入し、この抵抗の電増電圧と参
照電圧とを比較するようにしてもよい。In the first embodiment, the bias current IB is the initial bias current gIi+. Ll)
σ) Although the case of determining an abnormality has been described, the present invention is not limited to this. Further, in the above embodiment, the transistor 2 is used as a bias voltage fiI/) current/voltage converter.
(bias current limiting) resistor 21 connected to the emitter of
Although we have explained the case using transistor 2.4
A resistor may be inserted in the collector of the resistor, and the increased voltage of this resistor may be compared with a reference voltage.
以上詳述したように本発明のレーザダイオードの異常検
出方式によれは、半導体レーデダイオードの異常判定条
件としての参照電圧（基準電圧）の設定が極めて簡単に
行なえるので、実用性に冨んだ半導体レーザダイオード
の異常検出が効率よく行なえる。As described in detail above, the laser diode abnormality detection method of the present invention is extremely practical because it is extremely easy to set the reference voltage (reference voltage) as the abnormality judgment condition for the semiconductor laser diode. Therefore, abnormalities in semiconductor laser diodes can be detected efficiently.
籐１図は従来例を示す回路構成図、第２図は本発明の一
実施例な示す回路構成図である。１・・・半導体レーデダイオード（ＬＤ）、ｊ・・・ト
ランジスタ（バイアス電流供給囲路）、６・・・安定化
囲路（ＡＰＣ）、７・・・フォトダイオード（ＰＤ）、
ｉｘ、ｘト・・比軟５（ＣＭＰ）、２１・・・バイアス
電流制限抵抗（電流／電圧変換器）、２２・・・参照電
圧発生器。出願人代理人 弁理士 鈴 江 武 彦第１図第２ｖ！ＪFigure 1 is a circuit diagram showing a conventional example, and Figure 2 is a circuit diagram showing an embodiment of the present invention. 1... Semiconductor LED diode (LD), j... Transistor (bias current supply circuit), 6... Stabilization circuit (APC), 7... Photodiode (PD),
ix, x... Specific soft 5 (CMP), 21... Bias current limiting resistor (current/voltage converter), 22... Reference voltage generator. Applicant's agent Patent attorney Takehiko Suzue Figure 1, Figure 2v! J
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|---|---|---|---|
| JP57023341AJPS58140175A (en) | 1982-02-16 | 1982-02-16 | Semiconductor laser diode abnormality detection method |
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57023341AJPS58140175A (en) | 1982-02-16 | 1982-02-16 | Semiconductor laser diode abnormality detection method |
| Publication Number | Publication Date |
|---|---|
| JPS58140175Atrue JPS58140175A (en) | 1983-08-19 |
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57023341APendingJPS58140175A (en) | 1982-02-16 | 1982-02-16 | Semiconductor laser diode abnormality detection method |
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