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JPS57195397A - Locally doubled storage device - Google Patents

Locally doubled storage device

Info

Publication number
JPS57195397A
JPS57195397AJP56080178AJP8017881AJPS57195397AJP S57195397 AJPS57195397 AJP S57195397AJP 56080178 AJP56080178 AJP 56080178AJP 8017881 AJP8017881 AJP 8017881AJP S57195397 AJPS57195397 AJP S57195397A
Authority
JP
Japan
Prior art keywords
storage device
module
circuit
output
decoder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56080178A
Other languages
Japanese (ja)
Other versions
JPS6235704B2 (en
Inventor
Toshiyuki Furui
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co LtdfiledCriticalNEC Corp
Priority to JP56080178ApriorityCriticalpatent/JPS57195397A/en
Publication of JPS57195397ApublicationCriticalpatent/JPS57195397A/en
Publication of JPS6235704B2publicationCriticalpatent/JPS6235704B2/ja
Grantedlegal-statusCriticalCurrent

Links

Landscapes

Abstract

PURPOSE: To evade the interruption of a system by irreducible necessary local doubling by using optional one of modules in a main storage device as a backup module for doubling.
CONSTITUTION: For example, the 1st module selection register 13 is set to (01) and the 2nd module selection register 20 is set to (11). In this case, when (01) is selected by an address register 10, the output 102 of a decoder 11 goes up to (1). Once the terminal S of a storage module 42 is set to (1) through an OR circuit 27, an input to an AND gate 25 is set to (1) through an AND circuit 16 and an OR circuit 19, and then ANDed with the output 119 of a decoder 21 to hold the output 124 of the AND gate 25 at (1), so that the terminal S of a storage module 44 also goes up to (1).
COPYRIGHT: (C)1982,JPO&Japio
JP56080178A1981-05-281981-05-28Locally doubled storage deviceGrantedJPS57195397A (en)

Priority Applications (1)

Application NumberPriority DateFiling DateTitle
JP56080178AJPS57195397A (en)1981-05-281981-05-28Locally doubled storage device

Applications Claiming Priority (1)

Application NumberPriority DateFiling DateTitle
JP56080178AJPS57195397A (en)1981-05-281981-05-28Locally doubled storage device

Publications (2)

Publication NumberPublication Date
JPS57195397Atrue JPS57195397A (en)1982-12-01
JPS6235704B2 JPS6235704B2 (en)1987-08-03

Family

ID=13711094

Family Applications (1)

Application NumberTitlePriority DateFiling Date
JP56080178AGrantedJPS57195397A (en)1981-05-281981-05-28Locally doubled storage device

Country Status (1)

CountryLink
JP (1)JPS57195397A (en)

Cited By (15)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
US5134619A (en)*1990-04-061992-07-28Sf2 CorporationFailure-tolerant mass storage system
US5140592A (en)*1990-03-021992-08-18Sf2 CorporationDisk array system
US5146574A (en)*1989-06-271992-09-08Sf2 CorporationMethod and circuit for programmable selecting a variable sequence of element using write-back
US5202856A (en)*1990-04-051993-04-13Micro Technology, Inc.Method and apparatus for simultaneous, interleaved access of multiple memories by multiple ports
US5212785A (en)*1990-04-061993-05-18Micro Technology, Inc.Apparatus and method for controlling data flow between a computer and memory devices
US5214778A (en)*1990-04-061993-05-25Micro Technology, Inc.Resource management in a multiple resource system
US5233692A (en)*1990-04-061993-08-03Micro Technology, Inc.Enhanced interface permitting multiple-byte parallel transfers of control information and data on a small computer system interface (SCSI) communication bus and a mass storage system incorporating the enhanced interface
US5315708A (en)*1990-02-281994-05-24Micro Technology, Inc.Method and apparatus for transferring data through a staging memory
US5325497A (en)*1990-03-291994-06-28Micro Technology, Inc.Method and apparatus for assigning signatures to identify members of a set of mass of storage devices
US5388243A (en)*1990-03-091995-02-07Mti Technology CorporationMulti-sort mass storage device announcing its active paths without deactivating its ports in a network architecture
US5414818A (en)*1990-04-061995-05-09Mti Technology CorporationMethod and apparatus for controlling reselection of a bus by overriding a prioritization protocol
US5461723A (en)*1990-04-051995-10-24Mit Technology Corp.Dual channel data block transfer bus
US5469453A (en)*1990-03-021995-11-21Mti Technology CorporationData corrections applicable to redundant arrays of independent disks
US5956524A (en)*1990-04-061999-09-21Micro Technology Inc.System and method for dynamic alignment of associated portions of a code word from a plurality of asynchronous sources
JP2009176094A (en)*2008-01-252009-08-06Fujitsu Ltd Transfer device, transfer device control method, and information processing device

Cited By (19)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
US5349686A (en)*1989-06-271994-09-20Mti Technology CorporationMethod and circuit for programmably selecting a variable sequence of elements using write-back
US5146574A (en)*1989-06-271992-09-08Sf2 CorporationMethod and circuit for programmable selecting a variable sequence of element using write-back
US5315708A (en)*1990-02-281994-05-24Micro Technology, Inc.Method and apparatus for transferring data through a staging memory
US5140592A (en)*1990-03-021992-08-18Sf2 CorporationDisk array system
US5469453A (en)*1990-03-021995-11-21Mti Technology CorporationData corrections applicable to redundant arrays of independent disks
US5388243A (en)*1990-03-091995-02-07Mti Technology CorporationMulti-sort mass storage device announcing its active paths without deactivating its ports in a network architecture
US5325497A (en)*1990-03-291994-06-28Micro Technology, Inc.Method and apparatus for assigning signatures to identify members of a set of mass of storage devices
US5202856A (en)*1990-04-051993-04-13Micro Technology, Inc.Method and apparatus for simultaneous, interleaved access of multiple memories by multiple ports
US5461723A (en)*1990-04-051995-10-24Mit Technology Corp.Dual channel data block transfer bus
US5212785A (en)*1990-04-061993-05-18Micro Technology, Inc.Apparatus and method for controlling data flow between a computer and memory devices
US5361347A (en)*1990-04-061994-11-01Mti Technology CorporationResource management in a multiple resource system where each resource includes an availability state stored in a memory of the resource
US5233692A (en)*1990-04-061993-08-03Micro Technology, Inc.Enhanced interface permitting multiple-byte parallel transfers of control information and data on a small computer system interface (SCSI) communication bus and a mass storage system incorporating the enhanced interface
US5414818A (en)*1990-04-061995-05-09Mti Technology CorporationMethod and apparatus for controlling reselection of a bus by overriding a prioritization protocol
US5454085A (en)*1990-04-061995-09-26Mti Technology CorporationMethod and apparatus for an enhanced computer system interface
US5214778A (en)*1990-04-061993-05-25Micro Technology, Inc.Resource management in a multiple resource system
US5134619A (en)*1990-04-061992-07-28Sf2 CorporationFailure-tolerant mass storage system
US5956524A (en)*1990-04-061999-09-21Micro Technology Inc.System and method for dynamic alignment of associated portions of a code word from a plurality of asynchronous sources
JP2009176094A (en)*2008-01-252009-08-06Fujitsu Ltd Transfer device, transfer device control method, and information processing device
US8327197B2 (en)2008-01-252012-12-04Fujitsu LimitedInformation processing apparatus including transfer device for transferring data

Also Published As

Publication numberPublication date
JPS6235704B2 (en)1987-08-03

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