JPS57123600A - Protecting circuit for memory - Google Patents

Abstract

PURPOSE:To obtain a protecting circuit of simple constitution which performs stable operation by controlling the activation and passivation of a memory circuit by using a power-break and a recovery detection signal and a prescribed delay signal in combination. CONSTITUTION:When a voltage between a terminal VCC2 and the ground applied to a memory through a constant voltage circuit 1 drops in accordance with a drop in commercial voltage between a terminal VCC1 and the ground, this drop is detected through the Zener diode ZD and voltage-dividing resistances R1 and R2 of a voltage-down detecting circuit A to turn off transistors (TR) Q1 and Q2. Consequently, the detected voltage (b) of the circuit A drops to a low level to invert the output of an AND gate AND1 to the low level without reference to a memory control signal CS1, and an inverted signal by a TRQ8 rises to a high level, thereby passivating the memory. On the other hand, when the voltage recovers and the signal (b) goes up to the high level, a signal (c) applied to the AND gate AND1 through a delay circuit B is inverted to the high level a prescribed time later and then the memory is activated. This delay system realizes a memory protecting circuit of simple constitution which has less parts and operates stably.