JPS5635458A - Manufacture of integrated circuit device - Google Patents

Abstract

PURPOSE: To obtain a precise and fine SIT integrated circuit easily by employing an Si₃N₄ film and an SiO_xN_y and the like and selectively etching and oxidizing them.

CONSTITUTION: An N^- type epitaxial layer is formed on the (100) plane of an N⁺ type Si substrate 12 as channel 13 and base 13a, is diffused with B to selectively form a P⁺ type gate 14 and is diffused with As to selectively form an N⁺ type drain 11. Si₃N₄ or SiO_xN_y masks 81, 83, 84, 85 are formed as superimposed on an oxide film 7, the substrate is anisotropically etched, and shallow grooves v₁, v₃ and deep grooves v₂ are selectively formed. Thereafter, the masks 83, 84 are partly removed, are thermally diffused, and the gate 14 is formed deeper than the drain 11. Eventually, openings are perforated at predetermined positions, and aluminum electrodes 1, 4, 5 are formed therethrough. According to this configuration, the respective selectively diffusing steps may be perforated roughly, the final diffusing depth may be formed with impurities of different diffusion coefficients, are easily miniaturized and precise SIT logic circuit may be obtained.

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