JPS55127745A - Bit buffer system - Google Patents

Bit buffer system

Info

Publication number: JPS55127745A
Authority: JP; Japan
Prior art keywords: signal; pulse; counter; code; transmission data
Prior art date: 1979-03-26
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Pending

Inventor

Kazuo Suzuka

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Kokusai Denki Electric Inc

Original Assignee

Hitachi Denshi KK

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1979-03-26

Filing date

1979-03-26

Publication date

1980-10-02

1979-03-26Application filed by Hitachi Denshi KKfiledCriticalHitachi Denshi KK

1979-03-26Priority to JP3433979ApriorityCriticalpatent/JPS55127745A/ja

1980-03-24Priority to US06/133,611prioritypatent/US4359770A/en

1980-10-02Publication of JPS55127745ApublicationCriticalpatent/JPS55127745A/ja

StatusPendinglegal-statusCriticalCurrent

Classifications

- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/062—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
- H04J3/0626—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers plesiochronous multiplexing systems, e.g. plesiochronous digital hierarchy [PDH], jitter attenuators
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0685—Clock or time synchronisation in a node; Intranode synchronisation
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0008—Synchronisation information channels, e.g. clock distribution lines
- H04L7/0012—Synchronisation information channels, e.g. clock distribution lines by comparing receiver clock with transmitter clock
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/04—Speed or phase control by synchronisation signals

Landscapes

Engineering & Computer Science (AREA)
Computer Networks & Wireless Communication (AREA)
Signal Processing (AREA)
Computer Hardware Design (AREA)
Synchronisation In Digital Transmission Systems (AREA)
Time-Division Multiplex Systems (AREA)

JP3433979A1979-03-261979-03-26Bit buffer systemPendingJPS55127745A (en)

Priority Applications (2)

Application Number	Priority Date	Filing Date	Title
JP3433979AJPS55127745A (en)	1979-03-26	1979-03-26	Bit buffer system
US06/133,611US4359770A (en)	1979-03-26	1980-03-24	Bit buffer system

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
JP3433979AJPS55127745A (en)	1979-03-26	1979-03-26	Bit buffer system

Publications (1)

Publication Number	Publication Date
JPS55127745Atrue JPS55127745A (en)	1980-10-02

Family

ID=12411376

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
JP3433979APendingJPS55127745A (en)	1979-03-26	1979-03-26	Bit buffer system

Country Status (2)

Country	Link
US (1)	US4359770A (ja)
JP (1)	JPS55127745A (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JPS61245731A (ja)*	1985-04-24	1986-11-01	Shinko Electric Co Ltd	同期補正回路
US8399058B2 (en)	2005-04-22	2013-03-19	3M Innovative Properties Company	Masking article and method of masking of substrate

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US4429386A (en)	1981-01-05	1984-01-31	Siemens Corporation	Buffer arrangement of a PCM exchange system
JPS5866541A (ja)*	1981-10-15	1983-04-20	松下電工株式会社	３相電力線搬送制御装置
JPS58200654A (ja)*	1982-05-18	1983-11-22	Nec Corp	通信装置
JPS6019337A (ja)*	1983-07-13	1985-01-31	Matsushita Electric Ind Co Ltd	デイジタル信号多重方法
US4816834A (en)*	1984-03-30	1989-03-28	Honeywell Inc.	Pulse synchronizing apparatus
US4807248A (en)*	1984-05-23	1989-02-21	Rockwell International Corporation	Automatic resynchronization technique
US4604582A (en)*	1985-01-04	1986-08-05	Lockheed Electronics Company, Inc.	Digital phase correlator
US4712211A (en)*	1985-03-25	1987-12-08	Nissan Motor Company, Limited	Network system utilizing an intermediate synchronizations signal and predetermined code string patterns
US4740960A (en)*	1986-10-30	1988-04-26	Gte Communication Systems Corporation	Synchronization arrangement for time multiplexed data scanning circuitry
BE1000415A7 (nl)*	1987-03-18	1988-11-22	Bell Telephone Mfg	Asynchroon op basis van tijdsverdeling werkend communicatiesysteem.
US4977582A (en)*	1988-03-31	1990-12-11	At&T Bell Laboratories	Synchronization of non-continuous digital bit streams
US4972444A (en)*	1988-07-14	1990-11-20	International Business Machines Corporation	Digital phase-locked device and method
US4931986A (en)*	1989-03-03	1990-06-05	Ncr Corporation	Computer system clock generator for generating tuned multiple clock signals
EP0422310A1 (en)*	1989-10-10	1991-04-17	International Business Machines Corporation	Distributed mechanism for the fast scheduling of shared objects
US5022056A (en)*	1989-10-23	1991-06-04	National Semiconductor Corporation	Method and structure for digital phase synchronization
DE69022025T2 (de)*	1990-03-13	1996-04-18	Ibm	Synchronisierungsschaltung für ein synchrones Vermittlungssystem.
EP0596648A1 (en)	1992-11-02	1994-05-11	National Semiconductor Corporation	Network link endpoint capability detection
US5406559A (en)*	1992-11-02	1995-04-11	National Semiconductor Corporation	Isochronous link protocol
EP0596651A1 (en)	1992-11-02	1994-05-11	National Semiconductor Corporation	Network for data communication with isochronous capability
USRE39395E1 (en)	1992-11-02	2006-11-14	Negotiated Data Solutions Llc	Data communication network with transfer port, cascade port and/or frame synchronizing signal
USRE39116E1 (en)	1992-11-02	2006-06-06	Negotiated Data Solutions Llc	Network link detection and generation
US5471466A (en)*	1993-11-17	1995-11-28	Gte Laboratories Incorporated	Method and apparatus for ATM cell alignment
US5444743A (en)*	1993-11-18	1995-08-22	Hitachi America, Ltd.	Synchronous pulse generator
US5533018A (en)	1994-12-21	1996-07-02	National Semiconductor Corporation	Multi-protocol packet framing over an isochronous network
US6704882B2 (en)	2001-01-22	2004-03-09	Mayo Foundation For Medical Education And Research	Data bit-to-clock alignment circuit with first bit capture capability

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US3908084A (en)*	1974-10-07	1975-09-23	Bell Telephone Labor Inc	High frequency character receiver
US4045618A (en)*	1976-01-29	1977-08-30	Compagnie Industrielle Des Telecommunications Cit-Alcatel S.A.	Device for synchronizing a binary data train in relation to a reference train

1979
- 1979-03-26JPJP3433979Apatent/JPS55127745A/jaactivePending
1980
- 1980-03-24USUS06/133,611patent/US4359770A/ennot_activeExpired - Lifetime

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JPS61245731A (ja)*	1985-04-24	1986-11-01	Shinko Electric Co Ltd	同期補正回路
US8399058B2 (en)	2005-04-22	2013-03-19	3M Innovative Properties Company	Masking article and method of masking of substrate

Also Published As

Publication number	Publication date
US4359770A (en)	1982-11-16

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JPS55127745A - Bit buffer system - Google Patents

Info

Links

Classifications

Landscapes

Priority Applications (2)

Applications Claiming Priority (1)

Publications (1)

Family

ID=12411376

Family Applications (1)

Country Status (2)

Cited By (2)

Families Citing this family (25)

Family Cites Families (2)

Cited By (2)

Also Published As

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