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JPS55115775A - Synchronizing signal generator - Google Patents

Synchronizing signal generator

Info

Publication number
JPS55115775A
JPS55115775AJP2245479AJP2245479AJPS55115775AJP S55115775 AJPS55115775 AJP S55115775AJP 2245479 AJP2245479 AJP 2245479AJP 2245479 AJP2245479 AJP 2245479AJP S55115775 AJPS55115775 AJP S55115775A
Authority
JP
Japan
Prior art keywords
signal
fed
synchronizing signal
phe
pulse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2245479A
Other languages
Japanese (ja)
Other versions
JPS6161308B2 (en
Inventor
Takashi Nakamura
Yoshihiro Morioka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony CorpfiledCriticalSony Corp
Priority to JP2245479ApriorityCriticalpatent/JPS55115775A/en
Publication of JPS55115775ApublicationCriticalpatent/JPS55115775A/en
Publication of JPS6161308B2publicationCriticalpatent/JPS6161308B2/ja
Grantedlegal-statusCriticalCurrent

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Abstract

PURPOSE:To produce the horizontal and vertical synchronizing signal without jitter, by resetting the counter with the control signal when external synchronizing signal is present at the period when the window pulse is fed and with the external synchronizing signal other than the case. CONSTITUTION:In the external synchronism by means of the synchronizing signal generator of various standard system such as NTSC and PAL systems, the reference signal So of the reference signal oscillator 1 is frequency-divided with the counters 2...5 to obtain the horizontal and vertical synchronizing signals SH, SV. The counter 3 is provided with the control circuit 21 for reset pulse and the forming circuit 20 of window pulse, and to the circuit 21, the control signal PHI based on the signal SH and the external synchronizing signal PHE are fed and the window pulse signal PW is fed. Further, if the signal PHE is present at the period when the pulse PW is fed, the counter 3 is reset with the signal PHI and in other case, with the signal PHE. Thus, if the signal PHE is fluctuated with the presence of transmission system, signals SH, SV can be formed without jitter.
JP2245479A1979-02-271979-02-27Synchronizing signal generatorGrantedJPS55115775A (en)

Priority Applications (1)

Application NumberPriority DateFiling DateTitle
JP2245479AJPS55115775A (en)1979-02-271979-02-27Synchronizing signal generator

Applications Claiming Priority (1)

Application NumberPriority DateFiling DateTitle
JP2245479AJPS55115775A (en)1979-02-271979-02-27Synchronizing signal generator

Publications (2)

Publication NumberPublication Date
JPS55115775Atrue JPS55115775A (en)1980-09-05
JPS6161308B2 JPS6161308B2 (en)1986-12-25

Family

ID=12083149

Family Applications (1)

Application NumberTitlePriority DateFiling Date
JP2245479AGrantedJPS55115775A (en)1979-02-271979-02-27Synchronizing signal generator

Country Status (1)

CountryLink
JP (1)JPS55115775A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
JPS61164387A (en)*1985-01-161986-07-25Matsushita Electric Ind Co Ltd video signal processing equipment
JPS61278277A (en)*1985-06-041986-12-09Matsushita Electric Ind Co Ltd synchronous signal generator
JPS61283277A (en)*1985-06-101986-12-13Matsushita Electric Ind Co Ltd synchronous signal generator
JPS61283276A (en)*1985-06-101986-12-13Matsushita Electric Ind Co Ltd synchronous signal generator
US4769704A (en)*1985-06-041988-09-06Matsushita Electric Industrial Co., Ltd.Synchronization signal generator
WO1998007272A1 (en)*1996-08-131998-02-19Fujitsu General LimitedPll circuit for digital display device

Cited By (7)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
JPS61164387A (en)*1985-01-161986-07-25Matsushita Electric Ind Co Ltd video signal processing equipment
JPS61278277A (en)*1985-06-041986-12-09Matsushita Electric Ind Co Ltd synchronous signal generator
US4769704A (en)*1985-06-041988-09-06Matsushita Electric Industrial Co., Ltd.Synchronization signal generator
JPS61283277A (en)*1985-06-101986-12-13Matsushita Electric Ind Co Ltd synchronous signal generator
JPS61283276A (en)*1985-06-101986-12-13Matsushita Electric Ind Co Ltd synchronous signal generator
WO1998007272A1 (en)*1996-08-131998-02-19Fujitsu General LimitedPll circuit for digital display device
US6392641B1 (en)1996-08-132002-05-21Fujitsu LimitedPLL circuit for digital display apparatus

Also Published As

Publication numberPublication date
JPS6161308B2 (en)1986-12-25

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