【０００１】[0001]
【発明の属する技術分野】本発明は、バッテリー駆動で
きる情報機器における電源オフ時のバッテリーの省電力
に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to power saving of a battery when power is turned off in a battery-driven information device.
【０００２】[0002]
【従来の技術】近年、パーソナルコンピューターなどの
情報機器（以降、「ＰＣ」と総称する）の携帯性が増す
につれて屋外での使用が多くなってきた。そのため、バ
ッテリーの電力消費を抑えることが重要となってきてい
る。また、サスペンドやハイバネーションといった機能
を実現するために、電源スイッチもスライド型の機械的
なスイッチから動作させた時だけ信号を発信して状態を
変化させるプッシュ型のスイッチに変わってきている。
そのため、ＰＣは電源オフ時であっても常に電源スイッ
チの状態を監視していて、自動的にＰＣをオン／オフで
きなければいけない。2. Description of the Related Art In recent years, as information devices such as personal computers (hereinafter collectively referred to as "PCs") have become more portable, they have been increasingly used outdoors. Therefore, it has become important to suppress the power consumption of the battery. Further, in order to realize functions such as suspend and hibernation, the power switch has been changed to a push type switch which changes a state by transmitting a signal only when operated from a slide type mechanical switch.
Therefore, the PC always monitors the state of the power switch even when the power is off, and the PC must be able to automatically turn on / off the PC.
【０００３】従来のＰＣにおいては、プッシュスイッチ
の監視は電源制御用マイコンで制御されるものしかなか
った。In conventional PCs, the push switch is monitored only by a power control microcomputer.
【０００４】この電源制御用マイコンは、電力モードに
応じた給電制御やバッテリーの充電制御やＡＣアダプタ
／バッテリーの接続有無の監視やバッテリーの残量チェ
ックといった多機能を実現するために回路規模が大きく
なり、電源スイッチの状態監視だけを行うときでも消費
電流が数ｍＡ程度と大きいものであった。The microcomputer for power control has a large circuit scale to realize multi-functions such as power supply control according to a power mode, battery charge control, monitoring of the presence or absence of an AC adapter / battery connection, and remaining battery check. That is, even when only the state of the power switch is monitored, the current consumption is as large as about several mA.
【０００５】次に、図４を用いて従来の電源スイッチの
監視方法を説明する。図４は従来の電源制御システムの
ブロック図であり、４１はＰＣへ電力を供給するための
バッテリー、４２はＰＣの電源をオン／オフするための
電源スイッチ、４３はＤＣ／ＤＣコンバータ、４４はＤ
Ｃ／ＤＣコンバータ４３からＣＰＵ４５への電力供給を
制御する電気的スイッチのＦＥＴ、４５はＣＰＵ、４６
は電源制御用マイコンである。電源制御用マイコン４６
はＤＣ／ＤＣコンバータ４３からの電源供給を受けて常
に電源スイッチ４２を監視し、電源スイッチ４２がオン
されたことを検出すると、ＦＥＴ４４を制御してＣＰＵ
４５へ電源供給を行う。Next, a conventional power switch monitoring method will be described with reference to FIG. FIG. 4 is a block diagram of a conventional power supply control system. 41 is a battery for supplying power to the PC, 42 is a power switch for turning on / off the power of the PC, 43 is a DC / DC converter, and 44 is D
FET of an electrical switch for controlling the power supply from the C / DC converter 43 to the CPU 45;
Denotes a power control microcomputer. Power control microcomputer 46
Receives the power supply from the DC / DC converter 43, constantly monitors the power switch 42, and when it detects that the power switch 42 is turned on, controls the FET 44 to
45 is supplied.
【０００６】[0006]
【発明が解決しようとする課題】しかし、従来の方式で
は電源スイッチの監視を電源制御用マイコンに持たせて
いたために、電力消費が大きく、ＡＣアダプタを外した
状態だとＰＣがオフであっても放置しておくと1 週間で
バッテリー残量が０％になるという問題があった。However, in the conventional system, since the power supply control microcomputer is provided with monitoring of the power switch, the power consumption is large, and the PC is off when the AC adapter is removed. There was a problem that if left unchecked, the battery level would be reduced to 0% in one week.
【０００７】本発明はＰＣがオフ時のバッテリーの消費
電力を抑えることを目的とする。An object of the present invention is to reduce the power consumption of a battery when a PC is off.
【０００８】[0008]
【課題を解決するための手段】本発明は上記課題を解決
するために、電源スイッチを監視する電源スイッチ監視
回路を電力消費が小さな論理回路で構成する。According to the present invention, in order to solve the above-mentioned problems, a power switch monitoring circuit for monitoring a power switch is constituted by a logic circuit with low power consumption.
【０００９】[0009]
【発明の実施の形態】以下に、図１から図３を用いて本
発明の一実施例について説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS.
【００１０】図１は本発明の一実施例である電源制御シ
ステムのブロック図であり、１はＰＣへ電力を供給する
ためのバッテリー、２はＰＣの電源をオン／オフする電
源スイッチ、３は電源スイッチ監視回路、４はＤＣ／Ｄ
Ｃコンバータ、５はＤＣ／ＤＣコンバータ４からＣＰＵ
６への電力供給を制御する電気的スイッチのＦＥＴ、６
はＣＰＵ、７は電源制御用マイコン、８は電源制御用マ
イコン７と電源スイッチ監視回路３との間の制御信号を
やり取りする通信線である。FIG. 1 is a block diagram of a power supply control system according to an embodiment of the present invention, wherein 1 is a battery for supplying power to a PC, 2 is a power switch for turning on / off the power of the PC, and 3 is a power switch. Power switch monitoring circuit, 4 is DC / D
C converter, 5 is DC / DC converter 4 to CPU
FET of an electrical switch for controlling power supply to 6, 6
Denotes a CPU, 7 denotes a power control microcomputer, and 8 denotes a communication line for exchanging control signals between the power control microcomputer 7 and the power switch monitoring circuit 3.
【００１１】電源スイッチ監視回路３は、消費電流が数
μＡ程度で済むＣＭＯＳのＩＣで構成することができ
る。The power switch monitoring circuit 3 can be constituted by a CMOS IC that consumes only about several μA.
【００１２】図２は電源スイッチ監視回路３のブロック
図であり、２１はバッテリー１からＤＣ／ＤＣコンバー
タ４への電力供給を制御する電気的スイッチのＦＥＴ、
２２は逆流防止用のダイオード、２３はＦＥＴ２１を制
御する電力供給制御回路、２４は電源スイッチ２の押下
を検出する電源スイッチ押下検出回路、２５はＰＣの電
源のオン／オフ状態を保持する電源状態保持回路であ
る。FIG. 2 is a block diagram of the power switch monitoring circuit 3. Reference numeral 21 denotes an FET of an electric switch for controlling power supply from the battery 1 to the DC / DC converter 4.
Reference numeral 22 denotes a diode for preventing backflow; 23, a power supply control circuit for controlling the FET 21; 24, a power switch pressing detection circuit for detecting pressing of the power switch 2; 25, a power state for maintaining the on / off state of the PC power. It is a holding circuit.
【００１３】次に、図３を用いて電源スイッチ監視回路
３の動作を説明する。電力供給制御回路２３は電源スイ
ッチ押下検出回路２４の検出結果を元に電源スイッチ２
が押されたかどうかチェックし（Ｓ１）、スイッチが押
されれば電源状態保持回路２５に保持されているＰＣの
電源状態がオフ状態であるかをチェックし（Ｓ２）、オ
フ状態であれば電力供給制御回路２３がＦＥＴ２１を制
御してバッテリー１から電源制御用マイコン７に電力が
供給されるようにすると同時に電源状態保持回路２５に
ＰＣの電源状態としてオン状態を書き込み（Ｓ３）、電
源スイッチ監視回路３は通信線８を介して電源制御用マ
イコン７に電源スイッチ２が押されたことを知らせる
（Ｓ４）。オン状態であれば電力供給制御回路２３がＦ
ＥＴ２１を制御してバッテリー１から電源制御用マイコ
ン７への電力供給を遮断すると同時に電源状態保持回路
２５にＰＣの電源状態としてオフ状態を書き込む（Ｓ
５）。Next, the operation of the power switch monitoring circuit 3 will be described with reference to FIG. The power supply control circuit 23 detects the power switch 2 based on the detection result of the power switch press detection circuit 24.
Is checked (S1). If the switch is pressed, it is checked whether the power state of the PC held in the power state holding circuit 25 is off (S2). The power supply control circuit 23 controls the FET 21 so that power is supplied from the battery 1 to the power supply control microcomputer 7, and at the same time, writes the ON state as the power supply state of the PC in the power supply state holding circuit 25 (S3), and monitors the power supply switch. The circuit 3 informs the power control microcomputer 7 via the communication line 8 that the power switch 2 has been pressed (S4). In the ON state, the power supply control circuit 23
The ET 21 is controlled to cut off the power supply from the battery 1 to the power control microcomputer 7 and at the same time, write the off state as the power state of the PC to the power state holding circuit 25 (S
5).
【００１４】[0014]
【発明の効果】以上に説明したように、本発明の電源ス
イッチ監視回路を用いれば電源オフ時の電源スイッチの
状態監視においてバッテリーの消費電力を大幅に抑える
ことができる。As described above, when the power switch monitoring circuit of the present invention is used, the power consumption of the battery can be greatly reduced in monitoring the state of the power switch when the power is off.
【図１】本発明の一実施例である電源制御システムのブ
ロック図FIG. 1 is a block diagram of a power supply control system according to an embodiment of the present invention.
【図２】本発明の一実施例における電源スイッチ監視回
路のブロック図FIG. 2 is a block diagram of a power switch monitoring circuit according to an embodiment of the present invention.
【図３】本発明の一実施例における電源スイッチ監視回
路の処理を示すフローチャートFIG. 3 is a flowchart illustrating processing of a power switch monitoring circuit according to an embodiment of the present invention.
【図４】従来の電源制御システムのブロック図FIG. 4 is a block diagram of a conventional power supply control system.
１ バッテリー ２ 電源スイッチ ３ 電源スイッチ監視回路 ４ ＤＣ／ＤＣコンバータ ５ ＦＥＴ ６ ＣＰＵ ７ 電源制御用マイコン ８ 電源スイッチ監視回路と電源制御用マイコンとの通
信線 ２２ 逆流防止用ダイオード ２３ 電力供給制御回路 ２４ 電源スイッチ押下検出回路 ２５ 電源状態保持回路DESCRIPTION OF SYMBOLS 1 Battery 2 Power switch 3 Power switch monitoring circuit 4 DC / DC converter 5 FET 6 CPU 7 Power control microcomputer 8 Communication line between power switch monitor circuit and power control microcomputer 22 Backflow prevention diode 23 Power supply control circuit 24 Power supply Switch press detection circuit 25 Power state hold circuit
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10104860AJPH11296265A (en) | 1998-04-15 | 1998-04-15 | Power switch monitoring circuit |
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10104860AJPH11296265A (en) | 1998-04-15 | 1998-04-15 | Power switch monitoring circuit |
| Publication Number | Publication Date |
|---|---|
| JPH11296265Atrue JPH11296265A (en) | 1999-10-29 |
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10104860APendingJPH11296265A (en) | 1998-04-15 | 1998-04-15 | Power switch monitoring circuit |
| Country | Link |
|---|---|
| JP (1) | JPH11296265A (en) |
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