【０００１】[0001]
【産業上の利用分野】本発明は、強誘電性を有する誘電
体薄膜を容量誘電体膜として用いた容量素子の製造方法
に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a capacitive element using a dielectric thin film having ferroelectricity as a capacitive dielectric film.
【０００２】[0002]
【従来の技術】近年、強誘電性を有する誘電体薄膜（以
下強誘電体薄膜という）を容量誘電体膜とする容量素子
について、単位面積あたりの容量の大きさや自発分極に
よる不揮発性を利用して高集積ＤＲＡＭ（Dynamic Rand
om Access Memory）や不揮発性ＲＡＭ（Random Access
Memory）への実用化を目指して活発な開発が行われてい
る。今後は、半導体デバイス上に限らず、回路基板上に
形成される用途も開発されてくることが考えられる。こ
の容量素子に使用される誘電体薄膜は一般に金属酸化物
からなる強誘電体で形成され、強誘電体は反応性に富む
酸素を多く含有している。このような強誘電体薄膜を用
いて容量素子を構成する場合、上電極および下電極とし
て酸化反応に対して安定なたとえば貴金属、貴金属電極
と基板との接着性を保持する接着層、接着層と貴金属膜
との反応を防止する拡散障壁層が不可欠である。2. Description of the Related Art In recent years, a capacitive element having a dielectric thin film having ferroelectricity (hereinafter referred to as a ferroelectric thin film) as a capacitive dielectric film has been used by utilizing the size of the capacitance per unit area and the non-volatility due to spontaneous polarization. Highly integrated DRAM (Dynamic Rand
om Access Memory) and non-volatile RAM (Random Access)
Memory) is being actively developed with the aim of commercialization. It is conceivable that not only semiconductor devices but also applications formed on circuit boards will be developed in the future. The dielectric thin film used in this capacitive element is generally formed of a ferroelectric material composed of a metal oxide, and the ferroelectric material contains a large amount of highly reactive oxygen. When a capacitive element is formed using such a ferroelectric thin film, an upper electrode and a lower electrode that are stable against oxidation reaction, for example, a noble metal, an adhesive layer that maintains the adhesiveness between the noble metal electrode and the substrate, and an adhesive layer are used. A diffusion barrier layer that prevents reaction with the noble metal film is essential.
【０００３】図４は強誘電体膜を容量誘電体膜とする容
量素子を内蔵した半導体集積回路の要部断面図である。
図４に示すように、シリコン基板１には素子分離用絶縁
膜２ａによって囲まれた領域に拡散領域３、ゲート絶縁
膜４ａ、ゲート電極４からなるトランジスタ５が形成さ
れている。トランジスタ５およびその他の回路素子の上
には層間絶縁膜２が形成されており、この層間絶縁膜２
の上に下電極９、強誘電体膜からなる容量誘電体膜１０
および上電極１１で構成される容量素子が形成されてい
る。一般に下電極９はチタン膜６、窒化チタン膜７およ
び白金膜８で構成される。以上のように形成された容量
素子を覆って保護膜１２が形成されており、保護膜１２
に設けられた開口１３を介して、拡散層３に達する電極
配線１４および容量素子の下電極９および上電極１１に
達する電極配線１５が形成されている。さらに図４には
示していないが、トランジスタや容量素子などの回路素
子を覆って、保護膜が形成される。FIG. 4 is a cross-sectional view of an essential part of a semiconductor integrated circuit having a built-in capacitive element having a ferroelectric film as a capacitive dielectric film.
As shown in FIG. 4, a transistor 5 including a diffusion region 3, a gate insulating film 4a, and a gate electrode 4 is formed on a silicon substrate 1 in a region surrounded by an element isolation insulating film 2a. An interlayer insulating film 2 is formed on the transistor 5 and other circuit elements.
A lower electrode 9 on top of which, and a capacitive dielectric film 10 composed of a ferroelectric film
A capacitive element including the upper electrode 11 is formed. Generally, the lower electrode 9 is composed of a titanium film 6, a titanium nitride film 7 and a platinum film 8. The protective film 12 is formed so as to cover the capacitive element formed as described above.
An electrode wiring 14 reaching the diffusion layer 3 and an electrode wiring 15 reaching the lower electrode 9 and the upper electrode 11 of the capacitive element are formed through the opening 13 provided in the. Although not shown in FIG. 4, a protective film is formed so as to cover circuit elements such as transistors and capacitors.
【０００４】次に従来の容量素子の製造方法について説
明する。図５は従来の容量素子の要部断面図である。従
来の容量素子は図５に示すように、まず絶縁基板２１の
上にチタン膜２２、窒化チタン膜２３、白金膜２４から
なる下電極２５が形成される。これらの膜の上に金属酸
化物からなる強誘電体膜２６がスパッタ蒸着等により形
成される。次に白金膜２７、チタン膜２８およびアルミ
ニウム膜２９からなる上電極３０が形成される。このよ
うな構成から必要部分のみを残して不要部をエッチング
除去することにより、上電極３０、容量絶縁膜としての
強誘電体膜２６、および下電極２５からなる容量素子が
形成される。上述の構成において、下電極２５を構成す
るチタン膜２２は絶縁基板２１との密着性向上、窒化チ
タン膜２３はチタン膜２２と白金膜２４との反応を防止
する拡散障壁層として働くものである。一般に、下電極
２５、上電極３０を構成する各々の膜はスパッタ蒸着に
より形成され、金属酸化物からなる強誘電体膜２６はス
パッタ蒸着またはゾル−ゲル法により形成される。Next, a conventional method of manufacturing a capacitive element will be described. FIG. 5 is a sectional view of a main part of a conventional capacitive element. As shown in FIG. 5, in the conventional capacitive element, a lower electrode 25 including a titanium film 22, a titanium nitride film 23, and a platinum film 24 is first formed on an insulating substrate 21. A ferroelectric film 26 made of metal oxide is formed on these films by sputtering deposition or the like. Next, the upper electrode 30 including the platinum film 27, the titanium film 28 and the aluminum film 29 is formed. By removing the unnecessary portion by etching while leaving only the necessary portion in such a structure, a capacitive element including the upper electrode 30, the ferroelectric film 26 as the capacitive insulating film, and the lower electrode 25 is formed. In the above structure, the titanium film 22 forming the lower electrode 25 serves to improve the adhesion to the insulating substrate 21, and the titanium nitride film 23 serves as a diffusion barrier layer for preventing the reaction between the titanium film 22 and the platinum film 24. . Generally, the films forming the lower electrode 25 and the upper electrode 30 are formed by sputter deposition, and the ferroelectric film 26 made of a metal oxide is formed by sputter deposition or the sol-gel method.
【０００５】[0005]
【発明が解決しようとする課題】上記の従来の構成にお
いて、下電極を構成するチタン膜、窒化チタン膜および
白金膜は通常それぞれチタン、窒化チタン、白金をター
ゲットとするスパッタ蒸着により形成されるが、チタン
膜を形成した後チャンバ内に窒素ガスを導入して反応性
スパッタリングにより窒化チタン膜を形成する方法がと
られている。この場合、チタン膜と窒化チタン膜、もし
くは窒化チタン膜と白金膜の密着性が問題になり、特に
金属酸化物からなる強誘電体膜を熱処理するときにクラ
ックや剥離などを生ずることがある。In the above conventional structure, the titanium film, the titanium nitride film and the platinum film forming the lower electrode are usually formed by sputter vapor deposition with titanium, titanium nitride and platinum as targets, respectively. After forming a titanium film, nitrogen gas is introduced into the chamber to form a titanium nitride film by reactive sputtering. In this case, the adhesion between the titanium film and the titanium nitride film or between the titanium nitride film and the platinum film becomes a problem, and cracks or peeling may occur especially when the ferroelectric film made of metal oxide is heat-treated.
【０００６】本発明は、上記の従来の課題を解決するも
のであり、基板との接着層として働く第１の金属膜と容
量素子の電極として働く貴金属膜との反応を防止するた
めの拡散障壁層を形成する方法を含む、容量素子の製造
方法を提供することを目的とする。The present invention solves the above-mentioned conventional problems, and a diffusion barrier for preventing the reaction between the first metal film acting as an adhesive layer with the substrate and the noble metal film acting as an electrode of the capacitive element. An object of the present invention is to provide a method for manufacturing a capacitive element, including a method for forming a layer.
【０００７】[0007]
【課題を解決するための手段】この目的を達成するため
に本発明の容量素子の製造方法は、基板との接着層とし
て働く第１の金属膜を形成する工程と、第１の金属膜と
反応して拡散障壁層を形成する元素を第１の金属膜の表
面にイオン注入する工程と、熱処理によってイオン注入
された元素と第１の金属膜とを反応させて拡散障壁層を
形成する工程とを有するものであり、また他の方法とし
て、第１の金属膜の上に貴金属膜を形成した後に第１の
金属膜と反応して拡散障壁層を形成する元素を第１の金
属膜と貴金属膜との界面にイオン注入する工程と、熱処
理によってイオン注入された元素と第１の金属膜とを反
応させて拡散障壁層を形成する工程とを有するものであ
り、さらには、第１の金属膜を希ガス中のスパッタ蒸着
により形成した後、窒素ガス、酸素ガス、もしくは窒素
と酸素との混合ガスを導入してスパッタ蒸着し拡散障壁
層を形成する工程を有するものである。In order to achieve this object, a method of manufacturing a capacitive element according to the present invention comprises a step of forming a first metal film serving as an adhesive layer with a substrate, and a step of forming the first metal film. A step of ion-implanting an element that reacts to form a diffusion barrier layer into the surface of the first metal film, and a step of reacting the ion-implanted element by heat treatment with the first metal film to form a diffusion barrier layer As another method, an element that forms a diffusion barrier layer by reacting with the first metal film after forming a noble metal film on the first metal film is used as another method. The method further includes a step of implanting ions into the interface with the noble metal film, and a step of reacting the ion-implanted element by heat treatment with the first metal film to form a diffusion barrier layer. After forming a metal film by sputter deposition in a rare gas Nitrogen gas is by introducing oxygen gas or a mixed gas of nitrogen and oxygen, and sputter deposition having a step of forming a diffusion barrier layer.
【０００８】[0008]
【作用】イオン注入された元素を第１の金属膜と反応さ
せて拡散障壁層を形成する方法では、厚さの制御が確実
で第１の金属膜と基板との接着性を損なうことなく拡散
障壁層を形成することができる。またスパッタ蒸着中に
窒素ガス、酸素ガスまたは窒素と酸素の混合ガスを導入
して拡散障壁層を形成する方法では、混合ガスの比率を
順次高めて行くことにより第１の金属膜側から傾斜をも
って組成が変わるため、強誘電体膜の熱処理時にクラッ
クや剥離を生じない拡散障壁層を形成することができ
る。In the method of forming the diffusion barrier layer by reacting the ion-implanted element with the first metal film, the thickness of the diffusion barrier layer is surely controlled, and the diffusion is performed without impairing the adhesiveness between the first metal film and the substrate. A barrier layer can be formed. Further, in the method of forming the diffusion barrier layer by introducing nitrogen gas, oxygen gas or a mixed gas of nitrogen and oxygen during the sputter deposition, the ratio of the mixed gas is gradually increased to form a gradient from the first metal film side. Since the composition changes, it is possible to form a diffusion barrier layer that does not cause cracking or peeling during heat treatment of the ferroelectric film.
【０００９】[0009]
【実施例】以下本発明の一実施例について、図面を参照
しながら説明する。An embodiment of the present invention will be described below with reference to the drawings.
【００１０】（実施例１）図１（ａ）〜（ｇ）は本発明
の第１の実施例における容量素子の製造方法の工程断面
図である。(Embodiment 1) FIGS. 1A to 1G are process sectional views of a method of manufacturing a capacitor according to a first embodiment of the present invention.
【００１１】まず図１（ａ）の工程で、絶縁基板３１の
上にチタン膜３２をスパッタ蒸着などにより形成する。
次に図１（ｂ）の工程で、チタン膜３２の表面に窒素イ
オン３３をイオン注入した後、不活性ガス雰囲気中で高
温で絶縁基板３１を熱処理し、イオン注入された層を最
終的に拡散障壁層となるチタン窒化膜３４に変換する。
このとき、イオン注入条件（加速電圧、注入量等）を適
切に設定することによって、チタン窒化膜３４の厚さを
制御することができる。次に図１（ｃ）の工程で、チタ
ン窒化膜３４の上に下電極となる白金膜３５を形成す
る。次に図１（ｄ）の工程で、白金膜３５の上に誘電体
材料をスパッタ蒸着またはゾル−ゲル法を用いて塗布し
て強誘電体膜３６を形成し、熱処理する。この誘電体材
料としては、たとえば（Ｐｂ1-xＬａx）（ＺｒyＴ
ｉ1-y）Ｏ3，（Ｓｒ1-xＢａx）ＴｉＯ3，Ｂｉ2ＳｒＴａ
2Ｏ9，Ｂｉ2ＳｒＮｂ2Ｏ9およびその固溶体に代表され
る金属酸化物からなる強誘電体材料を使用することがで
きる。次に図１（ｅ）の工程で、強誘電体膜３６の上に
上電極となる白金膜３７を形成する。次に図１（ｆ）の
工程で、白金膜３７と強誘電体膜３６とを所定の形状に
エッチングして、上電極３８および容量誘電体膜３９を
形成する。次に図１（ｇ）の工程で、白金膜３５、チタ
ン窒化膜３４とチタン膜３２とを所定の形状にエッチン
グして下電極４０、下地積層膜４１を形成する。次に全
体に保護膜４２を形成した後、保護膜４２の所定の領域
に開口４３を形成し、開口４３を通して下電極４０、上
電極３８に達する電極配線４４を形成する。なお、電極
配線としてアルミニウム膜を用いる場合には、白金とア
ルミニウムとの反応を防止するために、白金膜３７の上
にあらかじめチタン膜、窒化チタン膜またはチタン・タ
ングステン膜などを障壁層として形成しておくことが望
ましい。First, in the step shown in FIG. 1A, a titanium film 32 is formed on the insulating substrate 31 by sputtering deposition or the like.
Next, in the step of FIG. 1B, after nitrogen ions 33 are ion-implanted on the surface of the titanium film 32, the insulating substrate 31 is heat-treated at a high temperature in an inert gas atmosphere to finally form the ion-implanted layer. It is converted into the titanium nitride film 34 which becomes the diffusion barrier layer.
At this time, the thickness of the titanium nitride film 34 can be controlled by appropriately setting the ion implantation conditions (acceleration voltage, implantation amount, etc.). Next, in the process of FIG. 1C, a platinum film 35 to be a lower electrode is formed on the titanium nitride film 34. Next, in the step of FIG. 1D, a ferroelectric material is applied onto the platinum film 35 by sputter deposition or a sol-gel method to form a ferroelectric film 36 and heat treatment. Examples of this dielectric material include (Pb1-x Lax ) (Zry T
i1-y ) O3 , (Sr1-x Bax ) TiO3 , Bi2 SrTa
A ferroelectric material made of a metal oxide represented by2 O9 , Bi2 SrNb2 O9 and its solid solution can be used. Next, in the step of FIG. 1E, a platinum film 37 serving as an upper electrode is formed on the ferroelectric film 36. Next, in the step of FIG. 1F, the platinum film 37 and the ferroelectric film 36 are etched into a predetermined shape to form the upper electrode 38 and the capacitor dielectric film 39. Next, in the step of FIG. 1G, the platinum film 35, the titanium nitride film 34, and the titanium film 32 are etched into a predetermined shape to form a lower electrode 40 and a base laminated film 41. Next, after forming the protective film 42 on the entire surface, an opening 43 is formed in a predetermined region of the protective film 42, and an electrode wiring 44 reaching the lower electrode 40 and the upper electrode 38 through the opening 43 is formed. When an aluminum film is used as the electrode wiring, a titanium film, a titanium nitride film, a titanium / tungsten film, or the like is previously formed as a barrier layer on the platinum film 37 in order to prevent the reaction between platinum and aluminum. It is desirable to keep.
【００１２】なお、チタン膜３２の代わりにタンタル膜
を、白金膜３５，３７の代わりに他の貴金属膜をそれぞ
れ用いてもよい。また、窒素イオンの代わりに酸素イオ
ンと窒素イオンをイオン注入しても同様の効果が得られ
る。A tantalum film may be used instead of the titanium film 32, and another noble metal film may be used instead of the platinum films 35 and 37. Further, similar effects can be obtained by implanting oxygen ions and nitrogen ions instead of nitrogen ions.
【００１３】本実施例では、イオン注入と熱処理により
拡散障壁層を所定の厚さに精度よく形成することができ
るため、絶縁基板３１との間の接着層として働くチタン
膜の厚さを確保しながら、白金膜とチタン膜との反応を
防止する拡散障壁層を必要な厚さに形成することができ
る。さらには、マスクを用いてイオン注入することによ
り所定の領域にのみ拡散障壁層を形成できる。In this embodiment, since the diffusion barrier layer can be formed with a predetermined thickness with high precision by ion implantation and heat treatment, the thickness of the titanium film serving as an adhesive layer with the insulating substrate 31 can be secured. However, the diffusion barrier layer that prevents the reaction between the platinum film and the titanium film can be formed to a required thickness. Furthermore, a diffusion barrier layer can be formed only in a predetermined region by ion implantation using a mask.
【００１４】（実施例２）次に本発明の第２の実施例に
おける容量素子の製造方法について、図面を参照しなが
ら説明する。なお、本実施例は基本的には図１（ａ）〜
（ｇ）に示す工程と類似しており、異なる点についての
み説明する。(Embodiment 2) Next, a method of manufacturing a capacitor according to a second embodiment of the present invention will be described with reference to the drawings. It should be noted that this embodiment is basically shown in FIG.
It is similar to the step shown in (g), and only different points will be described.
【００１５】図２（ａ），（ｂ）は本発明の第２の実施
例における容量素子の製造方法で第１の実施例と異なる
工程を示す工程断面図である。第２の実施例が第１の実
施例と異なる点は、図１（ａ）〜（ｃ）の工程を図２
（ａ），（ｂ）で置き換えたことである。すなわち、本
実施例においては、まず図２（ａ）の工程で絶縁基板３
１の上にチタン膜３２と白金膜３５をスパッタ蒸着など
により形成する。次に図１（ｂ）の工程で、チタン膜３
２と白金膜３５の界面でチタン膜３２側に窒素イオン３
３をイオン注入した後、不活性ガス雰囲気中で熱処理
し、チタン窒化膜３４を形成する。以降の工程は図１
（ｄ）〜（ｇ）と同じである。2A and 2B are process sectional views showing steps different from those of the first embodiment in the method of manufacturing a capacitor according to the second embodiment of the present invention. The difference between the second embodiment and the first embodiment is that the steps of FIGS.
This is the replacement with (a) and (b). That is, in this embodiment, first, in the step of FIG.
A titanium film 32 and a platinum film 35 are formed on 1 by sputtering deposition or the like. Next, in the step of FIG. 1B, the titanium film 3
2 and platinum film 35 at the interface between titanium film 32 and nitrogen ion 3
After the ion implantation of 3 is performed, heat treatment is performed in an inert gas atmosphere to form a titanium nitride film 34. Subsequent steps are shown in FIG.
The same as (d) to (g).
【００１６】なお、チタン膜３２の代わりにタンタル膜
を、白金膜３５，３７の代わりに他の貴金属膜を用いて
もよい。また、窒素イオンの代わりに酸素イオンと窒素
イオンをイオン注入しても同様の効果が得られる。A tantalum film may be used instead of the titanium film 32, and another noble metal film may be used instead of the platinum films 35 and 37. Further, similar effects can be obtained by implanting oxygen ions and nitrogen ions instead of nitrogen ions.
【００１７】本実施例では、第１の実施例の効果に加え
て、チタン膜３２と白金膜３５とを連続してスパッタ蒸
着することによりチタン膜の表面が清浄に保持される効
果がある。In addition to the effects of the first embodiment, the present embodiment has the effect of keeping the surface of the titanium film clean by continuously sputter depositing the titanium film 32 and the platinum film 35.
【００１８】（実施例３）次に本発明の第３の実施例に
おける容量素子の製造方法について、図面を参照しなが
ら説明する。なお、本実施例は基本的には図１（ａ）〜
（ｇ）に示す工程と類似しており、異なる点についての
み説明する。(Embodiment 3) Next, a method of manufacturing a capacitor according to a third embodiment of the present invention will be described with reference to the drawings. It should be noted that this embodiment is basically shown in FIG.
It is similar to the step shown in (g), and only different points will be described.
【００１９】図３（ａ），（ｂ）は本発明の第３の実施
例における容量素子の製造方法で第１の実施例と異なる
工程を示す工程断面図である。第３の実施例が第１の実
施例と異なる点は、図１（ａ）〜（ｃ）で示すイオン注
入を用いた方法を図３（ａ），（ｂ）で示すスパッタ蒸
着を用いた方法に置き換えたことである。すなわち、本
実施例においては、まず図３（ａ）の工程で絶縁基板３
１の上に希ガス中のスパッタ蒸着によりチタン膜３２を
形成する、次に連続して希ガス中に窒素ガスを混入しス
パッタ蒸着することによりチタン窒化膜３４を形成す
る。次に図３（ｂ）の工程でチタン窒化膜３４の上に貴
金属膜３５を形成する。以降の工程は、図１（ｄ）〜
（ｇ）と同じである。3 (a) and 3 (b) are process sectional views showing steps different from those of the first embodiment in the method of manufacturing a capacitive element according to the third embodiment of the present invention. The third embodiment differs from the first embodiment in that the method using ion implantation shown in FIGS. 1A to 1C uses the sputter deposition shown in FIGS. 3A and 3B. It was replaced by the method. That is, in this embodiment, first, in the step of FIG.
A titanium film 32 is formed on 1 by sputter deposition in a rare gas, and then a titanium nitride film 34 is formed by continuously sputter depositing nitrogen gas in a rare gas. Next, a noble metal film 35 is formed on the titanium nitride film 34 in the step of FIG. The subsequent steps are shown in FIG.
Same as (g).
【００２０】なお、チタン膜３２の代わりにタンタル膜
を、白金膜３５，３７の代わりに他の貴金属膜を用いて
もよい。また、窒素ガスの代わりに酸素ガスと窒素ガス
を用いても同様の効果が得られる。Note that a tantalum film may be used instead of the titanium film 32, and another noble metal film may be used instead of the platinum films 35 and 37. The same effect can be obtained by using oxygen gas and nitrogen gas instead of nitrogen gas.
【００２１】本実施例では、チタン膜３２を所定の膜厚
に形成した後希ガス中に窒素ガスを混入してチタン窒化
膜３４を形成しているため層間の密着性が高く、さらに
スパッタ蒸着を継続しながら窒素ガスの比率を増やして
いくことにより傾斜的に組成を変えることができるため
熱膨張に関して安定した下地積層膜を形成することがで
きる。In this embodiment, since the titanium film 32 is formed to a predetermined thickness and then the nitrogen gas is mixed into the rare gas to form the titanium nitride film 34, the adhesion between the layers is high and the sputter deposition is performed. By continuously increasing the ratio of nitrogen gas while changing the composition, the composition can be changed in an inclined manner, so that a base laminated film that is stable with respect to thermal expansion can be formed.
【００２２】[0022]
【発明の効果】本発明は、絶縁性の基板上に金属膜を形
成し、その金属膜と反応して拡散障壁層を形成する元素
を金属膜表面にイオン注入し、熱処理することによって
拡散障壁層を形成した後、下電極となる貴金属膜を形成
する工程を有し、容量素子の下電極と基板との接着性を
損なうことなく接着層としての金属膜と下電極との反応
を防止できる優れた容量素子の製造方法を実現すること
ができる。According to the present invention, a metal film is formed on an insulating substrate, and an element that reacts with the metal film to form a diffusion barrier layer is ion-implanted into the surface of the metal film and heat-treated to form a diffusion barrier. After forming the layer, there is a step of forming a noble metal film to be the lower electrode, and it is possible to prevent the reaction between the metal film as the adhesive layer and the lower electrode without impairing the adhesiveness between the lower electrode of the capacitive element and the substrate. It is possible to realize an excellent method for manufacturing a capacitive element.
【００２３】また上述の構成以外に、絶縁性の基板上に
金属膜と貴金属膜とを連続してスパッタ蒸着により形成
した後、金属膜と貴金属膜との界面に金属膜と反応して
拡散障壁層を形成する元素をイオン注入し、熱処理して
拡散障壁層を形成してもよく、また絶縁性の基板上に希
ガス中のスパッタ蒸着により金属膜を形成し、引き続き
窒素ガスもしくは酸素ガスと窒素ガスとの混合ガスを含
有する希ガス中のスパッタ蒸着により拡散障壁層を形成
してもよい。In addition to the above structure, after a metal film and a noble metal film are continuously formed on an insulating substrate by sputter deposition, the metal film reacts with the metal film at the interface between the noble metal film and the diffusion barrier. The diffusion barrier layer may be formed by ion-implanting a layer-forming element and heat-treating it, or by forming a metal film on an insulating substrate by sputter deposition in a rare gas, and then using nitrogen gas or oxygen gas. The diffusion barrier layer may be formed by sputter deposition in a rare gas containing a mixed gas with nitrogen gas.
【図１】（ａ）〜（ｇ）は本発明の第１の実施例におけ
る容量素子の製造方法の工程断面図1A to 1G are process cross-sectional views of a method of manufacturing a capacitive element according to a first embodiment of the present invention.
【図２】（ａ），（ｂ）は本発明の第２の実施例におけ
る容量素子の製造方法で第１の実施例と異なる工程を示
す工程断面図2A and 2B are process cross-sectional views showing a process different from that of the first embodiment in a method of manufacturing a capacitive element according to a second embodiment of the present invention.
【図３】（ａ），（ｂ）は本発明の第３の実施例におけ
る容量素子の製造方法で第１の実施例と異なる工程を示
す工程断面図3A and 3B are process cross-sectional views showing a process different from that of the first embodiment in a method of manufacturing a capacitive element according to a third embodiment of the present invention.
【図４】強誘電体膜を容量絶縁膜とする容量素子を内蔵
した一般的な半導体集積回路の要部断面図FIG. 4 is a cross-sectional view of a main part of a general semiconductor integrated circuit that incorporates a capacitive element having a ferroelectric film as a capacitive insulating film
【図５】従来の容量素子の製造方法を説明するための断
面図FIG. 5 is a cross-sectional view for explaining a conventional method of manufacturing a capacitive element.
３１ 絶縁基板 ３２ チタン膜（第１の金属膜） ３３ 窒素イオン（イオン） ３４ チタン窒化膜（拡散障壁層） ３５ 白金膜（貴金属膜） ３６ 強誘電体膜 ３７ 白金膜（第２の金属膜） ３８ 上電極 ３９ 容量絶縁膜 ４０ 下電極 ４１ 下地積層膜 31 Insulating Substrate 32 Titanium Film (First Metal Film) 33 Nitrogen Ion (Ion) 34 Titanium Nitride Film (Diffusion Barrier Layer) 35 Platinum Film (Noble Metal Film) 36 Ferroelectric Film 37 Platinum Film (Second Metal Film) 38 Upper electrode 39 Capacitive insulating film 40 Lower electrode 41 Underlayer laminated film
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 ＦＩ 技術表示箇所 Ｈ０１Ｌ 27/10 ４５１ (72)発明者 井上 敦雄 大阪府高槻市幸町１番１号 松下電子工業 株式会社内 (72)発明者 井筒 康文 大阪府高槻市幸町１番１号 松下電子工業 株式会社内─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl.6 Identification code Internal reference number FI Technical display location H01L 27/10 451 (72) Inventor Atsushi Inoue 1-1 Yukocho, Takatsuki-shi, Osaka Matsushita Electronics Industrial Co., Ltd. Incorporated (72) Inventor Yasufumi Izutsu 1-1 Sachimachi Takatsuki, Osaka Prefecture Matsushita Electronics Industrial Co., Ltd.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7194578AJPH0945877A (en) | 1995-07-31 | 1995-07-31 | Manufacture of capacitor element |
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|---|---|
| JPH0945877Atrue JPH0945877A (en) | 1997-02-14 |
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7194578APendingJPH0945877A (en) | 1994-12-28 | 1995-07-31 | Manufacture of capacitor element |
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