【０００１】[0001]
【産業上の利用分野】本発明は半導体装置、特に狭ピッ
チ、多端子の半導体装置の製造方法に関するものであ
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a method for manufacturing a semiconductor device having a narrow pitch and multiple terminals.
【０００２】[0002]
【従来の技術】多端子、狭ピッチ化が進む半導体素子の
電極を絶縁性基板の導体配線に一括接合する実装方法と
してマイクロバンプボンディング実装技術がある。この
実装方法の１実施例を図４に示した。まず図４ａに示し
た様に半導体素子２の電極１を有する側に熱硬化性の絶
縁性樹脂３をディスペンサー等で塗布する。ついで図４
ｂに示した様に絶縁性基板４の導体配線５を有する面が
半導体素子２の電極１と向かい合う様にして絶縁性基板
４を熱硬化性の絶縁性樹脂３の上から半導体素子２に載
せ、絶縁性基板４の配線電極５と半導体素子２の電極１
とを位置合わせする。次に図４ｃに示した様に、加圧治
具６を用いて半導体素子２と絶縁性基板４を加圧し、半
導体素子２の電極１と絶縁性基板４の配線電極５とを圧
接する。この状態のまま加熱し、熱硬化性の絶縁性樹脂
を硬化させる。硬化終了後は加圧を取り去る。この際、
半導体素子２の電極１は絶縁性基板１の配線電極５に、
熱硬化性の絶縁性樹脂３の硬化によって生じる収縮応力
により圧接されており、加圧を取り去っても、両者の電
気的接続は保たれる。2. Description of the Related Art There is a micro bump bonding mounting technique as a mounting method for collectively bonding electrodes of a semiconductor element having a large number of terminals and a narrower pitch to conductor wiring of an insulating substrate. An example of this mounting method is shown in FIG. First, as shown in FIG. 4A, the thermosetting insulating resin 3 is applied to the side of the semiconductor element 2 having the electrode 1 by a dispenser or the like. Then, Fig. 4
As shown in b, the insulating substrate 4 is placed on the semiconductor element 2 from above the thermosetting insulating resin 3 so that the surface of the insulating substrate 4 having the conductor wiring 5 faces the electrode 1 of the semiconductor element 2. , The wiring electrode 5 of the insulating substrate 4 and the electrode 1 of the semiconductor element 2
Align and. Next, as shown in FIG. 4c, the semiconductor element 2 and the insulating substrate 4 are pressed by using the pressure jig 6, and the electrode 1 of the semiconductor element 2 and the wiring electrode 5 of the insulating substrate 4 are pressed against each other. In this state, heating is performed to cure the thermosetting insulating resin. After the curing is completed, the pressure is removed. On this occasion,
The electrode 1 of the semiconductor element 2 is connected to the wiring electrode 5 of the insulating substrate 1,
The thermosetting insulating resin 3 is pressure-contacted by the contracting stress generated by the curing, and the electrical connection between the two is maintained even if the pressure is removed.
【０００３】図５に半導体素子１２に突起電極１１を形
成させる方法を示した。まず図４ａに示す様に半導体ウ
ェハー１４に光硬化性の絶縁性樹脂１６をスピンナー等
を使って均一に塗布する。ついでフォトリソ技術を用い
て、図４ｂに示す様に突起電極１１を形成させる部分
（開孔部絶縁性樹脂１５）以外の絶縁性樹脂（レジスト
部絶縁性樹脂１３）のみにＵＶ線を照射して、レジスト
部絶縁性樹脂１３を硬化させる。FIG. 5 shows a method of forming the protruding electrode 11 on the semiconductor element 12. First, as shown in FIG. 4A, the photocurable insulating resin 16 is uniformly applied to the semiconductor wafer 14 using a spinner or the like. Then, by using the photolithography technique, only the insulating resin (resist part insulating resin 13) other than the part (opening part insulating resin 15) where the protruding electrode 11 is formed is irradiated with UV rays as shown in FIG. 4b. The resist portion insulating resin 13 is cured.
【０００４】次に、図５ｃに示す様に開孔部絶縁性樹脂
１５のみを溶剤を用いて溶出させ、開孔部１７を形成さ
せる。ついで半導体ウェハー１４ごと絶縁性樹脂１３の
ベーキングを行った後、これをレジスト皮膜として用い
て電気メッキ法等により図５ｄに示した様な突起電極１
１を形成させる。突起電極を形成させた後は、図５ｅに
示した様に溶剤を用いて、残りの未硬化の絶縁性樹脂１
６を完全に取り除く。最後に半導体ウェハー１４のダイ
シングを行い、半導体ウェハーを図５ｆに示した様な半
導体素子１２に分割する。Next, as shown in FIG. 5c, only the opening insulating resin 15 is eluted with a solvent to form the opening 17. Then, the insulating resin 13 is baked together with the semiconductor wafer 14 and then used as a resist film by the electroplating method or the like to form the protruding electrode 1 as shown in FIG.
1 is formed. After forming the protruding electrodes, the remaining uncured insulating resin 1 is removed by using a solvent as shown in FIG. 5e.
Remove 6 completely. Finally, the semiconductor wafer 14 is diced to divide the semiconductor wafer into the semiconductor elements 12 as shown in FIG. 5f.
【０００５】[0005]
【発明が解決しようとする課題】マイクロバンプボンデ
ィング実装技術では以上に示した様なプロセスを経て半
導体装置を製造する訳であるが、この方式では、半導体
素子に突起電極を設ける為に形成させたレジスト皮膜を
取り除き、ウェハーのダイシングを行ってから、あらた
めて半導体素子に光硬化性の絶縁性の樹脂を塗布する必
要があり、工程が多く、コスト高につながる。According to the micro bump bonding mounting technique, a semiconductor device is manufactured through the above-described processes. In this method, the semiconductor device is formed to have a bump electrode. After removing the resist film and dicing the wafer, it is necessary to apply the photocurable insulating resin again to the semiconductor element, which requires many steps and leads to high cost.
【０００６】[0006]
【課題を解決するための手段】本発明は上記問題点を解
決するために、レジスト皮膜を形成する光硬化性の絶縁
性樹脂に硬化物が熱可塑性の性質を有するものを用い、
突起電極形成後もレジスト皮膜を除去せず、そのままダ
イシングし、半導体素子と絶縁性基板の接着の際に、半
導体素子上に残っているレジスト皮膜を熱により溶融さ
せ、そのまま接着剤として用いることとした。In order to solve the above problems, the present invention uses a photocurable insulating resin for forming a resist film, in which a cured product has a thermoplastic property,
Even after forming the protruding electrodes, the resist film is not removed, and dicing is performed as it is. When the semiconductor element and the insulating substrate are bonded, the resist film remaining on the semiconductor element is melted by heat and used as an adhesive as it is. did.
【０００７】[0007]
【作用】上記工法で突起電極を形成させ、かつ半導体素
子を配線電極を有する絶縁性基板に実装することによ
り、レジスト皮膜を半導体素子から除去する工程及び半
導体素子を基板上に接着する為の樹脂を半導体素子上に
塗布する工程をマイクロバンプボンディングの工程から
取り除くことができる。A step of removing the resist film from the semiconductor element by forming the protruding electrode by the above method and mounting the semiconductor element on the insulating substrate having the wiring electrode, and a resin for adhering the semiconductor element onto the substrate. It is possible to remove the step of coating the semiconductor element on the semiconductor element from the step of micro bump bonding.
【０００８】[0008]
【実施例】本発明の実施例を図１及び図２を用いて説明
する。まず図１を用いて突起電極形成プロセスを説明す
る。初めに図１ａに示す様に半導体ウェハー２４の電極
を有する側の面に光硬化性でしかも硬化物が熱可塑性で
ある様な絶縁性樹脂２６をスピンナー等で塗布する。つ
いで図１ｂに示す様に、ガラスマスクを用いて突起電極
２１を形成させる部分（開孔部絶縁性樹脂２５）以外の
絶縁性樹脂（レジスト部絶縁性樹脂２３）のみにＵＶ線
を照射して、レジスト部絶縁性樹脂２３のみを硬化させ
る。ＵＶ線の照射を受けず、未硬化のままである開孔部
絶縁性樹脂２５は有機溶剤等により溶出させ、図１ｃに
示す様に突起電極２１を形成させる部分のみに開孔部２
７を開ける。こうして形成させたレジスト皮膜を用いて
電気メッキ法により開孔部２７を開けた場所に突起電極
２１を形成させる。Embodiments of the present invention will be described with reference to FIGS. First, the process of forming the protruding electrodes will be described with reference to FIG. First, as shown in FIG. 1a, an insulating resin 26 having a photo-curing property and a hardened material being thermoplastic is applied to the surface of the semiconductor wafer 24 having electrodes by a spinner or the like. Then, as shown in FIG. 1b, UV rays are applied only to the insulating resin (resist insulating resin 23) other than the portion (opening insulating resin 25) where the protruding electrode 21 is formed using a glass mask. Only the resist portion insulating resin 23 is cured. The opening portion insulating resin 25 that has not been irradiated with UV rays and remains uncured is eluted with an organic solvent or the like, and the opening portion 2 is formed only in the portion where the protruding electrode 21 is formed as shown in FIG. 1c.
Open 7 Using the resist film thus formed, the protruding electrode 21 is formed at the place where the opening 27 is formed by electroplating.
【０００９】ただし、本発明による実装法ではメッキ後
にバリアメタルのエッチング処理ができない。そこで図
３に示す様に電気メッキ法により突起電極２１を形成さ
せる電極部４０へ電気を流すために必要な配線部４１以
外のバリアメタルはあらかじめエッチングにより除去し
ておく必要がある。配線部４１はウェハー２４のダイシ
ングライン４２に沿わせておき、その幅をダイシングの
際のカッティング幅より細くしておく。また、この際、
形成させる突起電極２１はレジスト皮膜の厚さより低く
しておく必要がある。最後に図１ｅに示す様にレジスト
皮膜を表面に有したままで半導体ウェハー２４のダイシ
ングを行い、半導体素子をチップ状に分割する。この
際、配線部４１はダイシングの際に削り取られ、それぞ
れの突起電極２１は電気的に分離される。こうして突起
電極２１と、熱可塑性の絶縁性樹脂を表面に有する半導
体素子が用意される。次に図２を用いてその実装プロセ
スについて説明する。However, in the mounting method according to the present invention, the barrier metal cannot be etched after plating. Therefore, as shown in FIG. 3, it is necessary to remove the barrier metal other than the wiring portion 41 necessary for supplying electricity to the electrode portion 40 on which the protruding electrode 21 is formed by electroplating in advance by etching. The wiring portion 41 is arranged along the dicing line 42 of the wafer 24, and its width is made narrower than the cutting width at the time of dicing. Also, at this time,
The protruding electrode 21 to be formed needs to be lower than the thickness of the resist film. Finally, as shown in FIG. 1e, the semiconductor wafer 24 is diced with the resist film on the surface to divide the semiconductor element into chips. At this time, the wiring portion 41 is scraped off at the time of dicing, and the respective protruding electrodes 21 are electrically separated. Thus, the semiconductor element having the protruding electrode 21 and the thermoplastic insulating resin on the surface is prepared. Next, the mounting process will be described with reference to FIG.
【００１０】まず図２ａに示した半導体素子３２の突起
電極３１を有する側の面に図２ｂに示した様に配線電極
３５を有する絶縁性基板３４を配線電極３５が突起電極
３１と向かい合う様にして載せ、配線電極３５と突起電
極３１の位置合わせを行う。この状態のまま、図２ｃに
示す様に加熱し絶縁性樹脂３３を溶融させながら加圧治
具３６を用いて半導体素子３２を絶縁性基板３４に加圧
し、配線電極３５と突起電極３１を圧接する。ついで系
全体を冷却し、絶縁性樹脂３３が再硬化したら図２ｄに
示す様に加圧を取り去る。この際、半導体素子３２の突
起電極３１と絶縁性基板３２の配線電極３５とは、絶縁
性樹脂３３の再硬化の際に発生する収縮応力により圧接
され、電気的接続を保つ。本実施例では電気メッキ法に
より突起電極を形成させたが、突起電極を無電解メッキ
法により形成させてもよい。First, an insulating substrate 34 having wiring electrodes 35 as shown in FIG. 2B is provided on the surface of the semiconductor element 32 shown in FIG. 2A having the protruding electrodes 31 so that the wiring electrodes 35 face the protruding electrodes 31. Then, the wiring electrode 35 and the protruding electrode 31 are aligned with each other. In this state, as shown in FIG. 2C, the semiconductor element 32 is pressed against the insulating substrate 34 by using the pressing jig 36 while melting the insulating resin 33 and the wiring electrode 35 and the protruding electrode 31 are pressure-welded. To do. Then, the whole system is cooled, and when the insulating resin 33 is hardened again, the pressure is removed as shown in FIG. 2d. At this time, the protruding electrode 31 of the semiconductor element 32 and the wiring electrode 35 of the insulating substrate 32 are pressed against each other due to the contraction stress generated when the insulating resin 33 is re-cured, and the electrical connection is maintained. Although the protruding electrode is formed by the electroplating method in this embodiment, the protruding electrode may be formed by the electroless plating method.
【００１１】また、本実施例では半導体素子側に絶縁性
樹脂及び突起電極を形成する方法について述べたが、絶
縁性樹脂及び突起電極を絶縁性基板側に行った後に半導
体素子を接続しても同様の効果が得られることは言うま
でもない。In this embodiment, the method of forming the insulating resin and the protruding electrode on the side of the semiconductor element has been described, but the semiconductor element may be connected after the insulating resin and the protruding electrode are formed on the side of the insulating substrate. It goes without saying that the same effect can be obtained.
【００１２】[0012]
【発明の効果】以上のように本発明によれば、次のよう
な効果を得ることができる。As described above, according to the present invention, the following effects can be obtained.
【００１３】（１）マイクロバンプボンディング実装技
術の実装プロセスにおいて、レジスト皮膜を除去する工
程と、半導体素子に接着用の熱硬化性の絶縁性樹脂を塗
布する工程とを除去することが可能となり、低コスト化
を実現できる。(1) In the mounting process of the micro bump bonding mounting technique, it becomes possible to remove the step of removing the resist film and the step of applying the thermosetting insulating resin for adhesion to the semiconductor element. Cost reduction can be realized.
【００１４】（２）また、絶縁性樹脂の量が均一になる
為、品質がよく、信頼性が高い。(2) Further, since the amount of the insulating resin is uniform, the quality is high and the reliability is high.
【図１】本発明の実施例における突起電極形成工程を示
す断面図FIG. 1 is a sectional view showing a step of forming a protruding electrode according to an embodiment of the present invention.
【図２】本発明の実施例における実装工程を示す断面図FIG. 2 is a sectional view showing a mounting process according to an embodiment of the present invention.
【図３】本発明の実施例に用いる半導体素子の平面図FIG. 3 is a plan view of a semiconductor device used in an embodiment of the present invention.
【図４】従来のマイクロバンプボンディング実装工程の
断面図FIG. 4 is a sectional view of a conventional micro bump bonding mounting process.
【図５】従来の突起電極形成工程を示す断面図FIG. 5 is a cross-sectional view showing a conventional step of forming protruding electrodes.
２３ レジスト部絶縁性樹脂（硬化物） ２４ 半導体ウェハー ２５ 開孔部絶縁性樹脂（未硬化物） ２６ 絶縁性樹脂 ２７ 開孔部 ２１、３１ 突起電極 ３２ 半導体素子 ３３ ＵＶ硬化型熱可塑性絶縁性樹脂 ３４ 絶縁性基板 ３５ 配線電極 ３６ 加圧治具 ４０ 電極 ４１ 配線 ４２ ダイシングライン 23 Resist Part Insulating Resin (Cured Product) 24 Semiconductor Wafer 25 Opening Part Insulating Resin (Unhardened Product) 26 Insulating Resin 27 Opening Part 21, 31 Projection Electrode 32 Semiconductor Element 33 UV Curing Thermoplastic Insulating Resin 34 Insulating substrate 35 Wiring electrode 36 Pressure jig 40 Electrode 41 Wiring 42 Dicing line
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7052547AJP2532825B2 (en) | 1995-03-13 | 1995-03-13 | Method for manufacturing semiconductor device |
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7052547AJP2532825B2 (en) | 1995-03-13 | 1995-03-13 | Method for manufacturing semiconductor device |
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62332018ADivisionJPH0793343B2 (en) | 1987-12-28 | 1987-12-28 | Method for manufacturing semiconductor device |
| Publication Number | Publication Date |
|---|---|
| JPH0864639Atrue JPH0864639A (en) | 1996-03-08 |
| JP2532825B2 JP2532825B2 (en) | 1996-09-11 |
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7052547AExpired - Fee RelatedJP2532825B2 (en) | 1995-03-13 | 1995-03-13 | Method for manufacturing semiconductor device |
| Country | Link |
|---|---|
| JP (1) | JP2532825B2 (en) |
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1022774A2 (en) | 1999-01-21 | 2000-07-26 | Lucent Technologies Inc. | Flip chip assembly of semiconductor IC chips |
| US6670264B2 (en) | 2001-10-29 | 2003-12-30 | Fujitsu Limited | Method of making electrode-to-electrode bond structure and electrode-to-electrode bond structure made thereby |
| WO2004070826A1 (en)* | 2003-02-06 | 2004-08-19 | Fujitsu Limited | Method of forming electrode connection structure and electrode connection structure |
| US9299606B2 (en) | 2013-11-29 | 2016-03-29 | International Business Machines Corporation | Fabricating pillar solder bump |
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1022774A2 (en) | 1999-01-21 | 2000-07-26 | Lucent Technologies Inc. | Flip chip assembly of semiconductor IC chips |
| US6670264B2 (en) | 2001-10-29 | 2003-12-30 | Fujitsu Limited | Method of making electrode-to-electrode bond structure and electrode-to-electrode bond structure made thereby |
| US6873056B2 (en) | 2001-10-29 | 2005-03-29 | Fujitsu Limited | Electrode-to-electrode bond structure |
| EP1306897A3 (en)* | 2001-10-29 | 2005-05-11 | Fujitsu Limited | Method of making electrode-to-electrode bond structure and electrode-to-electrode bond structure made thereby |
| WO2004070826A1 (en)* | 2003-02-06 | 2004-08-19 | Fujitsu Limited | Method of forming electrode connection structure and electrode connection structure |
| US9299606B2 (en) | 2013-11-29 | 2016-03-29 | International Business Machines Corporation | Fabricating pillar solder bump |
| US9508594B2 (en) | 2013-11-29 | 2016-11-29 | International Business Machines Corporation | Fabricating pillar solder bump |
| Publication number | Publication date |
|---|---|
| JP2532825B2 (en) | 1996-09-11 |
| Publication | Publication Date | Title |
|---|---|---|
| US5875545A (en) | Method of mounting a connection component on a semiconductor chip with adhesives | |
| KR20000048152A (en) | Semiconductor device and process for producing same | |
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| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |