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JPH0774131A - Dicing device and semiconductor chip processing method - Google Patents

Dicing device and semiconductor chip processing method

Info

Publication number
JPH0774131A
JPH0774131AJP5218333AJP21833393AJPH0774131AJP H0774131 AJPH0774131 AJP H0774131AJP 5218333 AJP5218333 AJP 5218333AJP 21833393 AJP21833393 AJP 21833393AJP H0774131 AJPH0774131 AJP H0774131A
Authority
JP
Japan
Prior art keywords
wafer
dicing
back surface
thickness
sheet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5218333A
Other languages
Japanese (ja)
Inventor
Hiroyuki Sakai
啓之 酒井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co LtdfiledCriticalMatsushita Electric Industrial Co Ltd
Priority to JP5218333ApriorityCriticalpatent/JPH0774131A/en
Publication of JPH0774131ApublicationCriticalpatent/JPH0774131A/en
Pendinglegal-statusCriticalCurrent

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Abstract

PURPOSE:To provide a chip processing method by which a semiconductor chip whose thickness is small can be obtained from a wafer without breaking the wafer even if its thickness is small. CONSTITUTION:A wafer 3 is bonded to a dicing sheet 4 so as to have the wafer 3 front facedown. The thickness of the wafer 3 is reduced in that state and dicing is performed from the rear 31 of the wafer 3 while scribelines on the wafer surface are monitored. With this constitution, it is not necessary to remove the wafer 3 from the dicing sheet 4 after the thickness of the wafer 3 is reduced and, even if the wafer is thin, a semiconductor chip having a small thickness can be obtained without breaking the wafer 3. Further, the number of processes can be reduced.

Description

Translated fromJapanese
【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はパワー用トランジスタ
等、チップ厚を薄くする必要のある半導体チップの加工
方法及びチップを加工する装置に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for processing a semiconductor chip, such as a power transistor, which requires a thin chip, and an apparatus for processing the chip.

【0002】[0002]

【従来の技術】半導体デバイス/ICは通常SiやGa
Asなどの半導体ウエハ上に多数形成され、スクライブ
やダイシング等のチップ加工プロセスにより単体チップ
に分割され、組立/実装して使用される。従来のチップ
加工の例を断面模式図2を用いて説明する。ウエハはま
ず、加工しやすいよう適当な厚さに研磨あるいはエッチ
ングされる。例えば、図2(a)に示したように、デバ
イスの形成されたウエハ3の表面30をエレクトロンワ
ックス2等を用いて研磨治具1に接着し、裏面を研磨あ
るいはエッチングすることでウエハの厚さを所望の厚さ
まで薄化する。次に、溶剤にてエレクトロンワックス2
を除去することで薄化されたウエハ3を研磨治具1から
はずし、同図(b)に示す様にデバイス形成面(表面)
30を上にして裏面をダイシングシートにはりつける。
さらに、同図(c)に示す様に、通常のダイシング装置
を用いてウエハ表面30にパターン形成されたスクライ
ブラインラインに沿ってウエハを切断し、個々のチップ
に分割する。図において5はダイシングブレードを示し
ている。図では断面の一部しか示していないが、ダイシ
ングブレード5は通常薄い円盤状の形状をしており、高
速回転することでウエハを切断する。次に、分割された
ウエハののったダイシングシートをエクスパンドと呼ば
れる工程でシートを拡張してエクスパンドリング8に固
定した後、同図(d)に示すように下から針6等で所望
のチップを押し上げ、ダイシングシートから分離して真
空吸着器7等で取り出すことにより、個々の半導体チッ
プを得る。
2. Description of the Related Art Semiconductor devices / ICs are usually Si or Ga.
A large number of semiconductors such as As are formed on a semiconductor wafer, divided into individual chips by a chip processing process such as scribing or dicing, and assembled / mounted for use. An example of conventional chip processing will be described with reference to a schematic sectional view 2. The wafer is first polished or etched to a suitable thickness for easy processing. For example, as shown in FIG. 2A, the front surface 30 of the wafer 3 on which the device is formed is adhered to the polishing jig 1 by using the electron wax 2 or the like, and the back surface is polished or etched to obtain the wafer thickness. Thickness to the desired thickness. Next, electron wax 2 with a solvent
The wafer 3 thinned by removing the film is removed from the polishing jig 1, and as shown in FIG.
The back side is attached to the dicing sheet with 30 facing up.
Further, as shown in FIG. 3C, the wafer is cut along a scribe line line patterned on the wafer surface 30 by using an ordinary dicing device, and divided into individual chips. In the figure, 5 indicates a dicing blade. Although only a part of the cross section is shown in the figure, the dicing blade 5 is usually in the shape of a thin disk and cuts the wafer by rotating at high speed. Next, the dicing sheet with the divided wafers is expanded and fixed to the expanding ring 8 in a process called expanding, and then, as shown in FIG. Is lifted up, separated from the dicing sheet and taken out by the vacuum suction device 7 or the like to obtain individual semiconductor chips.

【0003】ところが近年、パワートランジスタ等の分
野において、放熱向上のためにチップ厚を極めて薄くす
る必要がでてきた。また、高周波MMIC等の分野にお
いてもチップ裏面に形成された接地導体と表面に形成さ
れた配線導体によるマイクロストリップ線路のインピー
ダンス調整のために、チップ厚の薄いICチップが必要
になってきている。
However, in recent years, in the field of power transistors and the like, it has become necessary to make the chip thickness extremely thin in order to improve heat dissipation. Also in the field of high frequency MMIC and the like, an IC chip having a small chip thickness is required for impedance adjustment of a microstrip line by a ground conductor formed on the back surface of the chip and a wiring conductor formed on the front surface.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、従来の
チップ加工の方法では、特にGaAsなどの機械的強度
の低い化合物半導体ウエハを加工する場合、ウエハ厚を
薄くすると、研磨治具からウエハをはずす際あるいはそ
の後の工程でウエハが割れてしまうという問題を有して
いた。
However, in the conventional chip processing method, particularly when processing a compound semiconductor wafer having a low mechanical strength such as GaAs, the wafer must be thin to remove the wafer from the polishing jig. Alternatively, there is a problem that the wafer is broken in the subsequent process.

【0005】本発明は上記問題点に鑑み、ウエハ厚を薄
くしてもウエハを割ること無く、容易にチップ厚の薄い
半導体チップを得るチップ加工方法及びチップを加工す
る装置を提供するものである。
In view of the above problems, the present invention provides a chip processing method and a chip processing apparatus for easily obtaining a semiconductor chip having a thin chip thickness without breaking the wafer even if the wafer thickness is reduced. .

【0006】[0006]

【課題を解決するための手段】上記問題点を解決するた
めに本発明は、ウエハの裏面のパターンをモニタする装
置と、前記装置でモニタされた情報に基づいてウエハを
切断する装置を備えたダイシング装置を用い、デバイス
の形成された半導体ウエハの表面をダイシングシートに
はりつける工程と、前記半導体ウエハを前記シートには
りつけたままウエハの裏面を研磨あるいはエッチングす
る工程と、前記半導体ウエハの表面パターンをモニタし
ながら裏面よりダイシングする工程を有するものであ
る。
In order to solve the above problems, the present invention comprises an apparatus for monitoring a pattern on the back surface of a wafer, and an apparatus for cutting the wafer based on the information monitored by the apparatus. Using a dicing device, a step of attaching the surface of a semiconductor wafer on which a device is formed to a dicing sheet, a step of polishing or etching the back surface of the wafer while attaching the semiconductor wafer to the sheet, and a surface pattern of the semiconductor wafer It has a step of dicing from the back surface while monitoring.

【0007】[0007]

【作用】本発明は上記した構成のダイシング装置によっ
てウエハの裏面からのダイシングが可能となり、そのた
め始めからウエハを表面を下にしてダイシングシートに
はりつけたままの裏面加工が可能になり、ウエハの取り
外し工程が不要となってウエハの割れが防止でき、また
工程が削減できる。
The present invention enables the dicing from the back surface of the wafer by the dicing apparatus having the above-described structure, which allows the back surface processing from the beginning with the front surface of the wafer facing downward while being stuck to the dicing sheet. The process becomes unnecessary and the cracking of the wafer can be prevented, and the process can be reduced.

【0008】[0008]

【実施例】本発明の実施例を断面模式図1を用いて説明
する。従来例とは異なり、まず、同図(a)に示すよう
にウエハ3を表面30側を下にしてダイシングシート4
にはりつける。ウエハ3の表面31にはデバイスと同時
にチップ分割のためのスクライブラインパターンが形成
されている。また、ダイシングシート4としては紫外線
照射で粘着力の低下する紫外線硬化型シートを使用する
と都合がよい。
EXAMPLE An example of the present invention will be described with reference to the schematic sectional view 1. Unlike the conventional example, first, as shown in FIG. 1A, the wafer 3 is placed with the front surface 30 side facing down, and the dicing sheet 4 is formed.
Stick to it. A scribe line pattern for chip division is formed on the surface 31 of the wafer 3 at the same time as the device. Further, as the dicing sheet 4, it is convenient to use an ultraviolet curable type sheet whose adhesive strength is reduced by irradiation with ultraviolet rays.

【0009】次に、同図(b)に示すようにダイシング
シート4にウエハ3をはりつけたままウエハ3の裏面3
1を研磨あるいはエッチングすることで、ウエハの厚さ
を所望の厚さまで薄化する。この時ウエハの表面側はダ
イシングシート4にて保護されている。
Next, as shown in FIG. 1B, the back surface 3 of the wafer 3 is kept with the wafer 3 attached to the dicing sheet 4.
By polishing or etching No. 1, the wafer is thinned to a desired thickness. At this time, the front side of the wafer is protected by the dicing sheet 4.

【0010】次に、ダイシングによりウエハを切断し、
個々のチップに分割するのであるが、この時、本発明の
赤外線カメラ付きのダイシング装置を用いる。すなわ
ち、通常ダイシングはウエハ表面に形成されたスクライ
ブラインのパターンをモニタしながら、このラインに沿
って切断するのであるが、本実施例では赤外線カメラを
用いて、ダイシング装置からみたウエハの裏面側である
ウエハ3の表面31に形成されたスクライブラインをモ
ニタし、これに沿ってウエハを切断する。この様にして
チップ分割した後は、従来例と同様にしてチップを取り
外せば良い。図1(d)に示した様にエクスパンドリン
グにセット後、紫外線照射を行ってダイシングシートの
粘着力を低下させれば取り外しが容易である。
Next, the wafer is cut by dicing,
It is divided into individual chips, and at this time, the dicing device with an infrared camera of the present invention is used. That is, normally, dicing is performed while monitoring the pattern of the scribe line formed on the front surface of the wafer, and cutting is performed along this line. However, in the present embodiment, the infrared camera is used to detect the back side of the wafer viewed from the dicing apparatus. A scribe line formed on the surface 31 of a certain wafer 3 is monitored, and the wafer is cut along the scribe line. After dividing the chip in this way, the chip may be removed in the same manner as in the conventional example. As shown in FIG. 1 (d), if the dicing sheet is set on the expanding ring and then irradiated with ultraviolet rays to reduce the adhesive strength, it can be easily removed.

【0011】以上説明したように、本実施例ではウエハ
厚を薄化してからは、チップ分割するまでダイシングシ
ートにはりつけられたままであり、ウエハの取り外しを
行わないことから、ウエハ厚を薄くしてもウエハの割れ
を防止することが可能となる。また、最終的にダイシン
グで使用するシートに始めからウエハをはりつけてある
ので、その分従来例に比べて工程が削減できる。
As described above, in this embodiment, after the wafer is thinned, it is still attached to the dicing sheet until the chips are divided, and the wafer is not removed. Also makes it possible to prevent the cracking of the wafer. Further, since the wafer is finally attached to the sheet used for dicing from the beginning, the number of steps can be reduced as compared with the conventional example.

【0012】なお、本実施例では裏面研磨/エッチング
時のウエハ表面保護としてダイシングシートそのものを
用いているが、ワックス等でさらに補強を行ってもよ
い。
In the present embodiment, the dicing sheet itself is used for protecting the wafer surface during back surface polishing / etching, but it may be further reinforced with wax or the like.

【0013】また、本実施例では示していないが、薄化
したウエハの裏面に金属のコーティングやバイアホール
の形成等の加工を行ってもよい。この際も、ダイシング
シートにはりつけたまま加工を行うことで同様の効果が
得られる。
Although not shown in this embodiment, processing such as metal coating or via hole formation may be performed on the back surface of the thinned wafer. Also in this case, the same effect can be obtained by performing the processing while being attached to the dicing sheet.

【0014】[0014]

【発明の効果】以上示した様に本発明は、ウエハの裏面
からのダイシングを可能とし、始めからウエハを表面を
下にしてダイシングシートにはりつけたままの裏面加工
をおこなうことによってウエハの取り外し工程をなく
し、ウエハの割れを防止することができる。また同時に
工程数の削減ができる。
INDUSTRIAL APPLICABILITY As described above, the present invention enables the dicing from the back surface of the wafer, and from the beginning, the wafer is removed with the front surface facing downward while the back surface processing is performed while the wafer is attached to the dicing sheet. It is possible to prevent the cracking of the wafer. At the same time, the number of steps can be reduced.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例におけるチップ加工の断面模式
FIG. 1 is a schematic cross-sectional view of chip processing in an example of the present invention.

【図2】従来のチップ加工の例を示した断面模式図FIG. 2 is a schematic sectional view showing an example of conventional chip processing.

【符号の説明】[Explanation of symbols]

1 研磨治具 2 エレクトロンワックス 3 ウエハ 4 ダイシングシート 5 ダイシングブレード 6 針 7 真空吸引器 8 エクスパンドリング 9 赤外線カメラ 30 ウエハの表面 31 ウエハの裏面 1 Polishing jig 2 Electron wax 3 Wafer 4 Dicing sheet 5 Dicing blade 6 Needle 7 Vacuum suction device 8 Expanding ring 9 Infrared camera 30 Front side of wafer 31 Back side of wafer

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 FI 技術表示箇所 S─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl.6 Identification code Internal reference number FI technical display area S

Claims (4)

Translated fromJapanese
【特許請求の範囲】[Claims]【請求項1】ウエハの裏面のパターンをモニタするモニ
タ装置と、前記モニタ装置でモニタされた情報に基づい
て前記ウエハ裏面を切断する切断装置とを備えたことを
特徴とするダイシング装置。
1. A dicing apparatus comprising: a monitor device for monitoring a pattern on the back surface of a wafer; and a cutting device for cutting the back surface of the wafer based on information monitored by the monitor device.
【請求項2】ウエハの裏面のパターンのモニタを赤外線
カメラを用いて行うことを特徴とする請求項1記載のダ
イシング装置。
2. The dicing apparatus according to claim 1, wherein an infrared camera is used to monitor the pattern on the back surface of the wafer.
【請求項3】デバイスの形成された半導体ウエハの表面
をダイシングシートにはりつける工程と、前記半導体ウ
エハを前記シートにはりつけたまま、ウエハの裏面を研
磨あるいはエッチングする工程と、前記半導体ウエハの
表面パターンをモニタしながら裏面よりダイシングする
工程とを含むことを特徴とする半導体チップの加工方
法。
3. A step of attaching the surface of a semiconductor wafer on which a device is formed to a dicing sheet, a step of polishing or etching the back surface of the wafer while the semiconductor wafer is attached to the sheet, and a surface pattern of the semiconductor wafer. And a step of dicing from the back surface while monitoring the above.
【請求項4】ダイシングシートに紫外線硬化型シートを
用いることを特徴とする請求項3記載の半導体チップの
加工方法。
4. The method of processing a semiconductor chip according to claim 3, wherein an ultraviolet curable sheet is used as the dicing sheet.
JP5218333A1993-09-021993-09-02 Dicing device and semiconductor chip processing methodPendingJPH0774131A (en)

Priority Applications (1)

Application NumberPriority DateFiling DateTitle
JP5218333AJPH0774131A (en)1993-09-021993-09-02 Dicing device and semiconductor chip processing method

Applications Claiming Priority (1)

Application NumberPriority DateFiling DateTitle
JP5218333AJPH0774131A (en)1993-09-021993-09-02 Dicing device and semiconductor chip processing method

Publications (1)

Publication NumberPublication Date
JPH0774131Atrue JPH0774131A (en)1995-03-17

Family

ID=16718220

Family Applications (1)

Application NumberTitlePriority DateFiling Date
JP5218333APendingJPH0774131A (en)1993-09-021993-09-02 Dicing device and semiconductor chip processing method

Country Status (1)

CountryLink
JP (1)JPH0774131A (en)

Cited By (12)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
JP2002075937A (en)*2000-08-302002-03-15Nitto Denko Corp Semiconductor wafer processing method
JP2002141309A (en)*2000-11-022002-05-17Lintec CorpDicing sheet and method of using the same
JP2003533871A (en)*2000-04-042003-11-11シノヴァ エス.アー. Method for cutting an object and machining the cut object and a support for holding the object or the cut object
JP2004009139A (en)*2002-06-102004-01-15New Wave Research Method and system for manufacturing a die
US6972202B2 (en)2003-03-202005-12-06Renesas Technology Corp.Method of manufacturing and testing a semiconductor device
JP2006261482A (en)*2005-03-182006-09-28Mitsui Chemicals IncSemiconductor wafer surface protection film and protection method for semiconductor wafer using the same
JP2007200917A (en)*2006-01-232007-08-09Disco Abrasive Syst Ltd Wafer division method
CN100407379C (en)*2004-05-202008-07-30株式会社瑞萨科技 Manufacturing method of semiconductor device
KR100852811B1 (en)*2005-11-092008-08-18가부시끼가이샤 도시바Method of manufacturing semiconductor device
US7563343B2 (en)2002-11-292009-07-21Fujitsu Microelectronics LimitedFilm lamination apparatus and method and a manufacturing method of a semiconductor apparatus
CN115050642A (en)*2021-03-082022-09-13华泰电子股份有限公司Wafer thinning method
JP2022191941A (en)*2021-06-162022-12-28株式会社ディスコManufacturing method of device

Cited By (15)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
US7163875B2 (en)2000-04-042007-01-16Synova S.A.Method of cutting an object and of further processing the cut material, and carrier for holding the object and the cut material
JP2003533871A (en)*2000-04-042003-11-11シノヴァ エス.アー. Method for cutting an object and machining the cut object and a support for holding the object or the cut object
JP2002075937A (en)*2000-08-302002-03-15Nitto Denko Corp Semiconductor wafer processing method
JP2002141309A (en)*2000-11-022002-05-17Lintec CorpDicing sheet and method of using the same
JP2004009139A (en)*2002-06-102004-01-15New Wave Research Method and system for manufacturing a die
US8822882B2 (en)2002-06-102014-09-02New Wave ResearchScribing sapphire substrates with a solid state UV laser with edge detection
US7563343B2 (en)2002-11-292009-07-21Fujitsu Microelectronics LimitedFilm lamination apparatus and method and a manufacturing method of a semiconductor apparatus
US6972202B2 (en)2003-03-202005-12-06Renesas Technology Corp.Method of manufacturing and testing a semiconductor device
CN100407379C (en)*2004-05-202008-07-30株式会社瑞萨科技 Manufacturing method of semiconductor device
JP2006261482A (en)*2005-03-182006-09-28Mitsui Chemicals IncSemiconductor wafer surface protection film and protection method for semiconductor wafer using the same
KR100852811B1 (en)*2005-11-092008-08-18가부시끼가이샤 도시바Method of manufacturing semiconductor device
US7642113B2 (en)2005-11-092010-01-05Kabushiki Kaisha ToshibaSemiconductor wafer dividing method
JP2007200917A (en)*2006-01-232007-08-09Disco Abrasive Syst Ltd Wafer division method
CN115050642A (en)*2021-03-082022-09-13华泰电子股份有限公司Wafer thinning method
JP2022191941A (en)*2021-06-162022-12-28株式会社ディスコManufacturing method of device

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