【０００１】[0001]
【産業上の利用分野】この発明は、テレビジョン受信機
に関し、特にたとえば、現フレームの映像信号と２つ前
のフレームの映像信号との差信号をエリアフィルタでフ
ィルタリングすることによって得られた信号に基づいて
静止画と動画とを混合し画面に出力する、テレビジョン
受信機に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a television receiver, and more particularly to a signal obtained by filtering a difference signal between a video signal of a current frame and a video signal of a frame two frames before with an area filter. The present invention relates to a television receiver that mixes a still image and a moving image based on the above and outputs the mixed image to a screen.
【０００２】[0002]
【従来の技術】高品位映像信号を帯域圧縮して衛星放送
１チャネルで伝送する方式として、多重サブサンプリン
グエンコード（ＭＵＳＥ）方式がよく知られている。こ
の方式に関しては、「ＭＵＳＥ方式の開発」二宮，大塚
他著（ＮＨＫ技術研究 昭和６２年第３９巻第２号１８
稿〜５３稿）などに紹介されている。ここで、ＭＵＳＥ
方式の従来のテレビジョン受信機１０を、図４に示す。2. Description of the Related Art A multi-subsampling encoding (MUSE) method is well known as a method of band-compressing a high-definition video signal and transmitting it by one channel of satellite broadcasting. Regarding this method, "Development of MUSE method" by Ninomiya, Otsuka et al. (NHK Technical Research, vol. 39, No. 2, 18)
Manuscript to 53 manuscripts). Where MUSE
A conventional television receiver 10 of the type is shown in FIG.
【０００３】図４を参照して、入力端子１２から与えら
れたＭＵＳＥ信号は、Ａ／Ｄ変換器１４でディジタル信
号に変換され、デエンファシス回路１６でデエンファシ
スをかけられる。次に、デエンファシスをかけられたＭ
ＵＳＥ信号は伝送逆ガンマ補正回路１８で補正された
後、輝度信号静止画処理部２０，輝度信号動画処理部２
２，色差信号静止画処理部２４，色差信号動画処理部２
６および動き検出回路２８に与えられる。Referring to FIG. 4, the MUSE signal supplied from the input terminal 12 is converted into a digital signal by the A / D converter 14 and de-emphasized by the de-emphasis circuit 16. Next, the de-emphasised M
The USE signal is corrected by the transmission inverse gamma correction circuit 18, and then the luminance signal still image processing unit 20 and the luminance signal moving image processing unit 2 are processed.
2, color difference signal still image processing unit 24, color difference signal moving image processing unit 2
6 and the motion detection circuit 28.
【０００４】輝度信号静止画処理部２０では、静止画の
時間的相関が高いことを利用してＭＵＳＥ信号をフィー
ルド間およびフレーム間内挿し、輝度信号動画処理部２
２では、動画の空間的相関が高いことを利用してＭＵＳ
Ｅ信号をフィールド内内挿する。内挿後の静止画信号お
よび動画信号は、混合回路３０ａにおいて、動き量に応
じて画素単位で混合される。また、色差信号についても
同様に、色差信号静止画処理部２４および色差信号動画
処理部２６で処理され、混合回路３０ｂにおいて動き量
に応じて画素単位で混合される。動き量は、動き検出回
路２８で求められる。そして、混合回路３０ａおよび３
０ｂからの出力はマトリクス回路３２に与えられ処理さ
れた後、Ｄ／Ａ変換器３４ａ，３４ｂおよび３４ｃを介
して、出力端子３６ａ，３６ｂおよび３６ｃからＲ，Ｇ
およびＢ信号として出力される。The luminance signal still image processing unit 20 interpolates the MUSE signal between fields and frames by utilizing the fact that the temporal correlation of still images is high, and the luminance signal moving image processing unit 2
In 2, MUS is used by taking advantage of the high spatial correlation of videos.
Interpolate the E signal in the field. The interpolated still image signal and moving image signal are mixed in pixel units in the mixing circuit 30a according to the amount of motion. Similarly, the color difference signals are processed by the color difference signal still image processing unit 24 and the color difference signal moving image processing unit 26, and are mixed in pixel units in the mixing circuit 30b according to the amount of movement. The motion amount is obtained by the motion detection circuit 28. Then, the mixing circuits 30a and 3
The output from 0b is applied to the matrix circuit 32 and processed, and then output from the output terminals 36a, 36b and 36c to R and G via the D / A converters 34a, 34b and 34c.
And a B signal.
【０００５】ここで、動き検出回路２８は、図５に示す
ように構成される。すなわち、図５に示す端子３８ａに
は、伝送逆ガンマ補正回路１８からのラインオフセット
サブサンプリングされた現フレーム信号が入力され、エ
ッジ検出回路４０，１フレーム差動き検出回路４２およ
び２フレーム差動き検出回路４４に与えられる。また、
端子３８ｂから１フレーム前のサンプリング信号が入力
され、１フレーム差動き検出回路４２に与えられる。さ
らに、端子３８ｃから２フレーム前のサンプリング信号
が入力され、２フレーム差動き検出回路４４に与えられ
る。１フレーム差動き検出回路４２では、現フレーム信
号および１フレーム前の信号とエッジ検出回路４０から
のエッジ検出信号とに基づいて動き量を検出し、これを
出力する。２フレーム差動き検出回路４４においても、
現フレーム信号および２フレーム前の信号とエッジ検出
信号とに基づいて動き量を検出し、これを出力する。動
き検出回路４２および４４から出力された信号は最大値
選択出力回路４６に与えられ、レベルが大きい方の信号
が、この回路４６から端子４８を介して出力される。Here, the motion detection circuit 28 is constructed as shown in FIG. That is, the line offset sub-sampled current frame signal from the transmission inverse gamma correction circuit 18 is input to the terminal 38a shown in FIG. 5, and the edge detection circuit 40, the one-frame difference motion detection circuit 42 and the two-frame difference motion detection are performed. Provided to circuit 44. Also,
The sampling signal of one frame before is input from the terminal 38b and is given to the one-frame difference motion detection circuit 42. Further, the sampling signal of two frames before is input from the terminal 38c and given to the two-frame difference motion detection circuit 44. The one-frame difference motion detection circuit 42 detects the amount of motion based on the current frame signal and the signal one frame before and the edge detection signal from the edge detection circuit 40, and outputs this. Also in the 2-frame difference motion detection circuit 44,
The motion amount is detected based on the current frame signal and the signal two frames before and the edge detection signal, and this is output. The signals output from the motion detection circuits 42 and 44 are applied to the maximum value selection output circuit 46, and the signal with the higher level is output from this circuit 46 via the terminal 48.
【０００６】２フレーム差動き検出回路４４は、図６に
示すように構成される。すなわち、現フレームおよび２
フレーム前のサンプリング信号が、それぞれ端子５０ａ
および５０ｂから入力され、減算器５２で減算処理され
る。その後、減算器５２から出力された差信号は、除算
器５４でエッジ検出回路４０からの検出信号によって除
算され、除算器５４の出力がエリアフィルタ回路５６に
入力される。エリアフィルタ回路５６は、入力信号に含
まれるノイズなどによるレベル変化が画像の動きとして
誤検出されないように、周辺画素の動きを検出する。そ
して、検出した周辺画素が全て動きでなければ、対象画
素についてレベル差が検出されてもノイズであると判断
し、動き量０の信号を出力する。The two-frame difference motion detection circuit 44 is constructed as shown in FIG. The current frame and 2
The sampling signals before the frame are respectively output to the terminal 50a.
And 50b, and the subtracter 52 performs subtraction processing. After that, the difference signal output from the subtracter 52 is divided by the detection signal from the edge detection circuit 40 in the divider 54, and the output of the divider 54 is input to the area filter circuit 56. The area filter circuit 56 detects the movement of peripheral pixels so that a level change due to noise or the like contained in the input signal is not erroneously detected as the movement of the image. Then, if all the detected peripheral pixels are not moving, it is determined that there is noise even if a level difference is detected for the target pixel, and a signal with a motion amount of 0 is output.
【０００７】エリアフィルタ回路５６からの出力信号
は、そのまままたはフレームメモリ５８を介してフレー
ム間内挿回路６０に入力され、現フレーム信号と１フレ
ーム前の信号とに基づいてフレーム間内挿処理がなされ
る。そして、内挿処理された信号が幅広げ回路６２に入
力され、レベル差が大きい方の信号が幅広げ回路６２か
ら端子６４を介して出力される。The output signal from the area filter circuit 56 is input to the inter-frame interpolation circuit 60 as it is or via the frame memory 58, and inter-frame interpolation processing is performed based on the current frame signal and the signal one frame before. Done. Then, the interpolated signal is input to the widening circuit 62, and the signal having the larger level difference is output from the widening circuit 62 via the terminal 64.
【０００８】エリアフィルタ回路５６は、図７に示すよ
うに構成される。すなわち、除算回路５４から出力され
た信号は端子６６から入力され、比較器６８およびライ
ンメモリ７０ａに与えられる。比較器６８では、この入
力信号と閾値とが比較され、閾値＞入力信号のときロー
レベル信号が出力される。また、閾値≦入力信号のとき
ハイレベル信号が出力される。比較器６８から出力され
たハイレベルまたはローレベル信号は、直接判別回路７
２に入力されるほか、ラインメモリ７０ｂを介して、さ
らにラインメモリ７０ｂ，７０ｃ，７０ｄおよび７０ｅ
を介して、判別回路７２に入力される。The area filter circuit 56 is constructed as shown in FIG. That is, the signal output from the division circuit 54 is input from the terminal 66 and applied to the comparator 68 and the line memory 70a. The comparator 68 compares this input signal with a threshold value, and outputs a low level signal when threshold value> input signal. Further, when threshold value ≦ input signal, a high level signal is output. The high-level or low-level signal output from the comparator 68 is the direct discrimination circuit 7
2 to the line memories 70b, 70c, 70d and 70e via the line memory 70b.
It is input to the discrimination circuit 72 via.
【０００９】判別回路７２は、このようにして入力され
た信号に基づいて周辺画素の動きを検出し、ローレベル
またはハイレベル信号を出力する。すなわち、図８を参
照して、判別回路７２は、動き検出の対象画素ａを含む
ラインの前後２ラインに含まれる周辺画素ｂ〜ｇの動き
を入力信号レベルに基づいて検出し、各周辺画素ｂ〜ｇ
に関する入力信号が全てローレベルのとき周辺の画像に
動きはないとしてローレベル信号を出力する。なお、こ
れらの入力信号のうち１つでもハイレベルであれば、周
辺画像に動きがあるとして判別回路７２はハイレベル信
号を出力する。判別回路７２からの出力信号はＡＮＤ回
路７４に与えられ、ラインメモリ７０ａおよび７０ｅを
介して入力された信号との間でＡＮＤ処理される。これ
によって、対象画素が動きと判断されても、周辺画素に
動きがなければ、端子７６からは動き量が０の信号が出
力される。The discrimination circuit 72 detects the movement of the peripheral pixels based on the signal thus input and outputs a low level or high level signal. That is, with reference to FIG. 8, the discrimination circuit 72 detects the movements of the peripheral pixels b to g included in the two lines before and after the line including the target pixel a for motion detection, based on the input signal level, and detects each peripheral pixel. b to g
When all the input signals related to are low level, the low level signal is output because there is no motion in the surrounding image. If at least one of these input signals has a high level, the discrimination circuit 72 outputs a high level signal because the peripheral image has a motion. The output signal from the discriminating circuit 72 is given to the AND circuit 74 and is AND-processed with the signals inputted through the line memories 70a and 70e. As a result, even if it is determined that the target pixel is in motion, if there is no motion in the peripheral pixels, a signal with a motion amount of 0 is output from the terminal 76.
【００１０】[0010]
【発明が解決しようとする課題】このような従来技術で
は、エリアフィルタ回路５６において周辺画素の検出範
囲を拡張する場合、所要ラインメモリ数が多くなり、エ
リアフィルタ回路のＬＳＩ化が困難となるという問題点
があった。すなわち、対象画素を含むラインのためのラ
インメモリ７０ａおよび７０ｆのほかに、検出する周辺
画素を含むラインと同じ数のラインメモリ７０ｂ〜７０
ｅが必要となるため、周辺画素の検出範囲を拡張すれば
するほど、所要ラインメモリ数が多くなっていた。In such a conventional technique, when the detection range of the peripheral pixels in the area filter circuit 56 is expanded, the number of required line memories becomes large, and it is difficult to form the area filter circuit into an LSI. There was a problem. That is, in addition to the line memories 70a and 70f for the line including the target pixel, the same number of line memories 70b to 70 as the line including the peripheral pixel to be detected.
Since e is required, the number of required line memories is increased as the detection range of peripheral pixels is expanded.
【００１１】それゆえに、この発明の主たる目的は、Ｌ
ＳＩ化が容易なエリアフィルタ回路を備えるテレビジョ
ン受信機を提供することである。Therefore, the main object of the present invention is L
It is an object of the present invention to provide a television receiver including an area filter circuit that can be easily converted into SI.
【００１２】[0012]
【課題を解決するための手段】この発明は、現フレーム
の映像信号と２つ前のフレームの映像信号との差信号を
エリアフィルタでフィルタリングすることによって得ら
れた信号に基づいて静止画と動画とを混合し画面に出力
するテレビジョン受信機において、エリアフィルタは、
差信号をメモリする第１のラインメモリと、第１のライ
ンメモリにカスケード接続される第２〜第ｍのラインメ
モリと、差信号および所定値を比較しネガティブ信号お
よびアクティブ信号のいずれかを出力する第１の比較手
段と、第１〜第ｍのラインメモリの出力のそれぞれおよ
び所定値を比較しネガティブ信号およびアクティブ信号
のいずれかを出力する第２〜第ｍ＋１の比較手段と、第
ｍ＋１の比較手段の出力をメモリする第ｍ＋１のライン
メモリと、第ｍ＋１のラインメモリにカスケード接続さ
れる第ｍ＋２〜第ｎのラインメモリと、第１〜第ｍの比
較手段の出力および第ｍ＋１〜第ｎのラインメモリの出
力に基づいてネガティブ信号およびアクティブ信号のい
ずれかを出力する第１の判別手段と、第１の判別手段の
出力がネガティブであれば第ｍのラインメモリの出力を
遮断する遮断手段とを含むことを特徴とする、テレビジ
ョン受信機である。SUMMARY OF THE INVENTION According to the present invention, a still image and a moving image are obtained based on a signal obtained by filtering a difference signal between a video signal of a current frame and a video signal of a frame two frames before by an area filter. In a television receiver that mixes and output on the screen, the area filter
A first line memory that stores a difference signal, and second to mth line memories that are cascade-connected to the first line memory, compare the difference signal and a predetermined value, and output either a negative signal or an active signal. And a second to (m + 1) th comparison means for comparing each of the outputs of the first to mth line memories and a predetermined value and outputting either a negative signal or an active signal, and the (m + 1) th comparison means. The (m + 1) th line memory for storing the output of the comparing means, the (m + 2) th to (n) th line memories cascade-connected to the (m + 1) th line memory, the outputs of the 1st to mth comparing means and the m + 1st to nth Of the first discriminating means for outputting either a negative signal or an active signal based on the output of the line memory of Characterized in that it comprises a blocking means for blocking the output of the line memory of the m if a television receiver.
【００１３】[0013]
【作用】第１〜第ｍのラインメモリは、対象画素を含む
ラインの信号を遅延させるほか、対象画素を含むライン
の前ｍ−１ラインおよび後ｎ−ｍラインに含まれる周辺
画素の検出にも用いられるため、所要ラインメモリ数が
少なくなる。The first to m-th line memories delay the signal of the line including the target pixel and detect peripheral pixels included in the line m-1 and the line nm after the line including the target pixel. Also used, the number of required line memories is reduced.
【００１４】[0014]
【発明の効果】この発明によれば、所要ラインメモリ数
が少なくなるので、テレビジョン受信機に含まれるエリ
アフィルタ回路のＬＳＩ化が容易になる。この発明の上
述の目的，その他の目的，特徴および利点は、図面を参
照して行う以下の実施例の詳細な説明から一層明らかと
なろう。According to the present invention, since the number of required line memories is reduced, the area filter circuit included in the television receiver can be easily integrated into an LSI. The above-mentioned objects, other objects, features and advantages of the present invention will become more apparent from the following detailed description of the embodiments with reference to the drawings.
【００１５】[0015]
【実施例】この実施例のテレビジョン受信機は、図４に
示す従来のテレビジョン受信機１０とほぼ同様の構成と
なっており、従来と異なる点は、動き検出回路２８の２
フレーム差動き検出回路４４に含まれるエリアフィルタ
回路５６の構成だけであるので、これについてのみ説明
しその他の点についての説明は省略する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The television receiver of this embodiment has substantially the same configuration as that of the conventional television receiver 10 shown in FIG.
Since only the configuration of the area filter circuit 56 included in the frame difference motion detection circuit 44 is described, only this will be described and the description of other points will be omitted.
【００１６】この実施例のエリアフィルタ回路５６の構
成を、図１に示す。除算器５４からの出力信号は端子７
８から入力され、比較器８０ａおよびラインメモリ８２
ａに与えられる。比較器８０ａでは入力信号レベルと閾
値とが比較され、閾値＞入力信号レベルであるときロー
レベル信号が、閾値≦入力信号レベルのときハイレベル
信号が出力され、判別回路８４ａに与えられる。ライン
メモリ８２ａによって１ライン分遅延された信号は、比
較器８０ｂおよびラインメモリ８２ｂに与えられる。そ
して、比較器８０ｂは比較器８０ａと同様に処理し、ロ
ーレベルまたはハイレベル信号を判別回路８４ａに与え
る。ラインメモリ８２ｂから出力された信号は、ＡＮＤ
回路８６に与えられるとともに、比較器８０ｃで比較器
８０ａおよび８０ｂと同様に処理される。The structure of the area filter circuit 56 of this embodiment is shown in FIG. The output signal from the divider 54 is the terminal 7
8 from the comparator 80a and the line memory 82
given to a. The comparator 80a compares the input signal level with the threshold value. When the threshold value> the input signal level, a low level signal is output, and when the threshold value ≦ the input signal level, a high level signal is output and supplied to the determination circuit 84a. The signal delayed by one line by the line memory 82a is given to the comparator 80b and the line memory 82b. Then, the comparator 80b processes in the same manner as the comparator 80a, and gives a low level or high level signal to the discrimination circuit 84a. The signal output from the line memory 82b is ANDed.
The signal is supplied to the circuit 86 and processed by the comparator 80c in the same manner as the comparators 80a and 80b.
【００１７】これによって、比較器８０ｃは、出力信号
をラインメモリ８２ｃを介して判別回路８４ａに与える
とともに、ラインメモリ８２ｃおよび８２ｄを介して判
別回路８４ａに与える。したがって、判別回路８４ａに
は、ラインメモリ８２ｂから出力される信号の前後２ラ
インの信号が入力される。判別回路８４ａは、これらの
入力信号に基づいて周辺画素の動きを検出し、入力信号
が全てローレベルであるとき、対象画素の周辺の画像に
動きはないと判別してローレベル信号を出力し、ＡＮＤ
回路８６に与える。なお、周辺画素に関連する入力信号
の１つでもハイレベルであれば、周辺画像に動きがある
と判別して判別回路８４ａはハイレベル信号を出力す
る。ＡＮＤ回路８６は、判別回路８４ａからの出力がハ
イレベルであるときラインメモリ８２ｂからの信号を端
子８８を介して出力し、判別回路８４ａからの出力がロ
ーレベルであるときローレベル信号を端子８８を介して
出力する。As a result, the comparator 80c gives the output signal to the discriminating circuit 84a via the line memory 82c and also to the discriminating circuit 84a via the line memories 82c and 82d. Therefore, the signals of two lines before and after the signal output from the line memory 82b are input to the determination circuit 84a. The determination circuit 84a detects the movement of the peripheral pixels based on these input signals, and when all the input signals are at the low level, determines that there is no movement in the image around the target pixel and outputs a low level signal. , AND
It is given to the circuit 86. If even one of the input signals related to the peripheral pixels is at the high level, it is determined that the peripheral image has a motion, and the determination circuit 84a outputs the high level signal. The AND circuit 86 outputs the signal from the line memory 82b via the terminal 88 when the output from the discrimination circuit 84a is at the high level, and outputs the low level signal at the terminal 88 when the output from the discrimination circuit 84a is at the low level. Output via.
【００１８】動作において、図２に示す対象画素ａに動
きがあった場合でも、対象画素ａを含むラインの前後２
ラインに含まれる周辺画素ｂ〜ｇに動きがなければ、対
象画素ａの動きはノイズであるとしてＡＮＤ回路８６か
ら動き量が０の信号（ローレベル信号）が出力される。
一方、対象画素ａに動きがあった場合において周辺画素
ｂ〜ｇのいずれかにも動きがあった場合、ＡＮＤ回路８
６からは対象画素ａの動き量がそのまま出力される。こ
れによって、ノイズによる対象画素の動きが画像の動き
と誤って検出されるのを防止できる。In the operation, even when the target pixel a shown in FIG. 2 moves, two lines before and after the line including the target pixel a.
If there is no movement in the peripheral pixels b to g included in the line, the movement of the target pixel a is considered to be noise, and the AND circuit 86 outputs a signal with a movement amount of 0 (low level signal).
On the other hand, when the target pixel a moves and any of the peripheral pixels b to g also moves, the AND circuit 8
From 6, the amount of movement of the target pixel a is output as it is. This can prevent the motion of the target pixel due to noise from being erroneously detected as the motion of the image.
【００１９】図３を参照して、他の実施例のテレビジョ
ン受信機におけるエリアフィルタ回路５６の構成につい
て説明する。ただし、この実施例のエリアフィルタ回路
５６は、図１に示すエリアフィルタ回路５６とほぼ同様
の構成となっているので、異なる点についてのみ説明
し、同様の点については説明を省略する。比較器８０
ａ，比較器８０ｂ，ラインメモリ８２ｃおよびラインメ
モリ８２ｄの出力は、それぞれＮＯＴ回路９０ａ，９０
ｂ，９０ｃおよび９０ｄを介して判別回路８４ｂに入力
される。判別回路８４ｂでは、これらの入力信号に基づ
いて周辺画素の動きを検出し、周辺画素が全て動きであ
るとき（入力が全てローレベルであるとき）ハイレベル
信号を、周辺画素のいずれか１つでも動きでないとき
（入力信号のいずれか１つでもハイレベルであるとき）
ローレベル信号を出力し、マルチプレクサ９２のＳ端子
に与える。マルチプレクサ９２は、Ｓ端子の入力信号が
ローレベルであるときＡＮＤ回路８６から与えられた信
号を出力し、Ｓ端子入力がハイレベルのとき所定レベル
Ｋの信号を動き量として出力する。The structure of the area filter circuit 56 in the television receiver of another embodiment will be described with reference to FIG. However, since the area filter circuit 56 of this embodiment has substantially the same configuration as the area filter circuit 56 shown in FIG. 1, only different points will be described, and description of the same points will be omitted. Comparator 80
a, the comparator 80b, the line memory 82c, and the output of the line memory 82d are the NOT circuits 90a, 90, respectively.
It is input to the discrimination circuit 84b via b, 90c and 90d. The discrimination circuit 84b detects the movement of the peripheral pixels based on these input signals, and when the peripheral pixels are all in motion (when the inputs are all at the low level), the high level signal is output to one of the peripheral pixels. But when it is not moving (when any one of the input signals is high level)
A low level signal is output and given to the S terminal of the multiplexer 92. The multiplexer 92 outputs the signal given from the AND circuit 86 when the input signal of the S terminal is low level, and outputs the signal of the predetermined level K as the motion amount when the input of the S terminal is high level.
【００２０】これによって、図１に示すエリアフィルタ
回路５６の動作に加えて、図２の対象画素ａについて動
きが検出されず周辺画素ｂ〜ｇについて動きが検出され
たような場合、端子８８から所定の動き量が出力される
ため、動き誤検出および動き検出漏れを防止することが
できる。これらの実施例によれば、ラインメモリ８２ａ
および８２ｂは対象画素を含むラインの信号を遅延させ
るほか、判別回路８４ａ（および８４ｂ）において周辺
画素を検出するのにも用いられるため、所要ラインメモ
リ数を少なくすることができ、エリアフィルタ５６のＬ
ＳＩ化が容易になる。As a result, in addition to the operation of the area filter circuit 56 shown in FIG. 1, if no motion is detected for the target pixel a of FIG. Since a predetermined amount of motion is output, it is possible to prevent erroneous motion detection and omission of motion detection. According to these embodiments, the line memory 82a
Since and 82b are used for delaying the signal of the line including the target pixel and also for detecting the peripheral pixels in the determination circuit 84a (and 84b), the number of required line memories can be reduced and the area filter 56 of the area filter 56 can be reduced. L
SI becomes easy.
【００２１】なお、これらの実施例によれば、判別回路
８４ａおよび８４ｂは、周辺画素ｂ〜ｇが全てローレベ
ルであるときにローレベル信号およびハイレベル信号を
出力するようにしたが、それぞれの判別回路８４ａおよ
び８４ｂがローレベル信号およびハイレベル信号を出力
する条件として、周辺画素ｂ〜ｇにローレベルが占める
割合を変えてもよいことはもちろんである。According to these embodiments, the discrimination circuits 84a and 84b output the low level signal and the high level signal when the peripheral pixels b to g are all at the low level. As a condition for the determination circuits 84a and 84b to output the low level signal and the high level signal, it goes without saying that the ratio of the low level to the peripheral pixels b to g may be changed.
【図１】この発明の一実施例を示すブロック図である。FIG. 1 is a block diagram showing an embodiment of the present invention.
【図２】図１実施例の動作の一部を示す図解図である。FIG. 2 is an illustrative view showing a part of the operation of the embodiment in FIG.
【図３】この発明の他の実施例の一部を示すブロック図
である。FIG. 3 is a block diagram showing a part of another embodiment of the present invention.
【図４】従来技術を示すブロック図である。FIG. 4 is a block diagram showing a conventional technique.
【図５】図４に示す従来技術の一部を示すブロック図で
ある。FIG. 5 is a block diagram showing a part of the conventional technique shown in FIG.
【図６】図４に示す従来技術の一部を示すブロック図で
ある。FIG. 6 is a block diagram showing a part of the conventional technique shown in FIG.
【図７】図４に示す従来技術の一部を示すブロック図で
ある。FIG. 7 is a block diagram showing a part of the conventional technique shown in FIG.
【図８】図４に示す従来技術の動作の一部を示す図解図
である。FIG. 8 is an illustrative view showing a part of the operation of the conventional technique shown in FIG. 4;
１０ …テレビジョン受信機 ５６ …エリアフィルタ回路 ８０ａ，８０ｂ，８０ｃ …比較器 ８２ａ，８２ｂ，８２ｃ，８２ｄ …ラインメモリ ８４ａ，８４ｂ …判別回路 ８６ …ＡＮＤ回路 ９２ …マルチプレクサ 10 ... Television receiver 56 ... Area filter circuit 80a, 80b, 80c ... Comparator 82a, 82b, 82c, 82d ... Line memory 84a, 84b ... Discrimination circuit 86 ... AND circuit 92 ... Multiplexer
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP33046193AJPH07193763A (en) | 1993-12-27 | 1993-12-27 | Television receiver |
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP33046193AJPH07193763A (en) | 1993-12-27 | 1993-12-27 | Television receiver |
| Publication Number | Publication Date |
|---|---|
| JPH07193763Atrue JPH07193763A (en) | 1995-07-28 |
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP33046193AWithdrawnJPH07193763A (en) | 1993-12-27 | 1993-12-27 | Television receiver |
| Country | Link |
|---|---|
| JP (1) | JPH07193763A (en) |
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| JPH07193763A (en) | Television receiver | |
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| Date | Code | Title | Description |
|---|---|---|---|
| A300 | Withdrawal of application because of no request for examination | Free format text:JAPANESE INTERMEDIATE CODE: A300 Effective date:20010306 |