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JPH05283346A - Semiconductor manufacturing device - Google Patents

Semiconductor manufacturing device

Info

Publication number
JPH05283346A
JPH05283346AJP8014892AJP8014892AJPH05283346AJP H05283346 AJPH05283346 AJP H05283346AJP 8014892 AJP8014892 AJP 8014892AJP 8014892 AJP8014892 AJP 8014892AJP H05283346 AJPH05283346 AJP H05283346A
Authority
JP
Japan
Prior art keywords
substrate
heating
chamber
tray
surface treatment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP8014892A
Other languages
Japanese (ja)
Inventor
Masakazu Kimura
正和 木村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Kagoshima Ltd
Original Assignee
NEC Kagoshima Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Kagoshima LtdfiledCriticalNEC Kagoshima Ltd
Priority to JP8014892ApriorityCriticalpatent/JPH05283346A/en
Publication of JPH05283346ApublicationCriticalpatent/JPH05283346A/en
Withdrawnlegal-statusCriticalCurrent

Links

Abstract

PURPOSE:To form a good TFT in a substrate by introducing the substrate into a film formation chamber without attachment of particles or contamination. CONSTITUTION:A surface treatment chamber is directly connected to a film formation chamber through a vacuum heating chamber. The surface treatment chamber is provided with a tray 8 for mounting a substrate 15, a tray supporter 14 for holding the tray 8 and transferring it inside the chamber, a heating lamp 7 for heating the substrate 15, an ozone scattering tube 10 for scattering ozone/ oxygen mixture gas to a surface of the substrate 15, a low pressure mercury lamp 11 for irradiating ultraviolet rays and an inert gas scattering tube 12 which is provided to a next stage and sprays inert gas to completely remove contaminant of a substrate before film formation.

Description

Translated fromJapanese
【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は半導体製造装置に関し、
特に、液晶用ガラス基板に成膜・加工を施す半導体製造
装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor manufacturing apparatus,
In particular, the present invention relates to a semiconductor manufacturing apparatus that forms and processes a glass substrate for liquid crystal.

【0002】[0002]

【従来の技術】液晶表示パネル用TFT(Thin−F
ilm−Transistorの略)は透明ガラス基板
上に形成するもので、このTFT製造工程は、絶縁膜,
アモルファスシリコン膜,透明導電性ITO(Indi
um−Tin−Oxideの略)等を基板上に形成する
工程と、これらの膜を所望の形状・寸法に加工する工程
からなる。この加工工程では、通常フォトレジストが用
いられ、膜の上に形成されたレジストをまず所望の形状
・寸法に加工したのち、このレジストのパターンに基づ
いて膜がエッチング加工される。エッチング加工後、不
要となったレジストは通常、基板ごとレジスト剥離液に
浸漬するか、剥離液をレジスト表面にシャワー状に散布
するような湿式の剥離装置により除去される。このよう
な湿式とは別に、酸素プラズマ中でレジストを灰化する
乾式の装置も半導体ウェーハを対象としたフォトリソグ
ラフィー工程で用いられている。
2. Description of the Related Art TFTs (Thin-F) for liquid crystal display panels
ILM-Transistor) is formed on a transparent glass substrate.
Amorphous silicon film, transparent conductive ITO (Indi
UM-Tin-Oxide, etc.) is formed on the substrate, and these films are processed into a desired shape and size. In this processing step, a photoresist is usually used. The resist formed on the film is first processed into a desired shape and size, and then the film is etched based on the resist pattern. After the etching process, the unnecessary resist is usually removed together with the substrate by immersing it in a resist stripping solution or by a wet stripping apparatus that sprays the stripping solution on the resist surface in a shower shape. Apart from such a wet method, a dry apparatus for ashing a resist in oxygen plasma is also used in a photolithography process for a semiconductor wafer.

【0003】また、最近ではプラズマダメージを回避す
るために紫外線とオゾンによる反応を利用した灰化装置
も用いられつつある。このような灰化装置は例えば処理
すべきウェーハの上方に紫外線を照射するための低圧水
銀ランプが設けられ、ウェーハ上方中央部に設けられた
管からウェーハ表面へオゾンが供給される構造を有する
(例えば日立評論1989年5月号pp.39−4
5)。レジスト除去後に成膜装置へ移す間に基板が汚染
されやすいため、成膜直前に基板を洗浄するのが一般的
である。
Recently, in order to avoid plasma damage, an ashing apparatus utilizing a reaction between ultraviolet rays and ozone is being used. Such an ashing device has a structure in which, for example, a low-pressure mercury lamp for irradiating ultraviolet rays is provided above the wafer to be processed, and ozone is supplied to the wafer surface from a tube provided in the central portion above the wafer ( For example, Hitachi Review, May 1989, pp.39-4
5). Since the substrate is easily contaminated during transfer to the film forming apparatus after removing the resist, the substrate is generally washed immediately before film formation.

【0004】[0004]

【発明が解決しようとする課題】成膜工程ではピンホー
ルが少なくかつ密着性の良い膜を形成することが電気的
耐性,プロセス耐性の点で極めて重要となる。これを実
現するためには、成膜前に基板表面を出来るだけ清浄な
状態にしておくことが必要となる。何んとなれば成膜前
に基板に付いたパーティクルは、その後の工程で剥がれ
てピンホールとなり層関短絡の原因となる。
In the film forming step, it is extremely important to form a film having few pinholes and good adhesion in terms of electrical resistance and process resistance. In order to realize this, it is necessary to keep the surface of the substrate as clean as possible before film formation. What happens is that particles adhered to the substrate before film formation are peeled off in subsequent steps and become pinholes, which causes a layer-related short circuit.

【0005】従来技術では、前述したように、レジスト
剥離,基板洗浄,成膜の各工程は、別々の装置で処理す
るため、成膜装置のローディング室へ基板を入れるまで
にパーティクル付着を皆無とするのは極めて困難であっ
た。
In the prior art, as described above, the steps of resist stripping, substrate cleaning, and film formation are performed by separate devices, so that no particles are attached by the time the substrate is placed in the loading chamber of the film formation device. It was extremely difficult to do.

【0006】本発明の目的は、パーティクルを付着や汚
染されることなく基板に高品質のTFTを形成すること
が出来る半導体製造装置を提供することである。
An object of the present invention is to provide a semiconductor manufacturing apparatus capable of forming high quality TFTs on a substrate without particles being attached or contaminated.

【0007】[0007]

【課題を解決するための手段】本発明の半導体製造装置
は、基板表面のレジストおよび有機汚染物質を除去する
表面処理室と表面処理後真空に排気し前記基板を膜形成
温度に加熱する真空加熱室を介して成膜室とを直結し、
基板を搭載するトレーを移動させることで表面汚染除
去,加熱及び成膜を連続的に行なうことを特徴としてい
る。
A semiconductor manufacturing apparatus of the present invention comprises a surface treatment chamber for removing resist and organic contaminants on the surface of a substrate, and vacuum heating for evacuation to vacuum after the surface treatment to heat the substrate to a film forming temperature. Directly connected to the film forming chamber through the chamber,
It is characterized by continuously removing surface contamination, heating and film formation by moving the tray on which the substrate is mounted.

【0008】また、本発明の半導体製造装置における前
記表面処理室は、前記トレーに載置される複数の第1の
加熱ランプと、基板表面側に配置される複数の第2の加
熱ランプおよび反射板からなる基板加熱機構と、前記基
板表面側にある前記第2の加熱ランプと一定の間隔で交
互に配置された低圧水銀ランプおよび反射板からなる紫
外線照射機構と、前記基板表面に平行方向にオゾンを散
布するオゾン散布管と、後段にあって不活性ガスを散布
する不活性ガス散布管と、前記トレーを所定の速度で搬
送するトレー移動機構とを備えている。
Further, in the surface treatment chamber of the semiconductor manufacturing apparatus of the present invention, the plurality of first heating lamps mounted on the tray, the plurality of second heating lamps arranged on the front surface side of the substrate, and the reflections. A substrate heating mechanism composed of a plate, an ultraviolet irradiation mechanism composed of a low-pressure mercury lamp and a reflector which are alternately arranged at a constant interval with the second heating lamp on the substrate surface side, and in a direction parallel to the substrate surface. An ozone spray pipe for spraying ozone, an inert gas spray pipe for spraying an inert gas in the subsequent stage, and a tray moving mechanism for transporting the tray at a predetermined speed are provided.

【0009】[0009]

【作用】オゾン雰囲気中で紫外線を照射する方法は有機
物汚染に対する洗浄やレジストの灰化に有効であること
は原理的に既に知られている。即ち、オゾンガス存在下
で紫外線を照射するとオゾンは約200〜300ナノメ
ートルの波長領域の光を吸収して活性な励起酸素原子に
分解される。また、酸素分子は約195ナノメートル以
下の紫外線を吸収してオゾンに変換される。低圧水銀ラ
ンプは184.9ナノメートル,253.7ナノメート
ルの波長の強い光を発生するので、オゾン・酸素雰囲気
中に基板を置くと、その表面は、O3,Oにさらされ、
基板表面の有機物は、O3,Oの酸化作用や紫外線によ
る直接分解で気化し、レジスト灰化や洗浄効果が得られ
る。
It has been known in principle that the method of irradiating ultraviolet rays in an ozone atmosphere is effective for cleaning organic substances and ashing resist. That is, when ultraviolet rays are irradiated in the presence of ozone gas, ozone absorbs light in the wavelength region of about 200 to 300 nm and is decomposed into active excited oxygen atoms. In addition, oxygen molecules absorb ultraviolet rays of about 195 nm or less and are converted into ozone. Since the low-pressure mercury lamp emits strong light with wavelengths of 184.9 nm and 253.7 nm, when the substrate is placed in an ozone / oxygen atmosphere, its surface is exposed to O3 and O,
Organic substances on the surface of the substrate are vaporized by the oxidizing action of O3 and O and direct decomposition by ultraviolet rays, and resist ashing and cleaning effects are obtained.

【0010】[0010]

【実施例】次に本発明について図面を参照して説明す
る。
The present invention will be described below with reference to the drawings.

【0011】図1は本発明の半導体製造装置の一実施例
における構成を示す図、図2は図1の表面処理室の構成
を示し、(a)は内部を平面的に示す図、(b)はAA
断面図である。この半導体製造装置は、図1に示すよう
に、基板表面に存在するレジストや有機汚染物質を除去
する表面処理室1と、表面処理された基板を加熱する真
空加熱室2と、窒化シリコン膜及びアモルファスシリコ
ン膜を形成する成膜室甲3,成膜室乙4及び成膜室内5
と、各膜が堆積される基板を冷却する冷却室6とを直結
して構成されている。すなわち、真空加熱室2から冷却
室6までは従来の構成と同じである成膜装置(例えば技
術雑誌、セミコンダクターワールド(日本語版)198
7年7月号pp.166〜170)の前段に表面処理室
1を直結したことである。
FIG. 1 is a diagram showing the structure of an embodiment of the semiconductor manufacturing apparatus of the present invention, FIG. 2 is a structure of the surface treatment chamber of FIG. 1, (a) is a plan view of the interior, and (b) is a plan view. ) Is AA
FIG. As shown in FIG. 1, this semiconductor manufacturing apparatus includes a surface treatment chamber 1 for removing the resist and organic contaminants present on the substrate surface, a vacuum heating chamber 2 for heating the surface-treated substrate, a silicon nitride film, and Amorphous silicon film forming chamber A3, film forming chamber B4, and film forming chamber 5
And a cooling chamber 6 for cooling the substrate on which each film is deposited are directly connected to each other. That is, the vacuum heating chamber 2 to the cooling chamber 6 have the same structure as the conventional one (for example, technical magazine, Semiconductor World (Japanese version) 198).
July 7 issue pp. 166 to 170) is directly connected to the surface treatment chamber 1.

【0012】この実施例における表面処理室は、図2に
示すように、基板15を保持する二枚のトレー8と、こ
の二枚のトレー8を互いに基板15の裏面を対向させ保
持し移動するトレー支持体14と、このトレー8の間に
あってトレー8の移動方向に並べ配置される基板加熱用
の加熱ランプ7と、基板15の一方側にあって基板表面
にオゾン・酸素混合ガスを散布するとともにトレー8の
搬送方向に伸びるオゾン散布管10と、基板15の表面
側にあって搬送方向に交互に並べて配置されるとともに
基板15を加熱する加熱ランプ7および紫外線を照射す
る低圧水銀ランプ11と、後段にあって加熱される基板
15に不活性ガスを散布する不活性ガス散布管12とを
備えている。また、この表面処理室には、排気ガス16
を排気する排気管17と加熱ランプ7および低圧水銀ラ
ンプ11の放射効率を上げる反射板9とが設けられてい
る。
In the surface treatment chamber in this embodiment, as shown in FIG. 2, two trays 8 for holding the substrates 15 and two trays 8 are moved while holding the back surfaces of the substrates 15 so as to face each other. A tray support 14, a heating lamp 7 for heating the substrate which is arranged between the trays 8 in the moving direction of the tray 8, and an ozone / oxygen mixed gas is sprayed on the substrate surface on one side of the substrate 15. At the same time, an ozone spray tube 10 extending in the transport direction of the tray 8, a heating lamp 7 for heating the substrate 15 and a low-pressure mercury lamp 11 for irradiating ultraviolet rays, which are arranged on the surface side of the substrate 15 alternately in the transport direction. The substrate 15 to be heated in the latter stage is provided with an inert gas sprinkling tube 12 for sprinkling an inert gas. In addition, exhaust gas 16
An exhaust pipe 17 for exhausting the gas, a heating lamp 7, and a reflector 9 for increasing the radiation efficiency of the low-pressure mercury lamp 11 are provided.

【0013】さらに、図面には示していないが、汚染除
去された基板15はトレー8に載置された状態で次室で
ある真空加熱室2に導入され、基板15は再び所定温度
に加熱される。なお、表面処理室1と真空加熱室との間
には、例えばゲートバルブのような仕切り板を設け、圧
力の上昇を抑えている。また、トレー8を移載し真空加
熱室2内をトレー8を移動する機構も備えている。
Further, although not shown in the drawing, the decontaminated substrate 15 is placed in the tray 8 and introduced into the vacuum heating chamber 2 which is the next chamber, and the substrate 15 is heated again to a predetermined temperature. It A partition plate such as a gate valve is provided between the surface treatment chamber 1 and the vacuum heating chamber to suppress an increase in pressure. Further, a mechanism for moving the tray 8 and moving the tray 8 in the vacuum heating chamber 2 is also provided.

【0014】ここで、各構成部の具体的な所元寸法及び
必要な定格について述べると、例えば、基板裏面側の加
熱ランプ7として長さ700mm,出力800ワットの
タングステン線ランプを80mmピッチで55本並べ
た。基板表面側では、低圧水銀ランプ11として長さ7
00mm,出力300ワットのランプを用い、低圧水銀
ランプと加熱ランプとを80mmピッチで片側あたり各
々20本ずつ並べた。また、不活性ガス散布領域では、
基板表面側には加熱ランプのみを80mmピッチで片側
あたり各々15本ずつ並べた。基板表面側の加熱ランプ
は基板裏面側に用いたものと同じでこれらの加熱ランプ
により250℃までの加熱ができるようにした。
Here, the specific dimensions of each component and the required ratings will be described. For example, as the heating lamp 7 on the back side of the substrate, a tungsten wire lamp having a length of 700 mm and an output of 800 watts is 55 at a pitch of 80 mm. Books are lined up. On the substrate surface side, the length of the low pressure mercury lamp 11 is 7
Using a lamp of 00 mm and an output of 300 watts, 20 low pressure mercury lamps and 20 heating lamps were arranged on each side at an 80 mm pitch. In addition, in the inert gas spray area,
Only the heating lamps were arranged on the front surface of the substrate at a pitch of 80 mm, 15 lamps on each side. The heating lamp on the front side of the substrate is the same as that used on the back side of the substrate, and these heating lamps can heat up to 250 ° C.

【0015】一方、基板表面と低圧水銀ランプ11との
距離は20mmの多数のレジストストライプを形成し
た。然るのち塩酸,硝酸,水の混合液によりレジストで
被覆されていない領域のITO膜を除去した。このよう
なガラス基板をトレー8に載せ、表面処理室1でレジス
ト灰化を行い、引き続いて、真空加熱室2を経て成膜室
甲3,成膜室乙4,成膜室内5で窒化シリコン膜,アモ
ルファスシリコン膜,n+アモルファスシリコン膜を各
々300mm,400nm,500nmを堆積した。表
面処理室1では毎分300mmの速度でトレー8を移動
させながら、加熱ランプ7,低圧水銀ランプ11,オゾ
ン散布管10により基板表面に赤外線照射,紫外線照
射,オゾン散布を行った。
On the other hand, a large number of resist stripes having a distance of 20 mm between the substrate surface and the low-pressure mercury lamp 11 were formed. After that, the ITO film in the region not covered with the resist was removed with a mixed solution of hydrochloric acid, nitric acid and water. Such a glass substrate is placed on a tray 8, resist ashing is performed in the surface treatment chamber 1, and subsequently, a vacuum heating chamber 2 is used to form a silicon nitride film in a film forming chamber A3, a film forming chamber B4, and a film forming chamber 5. A film, an amorphous silicon film, and an n+ amorphous silicon film were deposited to 300 mm, 400 nm, and 500 nm, respectively. In the surface treatment chamber 1, while moving the tray 8 at a speed of 300 mm per minute, the substrate surface was irradiated with infrared rays, ultraviolet rays, and ozone by the heating lamp 7, the low-pressure mercury lamp 11, and the ozone spray tube 10.

【0016】オゾン散布では、ガスとして酸素の中にオ
ゾンを7vol%混合したものを用い、オゾン散布管1
本あたり毎分30lのオゾン・酸素混合ガスを散布し
た。基板加熱温度は100℃とした。又、レジスト灰化
処理後の不活性ガスとして窒素を用い、不活性ガス散布
管1本あたり毎分30lを散布した。真空加熱室2では
0.001Paまで真空排気したのち水素ガスを流入し
た状態で300℃まで加熱しておき、成膜室甲3ではシ
ラン,アンモニア,窒素ガスを用いて窒化シリコン膜
を、成膜室乙4では、シラン,水素ガスを用いてアモル
ファスシリコン膜を、成膜室内5ではシラン,フォスフ
ィン,水素ガスを用いてn+アモルファスシリコン膜を
順次連続的に堆積した。このような成膜工程を経たの
ち、基板を冷却室6に送り、窒素ガスで大気圧に戻し
た。
In ozone spraying, a mixture of ozone and 7 vol% ozone was used as a gas, and the ozone spraying tube 1
30 liters of ozone / oxygen mixed gas was sprayed per minute per book. The substrate heating temperature was 100 ° C. Further, nitrogen was used as the inert gas after the resist ashing treatment, and 30 l / min was sprayed per one inert gas spray tube. In the vacuum heating chamber 2, the gas was evacuated to 0.001 Pa and then heated to 300 ° C. in a state where hydrogen gas was introduced, and in the film forming chamber A 3, a silicon nitride film was formed using silane, ammonia and nitrogen gas. In chamber No. 4, an amorphous silicon film was sequentially deposited using silane and hydrogen gas, and in the deposition chamber 5, an n+ amorphous silicon film was sequentially deposited using silane, phosphine, and hydrogen gas. After passing through such a film forming process, the substrate was sent to the cooling chamber 6 and returned to atmospheric pressure with nitrogen gas.

【0017】このようにして得られた窒化シリコン膜,
アモルファスシリコン膜,n+ アモルファスシリコン膜
からなる3層構造の半導体膜は、下のITO膜,ガラス
との密着性は良好で、ピンホール密度も1平方センチメ
ートル当り0.02と小さい値を示した。膜の深さ方向
の2次イオン質量分析からITO膜と窒化シリコン膜の
間にはレジストは検出されず、表面処理室1でレジスト
が除去されていることも確認された。また、表面処理室
1で処理したのち基板を取り出して基板表面の1μm以
上のパーティクル数を調べたところ200mm平方内で
5個以下と良好な状態であることがわかった。
The silicon nitride film thus obtained,
The semiconductor film having a three-layer structure composed of the amorphous silicon film and the n + amorphous silicon film had good adhesion to the underlying ITO film and glass, and the pinhole density was a small value of 0.02 per 1 cm 2. From the secondary ion mass spectrometry in the depth direction of the film, no resist was detected between the ITO film and the silicon nitride film, and it was also confirmed that the resist was removed in the surface treatment chamber 1. Further, when the substrate was taken out after the treatment in the surface treatment chamber 1 and the number of particles of 1 μm or more on the substrate surface was examined, it was found to be in a favorable state of 5 or less within a 200 mm square.

【0018】本実施例では表面処理室1における処理対
象としてレジスト灰化を例にとったが、基板の洗浄即
ち、基板表面の有機汚染物の除去処理に対しても当然な
がら有効である。また、図1では、連続3層のプラズマ
化学気相堆積を例にとって、成膜室を成膜室甲3,成膜
室乙4,成膜室丙5の3つとしたがこれらの代わりにス
パッタリング室とした場合でも本発明は無論有効であ
る。
In this embodiment, resist ashing is taken as an example of the processing target in the surface processing chamber 1, but it is naturally effective for cleaning the substrate, that is, for removing organic contaminants on the substrate surface. Further, in FIG. 1, the example of continuous three-layer plasma-enhanced chemical vapor deposition is provided with three film forming chambers: film forming chamber A3, film forming chamber B4, and film forming chamber H5, but instead of these, sputtering is performed. The present invention is of course effective even in the case of a room.

【0019】図3は本発明の半導体製造装置の他の実施
例を示す図である。図1では、表面処理室1と真空加熱
室2とは直接接続させた例を示したが、例えば図3に示
すように、表面処理室1と真空加熱室2がトレーリター
ン搬送室18を介して接続されるような装置構成をとっ
ても本発明は有効である。
FIG. 3 is a diagram showing another embodiment of the semiconductor manufacturing apparatus of the present invention. FIG. 1 shows an example in which the surface treatment chamber 1 and the vacuum heating chamber 2 are directly connected, but as shown in FIG. 3, for example, the surface treatment chamber 1 and the vacuum heating chamber 2 are connected via a tray return transfer chamber 18. The present invention is effective even if the device configuration is such that they are connected together.

【0020】また、図面には示さないが、表面処理室に
おける基板表面側の加熱ランプと、低圧水銀ランプとを
2本ずつ交互に配列し、ランプの長さ,ワット数,ラン
プの数,基板構造,処理条件は前述の実施例と同じにし
て試みたところ、前述の実施例と同様、ITO膜と窒化
シリコン膜との間にはレジストは認められず、レジスト
除去から成膜まで連続的に処理できていることが確認さ
れた。
Although not shown in the drawing, two heating lamps and two low-pressure mercury lamps on the surface side of the substrate in the surface treatment chamber are alternately arranged, and the lamp length, wattage, number of lamps, substrate When the structure and the processing conditions were the same as those in the above-mentioned embodiment, no resist was observed between the ITO film and the silicon nitride film, and the resist was continuously removed until the film formation, as in the above-mentioned embodiment. It was confirmed that it was processed.

【0021】本発明は、このように成膜前に基板の汚染
を除去して成膜することによって良質なTFTを形成で
きる。また、本発明の表面処理は乾式で行なわれるた
め、湿式で行なわれるためのレジスト剥離液や洗浄液等
の薬液は必要とせず、廃液処理や薬液の交換等のわずら
わしさが低減されるという利点もある。
According to the present invention, a high quality TFT can be formed by removing the contamination of the substrate before forming the film. Further, since the surface treatment of the present invention is performed by a dry method, there is no need for a chemical solution such as a resist stripping solution or a cleaning solution to be performed by a wet method, and there is an advantage that troublesomeness such as waste solution processing and chemical solution exchange is reduced. is there.

【0022】[0022]

【発明の効果】以上説明したように本発明は、レジスト
あるいは有機汚染物質の除去する表面処理室と成膜する
室とを連結し、表面の汚染除去工程と成膜工程とを連続
して行うことが出来るので、工程間での基板移し替えに
伴うパーティクル汚染を低減させるという効果が得られ
る。例えば、従来技術では、基板洗浄後、10分間クラ
ス100のクリーンルーム内で基板を放置した場合、1
μm以上のパーティクルが200mm平方あたり20個
程度の増加がみられたが、本発明では表面処理と成膜と
を連続的に行うことができるため基板表面へのパーティ
クル付着は殆んど皆無である。このため、液晶パネル用
TFT製造において、高品質の半導体膜を形成できTF
T製造における高歩留化に大きく寄与する。
As described above, according to the present invention, the surface treatment chamber for removing the resist or the organic pollutant is connected to the film forming chamber, and the surface decontaminating process and the film forming process are continuously performed. Therefore, it is possible to obtain an effect of reducing particle contamination due to substrate transfer between steps. For example, in the prior art, if the substrate is left in a class 100 clean room for 10 minutes after cleaning the substrate,
The number of particles having a size of μm or more increased by about 20 per 200 mm square, but since the surface treatment and the film formation can be continuously performed in the present invention, there is almost no particle adhesion to the substrate surface. .. Therefore, in manufacturing TFTs for liquid crystal panels, it is possible to form high-quality semiconductor films.
This greatly contributes to higher yield in T manufacturing.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の半導体製造装置の一実施例における構
成を示す図である。
FIG. 1 is a diagram showing a configuration of an embodiment of a semiconductor manufacturing apparatus of the present invention.

【図2】図1の表面処理室の構成を示し、(a)は平面
的に示す図、(b)はA−A断面図である。
2A and 2B show the structure of the surface treatment chamber in FIG. 1, in which FIG. 2A is a plan view and FIG. 2B is a sectional view taken along line AA.

【図3】本発明の半導体製造装置の他の実施例を示す図
である。
FIG. 3 is a diagram showing another embodiment of the semiconductor manufacturing apparatus of the present invention.

【符号の説明】[Explanation of symbols]

1 表面処理室 2 真空加熱室 3 成膜室甲 4 成膜室乙 5 成膜室丙 6 冷却室 7 加熱ランプ 8 トレー 9 反射板 10 オゾン散布管 11 低圧水銀ランプ 12 不活性ガス散布管 13 オゾン酸素混合ガス 14 トレー支持体 15 基板 16 排気ガス 17 排気管 18 トレーリターン搬送室 1 Surface Treatment Room 2 Vacuum Heating Room 3 Film Forming Room A 4 Film Forming Room B 5 Film Forming Room 6 Cooling Room 7 Heating Lamp 8 Tray 9 Reflector 10 Ozone Dispersion Tube 11 Low Pressure Mercury Lamp 12 Inert Gas Dispersion Tube 13 Ozone Oxygen mixed gas 14 Tray support 15 Substrate 16 Exhaust gas 17 Exhaust pipe 18 Tray return transfer chamber

Claims (2)

Translated fromJapanese
【特許請求の範囲】[Claims]【請求項1】 基板表面のレジストおよび有機汚染物質
を除去する表面処理室と表面処理後真空に排気し前記基
板を膜形成温度に加熱する真空加熱室を介して成膜室と
を直結し、基板を搭載するトレーを移動させることで表
面汚染除き、加熱及び成膜を連続的に行なうことを特徴
とする半導体製造装置。
1. A surface treatment chamber for removing the resist and organic contaminants on the surface of the substrate and a film formation chamber are directly connected to each other through a vacuum heating chamber for evacuating to vacuum after the surface treatment and heating the substrate to a film forming temperature. A semiconductor manufacturing apparatus characterized in that heating and film formation are continuously performed by removing a surface contamination by moving a tray on which a substrate is mounted.
【請求項2】 前記表面処理室は、前記トレーに載置さ
れる複数の第1の加熱ランプと、基板表面側に配置され
る複数の第2の加熱ランプおよび反射板からなる基板加
熱機構と、前記基板表面側にある前記第2の加熱ランプ
と一定の間隔で交互に配置された低圧水銀ランプおよび
反射板からなる紫外線照射機構と、前記基板表面に平行
方向にオゾンを散布するオゾン散布管と、後段にあって
不活性ガスを散布する不活性ガス散布管と、前記トレー
を所定の速度で搬送するトレー移動機構とを備えること
を特徴とする第1項記載の半導体製造装置。
2. The surface treatment chamber includes a plurality of first heating lamps mounted on the tray, a substrate heating mechanism including a plurality of second heating lamps arranged on the front surface side of the substrate, and a reflecting plate. An ultraviolet irradiation mechanism comprising a low-pressure mercury lamp and a reflector, which are alternately arranged at a constant interval with the second heating lamp on the substrate surface side, and an ozone spray tube for spraying ozone in a direction parallel to the substrate surface. 2. The semiconductor manufacturing apparatus according to claim 1, further comprising: an inert gas sprinkling pipe in a subsequent stage for sparging an inert gas; and a tray moving mechanism for conveying the tray at a predetermined speed.
JP8014892A1992-04-021992-04-02Semiconductor manufacturing deviceWithdrawnJPH05283346A (en)

Priority Applications (1)

Application NumberPriority DateFiling DateTitle
JP8014892AJPH05283346A (en)1992-04-021992-04-02Semiconductor manufacturing device

Applications Claiming Priority (1)

Application NumberPriority DateFiling DateTitle
JP8014892AJPH05283346A (en)1992-04-021992-04-02Semiconductor manufacturing device

Publications (1)

Publication NumberPublication Date
JPH05283346Atrue JPH05283346A (en)1993-10-29

Family

ID=13710205

Family Applications (1)

Application NumberTitlePriority DateFiling Date
JP8014892AWithdrawnJPH05283346A (en)1992-04-021992-04-02Semiconductor manufacturing device

Country Status (1)

CountryLink
JP (1)JPH05283346A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
DE19924058A1 (en)*1999-05-262000-11-30Bosch Gmbh RobertSurface decontamination apparatus, especially for organic contaminant removal from a structured silicon wafer or body, comprises an ozone reactor in which a structured body is heated during ozone exposure
KR100705722B1 (en)*2001-02-232007-04-09삼성전자주식회사 Deposition method of film in the manufacture of semiconductor device
KR100902912B1 (en)*2006-06-262009-06-15어플라이드 머티어리얼스, 인코포레이티드Apparatus and method for curing a workpiece and pump liner thereof
JP2016044347A (en)*2014-08-262016-04-04株式会社東芝Film deposition apparatus

Cited By (4)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
DE19924058A1 (en)*1999-05-262000-11-30Bosch Gmbh RobertSurface decontamination apparatus, especially for organic contaminant removal from a structured silicon wafer or body, comprises an ozone reactor in which a structured body is heated during ozone exposure
KR100705722B1 (en)*2001-02-232007-04-09삼성전자주식회사 Deposition method of film in the manufacture of semiconductor device
KR100902912B1 (en)*2006-06-262009-06-15어플라이드 머티어리얼스, 인코포레이티드Apparatus and method for curing a workpiece and pump liner thereof
JP2016044347A (en)*2014-08-262016-04-04株式会社東芝Film deposition apparatus

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