【０００１】[0001]
【産業上の利用分野】本発明は、複数の電子部品を実装
する電子回路実装基板、特に、その電源供給手段に特徴
を有する電子回路実装基板に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic circuit mounting board on which a plurality of electronic components are mounted, and more particularly to an electronic circuit mounting board characterized by its power supply means.
【０００２】近年のコンピュータシステムの高速化に伴
い、電子回路実装基板に実装された電子部品相互間の信
号伝達遅延を短縮することが要求されている。その要求
に応えて、電子部品間の相互の距離を短縮するために、
電子部品を高密度で実装する必要がある。With the recent increase in speed of computer systems, it has been required to reduce the signal transmission delay between electronic components mounted on an electronic circuit mounting board. In order to meet the demand and shorten the mutual distance between electronic parts,
It is necessary to mount electronic parts in high density.
【０００３】[0003]
【従来の技術】従来の多層構造体を有する電子回路実装
基板においては、実装している電子部品に電源を供給す
る手段として最上層の配線層に形成された接続用パッド
（電極）と下層に形成された電源用配線層の間を層間接
続手段（Ｖｉａ）によって接続し、必要に応じて下層の
電源用配線層から再びＶｉａを通して最上層に実装され
た電子部品に電源を供給していた。2. Description of the Related Art In a conventional electronic circuit mounting board having a multilayer structure, a connecting pad (electrode) formed on the uppermost wiring layer and a lower layer are used as means for supplying power to mounted electronic components. The formed power supply wiring layers are connected to each other by an interlayer connecting means (Via), and power is supplied from the lower power supply wiring layer to the electronic component mounted on the uppermost layer through Via again as needed.
【０００４】図４は、従来の電子回路実装基板の構成図
である。この図において、４１は支持基板、４２は絶縁
層、４３は電源用配線層、４４は信号用配線層、４５は
Ｖｉａ、４６は電源接続用パッド、４７は信号接続用パ
ッド、４８は電子部品、４９はボールバンプである。FIG. 4 is a block diagram of a conventional electronic circuit mounting board. In this figure, 41 is a support substrate, 42 is an insulating layer, 43 is a power supply wiring layer, 44 is a signal wiring layer, 45 is Via, 46 is a power supply connection pad, 47 is a signal connection pad, and 48 is an electronic component. , 49 are ball bumps.
【０００５】この従来の電子回路実装基板においては、
この図に示されているように、支持基板４１の上に絶縁
層４２、電源用配線層４３を交互に形成し、その上に信
号用配線層４４を絶縁層を介して必要な層数だけ形成し
て多層配線構造体を構成し、これらの電源用配線層４３
および信号用配線層４４から最上層の絶縁層の表面まで
Ｖｉａ４５によって導出し、このＶｉａ４５の頂部に電
子部品４８をボールバンプ４９によって接続し実装して
いる。In this conventional electronic circuit mounting board,
As shown in this figure, the insulating layers 42 and the power supply wiring layers 43 are alternately formed on the support substrate 41, and the signal wiring layers 44 are formed on the insulating layers 42 by the required number of layers. To form a multi-layered wiring structure, and these power supply wiring layers 43
Further, the signal wiring layer 44 is led to the surface of the uppermost insulating layer by the Via 45, and the electronic component 48 is connected and mounted on the top of the Via 45 by the ball bump 49.
【０００６】そして、多層配線構造体の最上層の配線層
の外端部に信号接続用パッド４７と電源接続用パッド４
６を形成し、電源接続用パッド４６と最下層に配置され
ている電源用配線層４３の間をＶｉａ４５によって接続
し、この電源用配線層４３から多層配線構造体の最上層
に実装されている電子部品４８に電源を供給するように
なっている。The signal connection pad 47 and the power supply connection pad 4 are provided at the outer end of the uppermost wiring layer of the multilayer wiring structure.
6 is formed, the power supply connection pad 46 and the power supply wiring layer 43 arranged at the lowermost layer are connected by Via 45, and the power supply wiring layer 43 is mounted on the uppermost layer of the multilayer wiring structure. Power is supplied to the electronic component 48.
【０００７】[0007]
【発明が解決しようとする課題】ところが、多数の電子
部品、あるいは大電力電子部品に電源を供給するために
は、大電流を供給するために数多くのＶｉａを設ける
か、または、大きなＶｉａを設ける必要が生じ、そのた
めに信号用の配線層を形成する面積が犠牲になって高集
積度実装が困難になっていた。However, in order to supply power to a large number of electronic parts or high-power electronic parts, a large number of Vias are provided to supply a large current, or a large Via is provided. Therefore, the area for forming the signal wiring layer is sacrificed, which makes it difficult to implement high integration.
【０００８】本発明は、大電流を供給することができ、
かつ、実装密度を高くして小型化し、信号の伝達速度を
高速化することができる電子回路実装基板を提供するこ
とを目的とする。The present invention can supply a large current,
Moreover, it is an object of the present invention to provide an electronic circuit mounting board that can increase the packaging density to reduce the size and increase the signal transmission speed.
【０００９】[0009]
【課題を解決するための手段】本発明にかかる、支持基
板上に、複数の電源用配線層と複数の信号用配線層が互
いに絶縁層によって絶縁された多層配線構造体が形成さ
れ、その上に複数の電子部品が実装され、電源用配線層
および信号用配線層と電子部品の間が必要に応じてＶｉ
ａによって接続される電子回路実装基板においては、こ
の支持基板自体を導電体とし、電源用配線層の背面から
電源を供給する構成を採用した。According to the present invention, a multi-layer wiring structure in which a plurality of power wiring layers and a plurality of signal wiring layers are insulated from each other by an insulating layer is formed on a supporting substrate, and a multilayer wiring structure is formed thereon. A plurality of electronic components are mounted on the wiring board, and a space between the power supply wiring layer and the signal wiring layer and the electronic component is connected to Vi as required.
In the electronic circuit mounting board connected by a, the supporting substrate itself is used as a conductor, and power is supplied from the back surface of the power supply wiring layer.
【００１０】また、この場合、支持基板自体が複数の電
源用配線層の一層を兼ねる構成を採用した。In this case, the support substrate itself also serves as one of the plurality of power supply wiring layers.
【００１１】[0011]
【作用】本発明のように、電子回路実装基板の支持基板
自体を導電体にすると、電源用配線層の背面から電源を
供給することができるため、従来の電子回路実装基板に
おいて必要であった上層の配線層の電源接続用パッドお
よびそのパッドと下層の電源配線層に接続するＶｉａの
数を減らして実装密度を向上することができ、さらに、
この支持基板自体を複数の電源用配線層の一層として用
いると、電源用配線層を一層減らすことができ、製造工
程の節減が可能になる。When the supporting substrate itself of the electronic circuit mounting board is made of a conductor as in the present invention, power can be supplied from the back surface of the power supply wiring layer, which is necessary in the conventional electronic circuit mounting board. The mounting density can be improved by reducing the number of power supply connection pads in the upper wiring layer and the number of Vias connected to the pads and the lower power supply wiring layer.
If this supporting substrate itself is used as one of the plurality of power supply wiring layers, the power supply wiring layer can be further reduced and the manufacturing process can be reduced.
【００１２】[0012]
【実施例】以下、本発明の実施例を説明する。 （第１実施例）図１は、第１実施例の電子回路実装基板
の構成説明図である。この図において、１は支持基板、
２は絶縁層、３は電源用配線層、４は信号用配線層、５
はＶｉａ、６は電源接続用パッド、７は信号接続用パッ
ド、８は電子部品、９はボールバンプである。EXAMPLES Examples of the present invention will be described below. (First Embodiment) FIG. 1 is an explanatory view of the configuration of an electronic circuit mounting board according to the first embodiment. In this figure, 1 is a support substrate,
2 is an insulating layer, 3 is a power wiring layer, 4 is a signal wiring layer, 5
Is Via, 6 is a power supply connection pad, 7 is a signal connection pad, 8 is an electronic component, and 9 is a ball bump.
【００１３】この第１実施例の電子回路実装基板におい
ては、支持基板１の上に絶縁層２と電源用配線層３を交
互に形成し、その上に信号用配線層４を絶縁層２によっ
て相互に絶縁して必要な層数だけ形成して多層配線構造
体を構成し、これらの電源用配線層３および信号用配線
層４から最上層の絶縁層の表面までＶｉａ５によって導
出し、このＶｉａ５の頂部に電子部品８をボールバンプ
９によって接続し実装している。In the electronic circuit mounting board of the first embodiment, the insulating layers 2 and the power supply wiring layers 3 are alternately formed on the support substrate 1, and the signal wiring layers 4 are formed on the insulating layers 2 by the insulating layer 2. A multilayer wiring structure is formed by mutually insulating and forming the required number of layers, and derived from the power wiring layer 3 and the signal wiring layer 4 to the surface of the uppermost insulating layer by the Via 5, and the Via 5 is used. The electronic component 8 is connected and mounted by ball bumps 9 on the top of the.
【００１４】そして、多層配線構造体の最上層の信号用
配線層の外端部に従来通り信号接続用パッド７を形成
し、下層に配置されている電源用配線層３から上方に延
びるＶｉａ５の頂部に電源接続用パッド６が形成されて
いる。Then, a signal connecting pad 7 is formed on the outer end portion of the uppermost signal wiring layer of the multilayer wiring structure in the conventional manner, and the via 5 extending upward from the power supply wiring layer 3 arranged below is formed. A power supply connection pad 6 is formed on the top.
【００１５】本発明においては、支持基板１自体が導電
体で形成されている。そして、これらの信号用配線層は
細条状である場合が多いが、電源用配線層の方は、細条
状導電体で形成することもでき、電流容量を大きくする
ために広い面積を有する導電体薄層や薄板、あるいは、
金属網で形成することもできる。In the present invention, the supporting substrate 1 itself is made of a conductor. In many cases, these signal wiring layers are strip-shaped, but the power supply wiring layer can also be formed of strip-shaped conductors, and has a large area to increase the current capacity. Conductor thin layer or sheet, or
It can also be formed of a metal net.
【００１６】図２は、第１実施例の電子回路実装基板パ
ッケージの構成説明図である。この図における符号は、
１０がパッケージ基板、１１が導電体層、１２が入出力
端子、１３が接続線、１４はパッケージ蓋体であるほか
は、図１において同符号を付して説明したものと同様で
ある。FIG. 2 is an explanatory view of the structure of the electronic circuit mounting board package of the first embodiment. The symbols in this figure are
10 is a package substrate, 11 is a conductor layer, 12 is an input / output terminal, 13 is a connection line, and 14 is a package lid, and is the same as that described with the same reference numerals in FIG.
【００１７】この電子回路実装基板パッケージは、前記
のように、支持基板１の上に形成した多層配線構造体に
複数の電子部品８を組み立てた電子回路実装基板をパッ
ケージ基板１０の上の導電体層１１に固着し、電子回路
実装基板の信号接続用パッド７と、パッケージ用基板１
０の周辺に形成され、外側に入出力端子１２がろう付け
されている導電体層１１の間を接続線１３によって接続
し、電源用配線層３の一つを支持基板１から導電体層１
１を経て入出力端子１２に接続し、電子回路実装基板全
体を覆うようにパッケージ蓋体１４を接着して構成され
る。In this electronic circuit mounting board package, as described above, the electronic circuit mounting board in which a plurality of electronic components 8 are assembled on the multilayer wiring structure formed on the support substrate 1 is formed on the package substrate 10 by a conductor. The signal connection pad 7 of the electronic circuit mounting substrate and the package substrate 1 fixed to the layer 11
0 and the input / output terminals 12 are brazed on the outer sides of the conductor layers 11 which are connected to each other by connecting lines 13, and one of the power supply wiring layers 3 is connected from the support substrate 1 to the conductor layer 1.
1 is connected to the input / output terminal 12 and the package lid 14 is bonded so as to cover the entire electronic circuit mounting board.
【００１８】この実施例によると、図１に示したよう
に、多層配線構造体の下層に配置される電源用配線層３
の一つに電源接続用パッドを用いることなく、直接支持
基板１からも電源を供給することができ、信号用配線層
４の電極と分離することができるため、従来より電源用
配線層と接続するＶｉａの数を減らすことができ、その
結果信号用配線層を形成することができる多層配線構造
体中の有効面積が増加し、電子部品の高密度化が可能に
なり、この種の電子回路実装基板を用いるコンピュータ
システムの小型化、高速化が実現できる。According to this embodiment, as shown in FIG. 1, the power supply wiring layer 3 disposed under the multilayer wiring structure.
Since power can be directly supplied from the supporting substrate 1 without using a power supply connection pad for one of them, and it can be separated from the electrode of the signal wiring layer 4, it has been connected to the power supply wiring layer conventionally. It is possible to reduce the number of vias, and as a result, the effective area in the multilayer wiring structure in which the signal wiring layer can be formed is increased, and the density of electronic components can be increased. A computer system using a mounting board can be downsized and speeded up.
【００１９】（第２実施例）図３は、第２実施例の電子
回路実装基板の構成説明図である。この図において、２
１は支持基板、２２は絶縁層、２３は電源用配線層、２
４は信号用配線層、２５はＶｉａ、２６は電源接続用パ
ッド、２７は信号接続用パッド、２８はボールバンプ、
２９は電子部品である。(Second Embodiment) FIG. 3 is an explanatory view of the configuration of an electronic circuit mounting board of the second embodiment. In this figure, 2
1 is a support substrate, 22 is an insulating layer, 23 is a power supply wiring layer, 2
4 is a signal wiring layer, 25 is Via, 26 is a power supply connection pad, 27 is a signal connection pad, 28 is a ball bump,
Reference numeral 29 is an electronic component.
【００２０】この第２実施例の電子回路実装基板におい
ては、支持基板２１の上に絶縁層２２を介して電源用配
線層２３を形成し、その上に信号用配線層２４を絶縁層
２２によって相互に絶縁して必要な層数だけ形成して多
層配線構造体を構成し、これらの支持基板２１と電源用
配線層２３、および、信号用配線層２４から最上層の絶
縁層の表面までＶｉａ２５によって導出し、このＶｉａ
２５の頂部に電子部品２９をボールバンプ２８によって
接続して実装している。In the electronic circuit mounting board of the second embodiment, the power supply wiring layer 23 is formed on the support substrate 21 via the insulating layer 22, and the signal wiring layer 24 is formed thereon by the insulating layer 22. A multilayer wiring structure is formed by mutually insulating and forming a required number of layers. Via 25 from these supporting substrate 21, power supply wiring layer 23, and signal wiring layer 24 to the surface of the uppermost insulating layer. Derived by this Via
An electronic component 29 is mounted on the top of 25 by connecting with a ball bump 28.
【００２１】この実施例においては、支持基板２１自体
が導電体であって、一つの電源用配線層を兼ねているた
め、電源接続用パッド２６と支持基板２１の間に電源を
経て電源を供給することができる。信号用配線層２４は
別途信号接続用パッド２７を経て外部に接続されるよう
になっている。In this embodiment, since the support substrate 21 itself is a conductor and also serves as one power supply wiring layer, power is supplied between the power supply connection pad 26 and the support substrate 21 via the power supply. can do. The signal wiring layer 24 is separately connected to the outside via a signal connection pad 27.
【００２２】この実施例の電子回路実装基板をパッケー
ジに収容した電子モジュールを完成する手段は第１実施
例において説明したものと同様である。The means for completing the electronic module in which the electronic circuit mounting board of this embodiment is housed in the package is the same as that described in the first embodiment.
【００２３】この実施例によると、第１実施例による効
果のほかに、支持基板１と電源用配線層３を兼用するこ
とにより、総合的な配線層数を減らすことができ、基板
の製造コストの低減が可能になる。According to this embodiment, in addition to the effect of the first embodiment, by using the supporting substrate 1 and the power supply wiring layer 3 in common, the total number of wiring layers can be reduced, and the manufacturing cost of the substrate can be reduced. Can be reduced.
【００２４】[0024]
【発明の効果】以上説明したように、本発明によると、
電源を供給する際に、従来のように電子回路実装基板上
の電源接続用パッドから、Ｖｉａを通して電源配線層に
電源を供給するだけでなく、直接支持基板から電源用配
線層に電源を供給するため、基板上におけるＶｉａの数
を減らすことができ、その面積を信号用配線層を形成す
る領域として使用可能となる効果を奏し、その結果基板
を小型化でき、これを使用したコンピュータシステムの
小型化、高速化に寄与するほか、支持基板を電源用配線
層として利用することにより、総合的な配線層数を減ら
すことが可能になり、基板の製造コストを低減すること
ができる。As described above, according to the present invention,
When supplying power, not only the power is supplied from the power supply connection pad on the electronic circuit mounting substrate to the power supply wiring layer through the via as in the conventional case, but also the power is directly supplied from the supporting substrate to the power supply wiring layer. Therefore, the number of Vias on the substrate can be reduced, and the area can be used as a region for forming a signal wiring layer. As a result, the substrate can be downsized, and a computer system using this can be downsized. By using the supporting substrate as a power supply wiring layer, the total number of wiring layers can be reduced, and the manufacturing cost of the substrate can be reduced.
【図１】第１実施例の電子回路実装基板の構成説明図で
ある。FIG. 1 is an explanatory diagram of a configuration of an electronic circuit mounting board according to a first embodiment.
【図２】第１実施例の電子回路実装基板パッケージの構
成説明図である。FIG. 2 is a configuration explanatory view of an electronic circuit mounting board package of the first embodiment.
【図３】第２実施例の電子回路実装基板の構成説明図で
ある。FIG. 3 is a configuration explanatory view of an electronic circuit mounting board of a second embodiment.
【図４】従来の電子回路実装基板の構成図である。FIG. 4 is a configuration diagram of a conventional electronic circuit mounting board.
１ 支持基板 ２ 絶縁層 ３ 電源用配線層 ４ 信号用配線層 ５ Ｖｉａ ６ 電源接続用パッド ７ 信号接続用パッド ８ 電子部品 ９ ボールバンプ １０ パッケージ基板 １１ 導電体層 １２ 入出力端子 １３ 接続線 １４ パッケージ蓋体 1 Support Substrate 2 Insulating Layer 3 Power Supply Wiring Layer 4 Signal Wiring Layer 5 Via 6 Power Supply Connection Pad 7 Signal Connection Pad 8 Electronic Component 9 Ball Bump 10 Package Substrate 11 Conductor Layer 12 Input / Output Terminal 13 Connection Wire 14 Package Lid
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP30892791AJPH05152505A (en) | 1991-11-25 | 1991-11-25 | Electronic circuit mounting board |
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP30892791AJPH05152505A (en) | 1991-11-25 | 1991-11-25 | Electronic circuit mounting board |
| Publication Number | Publication Date |
|---|---|
| JPH05152505Atrue JPH05152505A (en) | 1993-06-18 |
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP30892791AWithdrawnJPH05152505A (en) | 1991-11-25 | 1991-11-25 | Electronic circuit mounting board |
| Country | Link |
|---|---|
| JP (1) | JPH05152505A (en) |
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
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