【0001】0001
【産業上の利用分野】この発明は、プラズマ処理装置に
係り、特に半導体素子基板をプラズマによりエッチング
処理するのに好適なプラズマ処理装置に関するものであ
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma processing apparatus, and more particularly to a plasma processing apparatus suitable for etching a semiconductor element substrate using plasma.
【0002】0002
【従来の技術】図2は従来のプラズマ処理装置の概略断
面図であり、まずこの図を用いて概略的なプラズマ処理
について説明する。1は処理室で、高真空状態に保たれ
ている。2は上電極で、その下面には上部電極板3が締
付ネジ(材質はアルミナ等)4により締付固定され、導
通面5により電気的に通電できる構造になっている。6
は上電極2に設けられた処理ガス供給孔、7は上部電極
板3にあけられた多数の処理ガス吹出孔である。8は上
記上電極2と並行かつ一定間隔を保って配置された下電
極で、その上に半導体ウエハ9を載置し、アルミナ等の
絶縁物からなるウエハ押え10で圧力変動等により動か
ないようにしている。この下電極8には同軸ケーブル1
1を介して高周波電源12が接続されている。2. Description of the Related Art FIG. 2 is a schematic sectional view of a conventional plasma processing apparatus, and first, a schematic plasma processing will be explained using this diagram. 1 is a processing chamber which is kept in a high vacuum state. Reference numeral 2 denotes an upper electrode, on the lower surface of which an upper electrode plate 3 is fastened and fixed with a tightening screw 4 (made of alumina or the like), and has a structure in which electrical current can be passed through a conductive surface 5. 6
7 is a processing gas supply hole provided in the upper electrode 2, and 7 is a large number of processing gas blowing holes provided in the upper electrode plate 3. Reference numeral 8 denotes a lower electrode arranged in parallel with the upper electrode 2 and at a constant interval. A semiconductor wafer 9 is placed on top of the lower electrode 8, and the wafer holder 10 made of an insulating material such as alumina is used to prevent the wafer from moving due to pressure fluctuations, etc. I have to. This lower electrode 8 has a coaxial cable 1
A high frequency power source 12 is connected via 1.
【0003】次に動作について説明する。上電極2を接
地した状態で高周波電源12を印加すると、上電極2と
下電極8との間にプラズマが生成され、これにより処理
ガスのイオンが活性化され、半導体ウエハ9表面に到達
し、反応生成物を発生させながら半導体ウエハ表面のパ
ターンを垂直にエッチングしていく。Next, the operation will be explained. When the high frequency power supply 12 is applied with the upper electrode 2 grounded, plasma is generated between the upper electrode 2 and the lower electrode 8, which activates the ions of the processing gas and reaches the surface of the semiconductor wafer 9. Patterns on the surface of a semiconductor wafer are vertically etched while generating reaction products.
【0004】ところでこの際、エッチングにより発生す
る反応生成物が処理室1内に堆積物として付着し、この
堆積物が発塵源となるので、エッチング終了時に半導体
ウエハ9のダミーを下電極8に載置し、クリーニング用
の処理ガスをエッチング時と類似のシーケンスでプラズ
マを生成させ、処理室1内の堆積物を除去し(これをプ
ラズマクリーニングという)、処理室1内をクリーンな
状態にして、再び半導体ウエハ9のエッチングを行なう
のが通常である。By the way, at this time, reaction products generated by etching adhere as deposits in the processing chamber 1, and these deposits become a source of dust. The processing gas for cleaning is used to generate plasma in a sequence similar to that during etching, to remove deposits inside the processing chamber 1 (this is called plasma cleaning), and to keep the inside of the processing chamber 1 in a clean state. , the semiconductor wafer 9 is usually etched again.
【0005】図3は上電極2と上部電極板3との取付状
態を示す部分拡大断面図であり、Al,SUS等の導電
体からなる上部電極板3の表面はプラズマに直接露呈し
ているので、高周波通電面を除いてアルミナ等の絶縁膜
13を被覆し、プラズマによるスパッタを防いでいる。この絶縁膜13はアルミナ粒をプラズマ溶射法(詳細は
省略)で形成されるが、処理ガス吹出孔7は垂直な形状
のため、吹出孔内面7aにプラズマ溶射が回りきらず、
このため充分に被覆されていない。FIG. 3 is a partially enlarged sectional view showing how the upper electrode 2 and the upper electrode plate 3 are attached, and the surface of the upper electrode plate 3 made of a conductive material such as Al or SUS is directly exposed to plasma. Therefore, an insulating film 13 made of alumina or the like is coated except for the high-frequency current-carrying surface to prevent sputtering caused by plasma. This insulating film 13 is formed using alumina grains by a plasma spraying method (details are omitted), but because the processing gas outlet 7 has a vertical shape, the plasma spray does not reach the inner surface 7a of the outlet.
Therefore, it is not sufficiently covered.
【0006】[0006]
【発明が解決しようとする課題】以上のように従来のも
のでは、プラズマに直接露呈されている部分、この場合
特に上部電極板3の処理ガス吹出孔7の内面については
充分にアルミナ絶縁膜が被覆されず、従ってプラズマに
露呈されると、プラズマ発生時にスパッタされ、このス
パッタ物はプラズマ処理時に処理室内に付着した反応生
成物の堆積物中に取りこまれてしまう。処理室内に付着
した堆積物は、プラズマクリーニングにより除去される
が、しかし堆積物中に取りこまれたスパッタ物(例えば
アルミニューム)は除去されずに残存し、これが発塵源
となるという問題があった。[Problems to be Solved by the Invention] As described above, in the conventional device, the alumina insulating film is not sufficiently formed on the portion directly exposed to plasma, in this case especially on the inner surface of the processing gas blowing hole 7 of the upper electrode plate 3. If it is not coated and therefore exposed to plasma, it will be sputtered when plasma is generated, and this sputtered material will be incorporated into the deposit of reaction products deposited in the processing chamber during plasma processing. Deposits that have adhered to the inside of the processing chamber are removed by plasma cleaning, but sputtered materials (for example, aluminum) that have been incorporated into the deposits remain without being removed, and this poses the problem of becoming a source of dust. there were.
【0007】この発明は上記のような問題点を解消する
ためになされたもので、上部電極板表面をアルミナ膜で
完全に被覆し、装置の低発塵化を図ることを目的とする
。The present invention was made to solve the above-mentioned problems, and its object is to completely cover the surface of the upper electrode plate with an alumina film, thereby reducing dust generation in the device.
【0008】[0008]
【課題を解決するための手段】この発明に係るプラズマ
処理装置は、上部電極板の処理ガス吹出孔の形状を、両
面からテーパ形状に形成して、吹出孔内面に真直面が小
さい構造にする事により、垂直方向にとんでくるアルミ
ナ粒を上部電極板の両面からプラズマ溶謝したとき吹出
孔内面にも充分に付着するようにしたものである。[Means for Solving the Problems] In the plasma processing apparatus according to the present invention, the shape of the processing gas blow-off hole of the upper electrode plate is formed into a tapered shape from both sides, so that the inner surface of the blow-off hole has a small direct surface. Therefore, when the alumina grains flying in the vertical direction are plasma-melted from both sides of the upper electrode plate, they are sufficiently attached to the inner surface of the blow-off hole.
【0009】[0009]
【作用】この発明においては、ガス吹出孔の形状を両面
からテーパ状に形成し、吹出孔内面に真直面が小さい構
造にする事によりプラズマに直接露呈されているAl,
SUS等の材質からなる上記電極板の表面はアルミナ膜
で完全に被覆されるので、プラズマ発生中に上記電極板
のAl,SUS等がスパッタされることがなく、プラズ
マクリーニングによって除去できないスパッタ物が処理
室内に付着した堆積物に取りこまれることがなくなる。このためプラズマクリーニング後の発塵源となる残存物
が少なくなり、発塵を防止できる。[Operation] In this invention, the shape of the gas outlet is tapered from both sides, and the inner surface of the outlet has a structure with a small face directly, so that the Al directly exposed to the plasma,
Since the surface of the electrode plate made of a material such as SUS is completely covered with an alumina film, the Al, SUS, etc. of the electrode plate are not sputtered during plasma generation, and sputtered substances that cannot be removed by plasma cleaning are prevented. It will no longer be taken in by the deposits that have adhered to the inside of the processing chamber. Therefore, the amount of residue that becomes a source of dust generation after plasma cleaning is reduced, and dust generation can be prevented.
【0010】0010
【実施例】以下この発明の一実施例を図1により説明す
る。なおガス吹出孔7部分を除き全体のプラズマ処理装
置は図2と同じ構造であるので説明は省略する。図1は
図3に対応する図で、上部電極板3にあけられたガス吹
出孔7は7a,7bのように中へいくに従って狭い形で
両面からテーパ状に形成され、アルミナの絶縁膜13が
充分にガス吹出孔の内部まで被覆されるようにしている
。5は導通面で上電極2とAl,SUS等からなる上部
電極3材と電気的に導通している。[Embodiment] An embodiment of the present invention will be described below with reference to FIG. Note that the entire plasma processing apparatus has the same structure as that in FIG. 2 except for the gas blow-off hole 7 portion, so a description thereof will be omitted. FIG. 1 is a diagram corresponding to FIG. 3, in which the gas blowing holes 7 formed in the upper electrode plate 3 are formed in a tapered shape from both sides, narrowing toward the inside like 7a and 7b. The inside of the gas outlet is sufficiently covered. 5 is a conductive surface that is electrically connected to the upper electrode 2 and the upper electrode 3 made of Al, SUS, or the like.
【0011】この装置を用いてプラズマ処理を行なうと
、上部電極3母材のAl,SUS等がプラズマに直接露
呈されないので、スパッタされることが少なくなり、前
述で説明したようにAl,SUS等のスパッタ物が処理
室内に付着した堆積物が取り込まれることがなくなり、
プラズマクリーニング後の発塵源となる残存物が少なく
なり、発塵が防止できる。When plasma processing is performed using this apparatus, the base material of the upper electrode 3 such as Al, SUS, etc. is not directly exposed to the plasma, so sputtering is reduced, and as explained above, the Al, SUS, etc. This prevents the deposits of sputtered matter from being taken into the processing chamber.
The amount of residue that becomes a source of dust generation after plasma cleaning is reduced, and dust generation can be prevented.
【0012】なお上記実施例では、並行平板のプラズマ
エッチング装置について説明したが、スパッタ装置、プ
ラズマCVD装置にも適用できるのは当然である。[0012] In the above embodiment, a parallel plate plasma etching apparatus has been described, but it goes without saying that the present invention can also be applied to a sputtering apparatus and a plasma CVD apparatus.
【0013】[0013]
【発明の効果】以上のようにこの発明によれば、簡単な
構成にてプラズマクリーニング後の残存物を低減させる
ことができ、従って低発塵化が達成され、半導体デバイ
スの歩留りの向上に寄与し得る効果がある。[Effects of the Invention] As described above, according to the present invention, it is possible to reduce the amount of residue after plasma cleaning with a simple configuration, thereby achieving low dust generation, which contributes to improving the yield of semiconductor devices. There is a potential effect.
【図1】この発明の一実施例を示すもので、上部電極を
上電極に取付けた状態を示す部分拡大断面図である。FIG. 1 shows an embodiment of the present invention, and is a partially enlarged sectional view showing a state in which an upper electrode is attached to the upper electrode.
【図2】従来のプラズマ処理装置全体の概略的な断面図
である。FIG. 2 is a schematic cross-sectional view of the entire conventional plasma processing apparatus.
【図3】従来例における上部電極板を上電極に取付けた
状態を示す部分拡大断面図である。FIG. 3 is a partially enlarged sectional view showing a conventional example in which an upper electrode plate is attached to an upper electrode.
1 処理室2 上電極3 上部電極板7 処理ガス吹出孔7b,7c
テーパ面8 下電極9 半導体ウエハ13 絶縁膜1 Processing chamber 2 Upper electrode 3 Upper electrode plate 7 Processing gas blow-off holes 7b, 7c
Tapered surface 8 Lower electrode 9 Semiconductor wafer 13 Insulating film
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11094691AJPH04316325A (en) | 1991-04-15 | 1991-04-15 | plasma processing equipment |
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11094691AJPH04316325A (en) | 1991-04-15 | 1991-04-15 | plasma processing equipment |
| Publication Number | Publication Date |
|---|---|
| JPH04316325Atrue JPH04316325A (en) | 1992-11-06 |
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11094691APendingJPH04316325A (en) | 1991-04-15 | 1991-04-15 | plasma processing equipment |
| Country | Link |
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| JP (1) | JPH04316325A (en) |
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| JP2012060101A (en)* | 2010-08-12 | 2012-03-22 | Toshiba Corp | Gas supply member, plasma processing apparatus, and method for forming yttria-containing film |
| JP2013084997A (en)* | 2010-08-12 | 2013-05-09 | Toshiba Corp | Gas supply member, plasma processing apparatus, and formation method of yttria containing film |
| JP2014078755A (en)* | 2014-01-09 | 2014-05-01 | Tokyo Electron Ltd | Injector block |
| US20220351945A1 (en)* | 2021-04-21 | 2022-11-03 | Toto Ltd. | Semiconductor manufacturing apparatus member and semiconductor manufacturing apparatus |
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| US8920596B2 (en) | 2009-09-02 | 2014-12-30 | Tokyo Electron Limited | Plasma processing apparatus |
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| JP2012060101A (en)* | 2010-08-12 | 2012-03-22 | Toshiba Corp | Gas supply member, plasma processing apparatus, and method for forming yttria-containing film |
| JP2013084997A (en)* | 2010-08-12 | 2013-05-09 | Toshiba Corp | Gas supply member, plasma processing apparatus, and formation method of yttria containing film |
| JP2014078755A (en)* | 2014-01-09 | 2014-05-01 | Tokyo Electron Ltd | Injector block |
| US20220351945A1 (en)* | 2021-04-21 | 2022-11-03 | Toto Ltd. | Semiconductor manufacturing apparatus member and semiconductor manufacturing apparatus |
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