【発明の詳細な説明】〔産業上の利用分野〕この発明は、半導体集積回路バ・ンケージ内に吸熱作用
を有するオーム接触による金属対を備えた半導体集積回
路装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a semiconductor integrated circuit device having a metal pair in ohmic contact having heat absorbing action in a semiconductor integrated circuit package.
第３図および第４図は例えば［半導体ハンドブック（第
２版＞ ６０．８．２０オ一ム社発行」に示されるこの
種従来の半導体集積回路装置をそれぞれ示す斜視図であ
る。各図において、（１）は半導体集積回路チップ等が
封止された半導体集積回路、■はこの半導体集積回路（
１）の一部に形成された放熱フィンである。FIGS. 3 and 4 are perspective views respectively showing this kind of conventional semiconductor integrated circuit device as shown in, for example, "Semiconductor Handbook (2nd Edition> 60.8.20 Published by Oichi Publishing Co., Ltd."). , (1) is a semiconductor integrated circuit in which a semiconductor integrated circuit chip etc. is sealed, and ■ is this semiconductor integrated circuit (
1) is a heat dissipation fin formed in a part of.
上記のように構成された従来の半導体集積回路装置にお
いて、半導体集積回路（１）を動作させると、内部に封
止された半導体集積回路チップで発熱が起る。そして、
この発熱は放熱フィン（７）に伝達され外部に放出され
る。In the conventional semiconductor integrated circuit device configured as described above, when the semiconductor integrated circuit (1) is operated, heat is generated in the semiconductor integrated circuit chip sealed inside. and,
This heat generation is transmitted to the heat radiation fins (7) and released to the outside.
従来の半導体集積回路装置は以上のように構成されてい
るので、近年のように微細化、高集積化が進むに伴って
半導体集積回路チップの発熱量が増大し、この発熱量を
ｌｌ１１１！ｌｌ！するためには大きな放熱フィン（７
）が必要となり十分な実装密度が得られないと言う問題
点があった。Conventional semiconductor integrated circuit devices are configured as described above, and as miniaturization and higher integration have progressed in recent years, the amount of heat generated by semiconductor integrated circuit chips has increased. ll! In order to
), which caused the problem that sufficient packaging density could not be obtained.
この発明は上記のような問題点を解消するためにな門れ
たもので、放熱フィン−くしで１分な冷却が行え、十分
な実装密度が得られる半導体集積回路装置を得ることを
目的とするものである。This invention was developed in order to solve the above-mentioned problems, and its purpose is to provide a semiconductor integrated circuit device that can be cooled in one minute using a heat dissipation fin-comb and has sufficient packaging density. It is something to do.
この発明に係る半導体集積回路装置は、パッケージ＾に
オーム性接触による金属対を封止し、この金属対の接触
部に電流を流すようにしたものである。In the semiconductor integrated circuit device according to the present invention, a metal pair is sealed in an ohmic contact in a package, and a current is caused to flow through the contact portion of the metal pair.
この発明における半導体集積回路装置の金属対は、その
接触部に電流が流れることにより、吸熱作用をおこし、
パッケージ内を冷却する。The metal pair of the semiconductor integrated circuit device according to the present invention causes an endothermic action when a current flows through the contact portion,
Cool the inside of the package.
以下、この発明の一実施例を図について説明する。第１
図はこの発明の一実施例における半導体集積回路装置の
構成を示す断面図である０図において、（１１）はパッ
ケージ（１２）内に封止される半導体集積回路チップ、
（１３）はパッケージ（１２）の両端に設けられたリー
ド、（１４）はこのリード（１３）の−端と半導体集積
回路チップ（１’ｌ）とを接続するリードワイヤで、こ
れら半導体集積回路チップ（１１）、パッケージ（１２
）、リード（１３）およびリードワイヤ（１４）で半導
体集積回路（２０）を構成している。 （＋５）は異種
金属をオーム性接触により貼り合せた金属対で、半導体
集積回路チップ（１１）の下端に接して配設されており
、両金属の接触部に電流が流れるように内部配線されて
いる。An embodiment of the present invention will be described below with reference to the drawings. 1st
The figure is a cross-sectional view showing the configuration of a semiconductor integrated circuit device according to an embodiment of the present invention. In figure 0, (11) is a semiconductor integrated circuit chip sealed in a package (12);
(13) is a lead provided at both ends of the package (12), and (14) is a lead wire connecting the negative end of this lead (13) to the semiconductor integrated circuit chip (1'l). Chip (11), package (12)
), a lead (13), and a lead wire (14) constitute a semiconductor integrated circuit (20). (+5) is a metal pair made by bonding dissimilar metals together by ohmic contact, and is placed in contact with the lower end of the semiconductor integrated circuit chip (11), and is internally wired so that current flows through the contact portion of both metals. ing.
上記のように構成されたこの発明の一実施例における半
導体集積回路装置において、従来装置と同様に、半導体
集積回路袋ｆｉ （２０）を動作させると、内部に封止
された半導体集積回路チップ（１１）で発熱が起るが、
金属対（１５）にも同時に電流が流れているので、ベル
チェ効果により接触部で吸熱作用が起る。従って、金属
対（１５）の大きさおよび印加電圧を適当にすることに
より、半導体集積回路チップ（１１）で発熱される熱量
と同等の熱量を吸熱することが可能となり、半導体集積
回路（２０）の温度を適温に保つことができる。In the semiconductor integrated circuit device according to the embodiment of the present invention configured as described above, when the semiconductor integrated circuit bag fi (20) is operated as in the conventional device, the semiconductor integrated circuit chip sealed inside ( 11) causes fever,
Since current also flows through the metal pair (15) at the same time, heat absorption occurs at the contact portion due to the Beltier effect. Therefore, by appropriately adjusting the size and applied voltage of the metal pair (15), it becomes possible to absorb heat equivalent to the amount of heat generated by the semiconductor integrated circuit chip (11), and the semiconductor integrated circuit (20) temperature can be maintained at an appropriate temperature.
第２図はこの発明の他の実施例における半導体集積回路
装置の要部を示す断面図で、図に示すように金属対（＋
５）を半導体集積回路チップ（１１）の基板内に形成し
たものである。FIG. 2 is a sectional view showing the main parts of a semiconductor integrated circuit device according to another embodiment of the present invention.
5) is formed within the substrate of a semiconductor integrated circuit chip (11).
尚、上記一実施例では金属対（１５）を半導体集積回路
チップ（１１）の下端に接して配設したが、非接触に配
置しても良く、又、配置すべき位置は下端に限定される
ものではなくいかなる位置に配置しても同様の効果を奏
するものである。さらに、金属対（１５）は実装密度に
応じて複数個として配置位置を適当に選定すれば効果は
より増大する。In the above embodiment, the metal pair (15) is arranged in contact with the lower end of the semiconductor integrated circuit chip (11), but it may be arranged in a non-contact manner, and the position where it should be arranged is limited to the lower end. The same effect can be achieved no matter where it is placed. Furthermore, the effect will be further enhanced if a plurality of metal pairs (15) are arranged and their positions are appropriately selected depending on the mounting density.
以上のように、この発明によればパッケージ内にオーム
性接触による金属対を封止し、この金属の接触部に電流
を流すようにしたので、放熱フィン無くして十分な冷却
が行え、十分な実装密度が得られる半導体集積回路装置
を得ることができる。As described above, according to the present invention, a metal pair with ohmic contact is sealed in the package, and current is passed through the metal contact portion, so sufficient cooling can be achieved without the need for heat dissipation fins. A semiconductor integrated circuit device with high packaging density can be obtained.
第１図はこの発明の一実施一における半導体集積回路、
装置の構成を示す断面図、第２図はこの発明の他の実施
例における半導体集積回路装置の要部を示す断面図、第
３図および第４図は従来の半導体集、積回路装置をそれ
ぞれ示す斜視図である。図において、（１２）はパッケージ、（１５）は金属対
である。尚、各図中同一符号は同一または相当部分を示す。FIG. 1 shows a semiconductor integrated circuit according to one embodiment of the present invention.
FIG. 2 is a sectional view showing the main parts of a semiconductor integrated circuit device according to another embodiment of the present invention, and FIGS. 3 and 4 show conventional semiconductor integrated circuit devices and integrated circuit devices, respectively. FIG. In the figure, (12) is a package, and (15) is a metal pair. Note that the same reference numerals in each figure indicate the same or corresponding parts.
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2288236AJPH04162551A (en) | 1990-10-24 | 1990-10-24 | Semiconductor integrated circuit device |
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2288236AJPH04162551A (en) | 1990-10-24 | 1990-10-24 | Semiconductor integrated circuit device |
| Publication Number | Publication Date |
|---|---|
| JPH04162551Atrue JPH04162551A (en) | 1992-06-08 |
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2288236APendingJPH04162551A (en) | 1990-10-24 | 1990-10-24 | Semiconductor integrated circuit device |
| Country | Link |
|---|---|
| JP (1) | JPH04162551A (en) |
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5583372A (en)* | 1994-09-14 | 1996-12-10 | Micron Technology, Inc. | Adhesion enhanced semiconductor die for mold compound packaging |
| US6066514A (en)* | 1996-10-18 | 2000-05-23 | Micron Technology, Inc. | Adhesion enhanced semiconductor die for mold compound packaging |
| JP2007198718A (en)* | 2005-12-27 | 2007-08-09 | Toppan Printing Co Ltd | Temperature control method |
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5583372A (en)* | 1994-09-14 | 1996-12-10 | Micron Technology, Inc. | Adhesion enhanced semiconductor die for mold compound packaging |
| US5760468A (en)* | 1994-09-14 | 1998-06-02 | Micron Technology, Inc. | Adhesion enhanced semiconductor die for mold compound packaging |
| US6316292B1 (en) | 1994-09-14 | 2001-11-13 | Micron Technology Inc | Adhesion enhanced semiconductor die for mold compound packaging |
| US6489186B2 (en) | 1994-09-14 | 2002-12-03 | Micron Technology, Inc. | Adhesion enhanced semiconductor die for mold compound packaging |
| US6740545B2 (en) | 1994-09-14 | 2004-05-25 | Micron Technology, Inc. | Adhesion enhanced semiconductor die for mold compound packaging |
| US6066514A (en)* | 1996-10-18 | 2000-05-23 | Micron Technology, Inc. | Adhesion enhanced semiconductor die for mold compound packaging |
| JP2007198718A (en)* | 2005-12-27 | 2007-08-09 | Toppan Printing Co Ltd | Temperature control method |
| Publication | Publication Date | Title |
|---|---|---|
| TW319905B (en) | ||
| JPH0548000A (en) | Semiconductor device | |
| JPH02138761A (en) | semiconductor equipment | |
| JPH04162551A (en) | Semiconductor integrated circuit device | |
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| JPS62293746A (en) | Cooling equipment for semiconductor devices | |
| JPH034039Y2 (en) | ||
| JPH04214658A (en) | semiconductor equipment |